Relevant bibliographies by topics / Hardware - Peripherals

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  1. Journal articles
  2. Dissertations / Theses
  3. Books
  4. Book chapters
  5. Conference papers

Academic literature on the topic 'Hardware - Peripherals'

Author: Grafiati
Published: 4 June 2021
Last updated: 27 January 2023

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Journal articles on the topic "Hardware - Peripherals"

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Antara, Gede Krisnanda Juni. "Peripherals Using in Working Area." International Research Journal of Management, IT & Social Sciences 2, no. 5 (May 1, 2015): 7. http://dx.doi.org/10.21744/irjmis.v2i5.63.

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Peripherals is additional hardware who connected to the computer, usually with the aid of wires or now many wireless peripheral devices. These computer peripherals duty to help accomplish the task cannot be performed by hardware which is mounted inside the casing. These peripherals can be divided into 2 of the input and output peripherals. In daily activities, peripherals much help humanity though not much like the example Printer. Human previously prints using a typewriter that is very inefficient and after the invention of a machine that can print very fast then this machine that replaces the role of the previous cumbersome machine becomes very easy to use. In its development until now very much changed peripherals ranging in terms of composition and form very striking. For example a mouse which only consists of 1 buttons until now that could be a wireless
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Huang, Chun Ming, Kai Chao Yang, Yu Tsang Chang, Chien Ming Wu, and Shian Wen Chen. "A Tiny Development Platform with Virtualized Peripherals for Education of Embedded Software Design." Advanced Materials Research 748 (August 2013): 936–40. http://dx.doi.org/10.4028/www.scientific.net/amr.748.936.

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In the embedded software education, it is usually a burden to give every student a development board in the class due to limited budget. Besides, peripheral devices such as LCD panels also increase the cost. A cheap and flexible way is to use virtual embedded systems in the class. However, virtual systems cannot completely reflect the developing environment on real platforms. In this article, we propose the idea that combines the virtual and real embedded platforms. The proposed platform preserves the core of the hardware board, so that developers can design embedded software applications in the real developing environment. In addition, we eliminate the peripheral wires and connectors on hardware board and use virtual peripherals and peripherals on PC instead, such that designers can easily control and change peripherals. The proposed idea can significantly reduce cost and increase flexibility when teaching embedded software design. Moreover, the size of development board can be reduced as well. Without the restriction of peripheral connectors and devices, development boards become portable and more easy to use.
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An, Hyogeun, Sudong Kang, Guard Kanda, and Kwangki Ryoo. "RISC-V Hardware Synthesizable Processor Design Test and Verification Using User-Friendly Desktop Application." Webology 19, no. 1 (January 20, 2022): 4597–620. http://dx.doi.org/10.14704/web/v19i1/web19305.

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Although the RISC-V ISA has not been around for long, it is a processor architecture that has been highlighted by many businesses and individuals for its low-cost and rapid pace of development. They are open-source-synthesizable hardware processors with minimal functionality that is ideal for current IoT applications involving simple sensors and actuator controls. Due to some qualities of hardware, they can operate in areas where software programs and applications cannot be used whereas, these software programs that run on such hardware equally help in understanding how hardware operates. This paper, therefore, proposes and discusses the design, implementation, and internal verification and test platform for a Reduced Instruction Set Code-V’s (RISC-V) Instruction Set Architecture (ISA), using an interactive desktop program for a 32-bit single-cycle processor. This paper developed a system that functions as interactive assistance to RISC-V's ISA design and debugger using a more user-friendly desktop UI application. The uniqueness of this design is the flexibility of testing and debugging that is possible through either the software interface or through hardware peripherals such as Universal Asynchronous Receiver/Transmitter (UART) protocols in FPGA or even both. These peripherals allow users to view the contents of the register files and RAM being utilized by the implemented processor on the FPGA. The proposed desktop User Interface program monitors and controls the sequential processing and states of a 32-bit single-cycle RISC-V processor’s operation on an FPGA. Contents of the proposed processor’s registers and memory are displayed alongside other temporal or internal data. Internal components such as Program Counters (PC), Random Access Memory (RAM), are displayed all through the proposed User Interface (UI) program and also through various peripherals on the FPGA board. The software program is implemented using C# programing language through Microsoft Visual Studio 2019 Integrated Development Environment (IDE). The proposed hardware synthesizable processor core is implemented using Verilog Hardware Description Language (HDL) and synthesized with Xilinx Integrated Synthesis Environment (ISE) version 14.7. The proposed processor and its corresponding hardware test modules occupy 6476 Look-Up-Tables (LUT) and operate at a maximum frequency of 49MHz and its operation is verified on a Field Programmable Gate Array (FPGA). The proposed processor and its test platform can serve as a good educational tool as well as a help for processor design engineers both experienced and beginners.
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Khurshid, Anum, Sileshi Demesie Yalew, Mudassar Aslam, and Shahid Raza. "TEE-Watchdog: Mitigating Unauthorized Activities within Trusted Execution Environments in ARM-Based Low-Power IoT Devices." Security and Communication Networks 2022 (May 25, 2022): 1–21. http://dx.doi.org/10.1155/2022/8033799.

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Trusted execution environments (TEEs) are on the rise in devices all around us ranging from large-scale cloud-based solutions to resource-constrained embedded devices. With the introduction of ARM TrustZone-M, hardware-assisted trusted execution is now supported in IoT nodes. TrustZone-M provides isolated execution of security-critical operations and sensitive data-generating peripherals. However, TrustZone-M, like all other TEEs, does not provide a mechanism to monitor operations in the trusted areas of the device and software in the secure areas of an IoT device has access to the entire secure and nonsecure software stack. This is crucial due to the diversity of device manufacturers and component suppliers in the market, which manifests trust issues, especially when third-party peripherals are incorporated into a TEE. Compromised TEEs can be misused for industrial espionage, data exfiltration through system backdoors, and illegal data sharing. It is of utmost importance here that system peripheral behaviour in terms of resource access is in accordance with their intended usage that is specified during integration. We propose TEE-Watchdog, a lightweight framework that establishes MPU protections for secure system peripherals in TrustZone-enabled low-end IoT devices. TEE-Watchdog ensures blocking unauthorized peripheral accesses and logging of application misbehaviour running in the TEE based on a manifest file. We define lightweight specifications and structure for the application manifest file enlisting permissions for critical system peripherals using concise binary object representation (CBOR). We implement and evaluate TEE-Watchdog using a Musca-A2 test chipboard. Our microbenchmark evaluations on CPU time and RAM usage demonstrated the practicality of TEE-Watchdog. Securing the system peripherals using TEE-Watchdog protections induced a 1.4% overhead on the latency of peripheral accesses, which was 61 microseconds on our test board. Our optimized CBOR-encoded manifest file template also showed a decrease in manifest file size by 40% as compared to the standard file formats, e.g., JSON.
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Laney, Samuel R. "A General-Purpose Microcontroller-Based Framework for Integrating Oceanographic Sensors, Instruments, and Peripherals." Journal of Atmospheric and Oceanic Technology 34, no. 2 (February 2017): 415–27. http://dx.doi.org/10.1175/jtech-d-16-0069.1.

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AbstractSensors and instruments for basic oceanographic properties are becoming increasingly sophisticated, which both simplifies and complicates their use in field studies. This increased sophistication disproportionately affects smaller-scale observational efforts that are less likely to be well supported technically but which need to integrate instruments, sensors, and commonly needed peripheral devices in ways not envisioned by their manufacturers. A general-purpose hardware and software framework was developed around a widely used family of low-power microcontrollers to lessen the technical expertise and customization required to integrate sensors, instruments, and peripherals, and thus simplify such integration scenarios. Both the hardware and associated firmware development tools provide a range of features often required in such scenarios: serial data interfaces, analog inputs and outputs, logic lines and power-switching capability, nonvolatile storage of data and parameters for sampling or configuration, and serial communication interfaces to supervisory or telemetry systems. The microcontroller and additional components needed to implement this integration framework are small enough to encapsulate in standard cable splices, creating a small form factor “smart cable” that can be readily wired and programmed for a range of integration needs. An application programming library developed for this hardware provides skeleton code for functions commonly desired when integrating sensors, instruments, and peripherals. This minimizes the firmware programming expertise needed to apply this framework in many integration scenarios and thus streamlines the development of firmware for different field applications. Envisioned applications are in field programs where significant technical instrumentation expertise is unavailable or not cost effective.
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Vahid, Frank, Rilesh Patel, and Greg Stitt. "Propagating constants past software to hardware peripherals in fixed-application embedded systems." ACM SIGARCH Computer Architecture News 29, no. 5 (December 2001): 25–30. http://dx.doi.org/10.1145/563647.563654.

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Chrastecky, Libor, Jaromir Konecny, Martin Stankus, and Michal Prauzek. "A Hardware Approach of a Low-Power IoT Communication Interface by NXP FlexIO Module." Elektronika ir Elektrotechnika 25, no. 6 (December 6, 2019): 35–39. http://dx.doi.org/10.5755/j01.eie.25.6.24824.

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This article describes implementation possibilities of specialized microcontroller peripherals, as hardware solution for Internet of Things (IoT) low-power communication, interfaces. In this contribution, authors use the NXP FlexIO periphery. Meanwhile, RFC1662 is used as a reference communication standard. Implementation of RFC1662 is performed by software and hardware approaches. The total power consumption is measured during experiments. In the result section, authors evaluate a time-consumption trade-off between the software approach running in Central Processing Unit (CPU) and hardware implementation using NXP FlexIO periphery. The results confirm that the hardware-based approach is effective in terms of power consumption. This method is applicable in IoT embedded devices.
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Jin, Fei, and Lian Yu Zhao. "Development and Implementation of a Bootloader Based on the Embedded Systems." Applied Mechanics and Materials 48-49 (February 2011): 419–22. http://dx.doi.org/10.4028/www.scientific.net/amm.48-49.419.

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This paper introduces design principles and steps of a bootloader, including the analysis of S3C2440A microprocess with its peripherals, hardware initialization process and the automatic loading mode and the steps of Shell command interpreter, and gives parts of the core codes and the experi- mental results.
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Bhatia, S. N. "A Comprehensive Interactive On-line Computer System for Research and Clinical Practice in Orthodontics." British Journal of Orthodontics 12, no. 1 (January 1985): 15–26. http://dx.doi.org/10.1179/bjo.12.1.15.

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An interactive on-line computer system for the measurement of cephalometric radiographs, and facial and plaster cast photographs is described. The details of the hardware (computer and peripherals) and software are provided. Numerical and graphical analysis and presentation of the resultant data are discussed. Many research and clinical applications of the system are outlined.
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Dubey, Awanish Chandra, and Anantha V. Subramanian. "Hardware in the Loop Simulation and Control Design for Autonomous Free Running Ship Models." Defence Science Journal 70, no. 4 (July 13, 2020): 469–76. http://dx.doi.org/10.14429/dsj.70.14926.

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This paper presents an hardware-in-the-loop (HIL) simulation system tool to test and validate an autonomous free running model system for ship hydrodynamic studies with a view to verification of the code, the control logic and system peripherals. The computer simulation of the plant model in real-time computer does not require the actual physical system and reduces the development cost and time for control design and testing purposes. The HIL system includes: the actual programmable embedded controller along with peripherals and a plant model virtually simulated in a real-time computer. With regard to ship controller design for ship model testing, this study describes a plant model for surge and a Nomoto first order steering dynamics, both implemented using Simulink software suit. The surge model captures a quasi-steady state relationship between surge speed and the propeller rpms, obtained from simple forward speed towing tank tests or derived analytically. The Nomoto first order steering dynamics is obtained by performing the standard turning circle test at model scale. The control logic obtained is embedded in a NI-cRIO based controller. The surge and steering dynamics models are used to design a proportional-derivative controller and an LQR controller. The controller runs a Linux based real-time operating system programmed using LabVIEW software. The HIL simulation tool allows for the emulation of standard ship hydrodynamic tests consisting of straight line, turning circle and zigzag to validate the combined system performance, prior to actual for use in the autonomous free-running tests.
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Dissertations / Theses on the topic "Hardware - Peripherals"

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Higgi, A. H. M. "Computer architecture with high performance peripherals." Thesis, Bucks New University, 1986. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.373587.

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Eriksen, Mikael Kristian. "Ground Station and Hardware Peripherals for Fixed-wing UAV: CyberSwan." Thesis, Norwegian University of Science and Technology, Department of Engineering Cybernetics, 2007. http://urn.kb.se/resolve?urn=urn:nbn:no:ntnu:diva-9611.

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In this master's thesis, a ground station (GS) for the fixed-wing UAV: CyberSwan (CS), has been developed. The CS was designed for surveillance purposes, and two other master's theses deals with the work of making it autonomous (Høstmark (2007) and Bjørntvedt (2007)). Having a GS will make it possible to communicate with the CS in-flight, and present data and video from the CS through communication devices. The GS has been realised using LabVIEW development software from citet{labview}. A CS simulator was also developed in LabVIEW for test purposes. In addition was a Global Position System (GPS) receiver board, and a Radio Frequency (RF) communication board, developed. The GPS receiver was used to position the GS, and used as a source for position correction data. The RF communication board was developed for mounting in the CS and to be connected to its computer system to enable communication with the GS. The GS used a RF demo board for communication. A wireless camera was mounted on the CS for in-flight video surveillance, and a ultrasound ranging device was tested intended to be used in a autonomous landing situation. A hardware in the loop (HIL) test was performed to test the GS's communication capacity. Here the developed CS simulator was used, as the CS computer system was not completed (Bjørntvedt 2007). The test proved it possible to transfer a CS status message at 4 Hz, making the chosen communication device a good choice for the intended purpose.

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Meier, Anton. "Hardware optimizations and solutions for wireless low power kinetic energy applications." Thesis, KTH, Skolan för datavetenskap och kommunikation (CSC), 2017. http://urn.kb.se/resolve?urn=urn:nbn:se:kth:diva-214939.

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The number of IoT (Internet of Things) devices available on the market has been growing rapidly in the past few years and is expected to grow even more in the years to come. These IoT devices are predominantly in the form of very small wireless peripherals with low power consumption making them suitable for running over extended periods of time using only coin cell batteries. In this degree project, conducted at Shortcut Labs AB, we investigate whether or not some of these devises could be suitable for being powered exclusively by kinetic energy without the need for any long term interim power storage, such as batteries or super capacitors. If this is possible it would not only remove the hassle of having to replace batteries at regular intervals, which is important if the devices are positioned at remote locations, but it could also help to reduce the amount of battery waste in the long run. For the sake of this project we have designed a hardware circuit that is able to communicate with other devices using a custom built protocol running on top of the Bluetooth Low Energy standard. This circuit does not require a battery and could potentially be used for many years without the need for any maintenance. To demonstrate this, the technology has successfully been applied to a concept product in the form of a dimmer wheel that can be used to change the brightness or color of Smart Home light bulbs. This is achieved by using a small electric motor as a generator in combination with an energy harvesting circuit in order to generate a stable voltage suitable for use with a wireless module.
Antalet uppkopplade IoT-enheter har ökat drastiskt de senaste åren och väntas fortsätta öka framöver. IoT, eller Sakernas Internet som det kallas på svenska, består övervägande av små trådlösa enheter med så pass låg strömförbrukning att de ofta kan drivas enbart av knappcellsbatterier. I detta examensarbete, utfört på Shortcut Labs AB, undersöker vi huruvida några av dessa enheter med fördel skulle kunna drivas uteslutande av rörelseenergi utan att kräva någon form av långtidsmellanlalgring av denna energi, så som exempelvis i ett batteri eller en kondensator. Om detta var möjligt så skulle det innebära att man slipper byta batterier vid jämna mellanrum, vilket kan vara viktigt om enheten i fråga är otillgänglig placerat. Givetvis kan också onödigt batteriavfall undvikas, något som alltid är eftertraktat i branschen. I detta projekt så har vi designat och konstruerat en elektronikkrets som trådlöst kan kommunicera med andra enheter via ett skräddarsytt protokoll som är implementerat ovanpå Bluetooth Low Energstandarden. Denna krets kräver inget batteri och skulle potentiellt sett kunna operera under många år utan behov av underhåll. För att demonstrera detta så har tekniken applicerats på en konceptprodukt i form av en dimmer som kan användas för att ändra antingen ljusstyrkan eller färgen hos så kallade smarta lampor. Detta uppnås genom att använda en liten DC-motor kombinerad med en energiskördande krets som genererar en lämplig stabil spänning, vilket krävs för att kretsen skall kunna operera.
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Kulzer, Pedro Manuel Casal. "Novel hardware and software combination for automotive motorsport vehicles based on direct processing of graphical functions." Doctoral thesis, Universidade de Aveiro, 2015. http://hdl.handle.net/10773/14093.

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Doutoramento em Engenharia Eletrónica
The main motivation for the work presented here began with previously conducted experiments with a programming concept at the time named "Macro". These experiments led to the conviction that it would be possible to build a system of engine control from scratch, which could eliminate many of the current problems of engine management systems in a direct and intrinsic way. It was also hoped that it would minimize the full range of software and hardware needed to make a final and fully functional system. Initially, this paper proposes to make a comprehensive survey of the state of the art in the specific area of software and corresponding hardware of automotive tools and automotive ECUs. Problems arising from such software will be identified, and it will be clear that practically all of these problems stem directly or indirectly from the fact that we continue to make comprehensive use of extremely long and complex "tool chains". Similarly, in the hardware, it will be argued that the problems stem from the extreme complexity and inter-dependency inside processor architectures. The conclusions are presented through an extensive list of "pitfalls" which will be thoroughly enumerated, identified and characterized. Solutions will also be proposed for the various current issues and for the implementation of these same solutions. All this final work will be part of a "proof-of-concept" system called "ECU2010". The central element of this system is the before mentioned "Macro" concept, which is an graphical block representing one of many operations required in a automotive system having arithmetic, logic, filtering, integration, multiplexing functions among others. The end result of the proposed work is a single tool, fully integrated, enabling the development and management of the entire system in one simple visual interface. Part of the presented result relies on a hardware platform fully adapted to the software, as well as enabling high flexibility and scalability in addition to using exactly the same technology for ECU, data logger and peripherals alike. Current systems rely on a mostly evolutionary path, only allowing online calibration of parameters, but never the online alteration of their own automotive functionality algorithms. By contrast, the system developed and described in this thesis had the advantage of following a "clean-slate" approach, whereby everything could be rethought globally. In the end, out of all the system characteristics, "LIVE-Prototyping" is the most relevant feature, allowing the adjustment of automotive algorithms (eg. Injection, ignition, lambda control, etc.) 100% online, keeping the engine constantly working, without ever having to stop or reboot to make such changes. This consequently eliminates any "turnaround delay" typically present in current automotive systems, thereby enhancing the efficiency and handling of such systems.
A principal motivação para o trabalho que conduziu a esta tese residiu na constatação de que os actuais métodos de modelação de centralinas automóveis conduzem a significativos problemas de desenvolvimento e manutenção. Como resultado dessa constatação, o objectivo deste trabalho centrou-se no desenvolvimento de um conceito de arquitectura que rompe radicalmente com os modelos state-of-the-art e que assenta num conjunto de conceitos que vieram a ser designados de "Macro" e "Celular ECU". Com este modelo pretendeu-se simultaneamente minimizar a panóplia de software e de hardware necessários à obtenção de uma sistema funcional final. Inicialmente, esta tese propõem-se fazer um levantamento exaustivo do estado da arte na área específica do software e correspondente hardware das ferramentas e centralinas automóveis. Os problemas decorrentes de tal software serão identificados e, dessa identificação deverá ficar claro, que praticamente todos esses problemas têm origem directa ou indirecta no facto de se continuar a fazer um uso exaustivo de "tool chains" extremamente compridas e complexas. De forma semelhante, no hardware, os problemas têm origem na extrema complexidade e inter-dependência das arquitecturas dos processadores. As consequências distribuem-se por uma extensa lista de "pitfalls" que também serão exaustivamente enumeradas, identificadas e caracterizadas. São ainda propostas soluções para os diversos problemas actuais e correspondentes implementações dessas mesmas soluções. Todo este trabalho final faz parte de um sistema "proof-of-concept" designado "ECU2010". O elemento central deste sistema é o já referido conceito de “Macro”, que consiste num bloco gráfico que representa uma de muitas operações necessárias num sistema automóvel, como sejam funções aritméticas, lógicas, de filtragem, de integração, de multiplexagem, entre outras. O resultado final do trabalho proposto assenta numa única ferramenta, totalmente integrada que permite o desenvolvimento e gestão de todo o sistema de forma simples numa única interface visual. Parte do resultado apresentado assenta numa plataforma hardware totalmente adaptada ao software, bem como na elevada flexibilidade e escalabilidade, para além de permitir a utilização de exactamente a mesma tecnologia quer para a centralina, como para o datalogger e para os periféricos. Os sistemas actuais assentam num percurso maioritariamente evolutivo, apenas permitindo a calibração online de parâmetros, mas nunca a alteração online dos próprios algoritmos das funcionalidades automóveis. Pelo contrário, o sistema desenvolvido e descrito nesta tese apresenta a vantagem de seguir um "clean-slate approach", pelo que tudo pode ser globalmente repensado. No final e para além de todas as restantes características, o “LIVE-PROTOTYPING” é a funcionalidade mais relevante, ao permitir alterar algoritmos automóveis (ex: injecção, ignição, controlo lambda, etc.) de forma 100% online, mantendo o motor constantemente a trabalhar e sem nunca ter de o parar ou re-arrancar para efectuar tais alterações. Isto elimina consequentemente qualquer "turnaround delay" tipicamente presente em qualquer sistema automóvel actual, aumentando de forma significativa a eficiência global do sistema e da sua utilização.
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Yao, Håkansson Jonathan, and Niklas Rosencrantz. "Formal Verification of Hardware Peripheral with Security Property." Thesis, KTH, Skolan för datavetenskap och kommunikation (CSC), 2017. http://urn.kb.se/resolve?urn=urn:nbn:se:kth:diva-209807.

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One problem with computers is that the operating system automatically trusts any externallyconnected peripheral. This can result in abuse when a peripheral technically can violate the security model because the peripheral is trusted. Because of that the security is an important issue to look at.The aim of our project is to see in which cases hardware peripherals can be trusted. We built amodel of the universal asynchronous transmitter/receiver (UART), a model of the main memory(RAM) and a model of a DMA controller. We analysed interaction between hardware peripherals,user processes and the main memory.One of our results is that connections with hardware peripherals are secure if the hardware is properly configured. A threat scenario could be an eavesdropper or man-in-the-middle trying to steal data or change a cryptographic key.We consider the use-cases of DMA and protecting a cryptographic key. We prove the well-behavior of the algorithm. Some error-traces resulted from incorrect modelling that was resolved by adjusting the models. Benchmarks were done for different memory sizes.The result is that a peripheral can be trusted provided a configuration is done. Our models consist of finite state machines and their corresponding SMV modules. The models represent computer hardware with DMA. We verified the SMV models using the model checkers NuSMV and nuXmv.
Målet med vårt projekt är att verifiera olika specifikationer av externa enheter som ansluts till datorn. Vi utför formell verifikation av sådan datorutrustning och virtuellt minne. Verifikation med temporal logik, LTL, utförs. Specifikt verifierar vi 4 olika use-case och 9 formler för seriell datakommunikation, DMA och virtuellt minne. Slutsatsen är att anslutning av extern hårdvara är säker om den är ordentligt konfigurerad.Vi gör jämförelser mellan olika minnesstorlekar och mätte tidsåtgången för att verifiera olika system. Vi ser att tidsåtgången för verifikation är långsammare än linjärt beroende och att relativt små system tar relativt lång tid att verifiera.
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Serdar, Usenmez. "Design Of An Integrated Hardware-in-the-loop Simulation System." Master's thesis, METU, 2010. http://etd.lib.metu.edu.tr/upload/2/12612051/index.pdf.

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This thesis aims to propose multiple methods for performing a hardware-in-the-loop simulation, providing the hardware and software tools necessary for design and execution. For this purpose, methods of modeling commonly encountered dynamical system components are explored and techniques suitable for calculating the states of the modeled system are presented. Modules and subsystems that enable the realization of a hardware-in-the-loop simulation application and its interfacing with external controller hardware are explained. The thesis also presents three different simulation scenarios. Solutions suitable for these scenarios are provided along with their implementations. The details and specifications of the developed software packages and hardware platforms are given. The provided results illustrate the advantages and disadvantages of the approaches used in these solutions.
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Taylor, Charles. "MODERNIZATION OF THE MOCK CIRCULATORY LOOP: ADVANCED PHYSICAL MODELING, HIGH PERFORMANCE HARDWARE, AND INCORPORATION OF ANATOMICAL MODELS." VCU Scholars Compass, 2013. http://scholarscompass.vcu.edu/etd/493.

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A systemic mock circulatory loop plays a pivotal role as the in vitro assessment tool for left heart medical devices. The standard design employed by many research groups dates to the early 1970's, and lacks the acuity needed for the advanced device designs currently being explored. The necessity to update the architecture of this in vitro tool has become apparent as the historical design fails to deliver the performance needed to simulate conditions and events that have been clinically identified as challenges for future device designs. In order to appropriately deliver the testing solution needed, a comprehensive evaluation of the functionality demanded must be understood. The resulting system is a fully automated systemic mock circulatory loop, inclusive of anatomical geometries at critical flow sections, and accompanying software tools to execute precise investigations of cardiac device performance. Delivering this complete testing solution will be achieved through three research aims: (1) Utilization of advanced physical modeling tools to develop a high fidelity computational model of the in vitro system. This model will enable control design of the logic that will govern the in vitro actuators, allow experimental settings to be evaluated prior to execution in the mock circulatory loop, and determination of system settings that replicate clinical patient data. (2) Deployment of a fully automated mock circulatory loop that allows for runtime control of all the settings needed to appropriately construct the conditions of interest. It is essential that the system is able to change set point on the fly; simulation of cardiovascular dynamics and event sequences require this functionality. The robustness of an automated system with incorporated closed loop control logic yields a mock circulatory loop with excellent reproducibility, which is essential for effective device evaluation. (3) Incorporating anatomical geometry at the critical device interfaces; ascending aorta and left atrium. These anatomies represent complex shapes; the flows present in these sections are complex and greatly affect device performance. Increasing the fidelity of the local flow fields at these interfaces delivers a more accurate representation of the device performance in vivo.
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Hedin, Alexander. "Testing and evaluation of the integratability of the Senior processor." Thesis, Linköpings universitet, Datorteknik, 2011. http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-71043.

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The first version of the Senior processor was created as part of a thesis projectin 2007. This processor was completed and used for educational purposes atLinköpings University. In 2008 several parts of the processor were optimized andthe processor expanded with additional functionality as part of another thesisproject. In 2009 an EU funded project called MULTI-BASE started, in which theComputer Division at the Department of Electrical Engineering participated in.For their part of the MULTI-BASE project, the Senior processor was selected tobe used. After continuous revision and development, this processor was sent formanufacturing. The assignment of this thesis project was to test and verify the different func-tions implemted in the Senior processor. To do this a PCB was developed fortesting the Senior processor together with a Virtex-4 FPGA. Extensive testingwas done on the most important functions of the Senior processor. These testsshowed that the manufactured Senior processor works as designed and that it alonecan perform larger calculations and use external hardware accelerators with thehelp of its various interfaces.
Den första versionen av Senior processorn skapades som en del i ett examensarbe-te under 2007, denna processor färdigställdes och användes i utbildningssyfte påLinköping Universitet. 2008 optimerades flera delar av processorn och utökadesmed extra funktionalitet som del av ytterligare ett examensarbete. 2009 startadeett EU finansierat projekt vid namn MULTI-BASE, som ISYs Datortekniks avdel-ning deltar i. Till deras del av MULTI-BASE projektet valdes Senior processorn attanvändas, efter ytterligare utveckling skickades denna processor för tillverkning. Detta examensarbete hade i uppgift att testa och verifiera de olika funktionernasom Senior processorn har implementerats med. För att göra detta tillverkades ettkretskort som ska användas för att testa Senior processorn tillsammans med enVirtex-4 FPGA. Utförliga tester gjordes på de viktigaste funktionerna hos Seniorprocessorn, dessa tester visade att den tillverkade Senior processorn fungerar somplanerat. Den kan på egen hand utföra större beräkningar och använda sig avexterna hårdvare acceleratorer med hjälp av sina olika gränssnitt.
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Rodrigues, David Alexandre Bento. "Desenvolvimento de um dispositivo portátil de eletrocardiograma." Master's thesis, 2013. http://hdl.handle.net/10316/26152.

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Dissertação de Mestrado em Engenharia Biomédica apresentada à Faculdade de Ciências e Tecnologia da Universidade de Coimbra.
As doenças cardiovasculares continuam a liderar o ranking mundial de causas de morte. Este factor, associado àquilo que parece ser um aumento contínuo da população idosa e às limitações de infraestruturas de saúde capazes de dar resposta às suas necessidades, fazem do Ambient Assisted Living (AAL) uma solução cada vez mais válida. O recurso a soluções portáteis que permitem uma monitorização e diagnóstico mais rápido de diversos índices orgânicos, está na origem deste projeto, que tem como objetivo central a realização do hardware e firmware para um dispositivo portátil de eletrocardiograma (ECG). Esta tese detalha o desenvolvimento de um ECG portátil. O trabalho realizado incluiu a elaboração de esquemáticos e de uma Printed Circuit Board (PCB) integrando todos os componentes estudados e selecionados para incorporar o dispositivo. Recorreu-se, no projeto, a um circuito integrado da Texas Instruments, o ADS1192, que possui os conversores analógico-digitais (ADC) para as duas entradas diferenciais desenhadas que transportam o sinal analógico recolhido através de quatro elétrodos que compõem o sistema. A programação do circuito desenvolvido foi conseguida através da utilização de uma placa de desenvolvimento que contém um microcontrolador (MCU), o ATmega 128, para o qual foi desenvolvido todo o firmware que permite o correto funcionamento do ADS1192. Para o desenvolvimento do hardware estudaram-se fatores como: as dimensões finais do dispositivo; o consumo elétrico de todos os componentes a integrar o circuito; o recurso mínimo a filtros analógicos em detrimento de filtros digitais para o processamento de sinal. Foram elaborados testes ao sistema desenvolvido que possibilitaram a recolha e a análise do sinal de ECG proveniente dos dois canais, com o recurso a um simulador de sinais de eletrocardiograma, e foi desenvolvida uma interface em C# para construir um gráfico em tempo real do sinal recolhido. Por fim, são ainda discutidos formatos de armazenamento de dados de ECG, realizando-se, inclusive, uma conversão para o formato Standard Communications Protocol for Computer Assisted Electrocardiography (SCP-ECG) depois de se ter adicionado uma memória flash ao sistema.
Cardiovascular diseases are still leading the ranking of death causes worldwide. This fact, in association with what looks like a chronic increase in the elderly population and limited health infrastructures capable of answering their needs, make the Ambient Assisted Living (AAL) an increasingly valid solution. The use of portable solutions that allow constant monitoring and faster diagnosis are at the origin of this project, with the main objective of developing a portable electrocardiogram (ECG). This thesis deals with the entire development of this medical device. It includes the design of schematics and of a Printed Circuit Board (PCB) that includes the electrical components selected to incorporate the device disposed within a studied configuration. In this project, an integrated circuit from Texas Instruments was used, the ADS1192, which has already the analog to digital converters (ADCs) for two differential inputs designed to carry the ECG analog signals collected through four electrodes. The developed circuit was programmed using a development board containing a microcontroller (MCU), the ATmega 128, where the entire firmware was designed to enable the correct operation of ADS1192. During hardware development, several factors were studied, such as the dimensions of the device, the power consumption of all components of the integrated circuit and the minimum number of analog filters needed in the system, as we had the aim of replacing analog filters by digital filters at the signal processing level. Several tests were made to the system that enabled the collection and analysis of the ECG signals from the two channels with the use of an ECG signal simulator, and an interface developed in C# for building a real-time graphic of the acquired signal. Finally, storage formats for ECG data were discussed and, after the addition of a flash memory to the system, a conversion of the ECG data collected from the ADS1192 to the Standard Communications Protocol for Computer Assisted Electrocardiography (SCP-ECG) standard format was achieved.
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Mbambo, Goodwill Phezulu. "Challenges encountered by NATED information system students at Majuba TVET College, Newcastle." Diss., 2017. http://hdl.handle.net/10500/25510.

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A large number of students are struggling with Information System and other computer related subjects. This has a negative impact on students’ academic performance at large. In fact, a number of students from various institutions of higher learning are facing serious Information System challenges. Information System student on NATED curriculum at Majuba TVET College are facing serious challenges on their studies. This has been indicated by their performance on Information System. This article intends to draw an attention of education stakeholders, College management and lecturers to this matter. A number of reasons leading to students poor performance in this field has been mentioned. Various studies have been conducted but yet the lack of Information System skills still persists. The main question that guided this study was: What are the stakeholders’ perceptions of the challenges encountered Information System students? In order to explore and to get some findings for this case qualitative study, semi-structured interviews with relevant stakeholders were conducted. Sample of lecturers, student’s focus groups and college management members was conducted. Data collected from various participants were transcribed verbatim. A combination of literature and data collected produced some findings on the matter. In an attempt to answer the main question, recommendations were made.
Educational Leadership and Management
M. Ed. (Education Management)
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Books on the topic "Hardware - Peripherals"

1

Kelly, Brian W. DEC microcomputer directory: Hardware, software, and peripherals. New York: Wiley, 1985.

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Brey, Barry B. Microprocessors and peripherals: Hardware, software, interfacing, and applications. 2nd ed. Columbus: Merrill Pub. Co., 1988.

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Microprocessors and peripherals: Hardware, software, interfacing, and applications. 2nd ed. New York: Merrill, 1992.

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Computer busses design and application. Boca Raton, FL: CRC Press, 2000.

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1954-, Starrett Bob, ed. Technology edge: A guide to CD-ROM. Carmel, IN: New Riders Pub., 1992.

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Beil, Benjamin, Gundolf S. Freyermuth, Hanns Christian Schmidt, and Raven Rusch, eds. Playful Materialities. Bielefeld, Germany: transcript Verlag, 2022. http://dx.doi.org/10.14361/9783839462003.

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Game culture and material culture have always been closely linked. Analog forms of rule-based play (ludus) would hardly be conceivable without dice, cards, and game boards. In the act of free play (paidia), children as well as adults transform simple objects into multifaceted toys in an almost magical way. Even digital play is suffused with material culture: Games are not only mediated by technical interfaces, which we access via hardware and tangible peripherals. They are also subject to material hybridization, paratextual framing, and processes of de-, and re-materialization.
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Carlson, Jeff. Palm organizers. 3rd ed. Berkeley, CA: Peachpit Press, 2004.

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Carlson, Jeff. Palm organizers. Berkeley, CA: Peachpit Press, 2000.

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Carlson, Jeff. Palm organizers. 2nd ed. Berkeley, CA: Peachpit Press, 2002.

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N, Schmitz Agen G., ed. Palm organizers. 4th ed. Berkeley, CA: Peachpit Press, 2005.

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Book chapters on the topic "Hardware - Peripherals"

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Halsey, Mike. "Hardware and Peripherals Troubleshooting." In Troubleshooting and Supporting Windows 11, 433–81. Berkeley, CA: Apress, 2022. http://dx.doi.org/10.1007/978-1-4842-8728-6_15.

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Bradley, Alan. "Hardware and Software Support." In Peripherals for Computer Systems, 199–218. London: Palgrave Macmillan UK, 1991. http://dx.doi.org/10.1007/978-1-349-21172-2_4.

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Courtney, Jim. "Hardware Considerations: PCs, Mobiles, and Peripherals." In Experience Skype to the Max, 173–87. Berkeley, CA: Apress, 2015. http://dx.doi.org/10.1007/978-1-4842-0656-0_10.

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Halsey, Mike. "Connecting and Using Peripherals and Hardware." In Windows 11 Made Easy, 187–99. Berkeley, CA: Apress, 2022. http://dx.doi.org/10.1007/978-1-4842-8035-5_10.

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Plopski, Alexander, Naoto Ienaga, and Maki Sugimoto. "Tracking Systems: Calibration, Hardware, and Peripherals." In Springer Handbooks, 211–38. Cham: Springer International Publishing, 2021. http://dx.doi.org/10.1007/978-3-030-67822-7_9.

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Halsey, Mike. "Diagnosing and Repairing Problem Hardware and Peripherals." In Windows 10 Troubleshooting, 115–35. Berkeley, CA: Apress, 2016. http://dx.doi.org/10.1007/978-1-4842-0925-7_7.

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Halsey, Mike. "Diagnosing and Repairing Problems with Hardware and Peripherals." In Windows 10 Troubleshooting, 173–97. Berkeley, CA: Apress, 2021. http://dx.doi.org/10.1007/978-1-4842-7471-2_7.

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Stitt, Greg, and Frank Vahid. "Propagating Constants Past Software to Hardware Peripherals on Fixed-Application Embedded Systems." In Compilers and Operating Systems for Low Power, 115–35. Boston, MA: Springer US, 2003. http://dx.doi.org/10.1007/978-1-4419-9292-5_7.

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Francillon, Aurélien, Sam L. Thomas, and Andrei Costin. "Finding Software Bugs in Embedded Devices." In Security of Ubiquitous Computing Systems, 183–97. Cham: Springer International Publishing, 2021. http://dx.doi.org/10.1007/978-3-030-10591-4_11.

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AbstractThe goal of this chapter is to introduce the reader to the domain of bug discovery in embedded systems which are at the core of the Internet of Things. Embedded software has a number of particularities which makes it slightly different to general purpose software. In particular, embedded devices are more exposed to software attacks but have lower defense levels and are often left unattended. At the same time, analyzing their security is more difficult because they are very “opaque”, while the execution of custom and embedded software is often entangled with the hardware and peripherals. These differences have an impact on our ability to find software bugs in such systems. This chapter discusses how software vulnerabilities can be identified, at different stages of the software life-cycle, for example during development, during integration of the different components, during testing, during the deployment of the device, or in the field by third parties.
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Slavin, Konstantin V. "Technical Aspects of Peripheral Nerve Stimulation: Hardware and Complications." In Peripheral Nerve Stimulation, 189–202. Basel: KARGER, 2011. http://dx.doi.org/10.1159/000323275.

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Conference papers on the topic "Hardware - Peripherals"

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Spensky, Chad, Aravind Machiry, Nilo Redini, Colin Unger, Graham Foster, Evan Blasband, Hamed Okhravi, Christopher Kruegel, and Giovanni Vigna. "Conware: Automated Modeling of Hardware Peripherals." In ASIA CCS '21: ACM Asia Conference on Computer and Communications Security. New York, NY, USA: ACM, 2021. http://dx.doi.org/10.1145/3433210.3437532.

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Luettig, Bastian, Benedikt Schwaemmle, and Bjoern Annighoefer. "Using Neural Networks to Identify Wired Peripherals Connected to Integrated Modular Avionics Hardware." In 2021 IEEE/AIAA 40th Digital Avionics Systems Conference (DASC). IEEE, 2021. http://dx.doi.org/10.1109/dasc52595.2021.9594439.

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Su, Bin, Sanjay Tiku, and Krishna Darbha. "Drop Simulation and Testing in Computer Peripheral Hardware Development." In ASME 2009 International Mechanical Engineering Congress and Exposition. ASMEDC, 2009. http://dx.doi.org/10.1115/imece2009-12401.

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Drop is one of the most common user scenarios for computer peripherals like wired/wireless keyboards, mice, and webcams. Failures due to such impact events are typical examples of overstress types of failures that occur during the useful life of a product. The ability of computer peripheral devices to survive impact with minimal to no impact to product performance or aesthetics is a goal for the product development teams. Engineers have to choose the proper materials and use different simulation and test methods for creating product designs that will survive multiple drop events. Traditional product development process involves iterations of design-physical test-design modification cycles to meet drop requirements. To reduce iterations, expedite product development and reduce time-to-market, virtual drop simulations are conducted at an early stage in product development without the need for any physical samples. This paper presents case-studies on this approach to product development. Case-studies are presented for a keyboard and a mouse. The case-study shows how drop simulation results were used to inform design decisions and how design improvements in terms of material selection or actual feature changes were made early in the design cycle. The study illustrates the use of a high speed camera to capture movies of product performance in drop tests to further discover weaknesses and correlate actual results with simulations. Using a combination of simulation and capturing deformation information with a high speed camera during actual testing, the product development iterations were minimized in terms of cost and time.
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Brunner, Matthias, Johannes Reinhart, Bernd Schulz, Erik Preissing, Stefan Moennikes, and Bjoern Annighoefer. "Hardware-Independent Self-Discovery of Peripherals and Modules of a Self-Adaptive Avionics Platform." In 2022 IEEE/AIAA 41st Digital Avionics Systems Conference (DASC). IEEE, 2022. http://dx.doi.org/10.1109/dasc55683.2022.9925770.

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Reis, João Gabriel, Eduardo Augusto Bezerra, and Antônio Augusto Fröhlich. "A Framework for Predictable Hardware/Software Component Reconfiguration." In XXX Concurso de Teses e Dissertações da SBC. Sociedade Brasileira de Computação - SBC, 2017. http://dx.doi.org/10.5753/ctd.2017.3460.

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The current pace of innovation in computing makes it difficult to assume a fixed set of requirements for the whole life span of a system. Aggressive technology scaling also imposes additional constraints to modern hardware platforms. Field-Programmable Gate Array (FPGA) reconfiguration can help systems cope with dynamic requirements such as performance and power, hardware defects due to Negative-Bias Temperature Instability (NBTI) and Process, Voltage and Temperature (PVT) variations, or application requirements unforeseen at design time. This work proposes a framework for reconfigurable components whereby the reconfiguration of a component implementation is performed transparently without user intervention. The reconfiguration process is confined in system's idle time without interfering with or being interfered by other activities occurring in the system or even peripherals performing I/O. A telecommunications switch was used as a case study for the deployment of reconfigurable components as well as the impact I/O interference has in the process and to explore non-functional trade-offs between implementations.
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Sideris, Isidoros, Nikos Moshopoulos, and Kiamal Pekmestzi. "A hardware peripheral for Java bytecodes translation acceleration." In the 2010 ACM Symposium. New York, New York, USA: ACM Press, 2010. http://dx.doi.org/10.1145/1774088.1774201.

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Malenko, Maja, and Marcel Baunach. "Hardware/Software Co-designed Peripheral Protection in Embedded Devices." In 2019 IEEE International Conference on Industrial Cyber Physical Systems (ICPS). IEEE, 2019. http://dx.doi.org/10.1109/icphys.2019.8780325.

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Krunic, Momcilo, Ivan Letvencuk, Ivan Povazan, and Ivana Stanojlovic. "Automatic source code generation of peripheral hardware modules firmware." In 2013 21st Telecommunications Forum Telfor (TELFOR). IEEE, 2013. http://dx.doi.org/10.1109/telfor.2013.6716359.

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Iatrou, Chris Paul, and Leon Urbas. "OPC UA hardware offloading engine as dedicated peripheral IP core." In 2016 IEEE World Conference on Factory Communication Systems (WFCS). IEEE, 2016. http://dx.doi.org/10.1109/wfcs.2016.7496520.

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Culic, Ioana, Alexandra Radovici, and Laura Mihaela Vasilescu. "Auto-generating Google Blockly visual programming elements for peripheral hardware." In 2015 14th RoEduNet International Conference - Networking in Education and Research (RoEduNet NER). IEEE, 2015. http://dx.doi.org/10.1109/roedunet.2015.7311975.

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