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Journal articles on the topic 'Hardware Security'

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1

Polian, Ilia. "Hardware-oriented security." it - Information Technology 61, no. 1 (2019): 1–2. http://dx.doi.org/10.1515/itit-2019-0008.

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2

Hunter, Philip. "Hardware-based security." Computer Fraud & Security 2004, no. 2 (2004): 11–12. http://dx.doi.org/10.1016/s1361-3723(04)00029-6.

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3

Sengupta, Anirban. "Hardware Security of CE Devices [Hardware Matters]." IEEE Consumer Electronics Magazine 6, no. 1 (2017): 130–33. http://dx.doi.org/10.1109/mce.2016.2614552.

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4

Jin, Yier. "Introduction to Hardware Security." Electronics 4, no. 4 (2015): 763–84. http://dx.doi.org/10.3390/electronics4040763.

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5

Koushanfar, Farinaz, and Miodrag Potkonjak. "What is hardware security?" ACM SIGDA Newsletter 40, no. 9 (2010): 1. http://dx.doi.org/10.1145/1866978.1866979.

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6

Fox, Dirk. "Hardware Security Module (HSM)." Datenschutz und Datensicherheit - DuD 33, no. 9 (2009): 564. http://dx.doi.org/10.1007/s11623-009-0145-9.

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7

Guin, Ujjwal, Navid Asadizanjani, and Mark Tehranipoor. "Standards for Hardware Security." GetMobile: Mobile Computing and Communications 23, no. 1 (2019): 5–9. http://dx.doi.org/10.1145/3351422.3351424.

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8

Qin, Maoyuan, Jiale Li, Jiaqi Yan, Zishuai Hao, Wei Hu, and Baolong Liu. "HT-PGFV: Security-Aware Hardware Trojan Security Property Generation and Formal Security Verification Scheme." Electronics 13, no. 21 (2024): 4286. http://dx.doi.org/10.3390/electronics13214286.

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Property-driven hardware verification provides a promising way to uncover design vulnerabilities. However, developing security properties that check for highly concealed security vulnerabilities remains a significant challenge. In this paper, we propose a scheme, called HT-PGFV, to implement hardware Trojan security property assertion automatic generation and formal security verification for Trojan-infected designs. In our scheme, we develop a hardware Trojan security property assertion generation method for automated hardware which can extract hardware Trojan security properties from Trojan-i
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9

Sidhu, Simranjeet, Bassam J. Mohd, and Thaier Hayajneh. "Hardware Security in IoT Devices with Emphasis on Hardware Trojans." Journal of Sensor and Actuator Networks 8, no. 3 (2019): 42. http://dx.doi.org/10.3390/jsan8030042.

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Security of IoT devices is getting a lot of attention from researchers as they are becoming prevalent everywhere. However, implementation of hardware security in these devices has been overlooked, and many researches have mainly focused on software, network, and cloud security. A deeper understanding of hardware Trojans (HTs) and protection against them is of utmost importance right now as they are the prime threat to the hardware. This paper emphasizes the need for a secure hardware-level foundation for security of these devices, as depending on software security alone is not adequate enough.
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Adlkofer, Hans. "Safety and Security Need Hardware." ATZelectronics worldwide 16, no. 10 (2021): 66. http://dx.doi.org/10.1007/s38314-021-0699-3.

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11

D.S, Suresh, and V. Udayashankara. "External Hardware Security for Steganography." i-manager's Journal on Future Engineering and Technology 2, no. 2 (2007): 17–22. http://dx.doi.org/10.26634/jfet.2.2.874.

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12

Kitsos, P., N. Sklavos, K. Papadomanolakis, and O. Koufopavlou. "Hardware implementation of bluetooth security." IEEE Pervasive Computing 2, no. 1 (2003): 21–29. http://dx.doi.org/10.1109/mprv.2003.1186722.

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13

Labrado, Carson, and Himanshu Thapliyal. "Hardware Security Primitives for Vehicles." IEEE Consumer Electronics Magazine 8, no. 6 (2019): 99–103. http://dx.doi.org/10.1109/mce.2019.2941392.

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14

Perez, Ronald, Leendert van Doorn, and Reiner Sailer. "Virtualization and Hardware-Based Security." IEEE Security & Privacy Magazine 6, no. 5 (2008): 24–31. http://dx.doi.org/10.1109/msp.2008.135.

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15

Pang, Yachuan, Bin Gao, Bohan Lin, He Qian, and Huaqiang Wu. "Memristors for Hardware Security Applications." Advanced Electronic Materials 5, no. 9 (2019): 1800872. http://dx.doi.org/10.1002/aelm.201800872.

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16

Edwards, Chris. "Automation Key to Hardware Security." New Electronics 55, no. 10 (2022): 28–29. http://dx.doi.org/10.12968/s0047-9624(23)60439-0.

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17

Zhang, Zhiming, and Qiaoyan Yu. "Towards Energy-Efficient and Secure Computing Systems." Journal of Low Power Electronics and Applications 8, no. 4 (2018): 48. http://dx.doi.org/10.3390/jlpea8040048.

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Countermeasures against diverse security threats typically incur noticeable hardware cost and power overhead, which may become the obstacle for those countermeasures to be applicable in energy-efficient computing systems. This work presents a summary of energy-efficiency techniques that have been applied in security primitives or mechanisms to ensure computing systems’ resilience against various security threats on hardware. This work also uses examples to discuss practical methods for securing the hardware for computing systems to achieve energy efficiency.
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18

Ramaswamy, Mithilesh. "Enhancing Security in Bring Your Own Device Environments (BYOD) with Trusted Platform Modules, Continuous Monitoring, and Hardware Security Modules." INTERANTIONAL JOURNAL OF SCIENTIFIC RESEARCH IN ENGINEERING AND MANAGEMENT 08, no. 12 (2024): 1–6. https://doi.org/10.55041/ijsrem6838.

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Bring Your Own Device (BYOD) policies have transformed organizational workflows, offering flexibility, cost savings, and increased employee satisfaction. However, they also introduce significant security challenges due to device heterogeneity, inconsistent security configurations, and increased attack surfaces. This paper proposes a comprehensive security framework tailored to BYOD environments, integrating Trusted Platform Modules (TPMs) for device attestation, Hardware Security Modules (HSMs) for secure key management, continuous monitoring for real-time threat detection, and dynamic access
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19

Souren, Joseph. "Security by design: hardware-based security in Windows 8." Computer Fraud & Security 2013, no. 5 (2013): 18–20. http://dx.doi.org/10.1016/s1361-3723(13)70046-0.

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20

IKEDA, Makoto. "Secure LSI Design: Solutions to Hardware Security and Hardware Vulnerability." IEICE ESS Fundamentals Review 12, no. 2 (2018): 126–32. http://dx.doi.org/10.1587/essfr.12.2_126.

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21

Hu, Wei, Armaiti Ardeshiricham, and Ryan Kastner. "Hardware Information Flow Tracking." ACM Computing Surveys 54, no. 4 (2021): 1–39. http://dx.doi.org/10.1145/3447867.

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Information flow tracking (IFT) is a fundamental computer security technique used to understand how information moves through a computing system. Hardware IFT techniques specifically target security vulnerabilities related to the design, verification, testing, manufacturing, and deployment of hardware circuits. Hardware IFT can detect unintentional design flaws, malicious circuit modifications, timing side channels, access control violations, and other insecure hardware behaviors. This article surveys the area of hardware IFT. We start with a discussion on the basics of IFT, whose foundations
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22

Siriwardana, S. M. D. N. "Hardware Security and Trust: Trends, Challenges, and Design Tools." International Research Journal of Innovations in Engineering and Technology 08, no. 01 (2024): 119–27. http://dx.doi.org/10.47001/irjiet/2024.801016.

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Hardware security in the cyber security domain had become a more of a controversial topic over the past decade due to the introduction of new design technologies in semiconductors and expansion of global supplier chains. In proportion to the technological advancement of hardware production, the success rate of the existing hardware attacks had also evolved over the time with a significantly high rate of emergence of new attacking techniques and methods. Computing hardware is becoming a more and more attractive attack surface due to several reasons. The technology of analyzing the hardware comp
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23

MD, Shahnawaz Sakib, Danyaal Muhammad, and Bo Lili. "Hardware System Security: A Comprehensive Approach." International Journal of Computer Science and Information Technology Research 13, no. 1 (2025): 1–3. https://doi.org/10.5281/zenodo.14631605.

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<strong>Abstract:</strong> In today&rsquo;s digital landscape, safeguarding sensitive data and critical systems from hardware-based threats is crucial. This research proposes a multi-layered security framework to defend against physical attacks, supply chain vulnerabilities, and side-channel attacks. The framework integrates hardware-based security mechanisms, software countermeasures, and rigorous security management practices to provide comprehensive protection. <strong>Keywords:</strong> Hardware System Security, digital landscape, critical systems, multi-layered security. Framework. <stron
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24

Gunn, Lachlan J., N. Asokan, Jan-Erik Ekberg, Hans Liljestrand, Vijayanand Nayani, and Thomas Nyman. "Hardware Platform Security for Mobile Devices." Foundations and Trends® in Privacy and Security 3, no. 3-4 (2022): 214–394. http://dx.doi.org/10.1561/3300000024.

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25

Yoshida, Kota, and Takeshi Fujino. "Hardware Security on Edge AI Devices." IEICE ESS Fundamentals Review 15, no. 2 (2021): 88–100. http://dx.doi.org/10.1587/essfr.15.2_88.

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26

Yang, Kun, Haoting Shen, Domenic Forte, Swarup Bhunia, and Mark Tehranipoor. "Hardware-Enabled Pharmaceutical Supply Chain Security." ACM Transactions on Design Automation of Electronic Systems 23, no. 2 (2018): 1–26. http://dx.doi.org/10.1145/3144532.

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27

Nightingale, Edmund B., Daniel Peek, Peter M. Chen, and Jason Flinn. "Parallelizing security checks on commodity hardware." ACM SIGARCH Computer Architecture News 36, no. 1 (2008): 308–18. http://dx.doi.org/10.1145/1353534.1346321.

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28

Nightingale, Edmund B., Daniel Peek, Peter M. Chen, and Jason Flinn. "Parallelizing security checks on commodity hardware." ACM SIGOPS Operating Systems Review 42, no. 2 (2008): 308–18. http://dx.doi.org/10.1145/1353535.1346321.

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29

Nightingale, Edmund B., Daniel Peek, Peter M. Chen, and Jason Flinn. "Parallelizing security checks on commodity hardware." ACM SIGPLAN Notices 43, no. 3 (2008): 308–18. http://dx.doi.org/10.1145/1353536.1346321.

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30

Gong, Yanping, Fengyu Qian, and Lei Wang. "Probabilistic Evaluation of Hardware Security Vulnerabilities." ACM Transactions on Design Automation of Electronic Systems 24, no. 2 (2019): 1–20. http://dx.doi.org/10.1145/3290405.

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31

Granado-Criado, José M., Miguel A. Vega-Rodríguez, Juan M. Sánchez-Pérez, and Juan A. Gómez-Pulido. "Hardware security platform for multicast communications." Journal of Systems Architecture 60, no. 1 (2014): 11–21. http://dx.doi.org/10.1016/j.sysarc.2013.11.007.

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32

Casinghino, Chris. "A Language for Programmable Hardware Security." ACM SIGAda Ada Letters 39, no. 1 (2020): 71. http://dx.doi.org/10.1145/3379106.3379115.

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33

Gilmont, T., J. D. Legat, and J. J. Quisquater. "Hardware security for software privacy support." Electronics Letters 35, no. 24 (1999): 2096. http://dx.doi.org/10.1049/el:19991424.

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34

Stiles, Doug. "The Hardware Security Behind Azure Sphere." IEEE Micro 39, no. 2 (2019): 20–28. http://dx.doi.org/10.1109/mm.2019.2898633.

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35

Rajat, Suvra Das, and Ramakrishnan Shanmugavelan. "A systematic literature review of Security in Hardware: Hardware Trojans and Countermeasures in Semiconductor Designs." Journal of Scientific and Engineering Research 8, no. 11 (2021): 114–22. https://doi.org/10.5281/zenodo.10903196.

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<strong>Abstract </strong>The increasing presence of electronic systems in many industries has made the security of hardware components, especially semiconductor designs, a crucial issue. The field of computing hardware has become an appealing target for carrying out potent cross-layer security assaults. These attacks enable hackers to deduce confidential information, seize control over the sequence of operations, undermine the fundamental security measures of a system, pilfer intellectual property, and deceive machine learning algorithms. This study examines the weaknesses in semiconductor de
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36

Popat, Jayesh, and Usha Mehta. "Hardware Security in Case of Scan Based Attack on Crypto Hardware." International Journal of VLSI Design & Communication Systems 9, no. 2 (2018): 01–10. http://dx.doi.org/10.5121/vlsic.2018.9201.

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37

Kalathil Nandalal, Devika, and Ramesh Bhakthavatchalu. "Design of programmable hardware security modules for enhancing blockchain based security framework." International Journal of Electrical and Computer Engineering (IJECE) 13, no. 3 (2023): 3178. http://dx.doi.org/10.11591/ijece.v13i3.pp3178-3191.

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Globalization of the chip design and manufacturing industry has imposed significant threats to the hardware security of integrated circuits (ICs). It has made ICs more susceptible to various hardware attacks. Blockchain provides a trustworthy and distributed platform to store immutable records related to the evidence of intellectual property (IP) creation, authentication of provenance, and confidential data storage. However, blockchain encounters major security challenges due to its decentralized nature of ledgers that contain sensitive data. The research objective is to design a dedicated pro
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38

Devika, Kalathil Nandalal, and Bhakthavatchalu Ramesh. "Design of programmable hardware security modules for enhancing blockchain based security framework." International Journal of Electrical and Computer Engineering (IJECE) 13, no. 3 (2023): 3178–91. https://doi.org/10.11591/ijece.v13i3.pp3178-3191.

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Globalization of the chip design and manufacturing industry has imposed significant threats to the hardware security of integrated circuits (ICs). It has made ICs more susceptible to various hardware attacks. Blockchain provides a trustworthy and distributed platform to store immutable records related to the evidence of intellectual property (IP) creation, authentication of provenance, and confidential data storage. However, blockchain encounters major security challenges due to its decentralized nature of ledgers that contain sensitive data. The research objective is to design a dedicated pro
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39

QIN, Maoyuan, Jiaying HOU, Jiale LI, Shibo TANG, and Yu TAI. "Register transfer level hardware design information flow modeling and security verification method." Xibei Gongye Daxue Xuebao/Journal of Northwestern Polytechnical University 42, no. 3 (2024): 506–13. http://dx.doi.org/10.1051/jnwpu/20244230506.

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Information flow analysis can effectively model the security behavior and security properties of hardware design. However, the existing gate level information flow analysis methods cannot deal with large-scale designs due to computing power and verification effectiveness, and the register transfer level (RTL) information flow analysis methods require formal languages to rewrite hardware designs. This paper proposes a RTL hardware design information flow modeling and security verification method. Based on the RTL functional model, this method develops an information flow tracking logical model
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40

Zhang, Qian, Sujay Charania, Stefan Rothe, et al. "Multimode Optical Interconnects on Silicon Interposer Enable Confidential Hardware-to-Hardware Communication." Sensors 23, no. 13 (2023): 6076. http://dx.doi.org/10.3390/s23136076.

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Following Moore’s law, the density of integrated circuits is increasing in all dimensions, for instance, in 3D stacked chip networks. Amongst other electro-optic solutions, multimode optical interconnects on a silicon interposer promise to enable high throughput for modern hardware platforms in a restricted space. Such integrated architectures require confidential communication between multiple chips as a key factor for high-performance infrastructures in the 5G era and beyond. Physical layer security is an approach providing information theoretic security among network participants, exploitin
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41

Zeel, B. Dabhi, and Kulkarni Akanksha. "Data Security in Cloud Computing." International Journal of Innovative Science and Research Technology 7, no. 12 (2023): 982–86. https://doi.org/10.5281/zenodo.7505036.

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The importance of data security has been a significant problem in information technology. Because the data is spread out all over the place in the field of technology, it becomes extremely problematic. Users&#39; primary worries regarding cloud computing are related to data security and privacy security. Despite the fact that numerous approaches to the issue of cloud computing have been studied in academic research and clinical trials, data security and privacy protection are becoming increasingly crucial for the future use of cloud computing technology in business, industry, and government. I
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42

Saidov, Yaxshimurodbek Umidjonovich, Alimurod Aziz ogli Akbarov, Faxriddin Azamjon ogli Oripov, and Baxtigul Baxtiyor qizi Mustafoyeva. "HARDWARE SECURITY: DEFENDING AGAINST SIDE-CHANNEL ATTACKS." Innovative Development in Educational Activities 4, no. 3 (2025): 82–86. https://doi.org/10.5281/zenodo.15411952.

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<em>As computing systems become more pervasive, hardware security has emerged as a critical frontier in cybersecurity. Unlike traditional software-based exploits,&nbsp;<strong>side-channel attacks (SCAs)</strong>&nbsp;extract sensitive information by analyzing indirect signals such as power consumption, electromagnetic emissions, or timing variations. </em> <em>This article explores the&nbsp;<strong>principles of side-channel attacks</strong>, their real-world impact, and cutting-edge&nbsp;<strong>countermeasures</strong>&nbsp;to safeguard hardware systems. Additionally, we highlight emerging
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43

Mathew Sebastian. "Securing IoT devices: A comprehensive technical framework." World Journal of Advanced Research and Reviews 26, no. 2 (2025): 334–40. https://doi.org/10.30574/wjarr.2025.26.2.1620.

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This article presents a comprehensive technical framework for securing Internet of Things (IoT) devices across various deployment scenarios. As IoT technology proliferates throughout industrial, critical infrastructure, and consumer environments, it creates an expanded attack surface that malicious actors increasingly target. The framework addresses security challenges through multiple defensive layers, including robust authentication infrastructure, secure communication protocols, hardware security components, and operational security measures. By examining implementation patterns, security e
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44

ZHANG, Xige, Jiacheng ZHU, Jun MA, Lixiang SHEN, Jiahui ZHOU, and Dejun MU. "Hardware security and reliability verification based on fault propagation model." Xibei Gongye Daxue Xuebao/Journal of Northwestern Polytechnical University 42, no. 1 (2024): 92–97. http://dx.doi.org/10.1051/jnwpu/20244210092.

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Large scale integrate circuits is facing serious threat such as design vulnerabilities, side channels, and hardware Trojans. Traditional functional verification method is difficult to ensure high test coverage, and it is also difficult to detect security vulnerabilities such as side channels and stealthy hardware Trojans. Formal verification methods focus on the equivalence and functional correctness of design, and are difficult to meet security and reliability verification needs. The present work proposes a hardware security and reliability verification method from formal model. The present m
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45

Henkel, Jorg. "Top Picks in Hardware and Embedded Security." IEEE Design & Test 38, no. 3 (2021): 4. http://dx.doi.org/10.1109/mdat.2021.3077859.

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46

Tanjidur Rahman, M., and Navid Asadizanjani. "Failure Analysis for Hardware Assurance and Security." EDFA Technical Articles 21, no. 3 (2019): 16–24. http://dx.doi.org/10.31399/asm.edfa.2019-3.p016.

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Abstract This article presents a comprehensive study of physical inspection and attack methods, describing the approaches typically used by counterfeiters and adversaries as well as the risks and threats created. It also explains how physical inspection methods can serve as trust verification tools and provides practical guidelines for making hardware more secure.
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47

Lamparth, Oliver, and Frank Bähren. "Hardware and Software Security in Infotainment Systems." Auto Tech Review 4, no. 12 (2015): 24–27. http://dx.doi.org/10.1365/s40112-015-1050-2.

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48

Mathew, Jimson, Rajat Subhra Chakraborty, Durga Prasad Sahoo, Yuanfan Yang, and Dhiraj K. Pradhan. "A Novel Memristor-Based Hardware Security Primitive." ACM Transactions on Embedded Computing Systems 14, no. 3 (2015): 1–20. http://dx.doi.org/10.1145/2736285.

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49

Stitt, Greg, Robert Karam, Kai Yang, and Swarup Bhunia. "A Uniquified Virtualization Approach to Hardware Security." IEEE Embedded Systems Letters 9, no. 3 (2017): 53–56. http://dx.doi.org/10.1109/les.2017.2679183.

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50

Lotz, V., V. Kessler, and G. H. Walter. "A formal security model for microprocessor hardware." IEEE Transactions on Software Engineering 26, no. 8 (2000): 702–12. http://dx.doi.org/10.1109/32.879809.

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