Dissertations / Theses on the topic 'HEMTs'

The ever increasing demand for higher power devices at higher frequencies has prompted much research recently into the aluminium nitride/gallium nitride high electron mobility transistors (AlN/GaN HEMTs) in response to theoretical predictions of higher performance devices. Despite having superior material properties such as higher two-dimensional electron gas (2DEG) densities and larger breakdown field as compared to the conventional aluminium gallium nitride (AlGaN)/GaN HEMTs, the AlN/GaN devices suffer from surface sensitivity, high leakage currents and high Ohmic contact resistances. Having very thin AlN barrier layer of ∼ 3 nm makes the epilayers very sensitive to liquids coming in contact with the surface. Exposure to any chemical solutions during device processing degrades the surface properties, resulting in poor device performance. To overcome the problems, a protective layer is employed during fabrication of AlN/GaN-based devices. However, in the presence of the protective/passivation layers, formation of low Ohmic resistance source and drain contact becomes even more difficult. In this work, thermally grown aluminium oxide (Al2O3) was used as a gate di- electric and surface passivation for AlN/GaN metal-oxide-semiconductor (MOS)-HEMTs. Most importantly, the Al2O3 acts as a protection layer during device processing. The developed technique allows for a simple and effective wet etching optimisation using 16H3PO4:HNO3:2H2O solution to remove Al from the Ohmic contact regions prior to the formation of Al2O3 and Ohmic metallisation. Low Ohmic contact resistance (0.76Ω.mm) as well as low sheet resistance (318Ω/square) were obtained after optimisation. Significant reduction in the gate leakage currents was observed when employing an additional layer of thermally grown Al2O3 on the mesa sidewalls, particularly in the region where the gate metallisation overlaps with the exposed channel edge. A high peak current ∼1.5 A/mm at VGS=+3 V and a current-gain cutoff frequency, fT , and maximum oscillation frequency, fMAX , of 50 GHz and 40 GHz, respectively, were obtained for a device with 0.2 μm gate length and 100 μm gate width. The measured breakdown voltage, VBR, of a two-finger MOS-HEMT with 0.5μm gate length and 100 μm gate width was 58 V. Additionally, an approach based on an accurate estimate of all the small-signal equivalent circuit elements followed by optimisation of these to get the actual element values was also developed for AlN/GaN MOS-HEMTs. The extracted element values provide feedback for further device process optimisation. The achieved results indicate the suitability of thermally grown Al2O3 for AlN/GaN-based MOS-HEMT technology for future high frequency power applications.

Thesis (Ph.D.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 1999.
Includes bibliographical references (p. 125-133).
by Roxann Russell Blancard.
Ph.D.

Thesis (M. Eng.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 1997.
Includes bibliographical references (leaves 57-59).
by Christopher S. Putnam.
M.Eng.

The concern for climate changes and the increase in the electricity demand turned the attention towards the production, sorting and use of electric energy through zero emission (CO2) and highly efficient solutions (e.g. for electric vehicle), respectively. As a consequence, the need for high performance, reliable and low cost power transistors adopted for power applications is increasing as well. Gallium nitride seems to be the most promising candidate for the next generation of devices for power electronics, thanks to its excellent properties and comparable cost with respect to Si counterpart. The main and most adopted GaN-based device is the high electron mobility transistor (HEMT). In particular, in the case of switching power applications, HEMTs repeatedly are switched between high current on-state and high voltage off-state operation. For both operation modes a good reliability must be guaranteed. This thesis is focused on the reliability issues related to the off-state operation. The results have been obtained during a six months research period at imec (Belgium) on 200V p-GaN gate AlGaN/GaN HEMTS. Different devices have been investigated, differing for gate-to-drain distance, field plates lengths, AlGaN and GaN layers properties. Time-dependent dielectric breakdown and hard breakdown tests have been performed in combination with TCAD simulations. It has been demonstrated that the gate-to-drain distance (LGD) impacts the breakdown voltage and the kind of failure mechanism. If LGD ≤3um the breakdown occurs through the GaN channel layer due to short channel effects. In this case, by reducing the thickness of the GaN channel layer such behaviour can be attenuated, eventually leading to longer time-to-failure. If LGD≥ 4um the breakdown occurs between the 2DEG and the source field plates, where the properties of the AlGaN barrier layer (i.e. thickness and Al concentration) and the field plates configuration play the main role on the time-to-failure.

Neste trabalho é realizado um estudo sobre os transistores HEMT. A partir da geometria do dispositivo, espessuras e densidades de dopagem das camadas que compõem a heterojunção, são obtidas expressões analíticas para a característica IXV do componente bem como para o circuito equivalente de pequenos sinais na faixa de microondas. Posteriormente, os principais efeitos ópticos que ocorrem nos HETM´s são discutidos. O objetivo é determinar o comportamento do dispositivo quando este é iluminado com energia óptica. Ênfase especial é dada aos efeitos fotocondutivo e fotovoltaico. Finalmente, duas aplicações práticas explorando os mecanismos citados acima são apresentadas: sintonia óptica de um oscilador de microondas operando em 2 Ghz e controle óptico do ganho de um amplificador de microondas.
In this work a study about HETMs transistors is carried out. Given the geometry of the device, thickness and doping densities of the layers that form the heterojunction, analytical expressions for the component´s IXV characteristics as well as for the small-signal microwave equivalent circuit are obtained. Later, the major photoffects that occur in HETM´s are discussed. The goal is to determine the behaviour of the device under optical illumination. Special emphasis is given for the photovoltaic and photoconductive effects. Finally, two pratical applications exploring the mechanisms cited above are presented: optical tuning of a 2 Ghz HETM oscillator and optical control of gain of a microwave HEMT amplifier.

Gallium nitride (GaN) based high electron mobility transistors (HEMTs) are promising for power electronic applications due to their high breakdown voltage and power efficiency compared to Si-based power devices. As known, the design of the HEMT has high impact on the performance of the devices. In this project various GaN HEMTs on SiC substrate with different design configurations are characterized and investigated. These HEMTs are designed and fabricated by the Research Institutes of Sweden (RISE). The important properties of the HEMTs such as contact resistance, current density, capacitance, and breakdown voltage are characterized and emphasized. The uniformity of the contact resistance of the devices located across a 4’’ wafer is investigated, which reveals the lowest contact resistance of 4.3Ω·mm at the center of the wafer. The highest maximum current density of the devices is 1.15A/mm, and the maximum current scales with the gate dimensions of the devices. The gate capacitance of the devices is between 0.1 and 0.6pF under 1MHz. The gate insulation breakdown voltage of the devices is above 40V and the drain to source breakdown voltage is higher than 360V. Based on the results, discussions about the effects of the designs on the device performance are provided. Suggestions for further improvement of the device performance are given.
Galliumnitrid (GaN) baserade högelektronmobilitetstransistorer (HEMTs) är lovande för kraftelektroniska applikationer på grund av deras höga nedbrytningsspänning och effektivitet jämfört med Si-baserade kraftenheter. Som känt har designen av HEMT stor inverkan på enheternas prestanda. I detta projekt karakteriseras och undersöks olika GaN HEMTs på SiC-substrat med olika designkonfigurationer. Dessa HEMTs är designade och tillverkade av Sveriges forskningsins titut (RISE). De viktiga egenskaperna hos HEMTs såsom kontaktmotstånd, strömtäthet, kapacitans och nedbrytningsspänning karakteriseras och betonas. Enhetligheten i kontaktmotståndet för enheterna som är placerade över en 4'' skiva undersöks, vilket avslöjar det lägsta kontaktmotståndet på 4.3 Ω·mm i mitten av skivan. Den högsta maximala strömtätheten för enheterna är 1.15A/mm, och den maximala strömskalan med enheternas grindmått. Portens kapacitans för enheterna är mellan 0.1 och 0.6pF under 1MHz. Enhetsspänningen för grindisoleringen för enheterna är över 40V och avloppsspänningen till källan är högre än 360V. Baserat på resultaten ges diskussioner om designens effekter på enhetens prestanda. Förslag för ytterligare förbättring av enhetens prestanda ges.

Thesis (M.S.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 1994.
Includes bibliographical references (p. 77-83).
by Kenneth Sunghwan Lee.
M.S.

Thesis (Ph. D.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2003.
Includes bibliographical references (p. 117-125).
Hydrogen exposure of III-V HEMTs has been shown to cause a threshold voltage shift, [delta] V[sub]T. This is a serious reliability concern. This effect has been attributed to a H-induced piezoelectric effect. Formation of TiH[sub]x expands the Ti layer in the gate, causing mechanical stress in the underlying semiconductor. This induces piezoelectric charge in the heterostructure underneath the gate that shifts the threshold voltage. This thesis investigates the influence of the gate and heterostructure dimensions and composition on the H-induced [delta] V[sub]T in order to come up with practical device level solutions to this problem. Towards this goal, a model for the impact of the hydrogen-induced piezoelectric effect on the threshold voltage of InP HEMTs was developed using 2D finite element simulations to calculate the mechanical stress caused by a Ti-containing gate that has expanded due to hydrogen absorption. A simple electrostatics model was used to calculate the impact of this piezoelectric polarization charge on the threshold voltage. This model explained the experimentally observed gate length dependence of AVT in InP HEMTs. Then, this model was experimentally verified using advanced InP HEMTs with a WSiN/Ti/Pt/Au gate or a thick Ti-layer in the Ti/Pt/Au gate stack. We have found that only a thin top layer of the thick Ti layer expanded after exposure to hydrogen. The impact of hydrogen on the threshold voltage of these devices is one order of magnitude smaller than conventional Ti/Pt/Au-gate HEMTs. The model showed that there are two main causes for the improvement of the H-sensitivity.
First, the separation of the Ti-layer from the semiconductor by a thick non-expanding layer significantly reduces the stress in the active layer. Additionally, the thinner heterostructure and the presence of an InP etch-stop layer with a small piezoelectric constant underneath the gate reduces the amount of threshold voltage shift that is caused by the mechanical stress. This thesis concludes that the H-induced piezoelectric [delta] V[sub]T can be significantly reduced by placing a non-expanding layer underneath the Ti-layer in the gate stack. Thinning the channel and insulator also helps mitigate the H-induced [delta] V[sub]T.
by Samuel D. Mertens.
Ph.D.

Thesis (M.S. in Applied Physics)--Naval Postgraduate School, June 2009.
Thesis Advisor(s): Weatherford, Todd R. "June 2009." Description based on title screen as viewed on July 14, 2009. Author(s) subject terms: gallium nitride, HEMT, high electron mobility transistor, Silvaco, ATLAS, modeling, transient, self-heating, pulse. Includes bibliographical references (p. 73-74). Also available in print.

GaN-based high electron mobility transistors (HEMTs) are promising candidates for future microwave equipment, such as new solid state power amplifiers (SSPAs), thanks to their excellent performance. A first demonstration of GaN-MMIC transmitter has been developed and put on board the PROBA-V mission. But this technology still suffers from the trapping phenomena, principally due to lattice defects. Thus, the aim of this research is to investigate the trapping effects and the reliability aspects of the GH50 power transistors for C-band applications. A new trap investigation protocol to obtain a complete overview of trap behavior from DC to radio-frequency operation modes, based on combined pulsed I/V measurements, DC and RF drain current measurements, and low-frequency dispersion measurements, is proposed. Furthermore, a nonlinear electro-thermal AlGaN/GaN model with a new additive thermal-trap model including the dynamic behavior of these trap states and their associated temperature variations is presented, in order to correctly predict the RF performance during real RF operating conditions. Finally, an advanced time-domain methodology is presented in order to investigate the device’s reliability and to determine its safe operating area. This methodology is based on the continual monitoring of the RF waveforms and DC parameters under overdrive conditions in order to assess the degradation of the transistor characteristics in the RF power amplifier.
I transistor ad effetto di campo ad alta mobilità elettronica (HEMTs) basati su nitruro di gallio (GaN) sono i più promettenti candidati, grazie alle loro eccellenti prestazioni per le future apparecchiature a microonde, per esempio gli amplificatori a stato solido (SSPA). Un primo dimostratore di circuito integrato monolitico a microonde (MMIC) in tecnologia GaN di un trasmettitore è stato sviluppato e messo a bordo della missione PROBA-V. Ma questa tecnologia soffre ancora dei fenomeni di intrappolamento, principalmente causati dai difetti presenti nel reticolo cristallino. Pertanto, lo scopo di questo dottorato è stato di investigare gli effetti di intrappolamento e gli aspetti di affidabilità dei transistor di potenza GH50 per le applicazioni a microonde in banda C. Viene proposto un nuovo protocollo di investigazione dei difetti per ottenere una panoramica completa del comportamento delle trappole dal funzionamento DC a quello radiofrequenza. Questo protocollo è basato sulle misure I / V impulsate, sulle misure del transiente della corrente di drain durante una eccitazione DC e RF e sulle misure della dispersione a bassa frequenza. Inoltre, viene presentato un modello elettro-termico non lineare del transistor GaN con un nuovo addizionale modello termico degli stati trappola. Questo ultimo include il comportamento dinamico e le loro relative variazioni in temperatura, al fine di prevedere correttamente le prestazioni RF durante le condizioni di funzionamento. Infine, viene presentata una metodologia avanzata nel dominio del tempo per indagare sull'affidabilità del dispositivo e per determinare la sua area operativa sicura. Questa metodologia si basa sul monitoraggio continuo delle forme d'onda RF e dei parametri DC in condizioni di overdrive, al fine di valutare la degradazione delle caratteristiche dei transistor nell'amplificatore di potenza RF.

Les transistors à haute mobilité d’électrons (HEMTs) en nitrure de gallium (GaN) s’affirment comme les candidats prometteurs pour les futurs équipements à micro-ondes - tels que les amplificateurs de puissance à état solide (SSPA), grâce à leurs excellentes performances. Une première démonstration d'émetteur en technologie GaN-MMIC a été développée et embarquée dans la mission spatiale PROBA-V. Mais cette technologie souffre encore des effets de pièges par des défauts présents au sein de la structure. L’objectif de ce travail est donc l'étude d’effets de pièges et des aspects de fiabilité des transistors de puissance GH50 pour des applications en bande C. Un protocole d’investigation des phénomènes de pièges est présenté, qui permet l’étude des dynamiques des effets de pièges du mode de fonctionnement DC au mode de fonctionnement radiofréquence, basé sur la combinaison des mesures IV impulsionnelles, des mesures de transitoires du courant de drain avec des impulsions DC et RF et des mesures de paramètres [S] en basse fréquence. Un modèle de HEMT AlGaN/GaN non-linéaire électrothermique est présenté, incluant un nouveau modèle thermique de pièges restituant le comportement dynamique de ces pièges et leurs variations en température afin de prédire correctement les performances en conditions réelles de fonctionnement RF. Enfin, une méthodologie temporelle pour l’évaluation de la fiabilité et de limites réelles d'utilisation de transistors dans l'amplificateur de puissance RF en régime d’overdrive (très forte compression), basée sur la mesure monitorée de Formes d'Onde Temporelles (FOT), est proposée
GaN-based high electron mobility transistors (HEMTs) are promising candidates for future microwave equipment, such as new solid state power amplifiers (SSPAs), thanks to their excellent performance. A first demonstration of GaN-MMIC transmitter has been developed and put on board the PROBA-V mission. But this technology still suffers from the trapping phenomena, principally due to lattice defects. Thus, the aim of this research is to investigate the trapping effects and the reliability aspects of the GH50 power transistors for C-band applications. A new trap investigation protocol to obtain a complete overview of trap behavior from DC to radio-frequency operation modes, based on combined pulsed I/V measurements, DC and RF drain current measurements, and low-frequency dispersion measurements, is proposed. Furthermore, a nonlinear electro-thermal AlGaN/GaN model with a new additive thermal-trap model including the dynamic behavior of these trap states and their associated temperature variations is presented, in order to correctly predict the RF performance during real RF operating conditions. Finally, an advanced time-domain methodology is presented in order to investigate the device’s reliability and to determine its safe operating area. This methodology is based on the continual monitoring of the RF waveforms and DC parameters under overdrive conditions in order to assess the degradation of the transistor characteristics in the RF power amplifier

Aquesta tesi adreça el modelatge de dispositius HEMTs. Es presenta un model compacte, de base física, d’ AlGaN/GaN HEMTs per a la simulación de circuits. Es desenvolupa un model complet del corrent de drenador, i de les càrregues i capacitàncies de porta. El model bàsic de corrent de drenador i càrregues de porta s’obté usant un model simple de control de càrrega desenvolupat a partir de les solucions de les equacions de Poisson i Schrödinger per a l’àrea activa d’operació del dispositiu. Es presenta també un model separat del col•lapse del corrent, que és un efecte important en els AlGaN/GaN HEMT. El model de col•lapse del corrent es desenvolupa emprant el model bàsic de model com a marc, la qual cosa resulta en un model robust de gran senyal que pot ser utilitzat amb i sense la presència del col•lapse del corrent. A més, es presenta una anàlisi de no linearitats i modelatge de AlGaAs/GaAs pHEMT utilitzant les sèries de Volterra.
This thesis targets the modeling of III-V HEMTs devices. A physics-based compact modeling of AlGaN/GaN HEMTs for circuit simulation is presented. A complete modeling of drain current, gate charge and gate capacitances is developed. The core drain current and gate charge models are derived using a simple charge control model developed from the solutions of Poisson's equation and Schrödinger’s equation solved for the active operating area of the device. The models are simple continuous and applicable for the whole operating regime of the device. A separate model is also presented for the current collapse effect, which is a serious issue in AlGaN/GaN HEMT. The current collapse model is developed using the core current model as a framework which resulted in a robust large signal model that can be used with and without the presence of current collapse. In addition, nonlinearity analysis and modeling of commercial AlGaAs/GaAs pHEMTs using the Volterra series is also presented.
Esta tesis trata el modelado de dispositivos III-V HEMTs. Se presenta un modelo compacto, de base física, de AlGaN/GaN HEMTs para la simulación de circuitos. Se desarrolla un modelo completo de la corriente de drenador, y de cargas y capacitancias de puerta. El modelo básico de corriente de drenador y cargas de puerta se obtiene usando un modelo simple de control de carga desarrollado a partir de las soluciones de la ecuación de Poisson y Schrödinger para el área activa de operación del dispositivo. Se presenta también un modelo separado del colapso de la corriente, que es un efecto importante en AlGaN/GaN HEMT. El modelo de colapso de corriente de desarrolla empleando el modelo básico de corriente como marco, lo cual resulta en un modelo robusto de gran señal que puede ser utilizado con y sin la presencia del colapso de corriente. Además, se presenta un análisis de no linealidades y modelado de AlGaAs/GaAs pHEMT utilizando las series de Volterra.

Thesis: Ph. D., Massachusetts Institute of Technology, Department of Mechanical Engineering, 2017.
Cataloged from PDF version of thesis. "June 2017."
Includes bibliographical references (pages 215-226).
Microelectronic devices based on solid-state transistor technology are a key innovation that have transformed modern society and affected many aspects of our daily lives. As we continue to increase the density and functionality of transistors, progress is limited by the intrinsic material properties of the most common semiconductor, silicon (Si). Therefore, there is an increasing need for compound semiconductor technologies with more favorable material properties, such as gallium nitride (GaN) high electron mobility transistors (HEMTs), which can operate at significantly higher voltages, current densities, and power densities than Si-based field effect transistors of the same size. However, these more strenuous operating conditions combined with the desire to operate GaN HEMTs in harsher environmental conditions lead to elevated channel temperatures, reduced device performance, and premature device failure. Thus, there is a great need to develop modeling and experimental approaches to characterize the temperature, structural evolution, and electrical performance of GaN HEMTs with microscale and even nanoscale spatial resolution. This thesis explores the application of micro-Raman spectroscopy to experimental characterization of temperature, stress, strain, and electric field in GaN HEMTs with ~1 pim spatial and ~30 ns temporal resolution, respectively. Although micro-Raman spectroscopy has been one of the most common experimental techniques for measuring temperature and stress in GaN HEMTs for the last fifteen years, many of the previous works in the field have been empirical and unable to satisfactorily explain basic features of the Raman response of HEMTs under bias. This thesis demonstrates for the first time the correct electric field dependence of the optical phonon frequencies of wurtzite GaN and measurement of the electric field along the c-axis of the GaN buffer in HEMTs biased in the pinched OFF state. With this holistic understanding of the phonon frequency dependence on temperature, stress, electric field, and strain, a methodology for simultaneously measuring temperature, stress, and electric field using the shift of three Raman peaks has been developed. Theoretical and experimental characterization of the fundamental transient thermal response of GaN HEMTs is also presented using time-resolved micro-Raman thermometry. The novel developments in this thesis represent a new "multiphysics" approach to microscale characterization of semiconductor devices, which we anticipate to have a significant impact in developing a more mechanistic and physics-based approach to transistor reliability rather than relying merely upon the statistics of a population of devices. Such an approach, we believe, will enable new semiconductor devices with unprecedented reliability and performance.
by Kevin Robert Bagnall.
Ph. D.

Material quality and reliability issues are the key points for the industrial application of High Electron Mobility Transistors based on GaN (GaN- HEMTs). In fact, GaN HEMTs have demonstrated excellent RF power performances, thanks to their properties (such as wide bandgap, high current densities, and high breakdown field) but are still subject to various degradation mechanisms when they operate at high electric fields and/or high channel temperatures The present work recaps general notions on GaN HEMTs reliability and describes accelerated life test and complementary measurements carried out at the TRT R&D Laboratory, the III-V Lab (France), in cooperation with the University of Limoges (XLIM). Demonstration and discussion focused especially on the thermal storage and DC life test. Results of these tests provide information about the behavior of two metallization types of transistor’s gate (Molybdenum and Nickel) on two different epistaxies (AlGaN and InAlN) submitted to thermal and DC stress. Possible failure mechanisms are proposed in order to point out the impact of the gate on the transistor degradation. Special focus is set to the investigation of gate current injection mechanism in InAlN/GaN devices
Les transistors à effet de champ à hétérostructure (HFET or HEMT) en nitrure de gallium se présentent comme des candidats à fort potentiel pour la prochaine génération d’amplificateur de puissance dans les domaines de radio fréquences et des ondes millimétriques. Ce sont ses propriétés physiques et électroniques telle qu’une grande largeur de bande interdite, un potentiel pour de forte densité de courant et un très fort champ de claquage qui le rendent supérieur aux semi-conducteurs tels que le silicium et l’arséniure de gallium. Ce manuscrit reprend des notions générales sur la fiabilité des HEMTs en GaN et décrit certains tests de vieillissement accéléré et certaines mesures complémentaires réalisés au sein du Groupe de Microélectronique de Thales – III-VLAB, en collaboration avec l’Université de Limoges (XLIM), et le laboratoire d’analyse physique de Thales Research & Technology (LATPI). Le travail se focalise sur l’impact du contact de grille sur la stabilité du transistor HEMT ; les principaux paramètres étudiés sont les deux différents contacts métalliques (en molybdène et en nickel) et les deux matériaux développés au sein du III-VLAB, AlGaN et InAlN sur buffer GaN. L’évaluation s’appuie sur des essais de stockage en température ainsi que sur des essais sous polarisation statique continue en configuration de débit. Les résultats des essais permettent de préciser la fiabilité de différents contacts et empilements métalliques, tandis que les essais en débit mettent en évidence l’effet du champ électrique et de la densité de courant sur la dégradation des transistors en condition de fonctionnement

This dissertation reports on charge-trapping phenomena and related parasitic effects in AlGaN/GaN high electron mobility transistors. By means of static and pulsed I-V measurements and deep-level transient spectroscopy, the main charge-trapping mechanisms affecting the dynamic performance of GaN-based HEMTs devoted to microwave and power switching applications have been comprehensively characterized, identifying the nature and the localization of the deep-levels responsible for the electrically active trap-states. A high-voltage measurement system capable for double-pulsed ID-VD, ID-VG and drain-current transient spectroscopy has been successfully designed and implemented. A characterization methodology, including the analysis of static I-V measurements, pulsed I-V measurements, and deep-level transient spectroscopy, has been developed to investigate the impact of voltage, current, and temperature on the parasitic effects of charge-trapping (threshold voltage instabilities, dynamic on-resistance increase, and transconductance reduction), and on trapping/detrapping kinetics. Experimental results gathered on transistor structures are supported by complementary capacitance deep-level transient spectroscopy (C-DLTS) performed on 2-terminal diode (FATFET) structures. Two main case-studies have been investigated. Schottky-gated AlGaN/GaN HEMTs grown on silicon carbide substrate employing iron and/or carbon doped buffers devoted to microwave applications, and MIS-gated double-heterostructure AlGaN/GaN/AlGaN HEMTs grown on silicon substrate devoted to power switching applications. The devices under test have been exposed to the complete set of current-voltage regimes experienced during the real life operations, including off-state, semi-on-state, and on-state. The main novel results are reported in the following: • Identification of a charge-trapping mechanism promoted by hot-electrons. This mechanism is critical in semi-on-state, with the combination of relatively high electric-field and relatively high drain-source current. • Identification of a positive temperature-dependent charge-trapping mechanism localized in the buffer-layer, potentially promoted by the vertical drain to substrate potential. This mechanism is critical in high drain-voltage off-state bias in high temperature operations. • Identification of deep-levels and charge-trapping related to the presence of doping compensation agents (iron and carbon) within the GaN buffer layer. • Identification of charge-trapping mechanism ascribed to the SiNX and/or Al2O3 insulating layers of MIS-gated HEMTs. This mechanism is promoted in the on-state with positive gate-voltage and positive gate leakage current. • Identification of a potential charge-trapping mechanism ascribed to reverse gate leakage current in Schottky-gate HEMTs exposed to high-voltage off-state. • The characterization of surface-traps in ungated and unpassivated devices by means of drain-current transient spectroscopy reveals a non-exponential and weakly thermally-activated detrapping behaviour. • Preliminary synthesis of a degradation mechanism characterized by the generation of defect-states, the worsening of parasitic charge-trapping effects, and the degradation of rf performance of AlGaN/GaN HEMTs devoted to microwave operations. The evidence of this degradation mechanism is appreciable only by means of rf or pulsed I-V measurements: no apparent degradation is found by means of DC analysis.
Sfruttando le proprietà fisiche dei III-nitruri, fra cui l’ampio band-gap (3.4 eV per il GaN), i dispositivi basati su eterostrutture AlGaN/GaN sono devoti per applicazioni ad alta potenza ed alta frequenza, sia per sistemi a microonde (radar, comunicazioni satellitari, base-station, etc.), sia per sistemi di conversione dell’energia elettrica (ad esempio, convertitori buck/boost). Tuttavia, a causa della complesse condizioni di crescita epitassiale (legate intrinsecamente alla natura dei materiali III-nitruri), gli strati epitassiali presentano una difettosità cristallografica ed una concentrazione di stati-trappola relativamente alta. Questo si traduce nella presenza di meccanismi parassiti, intrappolamento di carica e correnti di leakage, potenzialmente pericolosi sia per le prestazioni dinamiche, sia per l’affidabilità a lungo termine dei dispositivi. Per effettuare una caratterizzazione esaustiva dei fenomeni parassiti ed individuarne quindi le cause, le tecniche di caratterizzazione impiegate sono l’analisi delle caratteristiche ID-VD, ID-VG, e IG-VG statiche ed impulsate, e la spettroscopia dei livelli profondi (DLTS, Deep-Levels Transient Spectroscopy). I risultati originali salienti ottenuti nel corso dei tre anni di attività di ricerca sono riportati in questa Tesi di Dottorato sono riportati in seguito: • Sviluppo di un sistema di misura impulsato ad alta tensione (fino a 600V), fondamentale per lo studio delle caratteristiche dinamiche di dispositivi destinati ad operare in regimi di alta tensione (> 100 V). Tramite l’impiego di generatori di forme d’onda, amplificatori di potenza, sonda differenziale ad alta-tensione, ed oscilloscopio, è stato istallato un banco misura in grado di eseguire la caratterizzazione Double-Pulse I-V e la spettroscopia dei livelli profondi tramite l’acquisizione nel dominio del tempo della corrente di drain eseguita a diverse temperature. Il sistema permette una finestra di acquisizione temporale compresa fra 1 µs e 100 s per misure fino a 200V e fra 20 µs e 100s per misure fino a 600V. • Definizione di un protocollo di caratterizzazione per ottenere informazioni sulla localizzazione degli stati trappola all’interno della struttura epitassiale, e sull’identificazione dei meccanismi che provocano i fenomeni di intrappolamento. Il protocollo include (i) l’analisi delle correnti di leakage proveniente dai 3 terminali (gate, source e substrato), (ii) l’analisi della subthreshold-slope e dei fenomeni di canale corto (DIBL e subthreshold leakage), (iii) l’analisi degli effetti dei meccanismi di intrappolamento sui parametri elettrici dinamici (spostamento della tensione di soglia e degrado della transconduttanza), e (iv) l’analisi dei livelli profondi e la comparazione con un database che raccoglie i dati pubblicati in letteratura. • Individuazione di un meccanismo di trapping promosso dalla corrente di leakage di gate. Questo meccanismo è critico durante il funzionamento OFF-state in dispositivi che impiegano gate realizzati tramite giunzione Schottky metallo-semiconduttore. • Individuazione di un meccanismo di trapping promosso da elettroni caldi. Questo meccanismo è critico durante il funzionamento SEMI-ON-state, nel quale sono presenti contemporaneamente alti livelli di campo elettrico e alti livelli di corrente di canale. • Individuazione di un meccanismo di intrappolamento localizzato nel buffer, e causato potenzialmente dal campo elettrico verticale generato fra drain e substrato. Questo meccanismo è critico durante il funzionamento ad alta tensione ed alta temperatura in dispositivi realizzati su substrati in silicio (scarsamente isolanti). • Individuazione di stati trappola strettamente correlati alla presenza di agenti droganti (Ferro e Carbonio) all’interno degli strati GaN buffer. I livelli profondi introdotti dal processo di drogaggio sono il livello EC - 0.6 eV per il Ferro, e i livelli EC - 0.8 eV ed EV + 0.9 eV per il Carbonio. • Individuazione di un meccanismo di trapping dovuto all’intrappolamento di carica negli strati isolanti nelle tecnologie MIS-HEMT. Durante il funzionamento ON-state, con il gate polarizzato con tensioni fortemente positive, elettroni vengono intrappolati nei difetti di interfaccia o dell’ossido promuovendo forti variazioni della tensione di soglia. Lo sviluppo di strati dielettrici con bassa concentrazione di stati trappola è un punto chiave per il successo della tecnologia MIS-HEMT. • Sintesi preliminare di un meccanismo di degrado probabilmente promosso da fenomeni di canale corto e correnti parassite di sotto-soglia, le quali provocano la generazione di difetti cristallografici, il peggioramento dei fenomeni di intrappolamento di carica e il relativo peggioramento delle performance RF.

Thesis (M.S. in Electrical Engineering) Naval Postgraduate School, March 2001.
Thesis advisors): Weatherford, Todd. "March 2001." Includes bibliographical references (p. 43-44). Also Available online.

Thesis: M. Eng., Massachusetts Institute of Technology, Department of Electrical Engineering and Computer Science, 2017.
This electronic version was submitted by the student author. The certified thesis is available in the Institute Archives and Special Collections.
Cataloged from student-submitted PDF version of thesis.
Includes bibliographical references (pages 101-109).
Gallium nitride (GaN)-based high electron mobility transistors (HEMTs) offer excellent performance in power conversion and high frequency power amplification. However, device self-heating limits reliable output power to 1/8th of reported maximums. Device-level thermal management is therefore critical for reliable high power operation. This thesis proposes and examines wafer bonded GaN-on-SiC HEMTs as a thermally efficient alternative to growth structures. This work first compares the thermal properties of this novel structure to the state-of-the-art. It then develops suitable wafer bonding techniques to fabricate this structure. In addition, the bonded interface thermal conductivity is measured via time domain thermoreflectance. The results of these measurements are analyzed to determine the thermal performance of the structure. In all, this thesis shows that the proposed bonded technology is a promising method for the fabrication of the next generation of GaN HEMTs. These devices are expected to perform at a level equivalent to GaN-on-diamond devices, although further process development is needed to achieve high bonding yields.
by Robert M. Radway.
M. Eng.

Thesis (M. Eng.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 1997.
Includes bibliographical references (leaves 68-72).
by Alexander N. Ernst.
M.Eng.

Thesis: M. Eng., Massachusetts Institute of Technology, Department of Electrical Engineering and Computer Science, 2013.
Cataloged from PDF version of thesis.
Includes bibliographical references (pages 77-78).
As silicon MOSFETs keep scaling down in size, the continued improvement on their logic performance is threated by their fundamental physical limits. With silicon approaching these limits, MOSFETs designed with III-V semiconductors have emerged as promising candidates to replace them. The low-effective mass of various III-V materials such as InGaAs and InAs allow both faster and more power efficient performance. One of the key challenges, particularly as devices continue to shrink, is to understand the important of non-idealities in FET structures. High-electron mobility transistors, or HEMTs, are III-V Quantum-Well FETs that we can use to explore many issues of relevance to future III-V MOSFETs. HEMTs are worthwhile transistors in their own right, but are also simpler than III-V MOSFETs and therefore allow a more thorough exploration into the basic transport physics of a quantum-well III-V device. We know from HEMT experimental data that electrons travel ballistically at gate lengths of 30- 40 nm, suggesting that a ballistic transport model will only become more accurate as channel lengths are scaled down to 10 nm. We would like to investigate to what extent this is true in III-V MOSFETs, and also to study the impact of short channel effects and other parasitics inherent to a III-V design. To accomplish these goals, we have developed a flexible transistor model in MATLAB based on a ballistic theory of transport. We will first verify the model with HEMT experimental data coming from devices fabricated at MIT, and then focus our attention on peculiarities specific to III-V MOSFETs, namely a buried-channel design and the presence of traps at the oxide-semiconductor interface. We will use the model to extract the trap density as a function of energy, and then make measurements independent of interface trap effects to extract the 2D sheet carrier concentration and mobility, two figures of merit important in characterizing FET devices. The ability to correctly model and predict device behavior will help identify the problems ahead that need improvement in the iterations of future device fabrication.
by Shireen M. Warnock.
M. Eng.

Les transistors ayant un faible niveau de bruit à basse fréquence, une faible puissance de dissipation et fonctionnant à basse température (≤ 4.2 K) sont actuellement inexistants alors qu’ils sont très demandés pour la réalisation de préamplificateurs à installer au plus près des détecteurs ou des dispositifs à la température de quelques dizaines de mK, dans le domaine de l’astrophysique, de la physique mésoscopique et de l’électronique spatiale. Une recherche menée depuis de nombreuses années au LPN vise à réaliser une nouvelle génération de HEMTs (High Electron Mobility Transistors) cryogéniques à haute performance pour répondre à ces demandes. Cette thèse, dans le cadre d’une collaboration entre le CNRS/LPN et le CEA/IRFU, a pour but la réalisation de préamplificateurs cryogéniques pour des microcalorimètres à 50 mK.Les travaux de cette thèse consistent en des caractérisations systématiques des paramètres électriques et des bruits des HEMTs (fabriqués au LPN) à basse température. En se basant sur les résultats expérimentaux, l’une des sources de bruit à basse fréquence dans les HEMTs a pu être identifiée, c’est-à-dire la part du courant tunnel séquentiel dans le courant de fuite de grille. Grâce à ce résultat, les hétérostructures ont été optimisées pour minimiser le courant de fuite de grille ainsi que le niveau de bruit à basse fréquence. Au cours de cette thèse, différentes méthodes spécifiques ont été développées pour mesurer de très faibles valeurs de courant de fuite de grille, les capacités du transistor et le bruit 1/f du transistor avec une très haute impédance d’entrée. Deux relations expérimentales ont été observées, l’une sur le bruit 1/f et l’autre sur le bruit blanc dans ces HEMTs à 4.2 K. Des avancées notables ont été réalisées, à titre d’indication, les HEMTs avec une capacité de grille de 92 pF et une consommation de 100 µW peuvent atteindre un niveau de bruit en tension de 6.3 nV/√Hz à 1 Hz, un niveau de bruit blanc de 0.2 nV/√Hz et un niveau de bruit en courant de 50 aA/√Hz à 10 Hz. Enfin, une série de 400 HEMTs, qui répondent pleinement aux spécifications demandées pour la réalisation de préamplificateurs au CEA/IRFU, a été réalisée. Les résultats de cette thèse constitueront une base solide pour une meilleure compréhension du bruit 1/f et du bruit blanc dans les HEMTs cryogéniques afin de les améliorer pour les diverses applications envisagées
Transistors with low noise level at low frequency, low-power dissipation and operating at low temperature (≤ 4.2 K) are currently non-existent, however, they are widely required for realizing cryogenic preamplifiers which can be installed close to sensors or devices at a temperature of few tens of mK, in astrophysics, mesoscopic physics and space electronics. Research conducted over many years at LPN aims to a new generation of high-performance cryogenic HEMTs (High Electron Mobility Transistors) to meet these needs. This thesis, through the collaboration between the CNRS/LPN and the CEA/IRFU, aims for the realization of cryogenic preamplifiers for microcalorimeters at 50 mK.The work of this thesis consists of systematic characterizations of electrical and noise parameters of the HEMTs (fabricated at LPN) at low temperatures. Based on the experimental results, one of the low-frequency-noise sources in the HEMTs has been identified, i.e., the sequential tunneling part in the gate leakage current. Thanks to this result, heterostructures have been optimized to minimize the gate leakage current and the low frequency noise. During this thesis, specific methods have been developed to measure very low-gate-leakage-current values, transistor’s capacitances and the 1/f noise with a very high input impedance. Two experimental relationships have been observed, one for the 1/f noise and other for the white noise in these HEMTs at 4.2 K. Significant advances have been made, for information, the HEMTs with a gate capacitance of 92 pF and a consumption of 100 µW can reach a noise voltage of 6.3 nV/√ Hz at 1 Hz, a white noise voltage of 0.2 nV/√ Hz, and a noise current of 50 aA/√Hz at 10 Hz. Finally, a series of 400 HEMTs has been realized which fully meet the specifications required for realizing preamplifiers at CEA/IRFU. The results of this thesis will provide a solid base for a better understanding of 1/f noise and white noise in cryogenic HEMTs with the objective to improve them for various considered applications

Mestrado em Engenharia Física
Nesta dissertação de Mestrado nós avaliamos as características da corrente do canal de um GaN High Electron Mobility Transistor (GaN HEMT) pelas suas características memristivas. Utilizando uma implementação do modelo físico de SRH em Matlab e diversas medidas experimentais pulsadas I-V e resultados de excitação sinusoidal, n os demonstramos que o canal de um GaN HEMT afectado por traps de níveis profundos pode, de facto, apresentar as duas características fundamentais do critério de memristividade: (i) Uma trajetória com histerese comprimida no espaço de fase iDS /vDS quando o dispositivo e excitado por um estimulo sinusoidal, e (ii) uma histerese cuja área é monotónica e desvanece para frequências cada vez maiores.
In this MSc Thesis we evaluate the channel current characteristics of a GaN High Electron Mobility Transistor (GaN HEMT) for its potential memristive characterisics. Using a Matlab implementation of the SRH physics model and several experimental pulsed I/V and sinusoidal excitation data, we demonstrate that GaN HEMT channels a ected by deep level traps can indeed display the two fundamental memristive criteria: (i) A pinched hysteretic trajectory in the iDS=vDS phase plane when the device is excited by a sinusoidal stimulus, and (ii) a hysteresis area that is monotonic and vanishes for increasingly higher frequencies.

High-electron-mobility transistor (HEMT) is a promising device for power applications because of their high breakdown voltage, high electron mobility in two-dimensional electron gas (2DEG) area, fast switching capability, high-temperature operating capabilities, compatibility with standard electronic circuits, and low production cost. In contrast to the gate in metal–oxide–semiconductor field-effect transistor (MOSFET), which extends from source to drain, the gate in HEMT splits the device into two main sections: field-effect (section under the gate) and resistive (section outside the gate). Resistances of the 2DEG outside the gate sections are constant and modelled by fixed resistors. However, the 2DEG resistance under the gate section is dependent to the gate voltage, which can be modelled by channel resistance of a field-effect transistor (FET). Since these resistances depend on the mobility of electrons in the 2DEG, it is important to separate the electron mobility in the resistive and field-effect sections. Therefore, existence of the resistive section in the HEMT structure leads to requiring new methods for the HEMT mobility measurement. Also, since there is no model for the HEMT in SPICE, novel models are required for the SPICE simulation of the HEMT. In order to solve these issues:
Thesis (PhD Doctorate)
Doctor of Philosophy (PhD)
Griffith School of Engineering
Science, Environment, Engineering and Technology
Full Text

AlGaN based nanoscale high-electron-mobility transistors (HEMTs) are the next generation of transistor technology that features the unique combination of higher power, wider bandwidth, low noise, higher efficiency, and temperature/radiation hardness than conventional AlGaAs and Si based technologies. However, as evidenced by recent stress tests, reliability of these devices (characterized by a gradual decrease in the output current/power leading to failure of the device in just tens of hours of operation) remains a major concern. Although, in these tests, physical damages were clearly visible in the device, the root cause and nature of these damages have not yet been fully assessed experimentally. Therefore, a comprehensive theoretical study of the physical mechanisms responsible for degradation of AlGaN HEMTs is essential before these devices are deployed in targeted applications. The main objective of the proposed research is to computationally investigate how degradation of state-of-the-art nanoscale AlGaN HEMTs is governed by an intricate and dynamical coupling of thermo-electromechanical processes at different length (atoms-to-transistor) and time (femtosecondto- hours) scales while operating in high voltage, large mechanical, and high temperature/radiation stresses. This work centers around a novel hypotheses as follows: High voltage applied to AlGaN HEMT causes excessive internal heat dissipation, which triggers gate metal diffusion into the semiconducting barrier layer and structural modifications (defect ii formation) leading to diminished polarization induced charge density and output current. Since the dynamical system to be studied is complex, chaotic (where the evolution rule is guided by atomicity of the underlying material), and involve coupled physical processes, an in-house multiscale simulator (QuADS 3-D) has been employed and augmented, where material parameters are obtained atomistically using firstprinciples, structural relaxation and defect formations will be modeled by integrating molecular dynamics, and the influence of atomistic processes on charge and phonon transport and current degradation will be simulated using a coupled drift-diffusionthermodynamic framework.

Abstract Gallium nitride based high electron mobility transistors (HEMTs) are excellent candidates for high frequency and power applications. Due to high breakdown field, mobility, saturation velocity and thermal conductivity of GaN-based materials, HEMTs may operate at voltage and temperature ranges far beyond conventional semiconductor as Si, GaAs or InP; they also have a Baliga figure of merit many times higher and a lower resistance and hence reduced switching times and losses leading to improved effciency. Still, they are affected by (i) parasitics phenomena and (ii) reliability issues: defects and dislocations may induce high leakage currents, kink effect and soft breakdown, while, in the reliability field, hot electrons, high electric fields and power are still under investigation. In the first part of this work parasitics have been investigated. In particular, great interest has been devoted to trapping phenomena, which mainly influence the on-resistance (Ron); transient and pulsed measurements help to extrapolate useful information as location in the epilayer structure, activation energy and cross section of the traps responsible of the Ron collapse; we also studied leakage phenomena, proving that both the phenomena can be significantly reduced with the introduction of a AlGaN back-barrier layer which, thanks to the additional band offset that prevents electrons from traveling and being trapped deep into the buffer. Finally, kink effect has been characterized; main results show it becomes almost negligible when a capping layer is grown over the AlGaN barrier and a semi-insulating substrate is used. An extensive analysis of the electrical and optical properties of HEMTs biased in a non-destructive breakdown regime is the main topic of the second part. HEMTs can reach a sustainable breakdown condition with a Vg lower than the pinch-off voltage. Phenomena are mainly activated by two mechanisms, depending on the gate voltage applied: when Vg is close to the pinch-off, space charge injection of electrons occurs and a parasitic path between source and drain is formed; if a more negative voltage is applied, breakdown occurs due to electrons injection through the gate. Tests reveal that HEMTs can emit a weak electroluminescence (EL) signal: this is localized at the edge of the gate when a low current is owing; it shifts to drain edge and the intensity reaches its maximum at higher Id when breakdown conditions are met. Moreover, the breakdown has a non-monotonic dependence from the temperature; this result confirms that two different mechanisms jointly interact at high voltage levels, one dominating on the other depending on the thermal condition. Single-heterostructure (SH) has a soft breakdown due to a poor ability to confine electrons into the channel and the consequent punch-through, independently from the gate to drain distance (Lgd). Many approaches have been successfully tested in order to improve the breakdown voltage (BV): GaN buffer doped with C or Fe, application of double-heterostructure (DH) epitaxy and devices with an AlGaN back-barrier grown on a doped buffer. These solution efficiently increase the BV, which also becomes dependent from Lgd distance with a slope that ranges from 30 V/um to 50 V/um. The third part deals with reliability issues. Results of accelerated life tests show that in SH devices a quick degradation of the electrical properties is visible in off-state even at low drain voltage biasing condition: the punch-through leakage path increases defects formation, causing a strong device degradation even in short life tests. DH devices present improved reliability due likely to (i) lower leakage currents (ii) less sub-surface DIBL (iii) higher breakdown values. The last section is devoted to the NPI Project. The purpose of the third placement has been the analysis of the performances and of the reliability behavior of GH25 technology. DC measurements show that technology process is quite mature: low off-state and leakage currents, good output current and very few devices with non-standard behavior. Still, the devices suffer from kink effect as confirmed by pulsed measurements; moreover, pulsed characterization enlightens a consistent trapping phenomena, the current collapse being 30%, mainly related to traps under the gate into the buffer. Maximum gain available MAG analysis from RF tests reveals that the source terminated field plate (STFP) positively increases the gain, thanks to an extended depletion region that reduces current lag due surface effects. The application of the field plate brings an additional capacitance, affecting the cross-over frequency which shifts from 25GHz to 20GHz. Current controlled breakdown measurements enlightened how, when a high Vd is applied, a parasitic paths between source and drain is formed due to sub-surface DIBL (punch-through). The critical voltage which the phenomena take place at depends from many factors: (i) the longer the gate drain distance is, the less the punch-through is likely to occur (ii) it shifts toward lower voltages when increasing Vg due to the reduction of the depletion region under the gate (iii) STFP seems to have no meaningful effects. These results seems to be related with those obtained from off-state step stress, where a fast degradation of the gate takes place for Vd higher than 70 V until sub-surface DIBL occurs; when a parasitic source-drain channel is formed, the degradation rate reduces significantly because most of the current is sustained by the source. The only relevant visible change is the increase in off-state and leakage currents and parameters. A comparison with breakdown test results suggests that the cause may be the same described for current controlled breakdown. Life tests have been carried out selecting three different biasing conditions (i) with high current and low field (Id = 660mA/mm, Vd = 10V), (ii) high field and low current (Id = 5mA/mm, Vd = 60V), and (iii) class A bias point (Id = 400mA/mm, Vd = 30V) at 423K to assess the reliability along the load line. Class A results show a fast degradation of the output current and a steep increase of on-resistance within 100 hours; similar results are visible when the sample is biased at high current and low voltage, even if at a much lower degree. When the device is biased at high voltage and low currents, only a small decrease of output characteristic is reported; on the other hand, both off-state and leakage currents significantly increase. The Class A condition is the worst working condition. The degradation can be caused (i) by high power and visible only when both high voltage and high current are applied (ii) by high temperature to which both the power dissipation and the high temperature jointly contribute. Additional tests at room temperature could help to understand the failure mechanisms.
Sommario Gli High Electron Mobility Transistor (HEMTs) sono eccellenti candidati per applicazioni ad alta frequenza e di potenza. Grazie all'alta tensione di breakdown, alle elevate mobilità, velocità di saturazione, e conducibilità termica dei materiali basati su nitruro di gallio, gli HEMTs possono operare ad elevate tensioni e a temperature di gran lunga superiori a quelle dei semiconduttori convenzionali, quali silicio Si, arsenuro di gallio GaAs o fosfuro d'indio InP; denotano inoltre una Baliga's figure of merit di diversi ordini superiore e una minore resistenza con la conseguenza di ridotti tempi di transizione e perdite parassite molto inferiori che consentono una maggior efficienza. Tuttavia sono affetti da (i) fenomeni parassiti transitori che causano instabilità e (ii) problematiche legate all'affidabilità: impurità, difetti e dislocazioni possono indurre elevate correnti di perdita, effetto kink e basse tensioni di rottura mentre, per quanto concerne l'affidabilità, gli effetti degenerativi correlati a elettroni ad alta energia (chiamati anche hot electrons), o dipendenti dagli elevati campi elettrici a cui i dispositivi vengono sottoposti o dalla potenza sono ancora oggetto di studio al fine di identificare i meccanismi e le leggi di degradazione. La prima parte di questo lavoro è stata dedicata all'analisi dei fenomeni parassiti. In particolare la maggior attenzione è stata dedicata ai fenomeni di trapping, che tendono ad influenzare soprattutto la Ron; l'uso di tecniche quali lo studio dei transienti e le misure impulsate si rivelano molto utili per raccogliere informazioni come la distribuzione spaziale all'interno della struttura dei dispositivi, l'energia di attivazione e la sezione di cattura responsabili del collasso della resistenza in on-state; anche le correnti di perdita sono state oggetto di studio che ha provato come l'uso di strutture alternative con per esempio, l'introduzione di uno back-barrier layer in AlGaN, grazie alla presenza di un band-gap aggiuntivo all'interfaccia con il GaN channel layer che impedisce agli elettroni di spostarsi in profindità nel buffer layer e di rimanere intrappolati o muoversi verso regioni a potenziale differente, cosentono di ridurre in modo significativo le correnti di perdita. Infine, è stata portata avanti una caratterizzazione delle proprietà del kink: i risultati evidenziano come l'uso di un substrato altamente resistivo e la deposizione di un capping layer in GaN sopra la barriera di AlGaN rendano l'effetto trascurabile. Una dettagliata analisi delle proprietà elettriche ed ottiche di dispositivi HEMTs polarizzati in condizioni di breakdown sostenibile costituisce l'argomento principale della seconda parte. Gli HEMTs possono essere polarizzati in condizioni di breakdown non distruttivo se la tensione di gate Vg è inferiore alla tensione di pinch-off. Il fenomeno viene attivato nella maggior parte dei casi considerati da due meccanismi, a seconda della tensione applicata al contatto di gate. Quando la tensione Vg è vicina alla condizione di pinch-off, ha luogo l'iniezione di portatori nella regione di carica spaziale e si ha la formazione di un canale conduttivo parassita che consente il flusso di corrente tra source e drain; se la tensione al gate viene ridotta, la formazione del canale è meno probabile, e il breakdown avviene a causa dell'iniezione di carica attraverso il gate. I tests mostrano inoltre che in condizioni di breakdown gli HEMT possono emettere un debole segnale di elettroluminescenza: quest'ultimo è localizzato lungo il bordo del gate quando la corrente che fluisce è molto bassa; ma si sposta verso il bordo del drain e il segnale diventa più intenso quando la Id raggiunge le condizioni di breakdown sostenibile. Inoltre, il breakdown mostra un comportamento non monotonico in funzione della temperatura, il che conferma la coesistenza di due differenti meccanismi che interagiscono alle alte tensioni, l'uno dominando sull'altro o viceversa a seconda delle condizioni di polarizzazione. La singola eterostruttura è soggetta a breakdown già a basse tensioni (35 V) a causa della scarsa capacità di confinare gli elettroni all'interno del canale, indipendentemente dalla distanza gate-drain. Molte soluzioni alternative sono state testate con successo nel tentativo di migliorare il breakdown: dispositivi con buffer GaN drogato con ferro Fe o carbonio C, l'applicazione di doppie eterostrutture e infine strutture con una back-barrier AlGaN cresciuta su buffer GaN drogato. Queste soluzioni si sono rivelate efficienti nel migliorare il breakdown, che è risultato dipendere anche dalla distanza gate-drain. La terza ed ultima parte è dedicata all'affidabiltà dei dispositivi. I risultati dei tests di vita accelerata mostrano che nei dispositivi a singola eterostruttura si riscontra una rapida degradazione delle caratteristiche elettriche in off-state anche in condizioni di basse tensioni: il punch-through causa la formazione di difetti aggiuntivi che ne minano l'affidabilità. Al contrario, i dispositivi in doppia eterostruttura mostrano una migliore affidabilità grazie a (i) correnti di perdita molto inferiori (ii) ridotta probailità di punch-through, che ha solitamente luogo ad alte tensioni (iii) tensioni di breakdown molto piu elevate. Nell'ultima sezione si è dato spazio al progetto NPI in collaborazione con l'ESA, con lo studio delle caratteristiche dei GH25. La caratterizzazione DC ha mostrato una tecnologia matura, anche se ancora soggetta a fenomeni di instabilità come il kink e il current collapse (30%). L'uso di field plates ha efficacemente migliorato il MAG al costo di una ridotta frequenza di cross-over, e nei test per il breakdown si è rivelato trascurabile. I dati ottenuti nei test in off-state hanno mostrato una ridotta degradazione delle caratteristiche elettriche, fino al raggiungimento di una tensione critica che, confrontata con i risultati del breakdown, suggerisce che la possibile causa di rottura sia ancora il punch-through. I life test condotti a 423K hanno purtroppo evidenziato come il punto di lavoro in classe A presenti una assai rapida e significativa degradazione dei dispositivi. Due possibili cause sono state considerate: la degradazione puo essere dovuta a (i) elevata potenza (ii) elevata temperatura del dispositivo a cui contribuisce la condizione di polarizzazione. Ulteriori test a temperatura ambiente potrebbero essere d'aiuto nell'identificare il meccanismo coinvolto.

The development of state-of-the-art AlGaN/GaN high electron mobility transistors (HEMTs) has shown much promise for advancing future RF and microwave communication systems. These revolutionary devices demonstrate great potential and superior performance and many commercial companies have demonstrated excellent reliability results based on multiple temperature accelerated stress testing. However, a physical understanding of the various reliability limiting mechanisms is lacking and the role and relative contribution of the various intrinsic material factors, such as physical stress and strain has not been clearly explained in the literature. Part of issues that impact device reliability are the mechanical stresses induced in the devices as well as the self-heating that also limit device performance. Thus, quantification of stress and temperature in AlGaN/GaN HEMTs is of great importance. To address some of the needs for metrology to quantify stress in AlGaN/GaN HEMTs, micro-Raman spectroscopy and micro-photoluminescence (micro-PL) were utilized to quantify the residual stress in these devices. Through the use of micro-Raman and micro-PL optical characterization methods, mapping of the vertical and lateral stress distributions in the device channels was performed. Results show that stress can be influenced by the substrate material as well as patterned structures including metal electrodes and passivation layers. Previously developed and reported micro-Raman thermometry methods require an extensive calibration process for each device investigated. To improve the implementation of micro-Raman thermometry, a method was developed which offers both experimental simplicity and high accuracy in temperature results utilizing a universal calibration method that can be applied to a broad range of GaN based devices. This eliminates the need for performing calibration on different devices. By utilizing this technique, it was revealed that under identical power dissipation levels, the bias conditions (combination of Vgs and Vds) alter the heat generation profile across the conductive channel and thus influence the degree of device peak temperature. The role of stress in the degradation of AlGaN/GaN HEMTs was also explored. A combined analysis using micro-Raman spectroscopy, coupled electro-thermo-mechanical simulation, and electrical step stress tests was conducted to investigate the link between performance degradation and the evolution of total stress in devices. It was found that in addition to stresses arising from the inverse piezoelectric effect, the substrate induced residual stress and the operational themo-elastic stress in the AlGaN layer play a major role in determining the onset of mechanically driven device degradation. Overall, these experiments were the first to suggest that a critical level of stress may exist at which point device degradation will start to occur. The optical characterization methods developed in this study show the ability to reveal unprecedented relationships between temperature/stress and device performance/reliability. They can be used as effective tools for facilitating improvement of the reliability of future AlGaN/GaN HEMTs.

Gallium nitride based transistors will make up a large portion of the power electronics and the microwave electronics sectors in the very near future, replacing traditional materials such as silicon (Si) and gallium arsenide (GaAs). The work in this thesis focuses on AlGaN/GaN high electron mobility transistors (HEMTs) in particular, with the aim of gaining the maximum potential out of them with regards to breakdown voltage. GaN based devices are able to breakdown at higher voltages compared to Si or GaAs due to its wider band gap (3.4 eV compared to 1.1 eV and 1.4 eV respectively) and although a lot of work has been invested into these devices over the last two decades or so, their full potential has yet to be realised and new solutions are still sought to provide a complete engineering solution which will make them competitive and commercially viable. One of the main obstacles is the high electric fields generated at the drain side of the gate which have prevented these devices from reaching their theoretical breakdown fileld of around 300 V/um. In an attempt to overcome this, several approaches have been investigated in this thesis including metal insulator semiconductor HEMTs (MIS-HEMTs), `gate overlapping' HEMTs, where the gate partially overlaps the source and drain contacts and finally a device employing a Schottky source and a Schottky drain contact. The results given show that a MIS-HEMT can have a substantially larger breakdown voltage compared to a Schottky gate HEMT which is clarified through qualitative simulated electric field work and experimental work. Further, the MIS-HEMT shows a high breakdown field of about 87 V/um when a Schottky drain contact is incorporated. The gate overlapping HEMTs attempts to mitigate completely the large electric field found at the drain edge of the gate. Simulated and experimental results are given for this device concept and reveal that the large electric field peak is indeed removed, however, low breakdown voltages are still incurred due to the closeness of the gate edge to the drain contact. Finally, results are given for a device employing Schottky source and Schottky drain contacts and reveals that present theory may not completely describe the operation of this device.

Cette thèse s'inscrit dans un contexte de développement durable où les enjeux énergétiques consistent à concevoir des convertisseurs de puissance plus disséminés, donc avec une Spécification ambitieuse en termes de densités massique et volumique. Les composants à semiconducteur dit à grand Gap permettent l’augmentation de la fréquence de commutation et permettent un fonctionnement à plus haute température locale. Les commutations à front raides et à haute fréquence des transistors rendent le système plus sensible aux éléments parasites. Ceci perturbe en retour la commutation des transistors et génère des pertes joules supplémentaires. Dans ce contexte les travaux ont été effectués dans le cadre d’une cotutelle entre les laboratoires Ampère (INSA Lyon) et LN2 (Université de Sherbrooke), le but étant d’apporter des contributions à l’optimisation de la commutation des HEMTs GaN. Le premier axe des travaux consiste à mettre en place des stratégies de contrôle de vitesses de commutation en tension et en courant, par la grille, dans le but d’améliorer la signature CEM. Les circuits de contrôle proposés sont développés dans un premier temps en boucle ouverte puis dans un second temps en boucle fermée afin de compenser des non-linéarités (température, courant de charge et tension de fonctionnement). Les prototypes de contrôle de grille ont été testés à partir de composants discrets du marché. Des limites apparaissent, que l’intégration monolithique GaN doit corriger à terme, en particulier en atténuant fortement le problème des inductances parasites. Les analyses en simulation ont reposé sur l’adoption d’un modèle comportemental de HEMT GaN identifiable. Le deuxième axe des travaux consiste à vérifier de manière systémique différentes stratégies de contrôle de grille notamment pour la gestion du compromis entre pertes joule pendant les temps morts au sein d’un à bras d’onduleur et la performance fréquentielle des commutations. Aux termes de ces travaux, les systèmes de contrôles développés en boucle ouverte ont permis de ralentir les vitesses de commutation d’au moins 30 %, occasionnant une augmentation des pertes de commutation, dans un ordre de grandeur inférieur à 50 %. Due à la rapidité de commutation des HEMT GaN et aux limites des composants discrets du marché, le taux de réduction des vitesses de commutation obtenu avec la boucle fermée (taux de réduction inférieur à 20 %) est moins intéressant qu’avec la boucle ouverte. L’utilisation d’un circuit monolithique peut être une alternative pour augmenter le taux de réduction des vitesses de commutation en boucle fermée. Des résultats de simulation sous SPICE en vue du circuit monolithique sont à la base de cette hypothèse. Concernant le deuxième axe, l’application de commande multiniveaux de grille des transistors du bras d’onduleur a permis de réduire les pertes de conduction inverse et les pertes dues aux phénomènes de Cross Talk d’au moins 30 %
This thesis is part of the sustainable development context where the energy challenges rely on designing numerous and lumped power converters with good power density and high efficiency. New power semiconductor devices, namely wide band semiconductors (GaN, SiC) are used in designing the converters. The high frequency control of these converters makes the system more sensitive to parasitic elements. The latter elements disrupt the switching behavior of the transistors and generate additional losses. In this context this work was carried out in a cotutelle partnership between Ampère Laboratory in Villeurbanne and LN2 laboratory at the University of Sherbrooke; the aim being to make a contribution in optimizing the switching conditions of GaN HEMTs. The first work axis consists in managing the voltage and current switching speed through gate control strategies in order to improve the conducted EMI. Firstly, most of the proposed control circuits are developed in open-loop and then secondly in closed-loop in order to compensate the effects of non-linearities (with respect to temperature, load current and operating voltage). Concerning the development of control systems, it can be done first by the use of available discrete components, then by the alternative of the monolithic GaN integration which is considered in order to bring more speed and efficiency. Monolithic integration would also solve the problem of parasitic inductances. To facilitate the design of integrated circuits and control systems, the development of a behavioral model of HEMT GaN will serve as a modeling tool. The second axis of the work consists in experimentally validating well-adapted control system for the gate of the power transistor in order to master the transient behaviors of the power transistors. Namely it is necessary to allow a satisfying management of losses during dead time in a half bridge converter. At the end of this work, the control systems developed in open loop made it possible to slow the switching speeds by at least 30 % but causing an increase in switching losses up to 50% in some cases. Due to the fast switching speed of HEMT GaNs and the limitations of discrete components on the market, the reduction rate of switching speeds obtained with the closed loop (reduction rate less than 20%) is less attractive than that of the open loop. Using a monolithic circuit can be an alternative to increase the rate of reduction of closed loop switching speeds. SPICE simulation toward monolithic circuit are the basis of this hypothesis. Concerning the second axis, the application of multilevel gate voltage control of the transistors of half bridge made it possible to reduce the losses of reverse conduction and the losses due to the phenomena of Cross Talk by at least by 30 %

Mestrado em Engenharia Eletrónica e de Telecomunicações
Gallium nitride (GaN) high electron mobility transistor (HEMT) technology has been revolutionizing the RF power amplifier (PA) market. Its potential, versus existing technologies, such as Silicon (Si) Laterally-Diffused MOS(LDMOS), is yet to be completely explored. However, the lack of good characterization and modelling of charge carrier trapping related phenomena has been hampering PA designers from extracting this technology’s promised performance. Hence, GaN HEMT trapping has been given a great amount of attention by the scientific and industrial worlds. This is mainly because the overall linearity of the PA built with this technology is affected, to a great extent, by the trapping state dependence on the device’s drain peak voltage. Circuit computer-aided design (CAD) tools are almost ubiquitous at research and development labs. However, these tools rely, not only on their simulation algorithms, but also on their built-in device models. This makes the development of accurate models a fundamental task. This work reports a multi-bias small-signal equivalent circuit (SSEC) model extraction procedure of a 3.3 W GaN HEMT from pulsed S-parameters as well as the development of a pulsed DC I-V measurement system and its use in the characterization of trapping-effects. This system, which is based on two pulser circuits, designed specifically for gate and drain pulsed measurements, was then automated through a MATLAB/PC controller. The pulser circuits allowed pulse widths on the microsecond scale at very low duty cycles as well as high peak voltages - close to 50 V - and currents - up to 4 A. With the developed system, isothermal standard pulsed I-V curves, as well as trapping-state dependent, isodynamic, pulsed I-V curves were obtained from a 15 W GaN HEMT device. In order to obtain the latter, the so-called double-pulse measurement technique was used. The expected asymmetric time constants associated with drain-lag were clearly observed: on the ns scale for the trapping and on the hundreds of milliseconds for the de-trapping. The predicted relatively reduced impact of gate-lag phenomena in more recent GaN HEMT technologies was also verified.
A tecnologia GaN HEMT tem revolucionado o mercado dos amplificadores de potência para RF. O seu potencial, comparado com tecnologias anteriores, como a Si LDMOS, continua por ser completamente explorado. Contudo, a falta de uma boa caracterização e modelação dos efeitos de memória lenta causados pelo armadilhamento de cargas têm impedido o total aproveitamento desta tecnologia no desenho de amplificadores de potência. Consequentemente, estes fenómenos de armadilhamento têm sido alvo de um amplo estudo tanto a nível científico como industrial. Isto deve-se, sobretudo, porque a linearidade dos amplificadores baseados nesta tecnologia é bastante afectada pelo estado de armadilhamento de cargas no dispositivo, que, por sua vez, é definido pela tensão de pico na saída, drain, do transístor. As ferramentas de desenho de circuitos auxiliado por computador estão presentes na maioria dos laboratórios de investigação. No entanto, estas dependem não só dos seus algoritmos de simulação mas também, em larga medida, dos modelos nelas utilizados, tornando fundamental o desenvolvimento de melhores modelos. O presente documento descreve a extracção de um modelo de circuito equivalente de pequeno signal dependente da polarização, de um transístor GaN HEMT de 3.3 W, a partir de medidas de parâmetros-S pulsadas, assim como a construcção de um sistema de medidas pulsadas DC I-V e a utilização deste último na caracterização de efeitos de armadilhamento. O sistema desenvolvido, baseado em dois circuitos pulsadores desenhados para medidas pulsadas quer no terminal de entrada, gate, quer no de saída, drain, foi automatizado através do software MATLAB instalado num PC. Os circuitos pulsadores permitem larguras de pulso na escala dos microsegundos com duty-cycles tão pequenos como 0.001%, assim como, elevadas tensões de saída - perto de 50 V - e correntes - pelo menos até 4 A. Com o sistema desenvolvido, obtiveram-se curvas I-V iso-térmicas e também curvas I-V iso-dinâmicas, dependentes do estado de armadilhamento, de um transístor GaN HEMT de 15 W. De modo a obter as últimas, foram utilizadas medidas de duplo-pulso. A assimetria esperada nas constantes de tempo associadas com o drain-lag foram claramente observadas: na escala dos ns para o armadilhamento e das centenas de milisegundos para o desarmadilhamento. Tal como a literatura prevê para tecnologias mais recentes de GaN HEMTs, o impacto dos fenónemos de gate-lag que foi observado revelou-se bastante reduzido.

AlN/GaN high-electron mobility transistors (HEMT) are subject to internal structural and electrostatic fields originating mainly from: (i) the fundamental crystal atomicity and the interface discontinuity between dissimilar materials, (ii) atomistic strain, (iii) piezoelectricity, and (iv) spontaneous polarization (pyroelectricity). In this thesis, through numerical simulations, we have studied the origin and effects of these competing internal fields on the electrostatics and the I-V characteristic of scaled nitride HEMT structures. It is shown that strain in these devices is asymmetric and long-ranged (demanding simulations using millions of atoms). The resulting piezoelectric polarization is arge and atomistic in nature. However, the pyroelectric potential is significantly larger than the piezoelectric counterpart and opposes the latter at the InN/GaN interface as opposed to AlGas which only produces a piezoelectric potential. The polarization induced charge density is computed using a three-dimensional Poisson solver and shown to be strongly dependent on the thickness of the AlN barrier layer. This finding has been validated using available experimental data. We have also demonstrated that the olarization fields alone can induce channel carriers at zero external bias and lead to a significant increase in the ON current.

Gallium Nitride (GaN)-based High Electron Mobility Transistors (HEMTs) grown on Silicon (Si) substrates technology is emerging as one of the most promising candidates for cost effective, high-power, high-frequency Integrated Circuit (IC) applications; operating at Microwave and Millimetre (mm)-wave frequencies. To capitalise on the advantages of RF GaN technology grown on Low resistivity (LR) Si substrates; RF losses due to the Si substrate must be eliminated at the active devices, passive devices and interconnect. Low resistivity Si substrates are intrinsic prone to RF losses and high resistivity (HR) Si substrates shown to exhibit RF losses as a result of operating substrate temperature at the system level. Therefore, obtaining a viable high-performance RF GaN-on both LR and HR Si device remains a challenge for this technology. In an attempt to overcome these issues, Microwave Monolithic Integrated Circuit (MMIC)-compatible technology was developed for the first time aiming to eliminate the substrate coupling effect for the realisation of high performance passive and active devices on GaN-on-Si substrates for mm-wave MMIC applications.

Gallium Nitride (GaN) is considered a very promising material for use in the field of power devices as its application in power systems would result in a significant increase in the power density, reduced power losses, and the potential to operate at high frequencies. The wide bandgap of the material allows a high critical electric field to be sustained which can lead to the design of devices with a shorter drift region, and therefore with lower on-state resistance, if compared to a silicon-based device with the same breakdown voltage. The use of an AlGaN/GaN heterostructure allows the formation of a two-dimensional electron gas (2DEG) at the heterointerface where carriers can reach very high mobility values. These properties can lead to the production of High Electron Mobility Transistors (HEMTs) and Schottky barrier diodes with superior performance, even when compared to devices based on state-of-the-art technologies such as Silicon Carbide or superjunctions. Furthermore, epitaxial growth of GaN layers on silicon wafers allows a significant reduction in the production cost and makes these devices competitive from a price perspective. This thesis will deal with a variety of topics concerning the characterization, design and optimization of AlGaN/GaN HEMTs and Schottky diodes with a 600 to 650V rating. Discussion will span several topics from device cross-section physics to circuit implementation and will be based on both experimental results and advanced modelling. More specifically, the thesis is concerned with the characterization of AlGaN/GaN Schottky diodes and extraction of their main parameters such as ideality factor, barrier height and series resistance. A thorough investigation of their reverse recovery performance and a comparison to competing technologies is also given. Several topics which concern the operation of AlGaN/GaN HEMTs are then discussed. The underlying physics of p-gate enhancement mode transistors are analysed followed by a discussion of the challenges associated with the implementation of these devices at a circuit level. Finally, a comparison of the performance of a specific area-saving layout (Bonding pad over active area) and a conventional design is given. The thesis aims to significantly enhance the understanding of the behaviour of these devices to enable better or new commercial designs to emerge.

碩士
國立成功大學
奈米積體電路工程碩士學位學程
107
In this thesis, we described in details process development for MIS-HEMT, focusing on the discussion of Au-free ohmic contact. Transmission line measurement (TLM) structure was adopted heavily to step analysis, including device isolation using implantation, digital etching concept to avoid instability, unevenness, roughness caused by traditional etching, etching profile recovery, Au-free ohmic contact and P-GaN active test. We have analyzed device characteristics, including I-V, C-V, breakdown voltage and reliability. And we discuss P-GaN HEMT as well. We have improved the roughness caused by traditional etching from 2.32 to 1.03 nm using digital etching, where the stable etching is well-controlled at a rate of 0.93 nm/cycle. In the same etching depth, the etching depth difference using digital etching is below 10 nm better than the traditional etching is 20 nm. For yield and reliability, development in digital etching is apparently important. Our fabricated device shows the maximum drain current ID(max)=133mA/mm and on-off ratio ION/IOFF=104 at drain bias VD=5V. The voltage of the dielectric layer breakdown and device breakdown can achieve 10 V and 422 V, respectively. After 2000 sec off-state stress, on-resistance ratio and threshold voltage shift are 3 and 0.58 V, respectively. After 1000 sec gate stress with VG=6V, threshold voltage shifts 0.7 V. In the last part of the thesis, the P-GaN gate HEMT has been fabricated successfully, but depletion-mode (D-mode) property is observed, which is due to Si3N4 deposited by PECVD. This reason has been verified by change passivation that gets enhancement-mode (E-mode).

碩士
國立交通大學
材料科學與工程系所
97
The RF and digital performance of InGaP/In0.22Ga0.78As pseudomorphic high electron mobility transistors (PHEMTs) with different doping profiles are investigated. In order to improve the device linearity for RF applications, the uniformly-doped and channel-doped structures are designed and the devices are compared. The uniformly- doped device shows higher IP3 of 22.19 dBm, and the channel-doped device shows higherΔ(IP3-P1dB) of 14.23 dB and higher IP3 to DC power consumption ratio (IP3/PDC) of 4.97 compared to other devices. Figures of merits of these devices for digital applications are also evaluated. SS and ION/IOFF ratio parameters can be improved by uniformly-doping in the Schottky layer and DIBL parameter can be reinforced by extra doping in the channel layer. For digital applications, the InGaAs channel with high indium concentration is required for better performance and higher transconductance. In addition, atomic layer deposition (ALD) Al2O3 is introduced to act as the gate insulator to reduce gate leakage current and increase breakdown voltage. Thus, the InAlAs/In0.7Ga0.3As metal-oxide-semiconductor metamorphic HEMTs (MOS-MHEMTs) and InAlAs/InAs MOS-HEMTs were fabricated and the insulating properties were improved. Moreover, the InAlAs/InAs MOS-HEMTs employing air-bridge structure with different gate widths exhibit similar threshold voltage, leading to the possibility for digital utilization of different fan-out level.

碩士
國立中央大學
電機工程學系
105
This study discusses the impact of back-gate structure on the DC characteristics of an AlGaN/GaN high-electron mobility transistor (HEMT). There are two parts in this study: (1) An AlGaN/GaN/AlGaN double heterostructure is designed to form two dimensional electron gas (2DEG) channel and two dimentional hole gas (2DHG) backgate and investigate the reduction of leakage current with shift of threshold voltage when backgate bias is applied. (2) AlGaN/GaN HEMTs with p-GaN backgate were annealed for 15 minutes in N2 ambient at 700℃. After annealing, we investigate the ability of activated p-GaN backgate layer for controling threshold voltage, reducing leakage current, and enhancing breakdown voltage. The results of simulation reveal that 2DHG backgate can decrease leakage current and turn device from depletion-mode operation to enhancement-mode operation by applying backgate bias. However, the fabricated devices do not demonstrate the same control capibility of threshold voltage as simulation due to the bad connection between backgate metal and 2DHG. The large electric field induced by backgate still can suppress device leakage current when a negative bias is applied. The on/off current ratio in different backgate bias can achieve 107. In addition, device breakdown voltage of 691 V is observed. For the DC characteristic of AlGaN/GaN HEMTs with p-GaN backgate, devices without annealing have lower leakage current and on-state resistance. Devices with annealing show higher leakage current and more obvious positive shift of threshold voltage. The shift of threshold voltage for device without annealing is 0.46 V between backgate bias 0 V and -14 V, and off-state leakage current reduction is 42.6%. The shift of threshold voltage for device with annealing is 0.55 V between backgate bias 0 V and -14 V, and off state leakage current reduction is 73.1%. The on/off current ratio for device without annealing is 5.47×107, and 8.86×105 for device with annealing when backgate bias apply 0 V. Current ratio for device with annealing can increase to 1.12×107 when backgate bias at -14 V. Devices without annealing show lower leakage current before devices breakdown. However, devices with annealing show higher breakdown voltage. The highest breakdown voltage is 762 V for device with annealing when applying backgate bias of -14 V.

碩士
長庚大學
光電工程研究所
97
The AlGaN/GaN HEMT structure in this investigation was growth by MOCVD. The carrier density was obtained by making Hall measurements and from capacitance–voltage (C–V) curves. In the experiment, the values were inconsistent. The carrier density varied with the surface conditions of the samples that were prepared for Hall and C–V measurements. To study further the effects of the surface conditions on the sheet carrier densities, the samples were annealed at various temperatures that were used MOCVD to anneal for one hour at an environment of H2. Five samples were reloaded into the MOCVD reactor, and separately annealed at 1000℃, 900℃, 800℃, 700℃ and 600℃. The surface of samples random to became defects of hexagonal with SEM (Scanning Electron Microscopy), because Hydrogen pyrolysis with gallium atoms. Then, we were investigated that various temperatures for electrical measurements from the annealed temperature influenced surface condition. The annealed temperature was increased, because surface conditions became badly, and lead to the leakage current became hardly .Because the leakage current were related to the defects, so lead to concentration were lower. Thus, the relationship between surface state and the carrier density was determined.