Relevant bibliographies by topics / Heterogeneous Architecture Design

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Academic literature on the topic 'Heterogeneous Architecture Design'

Author: Grafiati
Published: 22 June 2023

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Journal articles on the topic "Heterogeneous Architecture Design"

1

LIU, SHAOSHAN, WON W. RO, CHEN LIU, et al. "INTRODUCING THE EXTREMELY HETEROGENEOUS ARCHITECTURE." Journal of Interconnection Networks 13, no. 03n04 (2012): 1250010. http://dx.doi.org/10.1142/s0219265912500107.

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The computer industry is moving towards two extremes: extremely high-performance high-throughput cloud computing, and low-power mobile computing. Cloud computing, while providing high performance, is very costly. Google and Microsoft Bing spend billions of dollars each year to maintain their server farms, mainly due to the high power bills. On the other hand, mobile computing is under a very tight energy budget, but yet the end users demand ever increasing performance on these devices. This trend indicates that conventional architectures are not able to deliver high-performance and low power consumption at the same time, and we need a new architecture model to address the needs of both extremes. In this paper, we thus introduce our Extremely Heterogeneous Architecture (EHA) project: EHA is a novel architecture that incorporates both general-purpose and specialized cores on the same chip. The general-purpose cores take care of generic control and computation. On the other hand, the specialized cores, including GPU, hard accelerators (ASIC accelerators), and soft accelerators (FPGAs), are designed for accelerating frequently used or heavy weight applications. When acceleration is not needed, the specialized cores are turned off to reduce power consumption. We demonstrate that EHA is able to improve performance through acceleration, and at the same time reduce power consumption. Since EHA is a heterogeneous architecture, it is suitable for accelerating heterogeneous workloads on the same chip. For example, data centers and clouds provide many services, including media streaming, searching, indexing, scientific computations. The ultimate goal of the EHA project is two-fold: first, to design a chip that is able to run different cloud services on it, and through this design, we would be able to greatly reduce the cost, both recurring and non-recurring, of data centers\clouds; second, to design a light-weight EHA that runs on mobile devices, providing end users with improved experience even under tight battery budget constraints.
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Ahsan, AMM, Ruinan Xie, and Bashir Khoda. "Heterogeneous topology design and voxel-based bio-printing." Rapid Prototyping Journal 24, no. 7 (2018): 1142–54. http://dx.doi.org/10.1108/rpj-05-2017-0076.

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Purpose The purpose of this paper is to present a topology-based tissue scaffold design methodology to accurately represent the heterogeneous internal architecture of tissues/organs. Design/methodology/approach An image analysis technique is used that digitizes the topology information contained in medical images of tissues/organs. A weighted topology reconstruction algorithm is implemented to represent the heterogeneity with parametric functions. The parametric functions are then used to map the spatial material distribution following voxelization. The generated chronological information yields hierarchical tool-path points which are directly transferred to the three-dimensional (3D) bio-printer through a proposed generic platform called Application Program Interface (API). This seamless data corridor between design (virtual) and fabrication (physical) ensures the manufacturability of personalized heterogeneous porous scaffold structure without any CAD/STL file. Findings The proposed methodology is implemented to verify the effectiveness of the approach and the designed example structures are bio-fabricated with a deposition-based bio-additive manufacturing system. The designed and fabricated heterogeneous structures are evaluated which shows conforming porosity distribution compared to uniform method. Originality/value In bio-fabrication process, the generated bio-models with boundary representation (B-rep) or surface tessellation (mesh) do not capture the internal architectural information. This paper provides a design methodology for scaffold structure mimicking the native tissue/organ architecture and direct fabricating the structure without reconstructing the CAD model. Therefore, designing and direct bio-printing the heterogeneous topology of tissue scaffolds from medical images minimize the disparity between the internal architecture of target tissue and its scaffold.
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Sek Meng Chai, T. M. Taha, D. S. Wills, and J. D. Meindl. "Heterogeneous architecture models for interconnect-motivated system design." IEEE Transactions on Very Large Scale Integration (VLSI) Systems 8, no. 6 (2000): 660–70. http://dx.doi.org/10.1109/92.902260.

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4

Yang, Chungang, Jiandong Li, and Alagan Anpalagan. "Energy Efficiency Architecture Design for Heterogeneous Cellular Networks." Wireless Communications and Mobile Computing 16, no. 12 (2015): 1588–602. http://dx.doi.org/10.1002/wcm.2635.

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Kovalyov, S. P. "Design of Heterogeneous Cyber-Physical Systems Employing Category Theory." Mekhatronika, Avtomatizatsiya, Upravlenie 23, no. 2 (2022): 59–67. http://dx.doi.org/10.17587/mau.23.59-67.

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Heterogeneous cyber-physical control systems based on digital twins are in demand by Industry 4.0. In accordance with the contemporary systems engineering methodology, such systems are designed at the level of digital models. The paper proposes approaches to formalization and subsequent automation of solving direct and inverse problems of their design. To unify descriptions of heterogeneous components, we follow a viewpoint-based approach to architecture design recommended by the international standard ISO/IEC/IEEE 42010. Following recent trends, we employ category theory as a mathematical framework for the formal description and solution of design problems. Indeed, category theory is a branch of higher algebra specifically aimed at a unified representation of objects of different nature and relationships between them. The design space of a heterogeneous cyber-physical system is constructed as a subcategory of the multicomma category, the objects of which describe possible system architectures with a fixed structural hierarchy represented from a certain viewpoint as diagrams, and morphisms denote actions associated with the parts selection and replacement during the system design. Direct design problems consist in evaluating the properties of the system as a whole by its architecture and are solved using a universal category-theoretic construction of the colimit of the diagram. The solution of inverse problems that require finding variants of the system architecture, which are (sub-, Pareto-) optimal according to the consumer quality criteria, consists in reconstructing diagrams by their colimit edges. For such reconstruction, optimization algorithms of gradient descent type are reasonable to employ, which navigate along the system design space morphisms calculating the path by means of computer algebra. Typical techniques of assembling cyber-physical systems, such as modular composition and aspect weaving, are described in the language of category theory and illustrated. As an example, we outline the design of energy-efficient robotic production lines represented from the behavior viewpoint as discrete-event simulation models.
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6

AGYEMAN, MICHAEL O., ALI AHMADINIA, and ALIREZA SHAHRABI. "HETEROGENEOUS 3D NETWORK-ON-CHIP ARCHITECTURES: AREA AND POWER AWARE DESIGN TECHNIQUES." Journal of Circuits, Systems and Computers 22, no. 04 (2013): 1350016. http://dx.doi.org/10.1142/s0218126613500163.

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Three-dimensional Network-on-Chip (3D NoC) architectures have gained a lot of popularity to solve the on-chip communication delays of next generation System-on-Chip (SoC) systems. However, the vertical interconnects of 3D NoC are expensive and complex to manufacture. Also, 3D router architecture consumes more power and occupies more area per chip floorplan compared to a 2D router. Hence, more efficient architectures should be designed. In this paper, we propose area efficient and low power 3D heterogeneous NoC architectures, which combines both the power and performance benefits of 2D routers and 3D NoC-bus hybrid router architectures in 3D NoC architectures. Experimental results show a negligible penalty (less than 5%) in average packet latency of the proposed heterogeneous 3D NoC architectures compared to typical homogeneous 3D NoCs, while the heterogeneity provides power and area efficiency of up to 61% and 19.7%, respectively.
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Pasha, Muhammad Adeel, Umer Farooq, and Bilal Siddiqui. "A framework for high-level simulation and optimization of fine-grained reconfigurable architectures." SIMULATION 95, no. 8 (2018): 737–51. http://dx.doi.org/10.1177/0037549718796272.

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Field Programmable Gate Arrays (FPGAs), due to their programmability, have become a popular design choice for control and processing blocks of modern-day digital design. However, this flexibility makes them larger, slower, and less power-efficient when compared to Application Specific Integrated Circuits (ASICs). On the other hand, ASICs have their own drawbacks, such as lack of programmability and inflexibility. One potential solution is specialized fine-grained reconfigurable architectures that have improved flexibility over ASICs and better resource utilization than FPGAs. However, designing a fine-grained reconfigurable architecture is a daunting task in itself due to lack of high-level design-flow support. This article proposes an automated design-flow for the system-level simulation, optimization, and resource estimation of generic as well as custom fine-grained reconfigurable architectures. The proposed framework is generic in nature as it can be used for both control-oriented and compute-intensive applications and then generates a homogeneous or heterogeneous reconfigurable architecture for them. Four sets of homogeneous and heterogeneous benchmarks are used in this work to show the efficacy of our proposed design-flow, and simulation results reveal that our framework can generate both generic and custom fine-grained reconfigurable architectures. Moreover, the area and power estimations show that auto-generated domain-specific reconfigurable architectures are 76% and 73% more area and power-efficient, respectively, than generic FPGA-based implementations. These results are consistent with the savings reported for manual designs in the literature.
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Son, Hyun-Seung, Woo-Yeol Kim, and R. Young-Chul Kim. "MDA(Model Driven Architecture) based Design for Multitasking of Heterogeneous Embedded System." KIPS Transactions:PartD 15D, no. 3 (2008): 355–60. http://dx.doi.org/10.3745/kipstd.2008.15-d.3.355.

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9

He, Tao, Hua Zhong Li, Tang Ren Dan, De Fen Zhang, Jun Qiang Liu, and Guo Rong Qin. "Design and Analysis of Test Model under Heterogeneous and Internet-Ware." Applied Mechanics and Materials 687-691 (November 2014): 2635–39. http://dx.doi.org/10.4028/www.scientific.net/amm.687-691.2635.

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Studying a method based on UML model software architecture performance prediction: this method chosen software architecture design in UML, use case diagram, activity diagram and component diagram, and pull stereotypes and tagged values in it, and enlarge them to be UML SPT model, and then turn UML SPT model into queuing network model through conversion algorithm, this algorithm can deal with UML model activity diagram which included branch node and confluent nodes. Finally, using frequency domain analysis theory to get queuing network model, to know performance parameters and performance bottlenecks and also introduce the design plan of UML software architecture performance automation tools, and give a example of performance prediction software architecture.
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10

Fang, Wei. "Design of Heterogeneous Data Exchange Technology for Teaching Resources Based on ICMPv6." International Journal of Emerging Technologies in Learning (iJET) 13, no. 11 (2018): 78. http://dx.doi.org/10.3991/ijet.v13i11.9600.

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To promote the innovation of teaching resources and heterogeneous data exchange platform technologies and theories, heterogeneous data exchange platforms based on ICMPv6 teaching resources were studied. First, based on ICMPv6, the middle-tier architecture of the heterogeneous data exchange platform for teaching resources was studied. Second, the application layer architecture in the heterogeneous data exchange platform system of educational resources was studied. The middle layer and application layer were designed and implemented. Finally, the system was applied to the education platform to reflect its performance. The results showed that the ICMPv6 system could solve data exchange and data sharing systems between schools and homes. Contributions were made in solving interactive education between home and school. To sum up, it is feasible to use ICMPv6 on heterogeneous educational resources exchange platform.
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