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Van, Der Kogel André, and Niklas Österlund. "High frequency dc/dc power converter with galvanic isolation." Thesis, Linköpings universitet, Fysik och elektroteknik, 2016. http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-128831.
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There is a steady demand to increase the efficiency and raise the power density of power converters. This trend is desired since it leads to reduced size of the converter. The purpose of this thesis is to investigate materials, topologies, core structure and then build a prototype to demonstrate the result. Two core materials have been compared, Fair-Rite material 68 and Ferroxcube 4F1. The goal was to have 50 V input and 30 V output with 80 % efficiency of the converter. The converter with the Fair-Rite material 68 accomplished a peak efficiency at 11 MHz with 54 % efficiency. The core material Ferroxcube 4F1, reached an efficiency of 52 % at 7 MHz. These results were however with 5 V input and 3 V output. The converter had a low efficiency at 50 V input, which lead to ripple in the circuit. One reason for this behaviour was because the design of the PCB was not optimized for MHz operation. The focus of the PCB was that it should be easy to work with instead of achieving peak performance. Also, from the beginning it was decided that no PCB should be made. The focus was instead on the theory and simulations of the converter so no thoroughly investigation of PCB design was done. The leakage inductance of the transformer core was about 10 % of the primary inductance for both materials. The high leakage inductance is believed to further reduce the efficiency of the converter.
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Ward, Gillian Anne. "Design of a multi-kilowatt, high frequency, DC-DC converter." Thesis, University of Birmingham, 2003. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.274596.
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Neveu, Florian. "Design and implementation of high frequency 3D DC-DC converter." Thesis, Lyon, INSA, 2015. http://www.theses.fr/2015ISAL0133/document.
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L’intégration ultime de convertisseurs à découpage repose sur deux axes de recherche. Le premier axe est de développer les convertisseurs à capacités commutées. Cette approche est compatible avec une intégration totale sur silicium, mais limitée en terme de densité de puissance. Le second axe est l’utilisation de convertisseurs à inductances, qui pâtissent d’imposants composants passifs. Une augmentation de la fréquence permet de réduire les valeurs des composants passifs. Cependant une augmentation de la fréquence implique une augmentation des pertes par commutation, ce qui est contrebalancé par l’utilisation d’une technologie de fabrication plus avancée. Ces technologies plus avancées souffrent quant à elles de limitations au niveau de leur tension d’utilisation. Convertir une tension de 3,3V vers une tension de 1,2V apparait donc comme un objectif ambitieux, particulièrement dans le cas où les objectifs de taille minimale et de rendement supérieur à 90 % sont visés. Un assemblage 3D des composants actifs et passifs permet de minimiser la surface du système. Un fonctionnement à haute fréquence est aussi considéré, ce qui permet de réduire les valeurs requises pour les composants passifs. Dans le contexte de l’alimentation « on-chip », la technologie silicium est contrainte par les fonctions numériques. Une technologie 40 nm CMOS de type « bulk » est choisie comme cas d’étude pour une tension d’entrée de 3,3 V. Les transistors 3,3 V présentent une figure de mérite médiocre, les transistors 1,2 V sont donc choisis. Ce choix permet en outre de présenter une meilleure compatibilité avec une future intégration sur puce. Une structure cascode utilisant trois transistors en série est étudiée est confrontée à une structure standard à travers des simulations et mesures. Une fréquence de +100MHz est choisie. Une technologie de capacités en tranchées est sélectionnée, et fabriquée sur une puce séparée qui servira d’interposeur et recevra la puce active et les inductances. Les inductances doivent être aussi fabriquées de manière intégrée afin de limiter leur impact sur la surface du convertisseur. Ce travail fournit un objet contenant un convertisseur de type Buck à une phase, avec la puce active retournée (« flip-chip ») sur l’interposeur capacitif, sur lequel une inductance est rapportée. Le démonstrateur une phase est compatible pour une démonstration à phases couplées. Les configurations standard et cascode sont comparées expérimentalement aux fréquences de 100 MHz et 200 MHz. La conception de la puce active est l’élément central de ce travail, l’interposeur capacitif étant fabriqué par IPDiA et les inductances par Tyndall National Institute. L’assemblage des différents sous-éléments est réalisé via des procédés industriels. Un important ensemble de mesures ont été réalisées, montrant les performances du convertisseur DC-DC délivré, ainsi que ses limitations. Un rendement pic de 91,5 % à la fréquence de 100 MHz a été démontréUltimate integration of power switch-mode converter relies on two research paths. One path experiments the development of switched-capacitor converters. This approach fits silicon integration but is still limited in term of power density. Inductive DC-DC architectures of converters suffer by the values and size of passive components. This limitation is addressed with an increase in frequency. Increase in switching losses in switches leads to consider advanced technological nodes. Consequently, the capability with respect to input voltage is then limited. Handling 3.3 V input voltage to deliver an output voltage in the range 0.6 V to 1.2 V appears a challenging specification for an inductive buck converter if the smallest footprint is targeted at +90 % efficiency. Smallest footprint is approached through a 3D assembly of passive components to the active silicon die. High switching frequency is also considered to shrink the values of passive components as much as possible. In the context of on-chip power supply, the silicon technology is dictated by the digital functions. Complementary Metal-Oxide- Semiconductor (CMOS) bulk C40 is selected as a study case for 3.3 V input voltage. 3.3 V Metal-Oxide-Semiconductor Field-Effect Transistor (MOSFET) features poor figure of merits and 1.2 V standard core, regular devices are preferred. Moreover future integration as an on-chip power supply is more compatible. A three-MOSFET cascode arrangement is experimented and confronted experimentally to a standard buck arrangement in the same technology. The coupled-phase architecture enables to reduce the switching frequency to half the operating frequency of the passive devices. +100MHz is selected for operation of passive devices. CMOS bulk C40 offers Metal-Oxide-Metal (MOM) and MOS capacitors, in density too low to address the decoupling requirements. Capacitors have to be added externally to the silicon die but in a tight combination. Trench-cap technology is selected and capacitors are fabricated on a separate die that will act as an interposer to receive the silicon die as well as the inductors. The work delivers an object containing a one-phase buck converter with the silicon die flip-chipped on a capacitor interposer where a tiny inductor die is reported. The one-phase demonstrator is suitable for coupled-phase demonstration. Standard and cascode configurations are experimentally compared at 100 MHz and 200 MHz switching frequency. A design methodology is presented to cover a system-to-device approach. The active silicon die is the central design part as the capacitive interposer is fabricated by IPDiA and inductors are provided by Tyndall National Institute. The assembly of the converter sub-parts is achieved using an industrial process. The work details a large set of measurements to show the performances of the delivered DC/DC converters as well as its limitations. A 91.5% peak efficiency at 100MHz switching frequency has been demonstrated
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Sagneri, Anthony (Anthony David). "Design of a Very High Frequency dc-dc boost converter." Thesis, Massachusetts Institute of Technology, 2007. http://hdl.handle.net/1721.1/38664.
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Thesis (S.M.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2007.Includes bibliographical references (p. 167-169).
Passive component volume is a perennial concern in power conversion. With new circuit architectures operating at extreme high frequencies it becomes possible to miniaturize the passive components needed for a power converter, and to achieve dramatic improvements in converter transient performance. This thesis focuses on the development of a Very High Frequency (VHF, 30 - 300 MHz) dc-dc boost converter using a MOSFET fabricated from a typical power process. Modeling and design studies reveal the possibility of building VHF dc-dc converters operable over the full automotive input voltage range (8 - 18 V) with transistors in a 50 V power process, through use of newly-developed resonant circuit topologies designed to minimize transistor voltage stress. Based on this, a study of the design of automotive boost converters was undertaken (e.g., for LED headlamp drivers at output voltages in the range of 22 - 33 V.) Two VHF boost converter prototypes using a [Phi]2 resonant boost topology were developed. The first design used an off the shelf RF power MOSFET, while the second uses a MOSFET fabricated in a BCD process with no special modifications.
(cont.) Soft switching and soft gating of the devices are employed to achieve efficient operation at a switching frequencies of 75 MHz in the first case and 50 MHz in the latter. In the 75 MHz case, efficiency ranges to 82%. The 50 MHz converter, has efficiencies in the high 70% range. Of note is low energy storage requirement of this topology. In the case of the 50 MHz converter, in particular, the largest inductor is 56 nH. Finally, closed-loop control is implemented and an evaluation of the transient characteristics reveals excellent performance.
by Anthony Sagneri.
S.M.
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Pilawa-Podgurski, Robert C. N. "Design and evaluation of a very high frequency dc/dc converter." Thesis, Massachusetts Institute of Technology, 2007. http://hdl.handle.net/1721.1/41545.
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Thesis (M. Eng.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2007.This electronic version was submitted by the student author. The certified thesis is available in the Institute Archives and Special Collections.
Includes bibliographical references (p. 139-143).
This thesis presents a resonant boost topology suitable for very high frequency (VHF, 30-300 MHz) dc-dc power conversion. The proposed design is a fixed frequency, fixed duty ratio resonant converter featuring low device stress, high efficiency over a wide load range, and excellent transient performance. A 110 MHz, 23 W experimental converter has been built and evaluated. The input voltage range is 8-16 V (14.4 V nominal), and the selectable output voltage is between 22-34 V (33 V nominal). The converter achieves higher than 87% efficiency at nominal input and output voltages, and maintains efficiency above 80% for loads as small as 5% of full load. Furthermore, efficiency is high over the input and output voltage range. In addition, a resonant gate drive scheme suitable for VHF operation is presented, which provides rapid startup and low-loss operation. The converter regulates the output using high-bandwidth on-off hysteretic control, which enables fast transient response and efficient light load operation. The low energy storage requirements of the converter allow the use of coreless inductors, thereby eliminating magnetic core loss and introducing the possibility of integration. The target application of the converter is the automotive industry, but the design presented here can be used in a broad range of applications where size, cost, and weight are important, as well as high efficiency and fast transient response.
by Robert C.N. Pilawa-Podgurski.
M.Eng.
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Burkhart, Justin (Justin Michael). "Design of a very high frequency resonant boost DC-DC converter." Thesis, Massachusetts Institute of Technology, 2010. http://hdl.handle.net/1721.1/60157.
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Thesis (S.M.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2010.Includes bibliographical references (p. 163-164).
THIS thesis explores the development of a very high frequency DC-DC resonant boost converter. The topology examined features low parts count and fast transient response but suffers from higher device stresses compared to other topologies that use a larger number of passive components. A new design methodology for the proposed converter topology is developed. This design procedure - unlike previous design methodologies for similar topologies - is based on direct analysis of the topology and does not rely on lengthy time-domain simulation sweeps across circuit parameters to identify good designs. Additionally, a method to design semiconductor devices that are suitable for use in the proposed VHF power converter is presented. When the main semiconductor switch is fabricated in a integrated power process where the designer has control over the device layout, large performance gains can be achieved by considering parasitics and loss mechanisms that are important to operation at VHF when designing the device. A method to find the optimal device for a particular converter design is presented. The new design methodology is combined with the device optimization technique to enable the designer to rapidly find the optimal combination of converter and device design for a given specification. To validate the proposed converter topology, design methodology, and device optimization, a 75 MHz prototype converter is designed and experimentally demonstrated. The performance of the prototype closely matches that predicted by the design procedure, and achieves good efficiency over a wide input voltage range.
by Justin Burkhart.
S.M.
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Vulovic, Marko. "Digital Control of a High Frequency Parallel Resonant DC-DC Converter." Thesis, Virginia Tech, 2010. http://hdl.handle.net/10919/35934.
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A brief analysis of the nonresonant-coupled parallel resonant converter is performed. The converter is modeled and a reference classical analog controller is designed and simulated. Infrastructure required for digital control of the converter (including anti-aliasing filters and a modulator) is designed and a classical digital controller is designed and simulated, yielding a ~30% degradation in control bandwidth at the worst-case operating point as compared with the analog controller. Based on the strong relationship observed between low-frequency converter gain and operating point, a gain-scheduled digital controller is proposed, designed, and simulated, showing 4:1 improved worst-case control bandwidth as compared with the analog controller. A complete prototype is designed and built which experimentally validates the results of the gain-scheduled controller simulation with good correlation. The three approaches that were investigated are compared and conclusions are drawn. Suggestions for further research are presented.Master of Science
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Van, Rhyn P. D. "High voltage DC-DC converter using a series stacked topology." Thesis, Link to the online version, 2006. http://hdl.handle.net/10019/1269.
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Wen, Yangyang. "MODELING AND DIGITAL CONTROL OF HIGH FREQUENCY DC-DC POWER CONVERTERS." Doctoral diss., University of Central Florida, 2007. http://digital.library.ucf.edu/cdm/ref/collection/ETD/id/3671.
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The power requirements for leading edge digital integrated circuits have become increasingly demanding. Power converter systems must be faster, more flexible, more precisely controllable and easily monitored. Meanwhile, in addition to control process, the new functions such as power sequencing, communication with other systems, voltage dynamic programming,load line specifications, phase current balance, protection, power status monitoring and system diagnosis are going into today's power supply systems. Digital controllers, compared withanalog controllers, are in a favorable position to provide basic feedback control as well as those power management functions with lower cost and great flexibility. The dissertation gives an overview of digital controlled power supply systems bycomparing with conventional analog controlled power systems in term of system architecture,modeling methods, and design approaches. In addition, digital power management, as one of the most valuable and "cheap" function, is introduced in Chapter 2. Based on a leading-edge digital controller product, Chapter 3 focuses on digital PID compensator design methodologies, design issues, and optimization and development of digital controlled single-phase point-of-load (POL)dc-dc converter. Nonlinear control is another valuable advantage of digital controllers over analogcontrollers. Based on the modeling of an isolated half-bridge dc-dc converter, a nonlinear control method is proposed in Chapter 4. Nonlinear adaptive PID compensation scheme is implemented based on digital controller Si8250. The variable PID coefficient during transients improves power system's transient response and thus output capacitance can be reduced to save cost. In Chapter 5, another nonlinear compensation algorithm is proposed for asymmetric flybackforward half bridge dc-dc converter to reduce the system loop gain's dependence on the input voltage, and improve the system's dynamic response at high input line. In Chapter 6, a unified pulse width modulation (PWM) scheme is proposed to extend the duty-cycle-shift (DCS) control, where PWM pattern is adaptively generated according to the input voltage level, such that the power converter's voltage stress are reduced and efficiency is improved. With the great flexibility of digital PWM modulation offered by the digital controller Si8250, the proposed control scheme is implemented and verified. Conclusion of the dissertation work and suggestions for future work in related directions are given in final Chapter.Ph.D.
School of Electrical Engineering and Computer Science
Engineering and Computer Science
Electrical Engineering PhD
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Chu, Alex. "Evaluation and Design of a SiC-Based Bidirectional Isolated DC/DC Converter." Thesis, Virginia Tech, 2018. http://hdl.handle.net/10919/81994.
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Galvanic isolation between the grid and energy storage unit is typically required for bidirectional power distribution systems. Due to the recent advancement in wide-bandgap semiconductor devices, it has become feasible to achieve the galvanic isolation using bidirectional isolated DC/DC converters instead of line-frequency transformers.
A survey of the latest generation SiC MOSFET is performed. The devices were compared against each other based on their key parameters. It was determined that under the given specifications, the most suitable devices are X3M0016120K 1.2 kV 16 mohm and C3M0010090K 900 V 10 mohm SiC MOSFETs from Wolfspeed.
Two of the most commonly utilized bidirectional isolated DC/DC converter topologies, dual active bridge and CLLC resonant converter are introduced. The operating principle of these converter topologies are explained. A comparative analysis between the two converter topologies, focusing on total device loss, has been performed. It was found that the CLLC converter has lower total device loss compared to the dual active bridge converter under the given specifications. Loss analysis for the isolation transformer in the CLLC resonant converter was also performed at different switching frequencies. It was determined that the total converter loss was lowest at a switching frequency of 250 kHz
A prototype for the CLLC resonant converter switching at 250 kHz was then designed and built. Bidirectional power delivery for the converter was verified for power levels up to 25 kW. The converter waveforms and efficiency data were captured at different power levels. Under forward mode operation, a peak efficiency of 98.3% at 15 kW was recorded, along with a full load efficiency value of 98.1% at 25 kW. Under reverse mode operation, a peak efficiency of 98.8% was measured at 17.8 kW. The full load efficiency at 25 kW under reverse mode operation is 98.5%.Master of Science
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Cliffe, Robert J. "High power high frequency DC-DC converter topologies for use in off-line power supplies." Thesis, Loughborough University, 1996. https://dspace.lboro.ac.uk/2134/7305.
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The development of a DC-DC converter for use in a proposed range of one to ten kilowatt off-line power supplies is presented. The converter makes good use of established design practices and recent technical advances. The thesis begins with a review of traditional design practices, which are used in the design of a 3kW, 48V output DC-DC converter, as a bench-mark for evaluation of recent technical advances. Advances evaluated include new converter circuits, control techniques, components, and magnetic component designs. Converter circuits using zero voltage switching (ZVS) transitions offer significant advantages for this application. Of the published converters which have ZVS transitions the phase shift controlled full bridge converter is the most suitable, and assessments of variations on this circuit are presented. During the course of the research it was realised that the ZVS range of one leg of the phase shift controlled full bridge converter could be extended by altering the switching pattern, and this new switching pattern is proposed. A detailed analysis of phase shift controlled full bridge converter operation uncovers a number of operational findings which give a better and more complete understanding of converter operation than hitherto published. Converter design equations and guidelines are presented and the effects of the new improvement are investigated by an approximate analysis. Computer simulations using PSPICE2 are carried out to predict converter performance. A prototype converter design, construction details and test results are given. The results obtained compare well to the predicted performance and confirm the advantages of the new switching pattern.
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Li, Pengfei. "Synchronization and control of high frequency dc-dc converters." [Gainesville, Fla.] : University of Florida, 2009. http://purl.fcla.edu/fcla/etd/UFE0041162.
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Xiong, Yali. "MODELING AND ANALYSIS OF POWER MOSFETS FOR HIGH FREQUENCY DC-DC CONVERTERS." Doctoral diss., University of Central Florida, 2008. http://digital.library.ucf.edu/cdm/ref/collection/ETD/id/3589.
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Evolutions in integrated circuit technology require the use of a high-frequency synchronous buck converter in order to achieve low cost, low profile, fast transient response and high power density. However, high frequency operation leads to increased power MOSFET switching losses. Optimization of the MOSFETs plays an important role in improving converter performance. This dissertation focuses on revealing the power loss mechanism of power MOSFETs and the relationship between power MOSFET structure and its power loss. The analytical device model, combined with circuit modeling, cannot reveal the relationship between device structure and its power loss due to the highly non-linear characteristics of power MOSFETs. A physically-based mixed device/circuit modeling approach is used to investigate the power losses of the MOSFETs under different operating conditions. The physically based device model, combined with SPICE-like circuit simulation, provides an expeditious and inexpensive way of evaluating and optimizing circuit and device concepts. Unlike analytical or other SPICE models of power MOSFETs, the numerical device model, relying little on approximations or simplifications, faithfully represents the behavior of realistic power MOSFETs. The impact of power MOSFET parameters on efficiency of synchronous buck converters, such as gate charge, on resistance, reverse recovery, is studied in detail in this thesis. The results provide a good indication on how to optimize power MOSFETs used in VRMs. The synchronous rectifier plays an important role in determining the performance of the synchronous buck converter. The reverse recovery of its body diode and the Cdv/dt induced false trigger-on are two major mechanisms that impact SyncFET's performance. This thesis gives a detailed analysis of the SyncFET operation mechanism and provides several techniques to reduce its body-diode influence and suppress its false Cdv/dt trigger-n. This thesis also investigates the influence of several circuit level parameters on the efficiency of the synchronous buck converter, such as input voltage, circuit parasitic inductance, and gate resistance to provide further optimization of synchronous buck converter design.Ph.D.
School of Electrical Engineering and Computer Science
Engineering and Computer Science
Electrical Engineering PhD
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Li, Bin. "High Frequency Bi-directional DC/DC Converter with Integrated Magnetics for Battery Charger Application." Diss., Virginia Tech, 2018. http://hdl.handle.net/10919/97874.
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Due to the concerns regarding increasing fuel cost and air pollution, plug-in electric vehicles (PEVs) are drawing more and more attention. PEVs have a rechargeable battery that can be restored to full charge by plugging to an external electrical source. However, the commercialization of the PEV is impeded by the demands of a lightweight, compact, yet efficient on-board charger system. Since the state-of-the-art Level 2 on-board charger products are largely silicon (Si)-based, they operate at less than 100 kHz switching frequency, resulting in a low power density at 3-12 W/in3, as well as an efficiency no more than 92 - 94%
Advanced power semiconductor devices have consistently proven to be a major force in pushing the progressive development of power conversion technology. The emerging wide bandgap (WBG) material based power semiconductor devices are considered as game changing devices which can exceed the limit of Si and be used to pursue groundbreaking high frequency, high efficiency, and high power density power conversion.
Using wide bandgap devices, a novel two-stage on-board charger system architecture is proposed at first. The first stage, employing an interleaved bridgeless totem-pole AC/DC in critical conduction mode (CRM) to realize zero voltage switching (ZVS), is operated at over 300 kHz. A bi-directional CLLC resonant converter operating at 500 kHz is chosen for the second stage. Instead of using the conventional fixed 400 V DC-link voltage, a variable DC-link voltage concept is proposed to improve the efficiency within the entire battery voltage range. 1.2 kV SiC devices are adopted for the AC/DC stage and the primary side of DC/DC stage while 650 V GaN devices are used for the secondary side of the DC/DC stage. In addition, a two-stage combined control strategy is adopted to eliminate the double line frequency ripple generated by the AC/DC stage.
The much higher operating frequency of wide bandgap devices also provides us the opportunity to use PCB winding based magnetics due to the reduced voltage-second. Compared with conventional litz-wire based transformer. The manufacture process is greatly simplified and the parasitic is much easier to control. In addition, the resonant inductors are integrated into the PCB transformer so that the total number of magnetic components is reduced. A transformer loss model based on finite element analysis is built and used to optimize the transformer loss and volume to get the best performance under high frequency operation.
Due to the larger inter-winding capacitor of PCB winding transformer, common mode noise becomes a severe issue. A symmetrical resonant converter structure as well as a symmetrical transformer structure is proposed. By utilizing the two transformer cells, the common mode current is cancelled within the transformers and the total system common mode noise can be suppressed.
In order to charge the battery faster, the single-phase on-board charger concept is extended to a higher power level. By using the three-phase interleaved CLLC resonant converter, the charging power is pushed to 12.5 kW. In addition, the integrated PCB winding transformer in single phase is also extended to the three phase. Due to the interleaving between each phase, further integration is achieved and the transformer size is further reduced.PHD
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Takayama, Toru. "High frequency digitally controlled monolithic step-down DC-DC converters." Diss., Connect to online resource, 2006. http://gateway.proquest.com/openurl?url_ver=Z39.88-2004&rft_val_fmt=info:ofi/fmt:kev:mtx:dissertation&res_dat=xri:pqdiss&rft_dat=xri:pqdiss:1443925.
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Song, Yu Jin. "Analysis and design of high frequency link power conversion systems for fuel cell power conditioning." Diss., Texas A&M University, 2004. http://hdl.handle.net/1969.1/2678.
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In this dissertation, new high frequency link power conversion systems for the fuel cell power conditioning are proposed to improve the performance and optimize the cost, size, and weight of the power conversion systems. The first study proposes a new soft switching technique for the phase-shift controlled bi-directional dc-dc converter. The described dc-dc converter employs a low profile high frequency transformer and two active full-bridge converters for bidirectional power flow capability. The proposed new soft switching technique guarantees soft switching over wide range from no load to full load without any additional circuit components. The load range for proposed soft switching technique is analyzed by mathematical approach with equivalent circuits and verified by experiments. The second study describes a boost converter cascaded high frequency link direct dc-ac converter suitable for fuel cell power sources. A new multi-loop control for a boost converter to reduce the low frequency input current harmonics drawn from the fuel cell is proposed, and a new PWM technique for the cycloconverter at the secondary to reject the low order harmonics in the output voltages is presented. The performance of the proposed scheme is verified by the various simulations and experiments, and their trade-offs are described in detail using mathematical evaluation approach. The third study proposes a current-fed high frequency link direct dc-ac converter suitable for residential fuel cell power systems. The high frequency full-bridge inverter at the primary generates sinusoidally PWM modulated current pulses with zero current switching (ZCS), and the cycloconverter at the secondary which consists of only two bidirectional switches and output filter capacitors produces sinusoidally modulated 60Hz split single phase output voltage waveforms with near zero current switching. The active harmonic filter connected to the input terminal compensates the low order input current harmonics drawn from the fuel cell without long-term energy storage devices such as batteries and super capacitors.
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Danekar, Abhishek V. "Analysis and Design of High-Frequency Soft-Switching DC-DC Converter for Wireless Power Charging Applications." Wright State University / OhioLINK, 2017. http://rave.ohiolink.edu/etdc/view?acc_num=wright1493990400812363.
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Wang, Kunrong. "High-Frequency Quasi-Single-Stage (QSS) Isolated AC-DC and DC-AC Power Conversion." Diss., Virginia Tech, 1998. http://hdl.handle.net/10919/29394.
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The generic concept of quasi-single-stage (QSS) power conversion topology for ac-dc rectification and dc-ac inversion is proposed. The topology is reached by direct cascading and synchronized switching of two variety of buck or two variety of boost switching networks. The family of QSS power converters feature single-stage power processing without a dc-link low-pass filter, a unidirectional pulsating dc-link voltage, soft-switching capability with minimal extra commutation circuitry, simple PWM control, and high efficiency and reliability.
A new soft-switched single-phase QSS bi-directional inverter/rectifier (charger) topology is derived based on the QSS power conversion concept. A simple active voltage clamp branch is used to clamp the otherwise high transient voltage on the current-fed ac side, and at the same time, to achieve zero-voltage-switching (ZVS) for the switches in the output side bridge. Seamless four-quadrant operation in the inverter mode, and rectifier operation with unity power factor in the charger (rectifier) mode are realized with the proposed uni-polar center-aligned PWM scheme. Single-stage power conversion, standard half-bridge connection of devices, soft-switching for all the power devices, low conduction loss, simple center-aligned PWM control, and high reliability and efficiency are among its salient features. Experimental results on a 3 kVA bi-directional inverter/rectifier prototype validate the reliable operation of the circuit. Other single-phase and three-phase QSS bi-directional inverters/rectifiers can be easily derived as topological extensions of the basic QSS bi-directional inverter/rectifier.
A new QSS isolated three-phase zero-voltage/zero-current-switching (ZVZCS) buck PWM rectifier for high-power off-line applications is also proposed. It consists of a three-phase buck bridge switching under zero current and a phase-shift-controlled full-bridge with ZVZCS, while no intermediate dc-link is involved. Input power and displacement factor control, input current shaping, tight output voltage regulation, high-frequency transformer isolation, and soft-switching for all the power devices are realized in a unified single stage. Because of ZVZCS and single-stage power conversion, it can operate at high switching frequency while maintaining reliable operation and achieving higher efficiency than standard two-stage approaches. A family of isolated ZVZCS buck rectifiers are obtained by incorporating various ZVZCS schemes for full-bridge dc-dc converters into the basic QSS isolated buck rectifier topology. Experimental and simulation results substantiate the reliable operation and high efficiency of selected topologies.
The concept of charge control (or instantaneous average current control) of three-phase buck PWM rectifiers is introduced. It controls precisely the average input phase currents to track the input phase voltages by sensing and integrating only the dc rail current, realizes six-step PWM, and features simple implementation, fast dynamic response, excellent noise immunity, and is easy to realize with analog circuitry or to integrate. One particular merit of the scheme is its capability to correct any duty-cycle distortion incurred on only one of the two active duty-cycles which often happens in the soft-switched buck rectifiers, another merit is the smooth transition of the input currents between the 60o sectors. Simulation and preliminary experimental results show that smooth operations and high quality sinusoidal input currents in the full line cycle are achieved with the control scheme.Ph. D.
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Sterk, Douglas Richard. "Compact Isolated High Frequency DC/DC Converters Using Self-Driven Synchronous Rectification." Thesis, Virginia Tech, 2003. http://hdl.handle.net/10919/9648.
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In the early 1990's, with the boom of the Internet and the advancements in telecommunications, the demand for high-speed communications systems has reached every corner of the world in forms such as, phone exchanges, the internet servers, routers, and all other types of telecommunication systems. These communication systems demand more data computing, storage, and retrieval capabilities at higher speeds, these demands place a great strain on the power system. To lessen this strain, the existing power architecture must be optimized.
With the arrival of the age of high speed and power hungry microprocessors, the point of load converter has become a necessity. The power delivery architecture has changed from a centralized distribution box delivering an entire system's power to a distributed architecture, in which a common DC bus voltage is distributed and further converted down at the point of load. Two common distributed bus voltages are 12 V for desktop computers and 48 V for telecommunications server applications. As industry strives to design more functionality into each circuit or motherboard, the area available for the point of load converter is continually decreasing. To meet industries demands of more power in smaller sizes power supply designers must increase the converter's switching frequencies. Unfortunately, as the converter switching frequency increases the efficiency is compromised. In particular, the switching, gate drive and body diode related losses proportionally increase with the switching frequency.
This thesis introduces a loss saving self-driven method to drive the secondary side synchronous rectifiers. The loss saving self-driven method introduces two additional transformers that increase the overall footprint of the converter. Also, this thesis proposes a new magnetic integration method to eliminate the need for the two additional gate driver magnetic cores by allowing three discrete power signals to pass through one single magnetic structure. The magnetic integration reduces the overall converter footprint.Master of Science
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Li, Quan, and q. li@cqu edu au. "DEVELOPMENT OF HIGH FREQUENCY POWER CONVERSION TECHNOLOGIES FOR GRID INTERACTIVE PV SYSTEMS." Central Queensland University. School of Advanced Technologies & Processes, 2002. http://library-resources.cqu.edu.au./thesis/adt-QCQU/public/adt-QCQU20020807.152750.
Full textAbstract:
This thesis examines the development of DC-DC converters that are suitable for Module Integrated Converters, (MICs), in grid interactive photovoltaic (PV) systems, and especially concentrates on the study of the half bridge dual converter, which was previously developed from the conventional half bridge converter. Both hard-switched and soft-switched half bridge dual converters are constructed,
which are rated at 88W each and transform a nominal 17.6Vdc input to an output in the range from 340V to 360Vdc. An initial prototype converter operated at 100kHz and is used as a base line device to establish the operational behaviours of the converter. The second hard-switched converter operated at 250kHz and included a coaxial matrix transformer that significantly reduced the power losses related to the transformer leakage inductance. The soft-switched converter operated at 1MHz and is capable of absorbing the parasitic elements into the resonant tank. Extensive theoretical analysis, simulation and experimental results are provided for each converter. All three converters
achieved conversion efficiencies around 90%. The progressive increases in the operation frequency, while maintaining the conversion efficiency, will translate into the reduced converter size and weight. Finally different operation modes for the
soft-switched converter are established and the techniques for predicting the occurrence of those modes are developed. The analysis of the effects of the transformer winding capacitance also shows that soft switching condition applies for both the primary side mosfets and the output rectifier diodes.
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Sun, Juanjuan. "Dynamic Performance Analyses of Current Sharing Control for DC/DC Converters." Diss., Virginia Tech, 2007. http://hdl.handle.net/10919/28071.
Full textAbstract:
Paralleling operation of DC/DC converters is widely used in today's distributed power systems. To ensure balanced output currents among paralleled power modules, current sharing control is usually necessary.Active current sharing controls with current feedback mechanism are widely used in today's power supplies. However, the dynamic performance of these current sharing control schemes are not yet clearly explored. In this work, the dynamic current sharing performance is evaluated for paralleling systems with the output impedance approach. As the representative of the terminal characteristic of a power converter, output impedance is a powerful tool to study the dynamic response under load transients. The dynamic current sharing analyses are then conducted for three different active current sharing control structures and a comprehensive comparison among them helps the designer to choose appropriate controls for different applications.
On the other hand, high-frequency load transients are possible to happen for voltage regulators, which are the power supplies of microprocessors. In order to study the dynamic current sharing performance for a paralleling system when the perturbation frequency is higher than half of the switching frequency,the conventional output impedance concept needs to be extended. Due to the non-linear behavior of a switching modulator, the beat-frequency phenomenon could cause unexpected failure of a power supply when the perturbation frequency is close to the switching frequency. To address this issue, an unconventional multi-frequency model is proposed for high-frequency dynamic current sharing studies. With this model, the sideband components are possible to be included and the beat-frequency oscillations can be predicted. After that, the conventional impedance concept is expanded in the form of extended describing function, so that the terminal characteristics of paralleled converters are represented by a series of impedances. Besides the analyses, this work also proposed several solutions for the beat-frequency oscillation issue which are experimentally verified.
In summary, both low-frequency and high-frequency dynamic current sharing performances are studied in this dissertation. The output impedance concept and its extension in the form of extended describing function are utilized as the tools for researches. With these powerful tools, more insights are obtained to help better design of a paralleling system.Ph. D.
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LI, QUAN, and q. li@cqu edu au. "HIGH FREQUENCY TRANSFORMER LINKED CONVERTERS FOR PHOTOVOLTAIC APPLICATIONS." Central Queensland University. N/A, 2006. http://library-resources.cqu.edu.au./thesis/adt-QCQU/public/adt-QCQU20060830.110106.
Full textAbstract:
This thesis examines converter topologies suitable for Module Integrated Converters
(MICs) in grid interactive photovoltaic (PV) systems, and makes a contribution to
the development of the MIC topologies based on the two-inductor boost converter,
which has received less research interest than other well known converters.
The thesis provides a detailed analysis of the resonant two-inductor boost converter
in the MIC implementations with intermediate constant DC links. Under variable
frequency control, this converter is able to operate with a variable DC gain while
maintaining the resonant condition. A similar study is also provided for the resonant
two-inductor boost converter with the voltage clamp, which aims to increase the
output voltage range while reducing the switch voltage stress. An operating point
with minimized power loss can be also established under the fixed load condition.
Both the hard-switched and the soft-switched current fed two-inductor boost
converters are developed for the MIC implementations with unfolding stages. Nondissipative
snubbers and a resonant transition gate drive circuit are respectively
employed in the two converters to minimize the power loss.
The simulation study of a frequency-changer-based two-inductor boost converter is
also provided. This converter features a small non-polarised capacitor in a second
phase output to provide the power balance in single phase inverter applications.
Four magnetic integration solutions for the two-inductor boost converter have also
been presented and they are promising in reducing the converter size and power loss.
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Duan, Xiaoming. "High Performance Integrated Controller with Variable Frequency Control for Switching DC-DC Converters." NCSU, 2006. http://www.lib.ncsu.edu/theses/available/etd-09242006-211828/.
Full textAbstract:
Development of digital core chips poses serious challenges to the power supply design. High performance switching DC-DC converter must meet requirements of high current, low voltage tolerance, fast transient response, high power efficiency, small profile and low cost. The conventional PWM control with constant switching frequency has limitation to improve both transient response and power efficiency because there is a conflicting requirement on switching frequency. The control scheme with variable frequency has promising features to achieve better overall performance, but the issues in the reported design approaches limit their usefulness in the practical applications. This dissertation reviews and summarizes the issues and the design considerations in the high current switching DC-DC converters. To improve the system performance, novel control architecture with variable switching frequency and novel implementation of the integrated controller are proposed in this dissertation. The proposed control architecture is modeled and analyzed. Fully differential circuits are designed to implement the control core functions. The design methodology and the design considerations are discussed. The control concept and the proposed circuits are verified by the prototype controller chip.
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Fares, Adnan. "Development of advanced architectures of power controllers dedicated to Ultra High Switching Frequency DC to DC converters." Thesis, Montpellier, 2015. http://www.theses.fr/2015MONTS195.
Full textAbstract:
La sophistication grandissante des dispositifs intelligents ultra-portatifs, tels que les smartphones ou les tablettes,crée un besoin d'amélioration des performances des organes de conversion de puissance.La tendance des technologies d'acheminement de puissance évolue progressivement vers une fréquence plus élevée, une meilleure densité d'intégration et une plus grande flexibilité dans les schémas d'asservissement. La modulation dynamique de tension est utilisée dans les circuits intégrés de gestion de puissances(DVS PMICs)des transmetteurs RF alors que la modulation DVFS est utilisée dans les PMICs dédiées au CPUs et GPUs. Des DCDC flexibles et fonctionnant à haute fréquence constituent aujourd'hui la solution principale en conjonction avec des régulateurs à faible marge de tension (LDO).L'évolution vers des solutions à base de HFDCDC de faibles dimensions pose un défi sérieux en matière de 1)stabilité des boucles d'asservissement,2)de complexité des architectures de contrôle imbriquant des machines d'état asynchrones pour gérer une large dynamique de puissance de sortie et 3)de portabilité de la solutions d'une technologie à une autre.Les solutions les plus courantes atteignent aujourd'hui une gamme de 2 à 6 Mhz de fréquence de découpage grâce à l'usage de contrôleurs à hystérésis qui souffrent de la difficulté à contenir la fréquence de découpage lors des variations de la tension ou du courant en charge.Nous avons voulu dans ce travail étendre l'usage des méthodes de conception et de modélisation conventionnelles comme le modèle petit signal moyen, dans une perspective de simplification et de création de modèles paramétriques. L'objectif étant de rendre la technique de compensation flexible et robuste aux variations de procédés de fabrication ou bien aux signaux parasités inhérents à la commutation de puissance.Certes, le modèle moyen petit signal, au demeurant bien traité dans la littérature, réponds amplement à la problématique de compensation des DCDCs notamment quand la stabilité s'appuie sur le zéro naturel à haute fréquence inhérent à la résistance série ESR de la capacité de sortie, mais les HFDCDC actuels utilisent des capacités MLCC ayant une très faible ESR et font appel à des techniques de compensation paramétriques imbriquant le schéma de compensation dans la génération même du rapport cyclique. La littérature existante sur le fonctionnement de la machine d'état, se contente d'une description simpliste de convertisseurs PWM/PFM mais ne donne que très peu d'éléments sur la gestion des opérations synchrones/asynchrones alternant PWM,PFM,écrêtage de courant, démarrage ou détection de défaillance. Dans ce travail, notre études est axée sur les deux aspects suivants:1)La modélisation paramétrique et la compensation de la boucle d'asservissement de HFDCDC et 2)la portabilité de la conception de la machine d'états du contrôleur notamment lorsqu'elle intègre des transitions complexes entre les modes.Dans la première section, nous avons développé un modèle petit signal moyen d'un convertisseur Buck asservi en mode courant-tension et nous l'avons analysé pour faire apparaitre les contributions proportionnelle, intégrale et dérivé dans la boucle. Nous avons démontré la possibilité d'utiliser le retour en courant pour assurer l'amortissement nécessaire et la stabilité de la boucle pour une large dynamique de variations des conditions de charge.Dans la seconde section, nous avons développé une architecture de machine d'états sophistiquée basé sur la méthode d'Huffman avec un effort substantiel d'abstraction que nous a permis de la concevoir en description RTL pour une gestion fiable du fonctionnement asynchrone et temps réel.Notre contribution théorique a fait l'objet d'une réalisation d'un PMIC de test comportant deux convertisseurs Buck cadencés à 12MHz en technologie BiCMOS 0.5um/0.18um. Les performances clefs obtenues sont:une surtension de 50mV pendant 2us suite à l'application d'un échelon de courant de 300mAThe continuous sophistication of smart handheld devices such as smartphones and tablets creates an incremental need for improving the performances of the power conversion devices. The trend in power delivery migrates progressively to higher frequency, higher density of integration and flexibility of the control scheme. Dynamic Voltage Scaling Power Management ICs (DVS PMIC) are now systematically used for powering RF Transmitters and DVFS PMICS using Voltage and Frequency scaling are used for CPUs and GPUs. Flexible High frequency (HF) DC/DC converters in conjunction with low dropout LDOs constitute the main solution largely employed for such purposes. The migration toward high frequency/small size DCDC solutions creates serious challenges which are: 1) the stability of the feedback loop across a wide range of loading voltage and current conditions 2) The complexity of the control and often-non-synchronous state machine managing ultra large dynamics and bridging low power and high power operating modes, 3) The portability of the proposed solution across technology processes.The main stream solutions have so far reached the range of 2 to 6 MHz operation by employing systematically sliding mode or hysteretic converters that suffer from their variable operating frequency which creates EMI interferences and lead to integration problems relative to on-chip cross-talk between converters.In this work we aim at extend the use of traditional design and modeling techniques of power converters especially the average modeling technique by putting a particular care on the simplification of the theory and adjunction of flexible compensation techniques that don't require external components and that are less sensitive to process spread, or to high frequency substrate and supply noise conditions.The Small Signal Average Models, widely treated in the existing literature, might address most needs for system modeling and external compensation snubber design, especially when aiming on the high frequency natural zero of the output capacitor. However, HFDCDC converters today use small size MLCC capacitors with a very low ESR which require using alternative techniques mixing the compensation scheme with the duty cycle generation itself. The literature often provides a simplistic state machine description such as PWM/PFM operations but doesn't cover combined architectures of synchronous / non synchronous mode operations such as PWM, PFM, Current Limit, Boundary Clamp, Start, Transitional and finally Fault or Protection modes.In our work, we have focused our study on two main axes: 1) The parametric modeling and the loop compensation of HFDCDC and 2) the scalability of the control state machine and mode inter-operation. In the first part, we provided a detailed small signal averaged model of the “voltage and current mode buck converter” and we depicted it to emphasize and optimize the contributions of the Proportional, Integral and Derivative feedback loops. We demonstrated the ability to use the current feedback to damp and stabilize the converter with a wide variety of loading conditions (resistive or capacitive). In the second part, we provided architecture of the mode control state machine with different modes like the PWM, PFM, soft-start, current limit,… .The technique we have used is inspired by Huffman machine with a significant effort to make it abstract and scalable. The state machine is implemented using RTL coding based on a generic and scalable approach.The theoretical effort has been implemented inside a real PMIC test-chip carrying two 12MHz buck converters, each employing a voltage and current mode feedback loop. The chip has been realized in a 0.5um / 0.18um BiCMOS technology and tested through a dedicate Silicon validation platform able to test the analog, digital and power sections. The key performance obtained is a 50mV load transient undershoot / overshoot during 2us following a load step of 300mA (slope 0.3A/ns)
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Li, Cong. "High Frequency High Boost Ratio Dc-dc Converters with Wide Bandgap Devices for PV System Applications." The Ohio State University, 2014. http://rave.ohiolink.edu/etdc/view?acc_num=osu1411858489.
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Anton, Gagner, and Nino Hebib. "FPGA Software Development for Control Purposes of High-Frequency Switching Power Converters." Thesis, Linköpings universitet, Fysik och elektroteknik, 2016. http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-133213.
Full textAbstract:
FPGA stands for Field Programmable Gate Array and it is a technology that has been on the rise the last decades. With a decrease in size of the logic elements commercially available products have started to have more built-in functionality in one package and by being reprogrammable makes the system a powerful competitor among its neighbors. FPGA technology in comparison with Digital Signal Processing technology is generally interesting because of the parallelism of the programming that can be made. This allows for more operations in less time. In this thesis a system is developed to control power converters with control signals in high frequency. A previous project is used as a base and a toolchain of new components are implemented to create a new, more generic system. The previous system is evaluated and a new protocol for communication is developed. The toolchain with the necessary control blocks is implemented in Quartus II that includes a timer block, a pulse width modulation block, a PID controller block and a FIR-filter block. The system is used to control a power converter and the result is evaluated.
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Sheng, Honggang. "A High Power Density Three-level Parallel Resonant Converter for Capacitor Charging." Diss., Virginia Tech, 2009. http://hdl.handle.net/10919/37667.
Full textAbstract:
This dissertation proposes a high-power, high-frequency and high-density three-level parallel resonant converter for capacitor charging. DC-DC pulsed power converters are widely used in military and medical systems, where the power density requirement is often stringent. The primary means for reducing the power converter size has been to reduce loss for reduced cooling systems and to increase the frequency for reduced passive components. Three-level resonant converters, which combine the merits of the three-level structure and resonant converters, are an attractive topology for these applications. The three-level configuration allows for the use of lower-voltage-rating and faster devices, while the resonant converter reduces switching loss and enhances switching capability.
This dissertation begins with an analysis of the influence of variations in the structure of the resonant tank on the transformer volume, with the aim of achieving a high power density three-level DC-DC converter. As one of the most bulky and expensive components in the power converter, the different positions of the transformer within the resonant tank cause significant differences in the transformerâ s volume and the voltage and current stress on the resonant elements. While it does not change the resonant converter design or performance, the improper selection of the resonant tank structure in regard to the transformer will offset the benefits gained by increasing the switching frequency, sometimes even making the power density even worse than the power density when using a low switching frequency. A methodology based on different structural variations is proposed for a high-density design, as well as an optimized charging profile for transformer volume reduction.
The optimal charging profile cannot be perfectly achieved by a traditional output-voltage based variable switching frequency control, which either needs excess margin to guarantee ZVS, or delivers maximum power with the danger of losing ZVS. Moreover, it cannot work for widely varied input voltages. The PLL is introduced to overcome these issues. With PLL charging control, the power can be improved by 10% with a narrow frequency range.
The three-level structure in particular suffers unbalanced voltage stress in some abnormal conditions, and a fault could easily destroy the system due to minimized margin. Based on thoroughly analysis on the three-level behaviors for unbalanced voltage stress phenomena and fault conditions, a novel protection scheme based on monitoring the flying capacitor voltage is proposed for the three-level structure, as well as solutions to some abnormal conditions for unbalanced voltage stresses. A protection circuit is designed to achieve the protection scheme.
A final prototype, built with a custom-packed MOSFET module, a SiC Schottky diode, a nanocrystalline core transformer with an integrated resonant inductor, and a custom-designed oil-cooled mica capacitor, achieves a breakthrough power density of 140W/in3 far beyond the highest-end power density reported (<100 W/in3) in power converter applications.Ph. D.
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Zhao, Xiaonan. "High-Efficiency and High-Power Density DC-DC Power Conversion Using Wide Bandgap Devices for Modular Photovoltaic Applications." Diss., Virginia Tech, 2019. http://hdl.handle.net/10919/89025.
Full textAbstract:
With the development of solar energy, power conversion systems responsible for energy delivering from photovoltaic (PV) modules to ac or dc grid attract wide attentions and have significantly increased installations worldwide. Modular power conversion system has the highest efficiency of maximum power point tacking (MPPT), which can transfer more solar power to electricity. However, this system suffers the drawbacks of low power conversion efficiency and high cost due to a large number of power electronics converters. High-power density can provide potentials to reduce cost through the reduction of components and potting materials. Nowadays, the power electronics converters with the conventional silicon (Si) based power semiconductor devices are developed maturely and have limited improvements regarding in power conversion efficiency and power density. With the availability of wide bandgap devices, the power electronics converters have extended opportunities to achieve higher efficiency and higher power density due to the desirable features of wide bandgap devices, such as low on-state resistance, small junction capacitance and high switching speed.
This dissertation focuses on the application of wide bandgap devices to the dc-dc power conversion for the modular PV applications in an effort to improve the power conversion efficiency and power density.
Firstly, the structure of gallium-nitride (GaN) device is studied theoretically and characteristics of GaN device are evaluated under testing with both hard-switching and soft-switching conditions. The device performance during steady-state and transitions are explored under different power level conditions and compared with Si based devices.
Secondly, an isolated high-efficiency GaN-based dc-dc converter with capability of wide range regulation is proposed for modular PV applications. The circuit configuration of secondary side is a proposed active-boost-rectifier, which merges a Boost circuit and a voltage-doubler rectifier. With implementation of the proposed double-pulse duty cycle modulation method, the active-boost-rectifier can not only serve for synchronous rectification but also achieve the voltage boost function. The proposed converter can achieve zero-voltage-switching (ZVS) of primary side switches and zero-current-switching (ZCS) of secondary side switches regardless of the input voltages or output power levels. Therefore, the proposed converter not only keeps the benefits of highly-efficient series resonant converter (SRC) but also achieves a higher voltage gain than SRC and a wide range regulation ability without adding additional switches while operating under the fixed-frequency condition. GaN devices are utilized in both primary and secondary sides. A 300-W hardware prototype is built to achieve a peak efficiency of 98.9% and a California Energy Commission (CEC) weighted efficiency of 98.7% under nominal input voltage condition.
Finally, the proposed converter is designed and optimized at 1-MHz switching frequency to pursue the feature of high-power density. Considering the ac effects under high frequency, the magnetic components and PCB structure are optimized with finite element method (FEM) simulations. Compared with 140-kHz design, the volume of 1-MHz design can reduce more than 70%, while the CEC efficiency only drops 0.8% at nominal input voltage condition. There are also key findings on circuit design techniques to reduce parasitic effects. The parasitic inductances induced from PCB layout of primary side circuit can cause the unbalanced resonant current between positive and negative half cycles if the power loops of two half cycles have asymmetrical parasitic inductances. Moreover, these parasitic inductances reflecting to secondary side should be considered into the design of resonant inductance. The parasitic capacitances of secondary side could affect ZVS transitions and increase the required magnetizing current. Because of large parasitic capacitances, the dead-time period occupies a large percentage of entire switching period in MHz operations, which should be taken into consideration when designing the resonant frequency of resonant network.Doctor of Philosophy
Solar energy is one of the most promising renewable energies to replace the conventional fossils. Power electronics converters are necessary to transfer power from solar panels to dc or ac grid. Since the output of solar panel is low voltage with a wide range and the grid side is high voltage, this power converter should meet the basic requirements of high step up and wide range regulation. Additionally, high power conversion efficiency is an important design purpose in order to save energy. The existing solutions have limitations of narrow regulating range, low efficiency or complicated circuit structure. Recently, the third-generation power semiconductors attract more and more attentions who can help to reduce the power loss. They are named as wide band gap devices. This dissertation proposed a wide band gap devices based power converter with ability of wide regulating range, high power conversion efficiency and simple circuit structure. Moreover, this proposed converter is further designed for high power density, which reduces more than 70% of volume. In this way, small power converter can merge into the junction box of solar panel, which can reduce cost and be convenient for installations.
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Zhao, Shishuo. "High Frequency Isolated Power Conversion from Medium Voltage AC to Low Voltage DC." Thesis, Virginia Tech, 2017. http://hdl.handle.net/10919/74969.
Full textAbstract:
Modern data center power architecture developing trend is analyzed, efficiency improvement method is also discussed. Literature survey of high frequency isolated power conversion system which is also called solid state transformer is given including application, topology, device and magnetic transformer. Then developing trend of this research area is clearly shown following by research target.
State of art wide band gap device including silicon carbide (SiC) and gallium nitride (GaN) devices are characterized and compared, final selection is made based on comparison result. Mostly used high frequency high power DC/DC converter topology dual active bridge (DAB) is introduced and compared with novel CLLC resonant converter in terms of switching loss and conduction loss point of view. CLLC holds ZVS capability over all load range and smaller turn off current value. This is beneficial for high frequency operation and taken as our candidate. Device loss breakdown of CLLC converter is also given in the end.
Medium voltage high frequency transformer is the key element in terms of insulation safety, power density and efficiency. Firstly, two mostly used transformer structures are compared. Then transformer insulation requirement is referred for 4160 V application according to IEEE standard. Solid insulation material are also compared and selected. Material thickness and insulation distance are also determined. Insulation capability is preliminary verified in FEA electric field simulation. Thirdly two transformer magnetic loss model are introduced including core loss model and litz wire winding loss model. Transformer turn number is determined based on core loss and winding loss trade-off. Different core loss density and working frequency impact is carefully analyzed. Different materials show their best performance among different frequency range. Transformer prototype is developed following designed parameter. We test the developed 15 kW 500 kHz transformer under 4160 V dry type transformer IEEE Std. C57.12.01 standard, including basic lightning test, applied voltage test, partial discharge test.
500 kHz 15 kW CLLC converter gate drive is our design challenge in terms of symmetry propagation delay, cross talk phenomenon elimination and shoot through protection. Gate drive IC is carefully selected to achieve symmetrical propagation delay and high common mode dv/dt immunity. Zero turn off resistor is achieved with minimized gate loop inductance to prevent cross talk phenomenon. Desaturation protection is also employed to provide shoot through protection. Finally 15 kW 500 kHz CLLC resonant converter is developed based on 4160V 500 kHz transformer and tested up to full power level with 98% peak efficiency.Master of Science
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Singh, Manmeet. "Switching Power Converter Techniques for Server and Mobile Applications." The Ohio State University, 2020. http://rave.ohiolink.edu/etdc/view?acc_num=osu159486698396321.
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Fei, Chao. "Optimization of LLC Resonant Converters: State-trajectory Control and PCB based Magnetics." Diss., Virginia Tech, 2018. http://hdl.handle.net/10919/83206.
Full textAbstract:
With the fast development of information technology (IT) industry, the demand and market volume for off-line power supplies keeps increasing, especially those for desktop, flat-panel TV, telecommunication, computer server and datacenter. An off-line power supply normally consists of electromagnetic interference (EMI) filter, power factor correction (PFC) circuit and isolated DC/DC converter. Isolated DC/DC converter occupies more than half of the volume in an off-line power supply and takes the most control responsibilities, so isolated DC/DC converter is the key aspect to improve the overall performance and reduce the total cost for off-line power supply.
On the other hand, of all the power supplies for industrial applications, those for the data center servers are the most performance driven, energy and cost conscious due to the large electricity consumption. The total power consumption of today's data centers is becoming noticeable. Moreover, with the increase in cloud computing and big data, energy use of data centers is expected to continue rapidly increasing in the near future. It is very challenging to design isolated DC/DC converters for datacenters since they are required to provide low-voltage high-current output and fast transient response.
The LLC resonant converters have been widely used as the DC-DC converter in off-line power supplies and datacenters due to its high efficiency and hold-up capability. Using LLC converters can minimize switching losses and reduce electromagnetic interference. Almost all the high-end offline power supplies employs LLC converters as the DC/DC converter.
But there are three major challenges in LLC converters. Firstly, the control characteristics of the LLC resonant converters are very complex due to the dynamics of the resonant tank. This dissertation proposes to implement a special LLC control method, state-trajectory control, with a low-cost microcontroller (MCU). And further efforts have been made to integrate all the state-trajectory control function into one MCU for high-frequency LLC converters, including start-up and short-circuit protection, fast transient response, light load efficiency improvement and SR driving.
Secondly, the transformer in power supplies for IT industry is very bulky and it is very challenging to design. By pushing switching frequency up to MHz with gallium nitride (GaN) devices, the magnetics can be integrated into printed circuit board (PCB) windings. This dissertation proposes a novel matrix transformer structure and its design methodology. On the other hand, shielding technique can be employed to suppress the CM noise for PCB winding transformer. This dissertation proposes a novel shielding technique, which not only suppresses CM noise, but also improves the efficiency. The proposed transformer design and shielding technique is applied to an 800W 400V/12V LLC converter design.
Thirdly, the LLC converters have sinusoidal current shape due to the nature of resonance, which has larger root mean square (RMS) of current, as well as larger conduction loss, compared to pulse width modulation (PWM) converter. This dissertation employs three-phase interleaved LLC converters to reduce the circulating energy by inter-connecting the three phases in certain way, and proposed a novel magnetic structure to integrated three inductors and three transformers into one magnetic core. By pushing switching frequency up to 1MHz, all the magnetics can be implemented with 4-layer PCB winding. Additional 2-layer shielding can be integrated to reduce CM noise. The proposed magnetic structure is applied to a 3kW 400V/12V LLC converter.
This dissertation solves the challenges in analysis, digital control, magnetic design and EMI in high-frequency DC/DC converters in off-line power supplies. With the academic contribution in this dissertation, GaN devices can be successfully applied to high-frequency DC/DC converters with MHz switching frequency to achieve high efficiency, high power density, simplified but high-performance digital control and automatic manufacturing. The cost will be reduced and the performance will be improved significantly.Ph. D.
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Yeh, Chih-Shen. "Synchronous-Conduction-Mode Tapped-Inductor Buck Converter for Low-Power, High-Density Application." Thesis, Virginia Tech, 2017. http://hdl.handle.net/10919/81722.
Full textAbstract:
General-purpose step-down converter is essential in electronic system for processing energy from high-voltage rail to low-voltage circuits. The applications can be found at the auxiliary supplies in automobile, industrial and communication systems. Buck converter is a common circuit topology to fulfill step-down conversion, especially in low-power application since it is well-studied and straightforward. However, it suffers from low duty cycle under high step-down condition, and typically operates in continuous conduction mode (CCM) that generates large switching loss. On the other hand, as an extension of the buck converter, tapped-inductor (TI) buck converter has larger duty cycle while maintaining the structural simplicity. Therefore, the main objective of this thesis is to explore the potential of TI buck converter as a wide conversion range, high power density and high efficiency topology for low power application. To achieve high efficiency at switching frequency of MHz-level, synchronous conduction mode (SCM) is applied for turn-on losses elimination.
The operation principle and power stage design of SCM TI buck is first introduced. The design of high switching frequency coupled inductor is emphasized since its size plays a critical role in power density. Loss breakdown is also provided to perform a comprehensive topological study. Secondly, detailed zero-voltage-switching (ZVS) condition of SCM TI buck is derived so that the converter does not experience redundant circulating energy. The experimental results of 15-W SCM TI buck converter prototypes are provided with 90.7% of peak power stage efficiency. The size of coupled inductor is down to 116 mm3. To enhance light-load efficiency, a variable frequency control scheme based on derived ZVS conditions is implemented with the switching frequency ranging from 2 MHz to 2.9 MHz.Master of Science
General-purpose step-down converter is essential in electronic system for processing energy from high-voltage rail to low-voltage circuits. The applications can be found at the auxiliary supplies in automobile, industrial and communication systems. Typically, the ultimate goals of general-purpose step-down converter are versatility, high efficiency and compact size. Recently, tapped-inductor (TI) buck converter is studied since it could overcome the drawback of commonly used buck converter under high step-down conversion. Therefore, the potential of TI buck converter as a general-purpose step-down converter candidate is explored in this thesis, including control method, hardware design, etc. The thesis verifies that TI buck converter could have compact size while remaining efficient and adaptable.
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Kim, Jooncheol. "Fabrication of nano-laminated soft magnetic metallic alloys through multilayer electrodeposition: application to high-frequency and high-flux power conversion." Diss., Georgia Institute of Technology, 2015. http://hdl.handle.net/1853/53958.
Full textAbstract:
In this research, in order to realize such nanolaminated magnetic cores for high frequency and high power conversion, the following key tasks have been accomplished: 1) electrodeposition of metallic alloy materials such as NiFe, CoNiFe, and anisotropic CoNiFe; 2) development of new fabrication technologies to realize nanolaminated cores based on metallic alloy electrodeposition; 3) reliable characterization of the structural, magnetic, and electrical properties of the nanolaminated metallic alloy cores; 4) development of microfabricated inductor windings to integrate the nanolaminated cores; 5) demonstration of high-frequency and high-flux ultracompact DC-DC power conversion using inductors integrated with nanolaminated metallic alloy cores.
By achieving these tasks, nanolaminated cores comprising tens to hundreds of layers of metallic alloy films (Ni80Fe20 and Co44Ni37Fe19) has been developed. The fabricated nanolaminated core consists of sufficiently thin nanolaminations (100 – 1000 nm) that can suppress eddy currents in the MHz range, while simultaneously achieving the overall magnetic thickness (35 – 2000 µm) such that substantial power can be handled. The nanolaminated metallic alloy cores were further integrated into microfabricated inductors using CMOS-compatible fabrication processes. Finally, an ultracompact DC-DC buck converter with the nanolaminated metallic alloy cores has been developed on PCB having footprint of 14 × 7.1 mm2. The input voltage of the converter varied from 30 to 70 V and the output voltage was fixed at 20 V. The converter operated with output power of approximately 11 W and the switching frequencies of 0.7 – 1.4 MHz, demonstrating conversion efficiency of 94.2% at 30 V input and 80.8% at 60 V input.
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Fernández, Palomeque Efrén Esteban. "Optimization of a CSI inverter and DC/DC elevator with silicon carbide devices, for applications in electric traction systems." Doctoral thesis, Universitat Politècnica de Catalunya, 2019. http://hdl.handle.net/10803/666485.
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The applications of electric traction systems currently focus on developing technologies with greater energy efficiency and lower environmental impact. Manufacturers of hybrid and electric vehicles are looking for ways to improve and optimize the efficiency of their models.
Manufacturers are looking for more efficient and more compact converter topologies. The use of new band gap materials in the construction of these topologies has generated many debates and new lines of research especially in the optimization of these topologies. The silicon carbide (SiC) based switching devices provide significant performance improvements in many aspects, including lower power dissipation, higher operating temperatures, and faster switching, compared with conventional Si devices, all these features make that these devices generate interest in applications for electric traction systems.
This work presents a method for improving total harmonic distortion (THD) in the currents of output and efficiency in SiC current source inverter for future application in an electric traction system. The method proposed consists in improving the coupling of a bidirectional converter topology V-I and CSI. The V-I converter serves as a current regulator for the CSI and allows the recovery of energy. The method involves an effective selection of the switching frequencies and phase angles for the carriers signals present in each converter topology. With this method, it is expected to have a reduction of the total harmonic distortion THD in the output currents. In addition, an analysis of the losses in the motor and topologies of power converters is developed considering the optimization method previously analyzed. The weighted average efficiency of the whole system (power converters + motor) in differents conditions of operations is presented.Las aplicaciones de los sistemas de tracción eléctrica actualmente se centran en el desarrollo de tecnologías con mayor eficiencia energética y menor impacto ambiental. Los fabricantes de vehículos híbridos y eléctricos están buscando formas de mejorar y optimizar la eficiencia de sus modelos. Los fabricantes buscan topologías de convertidores más eficientes y más compactas. El uso de nuevos materiales de banda prohibida en la construcción de estas topologías ha generado muchos debates y nuevas líneas de investigación, especialmente en la optimización energética de las mismas. Los dispositivos de conmutación basados en carburo de silicio (SiC) proporcionan mejoras significativas en la eficiencia en muchos aspectos, incluida una menor disipación de potencia, temperaturas de funcionamiento más altas y una conmutación más rápida, en comparación con los dispositivos de Si convencionales. Todas estas características hacen que estos dispositivos generen interés en las aplicaciones de sistemas tracción eléctrica. Este trabajo presenta un método para mejorar la distorsión armónica total (THD) en las corrientes de salida y eficiencia en el inversor de fuente de corriente SiC para aplicaciones futuras en un sistema de tracción eléctrica. El método propuesto consiste en mejorar el acoplamiento de una topología de convertidor bidireccional V-I y CSI. El convertidor V-I sirve como un regulador de corriente para el CSI y permite la recuperación de energía. El método implica una selección efectiva de las frecuencias de conmutación y los ángulos de fase para las señales portadoras presentes en cada topología del convertidor. Con este método, se espera una reducción de la distorsión armónica total THD en las corrientes de salida. Además, se desarrolla un análisis de las pérdidas en el motor y las topologías de los convertidores de potencia considerando el método de optimización analizado previamente. Se presenta la eficiencia promedio ponderada de todo el sistema (convertidores de potencia + motor) en diferentes condiciones de operación
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Ambatipudi, Radhika. "High Frequency (MHz) Planar Transformers for Next Generation Switch Mode Power Supplies." Doctoral thesis, Mittuniversitetet, Avdelningen för elektronikkonstruktion, 2013. http://urn.kb.se/resolve?urn=urn:nbn:se:miun:diva-20270.
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Increasing the power density of power electronic converters while reducing or maintaining the same cost, offers a higher potential to meet the current trend inrelation to various power electronic applications. High power density converters can be achieved by increasing the switching frequency, due to which the bulkiest parts, such as transformer, inductors and the capacitor's size in the convertercircuit can be drastically reduced. In this regard, highly integrated planar magnetics are considered as an effective approach compared to the conventional wire wound transformers in modern switch mode power supplies (SMPS). However, as the operating frequency of the transformers increase from several hundred kHz to MHz, numerous problems arise such as skin and proximity effects due to the induced eddy currents in the windings, leakage inductance and unbalanced magnetic flux distribution. In addition to this, the core losses whichare functional dependent on frequency gets elevated as the operating frequency increases. Therefore, this thesis provides an insight towards the problems related to the high frequency magnetics and proposes a solution with regards to different aspects in relation to designing high power density, energy efficient transformers.The first part of the thesis concentrates on the investigation of high power density and highly energy efficient coreless printed circuit board (PCB) step-down transformers useful for stringent height DC-DC converter applications, where the core losses are being completely eliminated. These transformers also maintain the advantages offered by existing core based transformers such as, high coupling coefficient, sufficient input impedance, high energy efficiency and wide frequencyband width with the assistance of a resonant technique. In this regard, several coreless PCB step down transformers of different turn’s ratio for power transfer applications have been designed and evaluated. The designed multilayered coreless PCB transformers for telecom and PoE applications of 8,15 and 30W show that the volume reduction of approximately 40 - 90% is possible when compared to its existing core based counterparts while maintaining the energy efficiency of the transformers in the range of 90 - 97%. The estimation of EMI emissions from the designed transformers for the given power transfer application proves that the amount of radiated EMI from a multilayered transformer is lessthan that of the two layered transformer because of the decreased radius for thesame amount of inductance.The design guidelines for the multilayered coreless PCB step-down transformer for the given power transfer application has been proposed. The designed transformer of 10mm radius has been characterized up to the power level of 50Wand possesses a record power density of 107W/cm3 with a peak energy efficiency of 96%. In addition to this, the design guidelines of the signal transformer fordriving the high side MOSFET in double ended converter topologies have been proposed. The measured power consumption of the high side gate drive circuitvitogether with the designed signal transformer is 0.37W. Both these signal andpower transformers have been successfully implemented in a resonant converter topology in the switching frequency range of 2.4 – 2.75MHz for the maximum load power of 34.5W resulting in the peak energy efficiency of converter as 86.5%.This thesis also investigates the indirect effect of the dielectric laminate on the magnetic field intensity and current density distribution in the planar power transformers with the assistance of finite element analysis (FEA). The significanceof the high frequency dielectric laminate compared to FR-4 laminate in terms of energy efficiency of planar power transformers in MHz frequency region is also explored.The investigations were also conducted on different winding strategies such as conventional solid winding and the parallel winding strategies, which play an important role in the design and development of a high frequency transformer and suggested a better choice in the case of transformers operating in the MHz frequency region.In the second part of the thesis, a novel planar power transformer with hybrid core structure has been designed and evaluated in the MHz frequency region. The design guidelines of the energy efficient high frequency planar power transformerfor the given power transfer application have been proposed. The designed corebased planar transformer has been characterized up to the power level of 50W and possess a power density of 47W/cm3 with maximum energy efficiency of 97%. This transformer has been evaluated successfully in the resonant converter topology within the switching frequency range of 3 – 4.5MHz. The peak energy efficiency ofthe converter is reported to be 92% and the converter has been tested for the maximum power level of 45W, which is suitable for consumer applications such as laptop adapters. In addition to this, a record power density transformer has been designed with a custom made pot core and has been characterized in thefrequency range of 1 - 10MHz. The power density of this custom core transformer operating at 6.78MHz frequency is 67W/cm3 and with the peak energy efficiency of 98%.In conclusion, the research in this dissertation proposed a solution for obtaining high power density converters by designing the highly integrated, high frequency(1 - 10MHz) coreless and core based planar magnetics with energy efficiencies inthe range of 92 - 97%. This solution together with the latest semiconductor GaN/SiC switching devices provides an excellent choice to meet the requirements of the next generation ultra flat low profile switch mode power supplies (SMPS).
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Miller, Douglas P. "Introduction of a current waveform, waveshaping technique to limit conduction loss in high-frequency dc-dc converters suitable for space power." Thesis, Monterey, California : Naval Postgraduate School, 1990. http://handle.dtic.mil/100.2/ADA237903.
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Thesis (M.S. in Electrical Engineering)--Naval Postgraduate School, June 1990.Thesis Advisor(s): Ewing, Gerald D. Second Reader: Michael, Sherif. "June 1990." DTIC Indentifier(s): Dc to dc converters, waveform generators, program listings, theses. Author(s) subject terms: dc-dc converter, quasi-resonant, Buck converter. Includes bibliographical references (p. 142-145). Also available in print.
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Park, Jinseok. "Sample-Data Modeling for Double Edge Current Programmed Mode Control in High Frequency and Wide Range DC-DC converters." NCSU, 2010. http://www.lib.ncsu.edu/theses/available/etd-12162009-141235/.
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This dissertation focuses on sample-data modeling for double edge current programmed mode control (DECPM) and its application to high frequency and wide range DC-DC converters. Steady state conditions and subharmonic oscillation issues for DECPM are addressed. By combining the conventional peak and valley current programmed mode control, a sample-data model for DECPM is proposed. A small signal model for DECPM is developed by deriving the modulation gains (Fm) and the sampling gains (He) for DECPM from the proposed sample-data model. The sampling frequency dependence on the duty ratio and a large current loop gain at high frequency for DECPM are emphasized. The analytical results are verified by the simulation. Finally, DECPM is proposed as a method to control the high frequency and wide range DC-DC converters. A 10MHz four switch buck boost converter is implemented with DECPM to verify the viability of its application to high frequency and wide range converters.
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Murthy, Bellur Dakshina S. "Hard-Switching and Soft-Switching Two-Switch Flyback PWM DC-DC Converters and Winding Loss due to Harmonics in High-Frequency Transformers." Wright State University / OhioLINK, 2010. http://rave.ohiolink.edu/etdc/view?acc_num=wright1278704361.
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LaBella, Thomas Matthew. "A High-Efficiency Hybrid Resonant Microconverter for Photovoltaic Generation Systems." Diss., Virginia Tech, 2014. http://hdl.handle.net/10919/50526.
Full textAbstract:
The demand for increased renewable energy production has led to increased
photovoltaic (PV) installations worldwide. As this demand continues to grow, it is
important that the costs of PV installations decrease while the power output capability
increases. One of the components in PV installations that has lots of room for improvement
is the power conditioning system. The power conditioning system is responsible for
converting the power output of PV modules into power useable by the utility grid while
insuring the PV array is outputting the maximum available power. Modular power
conditioning systems, where each PV module has its own power converter, have been
proven to yield higher output power due to their superior maximum power point tracking
capabilities. However, this comes with the disadvantages of higher costs and lower power
conversion efficiencies due to the increased number of power electronics converters. The
primary objective of this dissertation is to develop a high-efficiency, low cost
microconverter in an effort to increase the output power capability and decrease the cost of
modular power conditioning systems.
First, existing isolated dc-dc converter topologies are explored and a new topology
is proposed based on the highly-efficient series resonant converter operating near the series
resonant frequency. Two different hybrid modes of operation are introduced in order to
add wide input-voltage regulation capability to the series resonant converter while
achieving high efficiency through low circulating currents, zero-current switching (ZCS)
of the output diodes, zero-voltage switching (ZVS) and/or ZCS of the primary side active
switches, and direct power transfer from the source to the load for the majority of the
switching cycle. Each operating mode is analyzed in detail using state-plane trajectory
plots. A systematic design approach that is unique to the newly proposed converter is
presented along with a detailed loss analysis and loss model. A 300-W microconverter
prototype is designed to experimentally validate the analysis and loss model. The converter
featured a 97.7% weighted California Energy Commission (CEC) efficiency with a
nominal input voltage of 30 V. This is higher than any other reported CEC efficiency for
PV microconverters in literature to date.
Each operating mode of the proposed converter can be controlled using simple
fixed-frequency pulse-width modulation (PWM) based techniques, which makes
implementation of control straightforward. Simplified models of each operating mode are
derived as well as control-to-input voltage transfer functions. A smooth transition method
is then introduced using a two-carrier PWM modulator, which allows the converter to
transition between operating modes quickly and smoothly. The performance of the voltage
controllers and transition method were verified experimentally.
To ensure the proposed converter is compatible with different types of modular
power conditioning system architectures, system-level interaction issues associated with
different modular applications are explored. The first issue is soft start, which is necessary
when the converter is beginning operation with a large capacitive load. A novel soft start
method is introduced that allows the converter to start up safely and quickly, even with a
short-circuited output. Maximum power point tracking and double line frequency ripple
rejection are also explored, both of which are very important to ensuring the PV module is
outputting the maximum amount of available power.
Lastly, this work deals with efficiency optimization of the proposed converter. It
is possible to use magnetic integration so that the resonant inductor can be incorporated
into the isolation transformer by way of the transformer leakage inductance in order to
reduce parts count and associated costs. This chapter, however, analyzes the disadvantages
to this technique, which are increased proximity effect losses resulting in higher conduction
losses. A new prototype is designed and tested that utilizes an external resonant inductor
and the CEC efficiency was increased from 97.7% to 98.0% with a marginal 1.8% total
cost increase. Additionally, a variable frequency efficiency optimization algorithm is
proposed which increases the system efficiency under the high-line and low-line input
voltage conditions. This algorithm is used for efficiency optimization only and not control,
so the previously presented simple fixed-frequency modeling and control techniques can
still be utilized.Ph. D.
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Kuzdas, Jan. "Nové koncepce výkonových pulsních měničů s použitím extrémně rychlých spínacích polovodičů na bázi karbidu křemíku." Doctoral thesis, Vysoké učení technické v Brně. Fakulta elektrotechniky a komunikačních technologií, 2014. http://www.nusl.cz/ntk/nusl-233651.
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This work deals with high power pulse converters (tens of kW) using new semiconductor devices of silicon carbide (SiC). Firstly the current state of the issue is analyzed. A research in a specific area of high power buck converters with pulse transformer follows. There was a strong emphasis on minimizing size and weight. The design process was focused also on reliability and robustness. To achieve the defined objectives, it was necessary to use the latest available switching transistors and diodes, and an unusually high switching frequency (100 kHz at a power of about 16 kW). Due to the high switching frequency, we achieved small size of pulse transformers and output chokes. An optimization of high-frequency pulse transformer with demand on minimum volume and weight of core and windings represents a separate theoretical part of the thesis. There have been proposed several analytical solutions of optimization problems, the results of which could overlap with the implementation in practice of switching power supplies. The combination of high switching frequency, fast semiconductors and the high power brings various parasitic effects to the power circuit. In the thesis, these parasitic effects are analyzed. Solutions which minimize or completely remove those effects were theoretically designed and successfully implemented, tested and finalized in experimental part of the work. Detailed description of the implementation of functional sample and series of validation measurements are included in the final part.
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Lu, Bing. "Investigation of High-density Integrated Solution for AC/DC Conversion of a Distributed Power System." Diss., Virginia Tech, 2006. http://hdl.handle.net/10919/28128.
Full textAbstract:
With the development of information technology, power management for telecom and computer applications become a large market for power supply industries. To meet the performance and reliability requirement, distributed power system (DPS) is widely adopted for telecom and computer systems, because of its modularity, maintainability and high reliability.
Due to limited space and increasing power consumption, power supplies for telecom and server systems are required to deliver more power with smaller volume. As the key component of DPS system, front-end AC/DC converter is under the pressure of continuously increasing power density. For conventional industry practices, some limitations prevents front-end converter meeting the power density requirement. In this dissertation, different techniques have been investigated to improve power density of front-end AC/DC converters.
For PFC stage, at low switching frequency, PFC inductor size is large and limits the power density. Although increasing switching frequency can dramatically reduce PFC inductor size, EMI filter size might be larger at higher switching frequency because of the change of noise spectrum. Since the relationship between EMI filter size and PFC switching frequency is unclear for industry, PFC circuits always operate with switching frequency lower than 150 kHz. Based on the EMI filter design method, together with a simple EMI noise prediction model, relationship between EMI filter corner frequency and PFC switching frequency was revealed. The analysis shows that switching frequency of PFC circuit should be higher than 400 kHz, so that both PFC inductor and EMI filter size can be reduced.
Although theoretical analysis and experimental results verify the benefits of high switching frequency PFC, it is essential to find a suitable topology that allows high switching frequency operation while maintains high efficiency. Three PFC topologies, single switch PFC, three-level PFC with range switch and dual Boost PFC, were evaluated with analysis and experiments. By using advanced semiconductor devices, together with proposed control methods, these topologies could achieve high efficiency at high switching frequency. Thus, the benefits of high frequency PFC can be realized.
In front-end converter, large holdup time capacitor size is another barrier for power density improvement. To meet the holdup time requirement, bulky holdup time capacitor is normally used to provide energy during holdup time. Holdup time capacitor requirement can be reduced by using wider input voltage range DC/DC converte. Because LLC resonant converter can realized with input voltage range without sacrificing its normal operation efficiency, it becomes an attractive solution for DC/DC stage of front-end converters. Moreover, its small switching loss allows it operating at MHz switching frequency and achieves smaller passive component size. However, lack of design methodology makes the topology difficult to be implemented. An optimal design methodology for LLC resonant converter has been developed based on the analysis on the circuit during normal operation condition and holdup time. The design method is verified by a 1 MHz switching frequency LLC resonant converter with 76W/in3 power density.
When front-end converter operates at high switching frequency, negative effects of circuit parasitics become more pronounced. By integrating active devices together with their gate drivers, Active Integrated power electronics module (IPEM) can largely reduce circuit parasitics. Therefore, switching loss and voltage stress on switching devices can be reduced. Moreover, IPEM concept can be extended into passive integration and EMI filter integration By using this power integration technology, power density and circuit performance of front-end converter can be improved, which is verified by theoretical analysis and experimental results.Ph. D.
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Lessing, Marlon Henrique. "Analysis, design and implementation of single-stage high-frequency-isolated DC-AC flyback converters." Universidade Tecnológica Federal do Paraná, 2016. http://repositorio.utfpr.edu.br/jspui/handle/1/2410.
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Esta dissertação propõe a análise de dois conversores de estágio único, isolados em alta frequência e adequados para aplicações de conexão à rede elétrica. Inicialmente, é introduzida uma nova estratégia de modulação para o conversor flyback bidirecional com conexão diferencial. Esta modulação melhorada proporciona melhor desempenho, reduzindo os valores de corrente RMS para cada componente do circuito, contribuindo assim para a redução das perdas por condução. As análises estáticas do conversor operando em ambas estratégias de modulação alternativa e original são apresentadas. A análise dinâmica também é realizada, fornecendo a função de transferência da corrente de saída pela razão cíclica do conversor ligado à uma carga resistiva e acoplado a uma fonte de tensão. Um protótipo com potência de saída de 500 W, 20 kHz, com tensão de entrada de 70 V e 127 VRMS na tensão de saída é apresentado e os resultados experimentais que comparam a nova estratégia de modulação confirmam a análise teórica e desempenho superior. Uma tensão de saída com baixa THD é alcançada para ambas estratégias de modulação, operando em malha aberta em no modo de condução contínua. O segundo conversor é um flyback com grampeamento ativo adequado para ser utilizado como um micro-inversor em aplicações de energias renováveis. As principais características da topologia são o relativo baixo número de componentes, o isolamento em alta frequência, possibilidade de ser utilizado como elevador de tensão de saída e operação em ZVS. O grampeamento ativo permite recuperar a maior parte da energia armazenada na indutância de dispersão dos indutores flyback e, assim, uma melhoria na eficiência do conversor é atingida. A análise estática é fornecida para o conversor operando em CCM. Além disso, uma função de transferência da corrente de saída pela razão cíclica é apresentada para uma carga resistiva na saída. Para este conversor duas frequências de comutação de 100 kHz e 50 kHz foram testadas num protótipo construído para 500 W, com tensão de entrada de 70 V e tensão de saída de 127 VRMS.This thesis proposes the analysis of two single-stage high-frequency isolated converters suited for grid-tied applications. Firstly, a new modulation strategy to the bidirectional flyback converter with differential output connection is introduced. This improved modulation provides better performance by reducing the RMS current values for every circuit element, thereby contributing to reduced conduction losses. The static analyses of the converter operating in both the original and the alternative switching strategies are presented. Dynamic analysis is also performed, providing the output-current-to-duty-cycle transfer function of the converter connected to a resistive load and coupled to an output voltage source. A 500 W, 20 kHz, 70 V input voltage and 127 VRMS output voltage prototype is presented and experimental results comparing the new modulation strategy to the original confirm the theoretical analyses and superior performance of the alternative switching strategy. A low THD output voltage is achieved for both switching strategies, operating in open loop and in continuous conduction mode. The second converter is an active-clamping flyback converter suitable to be used as a microinverter in renewable energy applications. The main features of the topology are the relatively low component count, high-frequency isolation, voltage step-up capability and zero voltage switching. The active clamping allows to recover most of the energy stored in the flyback inductors’ leakage inductance and thus an improvement on the system efficiency is achieved. The static analysis for CCM operation is provided. In addition, an output-current-to-duty-cycle transfer function for a resistive load connected to the output of the converter is presented. Two switching frequencies of 100 kHz and 50 kHz were tested in a prototype built for 500 W, 70 V input voltage and 127 VRMS output voltage.
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Abbas, Ghulam. "Analysis, modelling, design and implementation of fast-response digital controllers for high-frequency low-power switching converters." Thesis, Lyon, INSA, 2012. http://www.theses.fr/2012ISAL0055.
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L'objectif de la thèse est de concevoir des compensateurs discrets qui permettent de compenser les non-linéarités introduites par les différents éléments dans la boucle de commande numérique, tout en maintenant des performances dynamiques élevées, des temps de développement rapide, et une structure reconfigurable. Ces compensateurs discrets doivent également avoir des temps de réponse rapide, avoir une déviation de la tension minimale et avoir, pour un étage de puissance donné, un temps de récupération rapide de la tension. Ces performances peuvent être atteintes par des compensateurs discrets conçus sur la base de techniques de contrôle linéaires et non linéaires. Pour obtenir une réponse rapide et stable, la thèse propose deux solutions : La première consiste à utiliser des techniques de contrôle linéaires et de concevoir le compensateur discret tout en gardant la bande passante la plus élevée possible. Il est communément admis que plus la bande passante est élevée, plus la réponse transitoire est rapide. L‘obtention d’une bande passante élevée, en utilisant des techniques de contrôle linéaires, est parfois difficile. Toutes ces situations sont mises en évidence dans la thèse. La seconde consiste à combiner les techniques de contrôle linéaires avec les techniques de contrôles non linéaires tels que la logique floue ou les réseaux de neurones. Les résultats de simulations ont permis de vérifier que la combinaison des contrôleurs non-linéaires avec les linéaires ont un meilleur rendement dynamique que les contrôleurs linéaires lorsque le point de fonctionnement varie. Avec l'aide des deux méthodes décrites ci-dessus, la thèse étudie également la technique de l’annulation des pôles-zéros (PZC) qui annule la fonction de transfert du convertisseur. Quelques modifications des techniques classiques de contrôle sont également proposées à partir de contrôleurs numériques afin d’améliorer les performances dynamiques. La thèse met également en évidence les non-linéarités qui dégradent les performances, propose les solutions permettant d'obtenir les meilleures performances, et lève les mystères du contrôle numérique. Une interface graphique est également introduite et illustrée dans le cas de la conception d'un convertisseur abaisseur de tension synchrone. En résumé, cette thèse décrit principalement l'analyse, la conception, la simulation, l’optimisation la mise en œuvre et la rentabilité des contrôleurs numériques. Une attention particulière est portée à l'analyse et l'optimisation des performances dynamique à haute fréquence et pour de faibles puissances des convertisseurs DC-DC abaisseur de tension. Ces convertisseurs fonctionnent en mode de conduction continue (CCM) à une fréquence de commutation de 1 MHz et s’appuie sur des techniques de contrôle linéaires et non linéaires de façon séquentielleThe objective of the thesis is to design the discrete compensators which counteract the nonlinearities introduced by various elements in the digital control loop while delivering high dynamic performance, fast time-to-market and scalability. Excellent line and fast load transient response, which is a measure of the system response speed, with minimal achievable voltage deviation and a fast voltage recovery time for a given power stage can be achieved through the discrete compensators designed on the basis of linear and nonlinear control techniques. To achieve a stable and fast response, the thesis proposes two ways. One way is to use linear control techniques to design the discrete compensator while keeping the bandwidth higher. It is well-known fact that the higher the bandwidth, the faster is the transient response. Achieving higher bandwidth through linear control techniques sometimes becomes tricky. All those situations are highlighted in the thesis. The other way is to hybridize the linear control techniques with the nonlinear control techniques such as fuzzy logic or neural network based control techniques. Simulation results verify that hybridization of nonlinear controllers with the linear ones have better dynamic performance over linear controllers under the change of operating points. Along with using the two methodologies described above, the thesis also investigates the pole-zero cancellation (PZC) technique in which the poles and zeros of the compensator are placed in such a way that they cancel the effect of the poles or zeros of the buck converter to boost the phase margin at the required bandwidth. Some modifications are also suggested to the classical control techniques based digital controllers to improve the dynamic performance. The thesis highlights the nonlinearities which degrade the performance, a cost-effective solution that achieves good performance and the mysteries of digital control system. A graphical user interface is introduced and demonstrated for use with the design of a synchronous-buck converter. In summary, this thesis mainly describes the analysis, design, simulation, optimization, implementation and cost effectiveness of digital controllers with particular focus on the analysis and the optimization of the dynamic performance for high-frequency low-power DC-DC buck converter working in continuous conduction mode (CCM) operating at a switching frequency of 1 MHz using linear and nonlinear control techniques in a very sequential and comprehensive way
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Saini, Dalvir K. "Gallium Nitride: Analysis of Physical Properties and Performance in High-Frequency Power Electronic Circuits." Wright State University / OhioLINK, 2015. http://rave.ohiolink.edu/etdc/view?acc_num=wright1438013888.
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Delaine, Johan. "Alimentation haute fréquence à base de composants de puisance en Nitrure de Gallium." Thesis, Grenoble, 2014. http://www.theses.fr/2014GRENT012/document.
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Le projet de cette thèse est de réaliser un convertisseur DC/DC isolé à haute fréquence de découpage basé sur la mise en œuvre de composants en GaN. Le but est d'augmenter très fortement les densité de puissance commutées par rapport aux solutions actuelles. Cette thèse mets en oeuvre les composants GaN afin de déterminer les meilleurs conditions de fonctionnement possible. Une fois les points critiques mis en avant, on étudie les structures de circuit de commande adapté pour les HEMT GaN d'EPC et un circuit intégré pour la commande est étudié et mis en oeuvre. Le layout global de la carte a un rôle important en termes d'intégration et d'optimisation CEM, il est donc discuté et des règles de routage sont proposées. Enfin, on étudie plusieurs structures de puissance et on les met en oeuvre pour vérifier le bon fonctionnement et le respect du cahier des chargesThis study consist in the development of a high frequency insulated DC/DC converter based on GaN power devices. The goal is to increase significantly the power density in comparison with actual converter solutions. This thesis evaluate the GaN components performances to determine the best working conditions. Once the critical points highlighted, gate circuit topologies suitable for EPC GaN HEMT are studied and an integrated IC is designed and implemented. The overall layout of the card has an important role in terms of integration and EMC optimization, so it is discussed and routing rules are proposed. Finally, we study several power structures and implement them to verify proper operation and their compliance with specifications
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Eial, Awwad Abdullah [Verfasser], Sibylle [Akademischer Betreuer] Dieckerhoff, Sibylle [Gutachter] Dieckerhoff, Regine [Gutachter] Mallwitz, and Uwe [Gutachter] Schäfer. "On the perspectives of SiC MOSFETs in high-frequency and high-power isolated DC/DC converters / Abdullah Eial Awwad ; Gutachter: Sibylle Dieckerhoff, Regine Mallwitz, Uwe Schäfer ; Betreuer: Sibylle Dieckerhoff." Berlin : Technische Universität Berlin, 2018. http://d-nb.info/116832405X/34.
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Werkstetter, Mario. "Hocheffizienter DC/DC-Wandler auf Basis von GaN-Leistungsschaltern für Hochleistungs-Leuchtdioden im Kraftfahrzeug." Universitätsverlag der Technischen Universität Chemnitz, 2017. https://monarch.qucosa.de/id/qucosa%3A20870.
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In der vorliegenden Arbeit werden Möglichkeiten zur Maximierung der Effizienz von stromregelnden DC/DC-Wandlern für den Betrieb von Hochleistungs-LEDs in PKW-und Motorrad-Beleuchtungseinrichtungen untersucht, mit dem Ziel, das Gewicht und den Energieverbrauch der Steuergeräte zu reduzieren und so zu dem stetigen Bestreben der Minimierung der Gesamtfahrzeugemissionen beizutragen.
Dafür werden verschiedene, teils sequenziell aufbauende Maßnahmen in Topologie, Bauelementen, Dimensionierung und Betriebsart betrachtet. Eine grundlegende Herausforderung für die Auslegung der Schaltung stellt dabei deren universelle Verwendbarkeit als Gleichteil in einem großen Bereich an Ausgangsstrom und -spannung in den individuellen Scheinwerfersystemen der verschiedenen Fahrzeugderivate dar.
Die Grundlage für die Verringerung der Verlustleistung bildet die Vereinfachung der Schaltreglertopologie hinsichtlich des Bauteilaufwands. Dies wird durch die Versorgung der Schaltung aus dem 48 V-Energiebordnetz und die Verwendung der Topologie des Tiefsetzstellers erreicht.
Elementarer Anteil dieser Arbeit ist die Untersuchung der Wirksamkeit des Einsatzes neuartiger Galliumnitrid-Leistungsschalter (GaN-HEMTs) anstelle der konventionellen Silizium-MOSFETs, was zunächst an Hand von Berechnungen und schaltungstechnischen, parasitärbehafteten und zeitvarianten Simulationen durchgeführt wird. Bereits bei herkömmlichen Schaltfrequenzen und hartgeschaltetem Betrieb können signifikante Verbesserungen des Wirkungsgrades erreicht werden.
Weitergehend wird der Nutzen der durch die GaN-Transistoren ermöglichten höheren Schaltfrequenzen eruiert. Die um bis zu Faktor 20 erhöhte Schaltfrequenz macht den Einsatz einer resonanten Betriebsart (Zero-Voltage-Switching) und einer Luftspule als Hauptinduktivität notwendig.
Auf Steuergeräteebene kann somit die Verlustleistung auf unter ein Drittel reduziert werden, was zudem ein deutlich einfacheres und kompakteres Gehäuse ermöglicht, wodurch das Gesamtgewicht etwa halbiert werden kann.
Abschließend wird die Schaltung in einem Prototypen praktisch umgesetzt und die Funktionsfähigkeit im ZVS-Betrieb bei Schaltfrequenzen von bis zu 10 MHz verifiziert.This thesis deals with the research of possibilities for maximising efficiency of current-regulating DC/DC-Converters for driving high-power-LEDs in passenger-car- and motorcycle-lighting-devices. The ambition is to reduce weight and energy-consumption of the electronic-control-units, to contribute to reach the continuously decreasing target-values for vehicle-emissions. Therefor different approaches in topology, components, design and operating mode are considered. A key-challenge for the circuit-design is the common-part-strategy for usage in many individual vehicle-headlamp-systems with a wide range of output-current and LED-string-voltages. Basis for the reduction of power-losses is the simplification of the converters topology in terms of quantity of components. This is achieved by using the 48 V -vehicle-electrical-system as voltage-supply and a step-down-topology. Mainpart of this research is about the potential benefits of applying novel Galliumnitride High-electron-mobility-transistors (GaN-HEMTs) instead of silicon MOS-FETs. Initially this is done by calculations and parasitic-afflicted, timevariant circuit-simulations. Already in hardswitching operation under conventional switching-frequencies significant improvements in converter-efficiency can be achieved. Furthermore the advantages of higher switching-frequencies, offered by the GaN-transistors, are investigated. Up to 20 times higher switching-frequencies necessitate a resonant operating mode of the circuit (Zero-voltage-switching) and the use of an aircoil as main-inductor. On ECU-level power-losses can be reduced down to less than one third, which enables a more simplified and compact housing-concept, so that the overall weight can drop to about the half. Finally the designed circuit is build up in a prototype and the functional capability is verified in ZVS-mode with up to 10 MHz switching-frequency.
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Demetriades, Georgios D. "On small-signal analysis and control of the single- and the dual-active bridge topologies." Doctoral thesis, Stockholm, 2005. http://urn.kb.se/resolve?urn=urn:nbn:se:kth:diva-153.
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Martin, Jérémy. "Caractérisation en commutation douce d'IGBT 6,5 kV pour l'application transformateur moyenne fréquence en traction ferroviaire." Thesis, Toulouse, INPT, 2010. http://www.theses.fr/2010INPT0037/document.
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Ce travail concerne l’étude et la réalisation d’une architecture multicellulaire de conversion d’énergie électrique haute tension avec étage intermédiaire alternatif moyenne fréquence destinée à la traction électrique ferroviaire. L’objectif de ce travail est de diminuer la masse et le volume de l’étage de conversion alternatif-continu que l’on retrouve dans les engins de traction conçus pour circuler sur les réseaux alternatifs 25kV-50Hz ou 15kV-16Hz2/3. La recherche de gains sur l’étage de conversion alternatif-continu s’applique aussi bien sur les automotrices où l’on cherche à gagner de la place disponible pour y placer des passagers que sur les locomotives ou encore sur les motrices de TGV où l’on recherche un gain de masse étant donné que ces engins sont en limite de charge à l’essieu. Le contexte de la haute tension implique l’utilisation d’interrupteurs de forts calibres en tension pour limiter au maximum le nombre de cellules de conversions utilisées. D’un autre côté, la recherche de gains sur le transformateur nécessite une fréquence de découpage élevée, génératrice de pertes en commutation dans les interrupteurs. L’architecture de conversion retenue permet par l’association de structures duales d’obtenir des conditions de commutation douce, ce qui est favorable à une montée en fréquence avec des interrupteurs de forts calibres en tension. Le convertisseur élémentaire associe un onduleur de tension commandé au blocage et un commutateur de courant commandé à l’amorçage. Afin d’évaluer le rendement de l’architecture considérée, un prototype d’un bloc de conversion élémentaire, d’une puissance de 280 kVA, a été réalisé au laboratoire PEARL. Les interrupteurs sont réalisés sur la base de modules IGBT 6,5kV/200A. Les essais en commutation douce ont permis d’évaluer, dans des conditions de fonctionnement réelles, les pertes dans les modules IGBT. Compte tenu de ces résultats, il est possible de déterminer les limites de fonctionnement de la structure de conversion et d’effectuer un dimensionnement en considérant le compromis rendement-poids-volume pour un engin de traction donnéThis thesis concerns the study and the rating of a high voltage multicellular converter with an intermediate medium frequency stage dedicated to railway traction. The objective is to reduce the weight and the volume of the AC-DC conversion stage which is implemented in railway engines running on 25kV-50Hz or 15kV-16Hz2/3 railways. Reduction on weight and size of the AC-DC converter may be applied on multiple unit trains where the transformer causes room loss for passengers and on locomotives and high speed trains where the axle load is limited. On one hand high voltage switches are required in order to minimize the number of cells used to build the converter. On the other hand, reducing the size and the weight of the transformer requires a high switching frequency, causing high commutation losses. To achieve soft switching conditions with high voltage semiconductors, the proposed topology is based on an association of dual structures. Each elementary converter combines a controlled turn-off voltage source inverter and a controlled turn-on current source inverter. In order to estimate the efficiency of the new topology, a prototype of one elementary cell working at 280 kVA, was built at the Power Electronics Associated Research Laboratory (PEARL). The switches are standard 6.5 kV/200A IGBTs modules. Soft-switching tests, in real operating conditions, allow evaluating IGBTs and diodes switching losses. Thanks to these results, it is possible to find the structure operating limits and to size the transformer considering the trade-off between the system efficiency and the transformer weight
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Wang, Xiangcheng. "HIGH SLEW RATE HIGH-EFFICIENCY DC-DC CONVERTER." Doctoral diss., University of Central Florida, 2006. http://digital.library.ucf.edu/cdm/ref/collection/ETD/id/3196.
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Active transient voltage compensator (ATVC) has been proposed to improve VR transient response at high slew rate load, which engages in transient periods operating in MHZ to inject high slew rate current in step up load and recovers energy in step down load. Main VR operates in low switching frequency mainly providing DC current. Parallel ATVC has largely reduced conduction and switching losses. Parallel ATVC also reduces the number of VR bulk capacitors. Combined linear and adaptive nonlinear control has been proposed to reduce delay times in the actual controller, which injects one nonlinear signal in transient periods and simplifies the linear controller design. Switching mode current compensator with nonlinear control in secondary side is proposed to eliminate the effect of opotocoupler, which reduces response times and simplifies the linear controller design in isolated DC-DC converters. A novel control method has been carried out in two-stage isolated DC-DC converter to simplify the control scheme and improve the transient response, allowing for high duty cycle operation and large step-down voltage ratio with high efficiency. A balancing winding network composed of small power rating components is used to mitigate the double pole-zero effect in complementary-controlled isolated DC-DC converter, which simplifies the linear control design and improves the transient response without delay time. A parallel post regulator (PPR) is proposed for wide range input isolated DC-DC converter with secondary side control, which provides small part of output power and most of them are handled by unregulated rectifier with high efficiency. PPR is easy to achieve ZVS in primary side both in wide range input and full load range due to 0.5 duty cycle. PPR has reduced conduction loss and reduced voltage rating in the secondary side due to high turn ratio transformer, resulting in up to 8 percent efficiency improvement in the prototype compared to conventional methods.Ph.D.
School of Electrical Engineering and Computer Science
Engineering and Computer Science
Electrical Engineering