Relevant bibliographies by topics / High speed DSP

Contents

  1. Journal articles
  2. Dissertations / Theses
  3. Books
  4. Book chapters
  5. Conference papers
  6. Reports

Academic literature on the topic 'High speed DSP'

Author: Grafiati
Published: 3 June 2025
Last updated: 31 July 2025

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Journal articles on the topic "High speed DSP"

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Wu, Kai Hua, and Jian Xin Fan. "High-Speed Acquisition and Processing Method for High Resolution Image of Wheel Set." Applied Mechanics and Materials 44-47 (December 2010): 3859–63. http://dx.doi.org/10.4028/www.scientific.net/amm.44-47.3859.

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Measurement of wheel set wear was an important step for the safety of train running. High-speed acquisition and processing method for high resolution image of wheel set based on the hardware platform of DSP (digital signal processor) and PC was proposed. High-speed acquisition and processing was completed by PC and DSP unit separately. PC and DSP unit worked in parallel operational mode. Ethernet transport program based on TCP was designed for data exchange. Asynchronous reset pulse generation circuits were designed. High resolution images of wheel set were captured in 500fps and asynchronous
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Peng, Hao, and Ze Lun Li. "A Method of Measuring Rotational Speed for a High-Speed Rotator Based on DSP." Applied Mechanics and Materials 233 (November 2012): 270–73. http://dx.doi.org/10.4028/www.scientific.net/amm.233.270.

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Requirements for the device of measuring rotational speed is high-accuracy, stabilization, credibility, and shorter measuring time during the dynamic-balancing process. This paper studies a way of measuring rotator reference signal based on DSP(digital signal processing). The way of picking-up rotator reference signal, measuring rotator speed are introduced. This new way of measuring rotational speed in high-speed rotor dynamic-balancing measuring system based on DSP is accurate, simple and convenient.
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Zhao, Yan, and Jiao Min Liu. "An Arc Image Processing System Design and Testing." Applied Mechanics and Materials 182-183 (June 2012): 758–62. http://dx.doi.org/10.4028/www.scientific.net/amm.182-183.758.

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In this paper, research on a high speed arc image sampling and processing system based on DSP has been done. A RS-422A interface has been used to sample high speed image, A TMS320C40 high speed DSP and high frame rate CCD are used as the sensor. The optical image can be converted into digital image in this image sampling and processing system efficiently, with the high speed DSP and the high speed memories, to improve the data transfer speed and receive the image data correctly, DMA data communication technology is adopted. The test result shows that this system is very effective for arc resea
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Yoffe, Yaron, Eyal Wohlgemuth, and Dan Sadot. "Performance Optimization of High Speed DACs Using DSP." Journal of Lightwave Technology 38, no. 12 (2020): 3096–105. http://dx.doi.org/10.1109/jlt.2020.2989412.

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Nirlakalla, Ravi, Rao Subba, and Talari Jayachandra-Prasad. "Performance evaluation of high speed compressors for high speed multipliers." Serbian Journal of Electrical Engineering 8, no. 3 (2011): 293–306. http://dx.doi.org/10.2298/sjee1103293n.

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This paper describes high speed compressors for high speed parallel multipliers like Booth Multiplier, Wallace Tree Multiplier in Digital Signal Processing (DSP). This paper presents 4-3, 5-3, 6-3 and 7-3 compressors for high speed multiplication. These compressors reduce vertical critical path more rapidly than conventional compressors. A 5-3 conventional compressor can take four steps to reduce bits from 5 to 3, but the proposed 5-3 takes only 2 steps. These compressors are simulated with H-Spice at a temperature of 25?C at a supply voltage 2.0V using 90nm MOSIS technology. The Power, Delay,
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Reddy, Bharathi, D. Leela Rani, and Prof S. Varadarajan. "HIGH SPEED CARRY SAVE MULTIPLIER BASED LINEAR CONVOLUTION USING VEDIC MATHAMATICS." INTERNATIONAL JOURNAL OF COMPUTERS & TECHNOLOGY 4, no. 2 (2013): 284–87. http://dx.doi.org/10.24297/ijct.v4i2a2.3173.

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VLSI applications include Digital Signal Processing, Digital control systems, Telecommunications, Speech and Audio processing for audiology and speech language pathology. The latest research in VLSI is the design and implementation of DSP systems which are essential for above applications. The fundamental computation in DSP Systems is convolution. Convolution and LTI systems are the heart and soul of DSP. The behavior of LTI systems in continuous time is described by Convolution integral whereas the behavior in discrete-time is described by Linear convolution. In this paper, Linear convolution
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YAO, JUN, JIE CHEN, and ZHAOJUN LIN. "HIGH PERFORMANCE MAC UNIT USING MODIFIED SIGN EXTENSION ALGORITHM AND A NEW HIGH-SPEED ALU IN DSP-CORE." International Journal of Software Engineering and Knowledge Engineering 15, no. 02 (2005): 427–32. http://dx.doi.org/10.1142/s0218194005002002.

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This paper describes a high performance multiply-accumulator (MAC) unit in DSP-core. Since the most critical timing path of the DSP lies in the MAC, great endeavors have been paid to speed it up. The MAC unit can perform fixed-point operation with rounding optional, on operands with a throughput of 1 cycle. In this design, the modified sign extension algorithm is presented to eliminate the sign bits array of partial products to reduce computation time and area. Further increase in speed is achieved by using a new three 40 bit inputs (also known as operands) high-speed arithmetic logical unit (
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Yu, Wen Tao, Hong Wei Li, Shu Qin Liu, and Yun Peng Zhang. "The Design for High-Power Maglev Blower Controller." Advanced Materials Research 712-715 (June 2013): 2747–52. http://dx.doi.org/10.4028/www.scientific.net/amr.712-715.2747.

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The maglev blower used in sewage treatment, which power is 115kW, speed up to 20000rpm, for plain bearing blower speed 6-8 times, volume is only 1/4 of the plain bearing and the noise is less than 80dB. The controller uses a DSP and FPGA dual-core controller to complete. DSP process the rotor suspension signal with digital bandstop filter program and improved PID program, FPGA complete the current signal amplification.Two chip via custom protocol to complete the data transfer. It is successful application of the controller that used in the magnetic bearing blower.
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Wei, Jinlong, Cedric Lam, Ji Zhou, et al. "Low Complexity DSP for High Speed Optical Access Networking." Applied Sciences 11, no. 8 (2021): 3406. http://dx.doi.org/10.3390/app11083406.

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A novel low-cost and energy-efficient approach for reaching 40 Gb/s signals is proposed for cost-sensitive optical access networks. Our proposed design is constituted of an innovative low-complex high-performance digital signal processing (DSP) architecture for pulse amplitude modulation (PAM-4), reuses existing commercial cost-effective 10-G components and eliminates the need of a power-hungry radio frequency (RF) component in the transmitter. Using a multi-functional 17-tap reconfigurable adaptive Volterra-based nonlinear equalizer with noise suppression, significant improvement in receiver
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Tamir, Dan E., Natan T. Shaked, Peter J. Wilson, and Shlomi Dolev. "High-speed and low-power electro-optical DSP coprocessor." Journal of the Optical Society of America A 26, no. 8 (2009): A11. http://dx.doi.org/10.1364/josaa.26.000a11.

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Dissertations / Theses on the topic "High speed DSP"

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Alexander, Steven Wilson. "Efficient arithmetic for high speed DSP implementation on FPGAs." Thesis, Connect to e-thesis, 2007. http://theses.gla.ac.uk/856/.

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Thesis (Eng.D.) - University of Glasgow, 2007.<br>Eng.D. thesis submitted to the Faculty of Engineering, Department of Civil Engineering, University of Glasgow, 2007. Includes bibliographical references. Print version also available.
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McBride, Justin D. (Justin Donald) 1980. "High speed DSP implementation in run-time partially reconfigurable FPGAs." Thesis, Massachusetts Institute of Technology, 2003. http://hdl.handle.net/1721.1/16982.

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Thesis (M.Eng. and S.B.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2003.<br>Includes bibliographical references (leaves 99-100).<br>This electronic version was submitted by the student author. The certified thesis is available in the Institute Archives and Special Collections.<br>This thesis investigates the feasibility of utilizing a run-time partially reconfigurable FPGA to implement a sequence of high-speed digital signal processing filters. Rather than reconfiguring the entire device to modify part of a configuration, a modular architect
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Zhu, Qiwei. "BERT and FFT measurement systems for high-speed communications and magnetometry." Thesis, Uppsala universitet, Institutionen för teknikvetenskaper, 2011. http://urn.kb.se/resolve?urn=urn:nbn:se:uu:diva-149321.

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This master thesis presents the development and implementation of two digital systems based on Field-programmable Gate Array (FPGA): a Bit Error Rate Testing (BERT) system for an Optical Communication (OCOM) application, and a Digital Signal Processing (DSP) system for a Spin-Dependent Tunneling Magnetometer (SDTM). Both applications are intended for space and currently under development at the Ångström Space Technology Center (ÅSTC). The DSP system samples analog signals and applies a Fast Fourier Transform (FFT) for to provide frequency spectrum analysis. The report covers detailed system de
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Imran, Muneeb. "Contact-Less High Speed Measurement over Ground with 61 GHz Radar Sensor." Master's thesis, Universitätsbibliothek Chemnitz, 2016. http://nbn-resolving.de/urn:nbn:de:bsz:ch1-qucosa-212611.

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Conventional FMCW radar principle was implemented on Symeo 61 GHz LPR®-1DHP-R radar sensor system. There were few limitations of the FMCW implementation which needed to be removed. First, target separation in multi target environment was not possible for objects at same distance. For example, there are two targets, one is moving and one is static. When the moving target approaches the static target and becomes parallel to static target, which means they are at the same distance. At this point, the system is unable to distinguish between two targets. Second, high resolution in velocity measurem
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zhao, limei. "NEW OPTIMAL HIGH EFFICIENCY DSP-BASED DIGITAL CONTROLLER DESIGN FOR SUPER HIGH-SPEED PERMANENT MAGNET SYNCHRONOUS MOTOR." Doctoral diss., University of Central Florida, 2005. http://digital.library.ucf.edu/cdm/ref/collection/ETD/id/4071.

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This dissertation investigates digital controller and switch mode power supply design for super high-speed permanent magnet synchronous motors (PMSM). The PMSMs are a key component for the miniaturic cryocooler that is currently under development at the University of Central Florida with support from NASA Kennedy Space Center and the Florida Solar Energy Center. Advanced motor design methods, control strategies, and rapid progress in semiconductor technology enables production of a highly efficient digital controller. However, there are still challenges for such super high-speed controller des
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Elkhomri, Othman. "DSP IMPLEMENTATION OF DC VOLTAGE REGULATION USING ADAPTIVE CONTROL FOR 200 KW 62000 RPM INDUCTION GENERAT." Master's thesis, University of Central Florida, 2006. http://digital.library.ucf.edu/cdm/ref/collection/ETD/id/2926.

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The thesis discusses the development of closed loop system to control the DC voltage for 200 kW induction generator rated at a speed of 62000 RPM under different load conditions. The voltage regulation has been implemented using PI controller. A gain scheduling control algorithm has been developed to select the appropriate controller gains with respect to the generator load. Further, a relationship between the generator loads and the controller gains has been established. This relationship has been modeled using adaptive control technique to vary the gains automatically at any load condition.
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Åslund, Anders. "Power Estimation of High Speed Bit-Parallel Adders." Thesis, Linköping University, Department of Electrical Engineering, 2004. http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-2390.

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<p>Fast addition is essential in many DSP algorithms. Various structures have been introduced to speed up the time critical carry propagation. For high throughput applications, however, it may be necessary to introduce pipelining. In this report the power consumption of four different adder structures, with varying word length and different number of pipeline cuts, is compared. </p><p>Out of the four adder structures compared, the Kogge-Stone parallel prefix adder proves to be the best choice most of the time. The Brent-Kung parallel prefix adder is also a good choice, but the maximal throughp
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Xu, Tianhua. "DSP based Chromatic Dispersion Equalization and Carrier Phase Estimation in High Speed Coherent Optical Transmission Systems." Doctoral thesis, KTH, Optik, 2012. http://urn.kb.se/resolve?urn=urn:nbn:se:kth:diva-94835.

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Coherent detection employing multilevel modulation formats has become one of the most promising technologies for next generation high speed transmission systems due to the high power and spectral efficiencies. Using the powerful digital signal processing (DSP), coherent optical receivers allow the significant equalization of chromatic dispersion (CD), polarization mode dispersion (PMD), phase noise (PN) and nonlinear effects in the electrical domain. Recently, the realizations of these DSP algorithms for mitigating the channel distortions in the coherent transmission systems are the most attra
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Bae, Cheolyong, and Madhur Gokhale. "Implementation of High-Speed 512-Tap FIR Filters for Chromatic Dispersion Compensation." Thesis, Linköpings universitet, Datorteknik, 2018. http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-153435.

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A digital filter is a system or a device that modifies a signal. This is an essential feature in digital communication. Using optical fibers in the communication has various advantages like higher bandwidth and distance capability over copper wires. However, at high-rate transmission, chromatic dispersion arises as a problem to be relieved in an optical communication system. Therefore, it is necessary to have a filter that compensates chromatic dispersion. In this thesis, we introduce the implementation of a new architecture of the filter and compare it with a previously proposed architecture.
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Parks, Jeremy. "A Texas Instruments C33 DSP PCI platform for high-speed real-time implementation of IEEE802.11a Wireless LAN algorithms." [Gainesville, Fla.] : University of Florida, 2003. http://purl.fcla.edu/fcla/etd/UFE0002880.

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Books on the topic "High speed DSP"

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Tran, Thanh T. High-Speed DSP and Analog System Design. Springer US, 2010. http://dx.doi.org/10.1007/978-1-4419-6309-3.

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Tran, Thanh T. High-speed DSP and analog system design. Springer, 2010.

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Barbosa, V. M. G. High speed signal measurement and demodulation in electrical impedance tomography using lost cost DSP. UMIST, 1993.

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Lin, Yu-chuan. An ASIC based DSP design for automatic inter-device analysis in high-speed digital systems. UMIST, 1993.

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M, Tarkenton G., and United States. National Aeronautics and Space Administration. Scientific and Technical Information Division., eds. Users' manual for the Langley high speed propeller noise prediction program (DFP-ATP). National Aeronautics and Space Administration, Scientific and Technical Information Division, 1989.

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High-Speed DSP and Analog System Design. Springer, 2010.

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Tran, Thanh T. High-Speed DSP and Analog System Design. Springer, 2014.

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Book chapters on the topic "High speed DSP"

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Tran, Thanh T. "Challenges of DSP Systems Design." In High-Speed DSP and Analog System Design. Springer US, 2010. http://dx.doi.org/10.1007/978-1-4419-6309-3_1.

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Tran, Thanh T. "Printed Circuit Board (PCB) Layout." In High-Speed DSP and Analog System Design. Springer US, 2010. http://dx.doi.org/10.1007/978-1-4419-6309-3_10.

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Tran, Thanh T. "Electromagnetic Interference (EMI)." In High-Speed DSP and Analog System Design. Springer US, 2010. http://dx.doi.org/10.1007/978-1-4419-6309-3_11.

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Tran, Thanh T. "Transmission Line (TL) Effects." In High-Speed DSP and Analog System Design. Springer US, 2010. http://dx.doi.org/10.1007/978-1-4419-6309-3_2.

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Tran, Thanh T. "Effects of Crosstalk." In High-Speed DSP and Analog System Design. Springer US, 2010. http://dx.doi.org/10.1007/978-1-4419-6309-3_3.

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Tran, Thanh T. "Power Supply Design Considerations." In High-Speed DSP and Analog System Design. Springer US, 2010. http://dx.doi.org/10.1007/978-1-4419-6309-3_4.

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Tran, Thanh T. "Power Supply Decoupling." In High-Speed DSP and Analog System Design. Springer US, 2010. http://dx.doi.org/10.1007/978-1-4419-6309-3_5.

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Tran, Thanh T. "Phase-Locked Loop (PLL)." In High-Speed DSP and Analog System Design. Springer US, 2010. http://dx.doi.org/10.1007/978-1-4419-6309-3_6.

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Tran, Thanh T. "Data Converter Overview." In High-Speed DSP and Analog System Design. Springer US, 2010. http://dx.doi.org/10.1007/978-1-4419-6309-3_7.

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Tran, Thanh T. "Analog Filter Design." In High-Speed DSP and Analog System Design. Springer US, 2010. http://dx.doi.org/10.1007/978-1-4419-6309-3_8.

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Conference papers on the topic "High speed DSP"

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Chen, Xi (Vivian). "Components, DSP, and Subsystem Design for Ultra-high-speed Optical Transceivers." In Optical Fiber Communication Conference. Optica Publishing Group, 2025. https://doi.org/10.1364/ofc.2025.m3c.1.

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An overview of the critical parts of high-speed optical transceivers will be given, including DSP and high-speed signal generation, modulators, CW sources, etc. Thoughts on possible research directions of future transceivers will also be shared.
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Shankar, Smitha Sharath, Rohith S, Nadiminti Rakesh Rohan, Kannali P. C. Eswar, and Bharghav V R. "Design of High-Speed Hybrid Vedic Multiplier for DSP Application." In 2024 International Conference on Distributed Systems, Computer Networks and Cybersecurity (ICDSCNC). IEEE, 2024. https://doi.org/10.1109/icdscnc62492.2024.10939297.

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Kulkarni, Uma, Vallabh Bhat, and Aditya Ingale. "Design and Development of High Speed Multiplier Block for DSP Applications." In 2024 5th IEEE Global Conference for Advancement in Technology (GCAT). IEEE, 2024. https://doi.org/10.1109/gcat62922.2024.10924046.

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Tseng, Chun-Kai, Chi-Dong Tseng, and Yin-Tsung Hwang. "Efficient DSP Equalization Algorithm and Architecture Designs for High Speed Serial Links." In 2024 International Conference on Consumer Electronics - Taiwan (ICCE-Taiwan). IEEE, 2024. http://dx.doi.org/10.1109/icce-taiwan62264.2024.10674041.

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Zhang, Yongkang, Xiangwei Li, Yan Tian, and Zhaohui Xu. "Design of high-speed tracking and display based on FPGA and DSP." In Second International Conference on Remote Sensing, Mapping and Image Processing (RSMIP 2025), edited by Fabio Tosti and Román Alvarez. SPIE, 2025. https://doi.org/10.1117/12.3067635.

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Ossieur, Peter, Gertjan Coudyzer, Cheng Wang, et al. "Advances in High-Speed Opto-Electronic Circuits and Transmitter/Receiver Subsystems for Optical Access Networks." In Optical Fiber Communication Conference. Optica Publishing Group, 2025. https://doi.org/10.1364/ofc.2025.th3g.2.

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An overview of opto-electronic integrated circuits intended for upcoming optical access network systems is provided. Photonic integrated circuits for access applications and associated front-end electronics are addressed. DSP for enabling higher baudrates is discussed.
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Huang, Guoxiu, Hisao Nakashima, and Takeshi Hoshida. "Single-Carrier High-Capacity Transmission in Bandwidth-Limited Systems." In Optical Fiber Communication Conference. Optica Publishing Group, 2025. https://doi.org/10.1364/ofc.2025.m3c.2.

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Towards next coherent system, the technologies to dealing with insufficient analog bandwidth with low power consumption is attractive. We experimentally evaluated Tomlinson-Harashima pre-coding to the probabilistically shaped signal with low-speed receiver DSP and required OSNR improvements.
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Tabassum, Shaik Mohisena, M. Venkata Kavya Sri, D. Bhanu Navya Sri, Shaik Muskaan, Satyajeet Sahoo, and Aswini K. Samataray. "Design of Low Power and High Speed 1-bit Full Adder for DSP Applications." In 2024 International Conference on Advancements in Power, Communication and Intelligent Systems (APCI). IEEE, 2024. http://dx.doi.org/10.1109/apci61480.2024.10616610.

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Hossain, Masum. "Tutorial: Digital Equalization and Timing Recovery Techniques for ADC-DSP Based High-Speed Links." In 2023 IEEE International Solid-State Circuits Conference (ISSCC). IEEE, 2023. https://doi.org/10.1109/isscc42615.2023.11005826.

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Oh, Jung-Yeol, Sang-Rok Moon, Jong-Wan Kim, and Hun-Sik Kang. "A Simplified DSP Algorithm in Modified Alamouti-Coded Coherent Signals for High-Speed Optical Access Networks." In 2024 IEEE Opto-Electronics and Communications Conference (OECC). IEEE, 2024. https://doi.org/10.1109/oecc54135.2024.10975374.

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Reports on the topic "High speed DSP"

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Searcy, Stephen W., and Kalman Peleg. Adaptive Sorting of Fresh Produce. United States Department of Agriculture, 1993. http://dx.doi.org/10.32747/1993.7568747.bard.

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This project includes two main parts: Development of a “Selective Wavelength Imaging Sensor” and an “Adaptive Classifiery System” for adaptive imaging and sorting of agricultural products respectively. Three different technologies were investigated for building a selectable wavelength imaging sensor: diffraction gratings, tunable filters and linear variable filters. Each technology was analyzed and evaluated as the basis for implementing the adaptive sensor. Acousto optic tunable filters were found to be most suitable for the selective wavelength imaging sensor. Consequently, a selectable wave
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Sikes, C., B. Ray, and R. Abbi. Definitions of Managed Objects for High Bit-Rate DSL - 2nd generation (HDSL2) and Single-Pair High-Speed Digital Subscriber Line (SHDSL) Lines. RFC Editor, 2005. http://dx.doi.org/10.17487/rfc4319.

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Ray, B., and R. Abbi. Definitions of Managed Objects for High Bit-Rate DSL - 2nd generation (HDSL2) and Single-Pair High-Speed Digital Subscriber Line (SHDSL) Lines Processing. RFC Editor, 2002. http://dx.doi.org/10.17487/rfc3276.

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Garceau, Sean. PR-283-20207-R01 Field Trial of Solar Turbines Methane Emissions Reduction Solution for Gas Compressors. Pipeline Research Council International, Inc. (PRCI), 2022. http://dx.doi.org/10.55274/r0012230.

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The Methane Emissions Reduction solution designed by Solar Turbines was installed and evaluated at the Berkshire Hathaway Energy (Dominion) Chambersburg station in Pennsylvania, USA. Solar Turbines supplied a dry seal recompression (DSR) system and a process vent recompression (PVR) system at the station. The objective of the field trial was to evaluate the durability of this new system, compare the performance in the field to simulation models and as needed make improvements to the mechanical design and/or software control. The dry gas seal recompression system was installed and connected to
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Amirav, Aviv, and Steven Lehotay. Fast Analysis of Pesticide Residues in Agricultural Products. United States Department of Agriculture, 2002. http://dx.doi.org/10.32747/2002.7695851.bard.

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The overall theme of this project was to increase the speed of analysis for monitoring pesticide residues in food. Traditionally, analytical methods for multiple pesticides are time-consuming, expensive, laborious, wasteful, and ineffective to meet critical needs related to food safety. Faster and better methods were needed to provide more cost-effective detection of chemical contaminants, and thus provide a variety of benefits to agriculture. This overarching goal to speed and improve pesticide analysis was successfully accomplished even beyond what was originally proposed by the investigator
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