Relevant bibliographies by topics / High speed switching circuits

Contents

  1. Journal articles
  2. Dissertations / Theses
  3. Books
  4. Book chapters
  5. Conference papers
  6. Reports

Academic literature on the topic 'High speed switching circuits'

Author: Grafiati
Published: 2 June 2025
Last updated: 5 July 2025

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Journal articles on the topic "High speed switching circuits"

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Shanmuga Raju, S., and B. Paulchamy. "Development and Optimization of a Penta-Magnetic Tunnel Junction Circuit Integrated with Hybrid Transmission Gate Logic for Efficient Low-Power and High-Speed Performance." Journal of Nanoelectronics and Optoelectronics 19, no. 12 (2024): 1347–59. https://doi.org/10.1166/jno.2024.3701.

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In response to the ever-increasing need for fast, low-power circuits, conventional CMOS-based designs are becoming increasingly unsuitable, particularly for use in logic circuits and memory devices. The multi-state behavior of Magnetic Tunnel Junction (MTJ) circuits has attracted attention because of their potential in non-volatile memory and logic operations. To achieve the targeted reductions in power consumption and increases in switching speed, it is essential to integrate these circuits with performance-optimizing logic gates. To overcome the drawbacks of traditional circuits, we present a new hybrid circuit that combines penta-magnetic tunnel junction (penta-MTJ) technology with hybrid transmission gate logic (HTGL). By minimizing static power dissipation and ensuring faster gate operations, the HTGL approach improves switching performance, while the penta-MTJ uses several magnetic states to enable improved memory storage. Standard CMOS process technology was used for the circuit’s design and simulation. Power consumption, switching delay, and reliability were among the performance parameters examined. Power consumption was found to be 38% lower in the penta-MTJ-HTGL circuit that was proposed as opposed to conventional CMOS technology. Compared to traditional MTJ-based systems, our 25% reduction in switching delay (4.2 ns) is a huge improvement. The suggested circuit was also shown to be robust in reliability testing, which demonstrated a data retention accuracy of 98% under different operating situations. Combining Hybrid Transmission Gate Logic with Penta-Magnetic Tunnel Junctions offers a potential answer for applications requiring minimal power at high speeds. The findings point to considerable gains in efficiency and speed of switching, which might find utility in logic circuits, next-generation memory devices, and new nanoelectronics uses. This study paves the way for more investigation into the integration of magnetic and logic components in high-performance circuits for use in next-generation computer systems.
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Manjula, Jayamma, and Subbaiah Boya Rama. "Design of High Performance Repeater for High Speed VLSI Interconnects." Journal of Advancement in Communication System 5, no. 3 (2022): 1–8. https://doi.org/10.5281/zenodo.7385580.

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<em>Process variation and circuit aging in the nanometer regime result in remarkable, unneeded, and ambiguous characteristics of circuit systems. The designers continue to face a significant challenge as a result of these effects on system design. Even though the guard band design can offer some protection from these effects, it also causes more design problems. As a result, circuits need to be given the ability to tune themselves, compensating for variations with a proposed adaptive nature. Supply voltage adaptation for variation resilience in VLSI interconnects is the goal of this work. The primary concept is a boostable repeater design that can temporarily and independently raise its internal voltage rail to speed up switching. Variations can be compensated by turning on or off the boosting. Fine-grained voltage adaptation is made possible by the boostable repeater design without the need for a separate power grid or stand-alone voltage regulators. Since huge repeaters are used in chip designs and interconnects are widely acknowledged as a bottleneck in chip performance, boostable repeaters have numerous opportunities to enhance system robustness.</em>
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ALARCÓN, EDUARD, GERARD VILLAR, and ALBERTO POVEDA. "CMOS INTEGRATED CIRCUIT CONTROLLERS FOR SWITCHING POWER CONVERTERS." Journal of Circuits, Systems and Computers 13, no. 04 (2004): 789–811. http://dx.doi.org/10.1142/s0218126604001714.

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Two case examples of high-speed CMOS microelectronic implementations of high-performance controllers for switching power converters are presented. The design and implementation of a current-programmed controller and a general-purpose feedforward one-cycle controller are described. The integrated circuit controllers attain high-performance by means of using current-mode analog signal processing, hence allowing high switching frequencies that extend the operation margin compared to previous designs. Global layout-extracted transistor-level simulation results for 0.8 μm and 0.35 μm standard CMOS technologies confirm both the correct operation of the circuits in terms of bandwidth as well as their functionality for the control of switching power converters. The circuits may be used either as standalone IC controllers or as controller circuits that are technology-compatible with on-chip switching power converters and on-chip loads for future powered systems-on-chip.
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Kazansky, N. A., and P. I. Lysyuk. "Methods of Analysis and Synthesis of Switching Circuits of Photonic Switches Using the Example of Spanke Architecture." World of Transport and Transportation 19, no. 5 (2022): 17–22. http://dx.doi.org/10.30932/1992-3252-2021-19-5-2.

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The development of high-speed rail requires introduction of new telecommunications technology implemented in an integrated digital technological communication system (IDTC). Features of building such systems comprise provision of switching optical data channels using photonic switches (PS). Switching processes in PS occur at the photon (optical) level. A feature of construction of PS is the use of multi-tier topologies, performed using binary switches (BSs). BS is the simplest switching element with the number of input/output ports equal to one or two. The concepts for constructing PS are based on the technology of the well-known switching circuits using BS whose architecture and topology are assigned the names of their creators (Benes, Spanke, Spanke–Benes architecture, Clos network, etc. With an increase in PS capacity, its structure becomes more complicated: the number of links in the switching circuit, the total number of BSs, the length of switching routes, and the redundancy factor increase. In addition, it becomes necessary to calculate the probabilities of the occurrence of internal blocking in switching circuits, speed of switching optical signals, the value of attenuation of the optical signal in PS circuit, etc. The objective of the study was to develop methods of analysis and synthesis of switching circuits of photonic switches using the example of a circuit of Spanke architecture of a given capacity with calculation of the probabilities of occurrence of internal blocking. The authors used general scientific and engineering methods of mathematical modelling, probability and queuing theory and an example of an algorithm for analysing the structures of Spanke topology with capacities from 4×4 to 128×128. Their topological and probabilistic characteristics (the number of links in the switching circuit, the total number of BS, the length of the switching routes, the probability of occurrence of internal blocking in PS circuits) have been determined. The results of calsulations are presented in the form of tables. The developed methods of analysis and synthesis can be used in the study of similar switching circuits built using BS.
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Shan, Yuxuan. "Research on high frequency reliability of silicon carbide MOSFETs resonant circuit." Journal of Physics: Conference Series 2634, no. 1 (2023): 012021. http://dx.doi.org/10.1088/1742-6596/2634/1/012021.

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Abstract Silicon carbide MOSFETs could process high power at high switching frequency with little loss. The driving circuit produce loss, which is proportional to the switching frequency. Resonant gate driving circuit, which has a inductor to produce resonant with a parasitic capacitor to recycle energy is used to reduce energy loss in the high frequency situation. Firstly, this paper introduces the simplest resonant gate driver. After that, three different types of resonant gate driver with their similar versions are introduced. In these optimized circuits, the third resonant gate driver (RGD3) is the simplest to control and has the lower energy loss, but the second resonant gate driver (RGD2) has faster switching speed and the first resonant gate driver (RGD1) provides more loops to energy feedback.
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Ishikawa, Katsumi, Kaoru Katoh, Ayumu Hatanaka, Kazutoshi Ogawa, Haruka Shimizu, and Natsuki Yokoyama. "High-Speed Drive Circuit with Separate Source Terminal for 600 V / 40 A Normally-off SiC-JFET." Materials Science Forum 740-742 (January 2013): 1060–64. http://dx.doi.org/10.4028/www.scientific.net/msf.740-742.1060.

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When using JFETs with a threshold voltage lower than 2 V in a power supply system or inverter system, a high-speed drive circuit capable of precisely controlling the gate current and a mounting method are important to reduce the switching loss. In this paper, a drive circuit of a normally-off SiC-JFET with a separate source terminal is proposed and the effects are evaluated. By dividing the common source inductance and applying the speed-up capacitor, the turn-on time and turn-on energy losses can be decreased by 40% and 60%, respectively. A speed-up capacitor larger than 100 nF greatly decreases the rising time (tr) and turn-on energy losses. By applying the developed normally-off SiC-JFETs and proposed gate driver to PFC circuits and DC/DC circuits, a highly efficient power supply will be achieved.
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R., Palanisamy, and Vijayakumar K. "Switching pulse generation for DC-DC boost converter using xilinx-ISE with FPGA processor." TELKOMNIKA Telecommunication, Computing, Electronics and Control 8, no. 2 (2019): 81–85. https://doi.org/10.11591/ijres.v8.i2.pp81-85.

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This paper explains steps to generate switching pulse using XilinxISE with FPGA processor for DC-DC boost converter. The switching pulse generated using Very high speed integrated circuit Hardware Description Language (VHDL) with Xilinx-ISE. VHDL is a programming language, which is used to model and design any complex circuits in a dynamic environment. This paper gives the course of action for generation of switching pulses for DC-DC boost converter using Xilinx-ISE and matlabsimulink. The switching pulse generated using Xilinx-ISE with FPGA-Spartan 6 processor compared with switching pulse generated using matlab.
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Arai, Takamasa, Ryo Takeda, Tom Neville, and Mike Hawes. "Study of Parasitic Effects for Accurate Dynamic Characterization of SiC MOSFEFTs: Comparison between Experimental Measurements and Numerical Simulations." Solid State Phenomena 360 (August 23, 2024): 103–10. http://dx.doi.org/10.4028/p-4ygp53.

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The high-speed switching capabilities of wide bandgap (WBG) power devices have posed challenges in accurately evaluating their dynamic characteristics, primarily due to the increasing influence of parasitic components in switching test circuits. To address this issue, we investigated the impact of parasitics by conducting dynamic tests and schematic-level transient simulation on a half-bridge switching circuit incorporating SiC MOSFETs. This comparative analysis identified specific parasitic components responsible for undesirable behaviors such as spikes and ringing in the switching waveform. Our findings provide insights into which parasitic components in the test circuit are critical for the accurate dynamic characterization of SiC MOSFETs.
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LIU, YUYU, JINGUO QUAN, HUAZHONG YANG, and HUI WANG. "MOS CURRENT MODE LOGIC CIRCUITS: DESIGN CONSIDERATION IN HIGH-SPEED LOW-POWER APPLICATIONS AND ITS FUTURE TREND, A TUTORIAL." International Journal of High Speed Electronics and Systems 15, no. 03 (2005): 599–614. http://dx.doi.org/10.1142/s0129156405003351.

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In this paper, a logic style that is becoming increasingly popular is presented, which is called MOS Current Mode Logic (MCML). MCML is a novel and useful logic style for high-speed, low-power and mixed-signal applications. Its high-speed switching, low supply voltage and reduced output voltage swing contribute to its high performance, low power dissipation, and low noise features. MCML circuits are compared to several other logic styles, such as conventional static CMOS, dynamic logic, and traditional emitter coupled logic (ECL) in terms of power, delay and common mode noise immunity. MCML circuits seem to be very promising in high-speed, low-power and mixed-signal digital circuit applications, such as portable electronic devices, gigahertz microprocessors, and optical transceivers.
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Palanisamy, R., C. S. Boopathi, K. Selvakumar, and K. Vijayakumar. "Switching pulse generation for DC-DC boost converter using Xilinx-ISE with FPGA processor." International Journal of Electrical and Computer Engineering (IJECE) 10, no. 2 (2020): 1722. http://dx.doi.org/10.11591/ijece.v10i2.pp1722-1727.

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This paper explains steps to generate switching pulse using Xilinx-ISE with FPGA processor for DC-DC boost converter. The switching pulse generated using Very high speed integrated circuit Hardware Description Language (VHDL) with Xilinx-ISE. VHDL is a programming language, which is used to model and design any complex circuits in a dynamic environment. This paper gives the course of action for generation of switching pulses for dc-dc boost converter using Xilinx-ISE and matlab simulink. The switching pulse generated using Xilinx-ISE with FPGA-Spartan 6 processor compared with switching pulse generated using matlab.
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Dissertations / Theses on the topic "High speed switching circuits"

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Cao, Qi. "Buffer and scheduler design in high-speed switching fabric /." View abstract or full-text, 2005. http://library.ust.hk/cgi/db/thesis.pl?ELEC%202005%20CAO.

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Kamgaing, Telesphor. "High-impedance electromagnetic surfaces for mitigation of switching noise in high-speed circuits." College Park, Md. : University of Maryland, 2003. http://hdl.handle.net/1903/286.

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Thesis (Ph. D.) -- University of Maryland, College Park, 2003.<br>Thesis research directed by: Electrical Engineering. Title from t.p. of PDF. Includes bibliographical references. Published by UMI Dissertation Services, Ann Arbor, Mich. Also available in paper.
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Qin, Jie. "Planar electromagnetic bandgap structure for wideband switching noise mitigation in high speed circuits." College Park, Md. : University of Maryland, 2006. http://hdl.handle.net/1903/4169.

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Thesis (Ph. D.) -- University of Maryland, College Park, 2006.<br>Thesis research directed by: Electrical Engineering. Title from t.p. of PDF. Includes bibliographical references. Published by UMI Dissertation Services, Ann Arbor, Mich. Also available in paper.
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Hung, Chun-Kit. "VLSI design of high-speed and scalable schedulers for input-queued crossbar switches /." View Abstract or Full-Text, 2003. http://library.ust.hk/cgi/db/thesis.pl?ELEC%202003%20HUNG.

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Thesis (M. Phil.)--Hong Kong University of Science and Technology, 2003.<br>Includes bibliographical references (leaves 82-84). Also available in electronic version. Access restricted to campus users.
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Aljada, Muhsen. "Design and analysis of high-speed optical correlators for multiwavelength optical header recognition and optical code division multiple access." Thesis, Edith Cowan University, Research Online, Perth, Western Australia, 2007. https://ro.ecu.edu.au/theses/310.

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Optical correlators arc attractive elements for packet-switched optical networks because they enable the headers of high-speed optical packets to be processed and recognised "on-the-fly", thus, switching the packets to different destinations without the need for optical-to-electrical and electrical-to-optical conversions. In the first part of the thesis, three novel all-optical header recognition structures based on time-domain optical correlation arc proposed and experimentally demonstrated. The novel optical correlator structures for header recognition, are based on the use of Opto-VLSI processors, fibre Bragg gratings, and arrayed waveguide gratings, respectively, and are demonstrated at IOGb/s by generating auto-correlation functions of high peaks whenever the optical header bit pattern matches a predetermined pattern in the lookup table, while for other bit patterns, only low intensity (below a threshold level) cross-correlation functions are produced. As a result, these structures eliminate the bottleneck that exists in the conventional ortical packet switching networks, thus greatly enhancing the performance of such networks.
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Perrin, Rémi. "Characterization and design of high-switching speed capability of GaN power devices in a 3-phase inverter." Thesis, Lyon, 2017. http://www.theses.fr/2017LYSEI001/document.

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Le projet industriel français MEGaN vise le développement de module de puissance à base de compostant HEMT en GaN. Une des application industrielle concerne l’aéronautique avec une forte contrainte en isolation galvanique (&gt;100 kV/s) et en température ambiante (200°C). Le travail de thèse a été concentré sur une brique module de puissance (bras d’onduleur 650 V 30 A). L’objectif est d’atteindre un prototype de facteur de forme peu épais, 30 cm2 et embarquant l’ensemble des fonctions driver, alimentation de driver, la capacité de bus et capteur de courant phase. Cet objectif implique un fort rendement énergétique, et le respect de l’isolation galvanique alors que la contrainte en surface est forte. Le manuscrit, outre l’état de l’art relatif au module de puissance et notamment celui à base de transistor GaN HEMT, aborde une solution d’isolation de signaux de commande à base de micro-transformateur. Des prototypes de micro-transformateur ont été caractérisés et vieillis pendant 3000 H pour évaluer la robustesse de la solution. Les travaux ont contribué à la caractérisation de plusieurs composants GaN afin de mûrir des modèles pour la simulation circuit de topologie de convertisseur. Au sein du travail collaboratif MEGaN, notre contribution ne concernait pas la conception du circuit intégré (driver de grille), tout en ayant participé à la validation des spécifications, mais une stratégie d’alimentation du driver de grille. Une première proposition d’alimentation isolée pour le driver de grille a privilégié l’utilisation de composants GaN basse-tension. La topologie Flyback résonante avec clamp permet de tirer le meilleur parti de ces composants GaN mais pose la contrainte du transformateur de puissance. Plusieurs technologies pour la réalisation du transformateur ont été validées expérimentalement et notamment une proposition originale enfouissement du composant magnétique au sein d’un substrat polymère haute-température. En particulier, un procédé de fabrication peu onéreux permet d’obtenir un dispositif fiable (1000 H de cyclage entre - 55 ; + 200°C), avec un rendement intrinsèque de 88 % pour 2 W transférés. La capacité parasite d’isolation est réduite par rapport aux prototypes précédent. Deux prototypes d’alimentations à forte intégration utilisent soit les transistors GaN basse tension (2.4 MHz, 2 W, 74 %, 6 cm2), soit un circuit intégré dédié en technologie CMOS SOI, conçu pour l’application (1.2 MHz, 2 W, 77 %, 8.5 cm2). Le manuscrit propose par la suite une solution intégrable de mesure de courant de phase du bras de pont, basé sur une magnétorésistance. La comparaison expérimentale vis à vis d’une solution à résistance de shunt. Enfin, deux prototypes de convertisseur sont décrits, dont une a pu faire l’objet d’une validation expérimentale démontrant des pertes en commutation réduites<br>The french industrial project MEGaN targets the development of power module based on GaN HEMT transistors. One of the industrial applications is the aeronautics field with a high-constraint on the galvanic isolation (&gt;100 kV/s) and ambient temperature (200°C). The intent of this work is the power module block (3 phases inverter 650 V 30 A). The goal is to obtain a small footprint module, 30 cm2, with necessary functions such as gate driver, gate driver power supply, bulk capacitor and current phase sensor. This goal implies high efficiency as well as respect of the constraint of galvanic isolation with an optimized volume. This dissertation, besides the state of the art of power modules and especially the GaN HEMT ones, addressed a control signal isolation solution based on coreless transformers. Different prototypes based on coreless transformers were characterized and verified over 3000 hours in order to evaluate their robustness. The different studies realized the characterization of the different market available GaN HEMTs in order to mature a circuit simulation model for various converter topologies. In the collaborative work of the project, our contribution did not focus on the gate driver chip design even if experimental evaluation work was made, but a gate driver power supply strategy. The first gate driver isolated power supply design proposition focused on the low-voltage GaN HEMT conversion. The active-clamp Flyback topology allows to have the best trade-off between the GaN transistors and the isolation constraint of the transformer. Different transformer topolgies were experimentally performed and a novel PCB embedded transformer process was proposed with high-temperature capability. A lamination process was proposed for its cost-efficiency and for the reliability of the prototype (1000 H cycling test between - 55; + 200°C), with 88 % intrinsic efficiency. However, the transformer isolation capacitance was drastically reduced compared to the previous prototypes. 2 high-integrated gate driver power supply prototypes were designed with: GaN transistors (2.4 MHz, 2 W, 74 %, 6 cm2), and with a CMOS SOI dedicated chip (1.2 MHz, 2 W, 77 %, 8.5 cm2). In the last chapter, this dissertation presents an easily integrated solution for a phase current sensor based on the magnetoresistance component. The comparison between shunt resistor and magnetoresistance is experimentally performed. Finally, two inverter prototypes are presented, with one multi-level gate driver dedicated for GaN HEMT showing small switching loss performance
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Mejzlík, Tomáš. "Spínací mechanismus ve výkonovém jističi." Master's thesis, Vysoké učení technické v Brně. Fakulta elektrotechniky a komunikačních technologií, 2015. http://www.nusl.cz/ntk/nusl-220071.

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This paper deals with mechanical switch in circuit breaker designed for low voltage. The goal of this thesis was to analyze switching mechanism both theoretically and practically. Theoretical analysis consist of study different types of switching mechanism and analytical calculations of acceleration speed and trajectory. Practical analysis has been made taking a video with high speed camera of real switching mechanism of a circuit breaker and software analysis of the data. The next part of a thesis is about 3D modeling, animating and simulating of a switchgear switching mechanism.
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Li, He. "High Switching Frequency High Switching Speed Inverter Design." The Ohio State University, 2018. http://rave.ohiolink.edu/etdc/view?acc_num=osu1524240971896427.

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Mneimneh, Saadeddine S. "Algorithmic aspects of high speed switching." Thesis, Massachusetts Institute of Technology, 2002. http://hdl.handle.net/1721.1/8373.

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Thesis (Ph.D.)--Massachusetts Institute of Technology, Dept. of Civil and Environmental Engineering, 2002.<br>Includes bibliographical references (p. 145-148).<br>A major drawback of the traditional output queuing technique is that it requires a switch speedup of N, where N is the size of the switch. This dependence on N makes the switch non-scalable at high speeds. Input queuing has been suggested instead. The introduction of input queuing creates the necessity for developing switching algorithms to decide which packets to keep waiting at the input, and which packets to forward across the switch. In this thesis, we address various algorithmic aspects of switching. We prove in this thesis, that many of the practical switching algorithms still require a speedup to achieve even a weak notion of throughput. We propose two switching algorithms that belong to a family to which we refer in this thesis as priority switching. These two algorithms overcome some of the disadvantages in existing priority switching algorithms, such as the excessive amount of state information that needs to be maintained. We also develop a practical algorithm that belongs to a family to which we refer in this thesis as iterative switching. This algorithm achieves high throughput in practice and offers the advantage of not requiring more than one iteration, unlike other existing iterative switching algorithms which require multiple iterations to achieve high throughput. Finally, we address the issue of using switches in parallel to accommodate for the need of speedup. We study two settings of parallel switches, one with standard packet switching, and one with flow scheduling, in which flows cannot be split across multiple switches.<br>by Saadeddine Mneimneh.<br>Ph.D.
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Saadallah, Nisrine. "High-speed low-power asynchronous circuits." Thesis, McGill University, 2004. http://digitool.Library.McGill.CA:80/R/?func=dbin-jump-full&object_id=80140.

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This thesis presents several design experiments for high-performance power-efficient asynchronous circuits.<br>In Chapter two we present a new asynchronous pipeline logic family with improved latency and throughput compared to several other asynchronous pipeline circuits. The channels between pipeline stages use data encoding and a small set of minimum-delay timing constraints that permit modular design with few dependencies on technology and layout. We develop circuit blocks that implement linear pipelines as well as forking, joining and data-dependent decisions. An implementation in 0.18mum CMOS exhibits a latency of 56ps per pipeline stage and throughput of 4.8-giga data item per second (GDI/s) in Hspice simulation.<br>We also present the design of a low-control-overhead asynchronous microprocessor integrated with a high-speed sampling FIFO. This is an experiment in exploring the benefits of asynchronous design in high-speed embedded DSP applications. It reports on the design approach, implementation and performance, including a comparison with the synchronous version of the microprocessor.
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Books on the topic "High speed switching circuits"

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Gharavi, Sam, and Babak Heydari. Ultra High-Speed CMOS Circuits. Springer New York, 2012. http://dx.doi.org/10.1007/978-1-4614-0305-0.

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J, Herbst L. High speed digital electronics. Prentice Hall International, 1989.

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Pozhela, Juras. Physics of high-speed transitors. Plenum Press, 1993.

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Goel, Ashok K. High-speed VLSI interconnections. 2nd ed. Wiley Interscience, 2008.

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Michael, Shur, and Maki Paul A. 1956-, eds. Advanced high speed devices. World Scientific Publishing Co., 2010.

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Pozhela, I͡Uras Karlovich. Physics of high-speed transistors. Plenum Press, 1993.

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Keh-Chung, Wang, ed. High-speed circuits for lightwave communications. World Scientific, 1999.

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GaAs IC Symposium (16th 1994 Philadelphia, PA). Special issue on high speed circuits. Institute of Electrical and Electronics Engineers, 1995.

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GaAs IC Symposium (16th 1994 Philadelphia, PA). Special issue on high speed circuits. Institute of Electrical and Electronics Engineers, 1996.

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1941-, Ikoma Toshiaki, ed. Very high speed integrated circuits: Heterostructure. Academic Press, 1990.

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Book chapters on the topic "High speed switching circuits"

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Peng, Han, Zemin Liu, and Mona Mostafa Hella. "Silicon and III–V Technologies for High Switching Speed Monolithic DC–DC Power Converter ICs." In Power Management Integrated Circuits. CRC Press, 2017. http://dx.doi.org/10.1201/9781315373362-8.

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Danielraj, A., R. Saravana Kumar, Sanjoy Deb, and R. Balakrishnan. "Beyond SiliconIII-V Material-Based Lateral and Vertical HEMTs for High-Power and High-Speed Switching Applications." In Circuit Design for Modern Applications. CRC Press, 2025. https://doi.org/10.1201/9781003483052-18.

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Peyghambarian, N., H. M. Gibbs, D. Hulin, A. Antonetti, A. Migus, and A. Mysyrowicz. "Overview of Optical Switching and Bistability." In High-Speed Electronics. Springer Berlin Heidelberg, 1986. http://dx.doi.org/10.1007/978-3-642-82979-6_40.

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Chowdhury, Dhiman Deb. "Basics of LAN Switching." In High Speed LAN Technology Handbook. Springer Berlin Heidelberg, 2000. http://dx.doi.org/10.1007/978-3-662-04045-4_2.

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Kohzu, Hideaki, and Tsutomu Noguchi. "High-Speed Analog Integrated Circuits." In Compound and Josephson High-Speed Devices. Springer US, 1993. http://dx.doi.org/10.1007/978-1-4757-9774-9_3.

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Doyle, W. D., S. M. Stinnett, and V. V. Konovalov. "High Speed Switching in Recording Media." In Magnetic Storage Systems Beyond 2000. Springer Netherlands, 2001. http://dx.doi.org/10.1007/978-94-010-0624-8_39.

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Zhu, Qing K. "Design Methodology for Domino Circuits." In High-Speed Clock Network Design. Springer US, 2003. http://dx.doi.org/10.1007/978-1-4757-3705-9_4.

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Kamdem, J., M. Henry, J. P. Klein, F. Alexandre, and M. Gloanec. "Cryogenic GaAs Integrated Circuits Using a Lightly Doped GaAs FET Structure." In High-Speed Electronics. Springer Berlin Heidelberg, 1986. http://dx.doi.org/10.1007/978-3-642-82979-6_35.

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Hammond, R. B., N. G. Paulter, and A. J. Gibbs. "GaAs Photoconductors to Characterize Picosecond Response in GaAs Integrated Devices and Circuits." In High-Speed Electronics. Springer Berlin Heidelberg, 1986. http://dx.doi.org/10.1007/978-3-642-82979-6_44.

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Donaldson, W. R. "High Speed, High Repetition Rate, High Voltage Photoconductive Switching." In Picosecond Electronics and Optoelectronics II. Springer Berlin Heidelberg, 1987. http://dx.doi.org/10.1007/978-3-642-72970-6_52.

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Conference papers on the topic "High speed switching circuits"

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Renaud, M., J. A. Cavaillès, J. F. Vinchant, et al. "Monolithically Integrated InP Photonic Circuits for Optical processing in Very High Speed Optical Loop." In Photonic Switching. Optica Publishing Group, 1991. http://dx.doi.org/10.1364/phs.1991.tha3.

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Optical rings have found many applications in high speed Local Area Networks (LANs). Generally, such rings arc formed by point to point optical transmission links, implying optical to electrical conversions at each node. These repeated con versions affect the reliability, generate jitter, increase the susceptibility to electromagnetic interferences and limit the bit rate to that allowed by the node processing electronics.
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Bansode, Manisha R., Rahul Dahatonde, and Surendra S. Rathod. "Simultaneous Switching Noise Reduction in High Speed Circuits." In 2021 International Conference on Communication information and Computing Technology (ICCICT). IEEE, 2021. http://dx.doi.org/10.1109/iccict50803.2021.9510097.

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Veselka, J. J., D. A. Herr, T. O. Murphy, L. L. Buhl та S. K. Korotky. "Integrated High-Speed Ti:LiNbO3 Δβ-Reversal Switching Circuits". У Integrated and Guided Wave Optics. Optica Publishing Group, 1988. http://dx.doi.org/10.1364/igwo.1988.wd2.

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Substantial progress in the level of integration of optical switches has been made at several laboratories, with Ti:LiNbO3 crossbar arrays as large as 8×8 on a single chip having been demonstrated [1]. Typical operating speeds of the crosspoints of these switches are ~100 MHz. For some applications, such as optical time-division multiplexing [2], crosspoints operating at microwave frequencies are desirable. One promising approach to realize crosspoints for gigahertz rates is a traveling-wave Δβ-reversal directional coupler switch [3]. In this paper we report optical switches that consist of several of these high-speed crosspoints integrated on a single substrate. Critical to the performance of these integrated devices are the coupler and inter-coupler crosstalk levels. We present measurements of both up to multi-gigahertz frequencies.
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Keeler, G. A., D. K. Serkland, M. E. Overberg, et al. "High-speed reflective S-SEEDs for photonic logic circuits." In 2009 International Conference on Photonics in Switching (PS). IEEE, 2009. http://dx.doi.org/10.1109/ps.2009.5307765.

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Himeno, Akira, and Yoshihiro Shimazu. "All-Optical Control Circuits for Photonic Switching." In Photonic Switching. Optica Publishing Group, 1991. http://dx.doi.org/10.1364/phs.1991.thc1.

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Future communication services will require intelligent and high-speed control circuits as well as broadband information switching equipment. For the switching equipment, optical switches, such as space-, time-, and frequency division switches, are attractive because of their inherently wide bandwidth and immunity to induction. For the control circuits, required functions fall into two categories, high-speed simple functions and low-speed intelligent functions. Optical new technologies will be demanded for the former functions, though electronics will play an important role for the latter as it does today.
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Erman, Marko. "InP optoelectronic devices and photonic integrated circuits for high-speed packet switching." In Topical Meeting on Photonic Switching, edited by Andrey M. Goncharenko, Fedor V. Karpushko, George V. Sinitsyn, and Sergey P. Apanasevich. SPIE, 1993. http://dx.doi.org/10.1117/12.147922.

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Krishnamoorthy, Ashok V. "Highly parallel high-speed transceivers and switching circuits with VCSELs." In Photonics Fabrication Europe, edited by Hugo Thienpont and Jan Danckaert. SPIE, 2003. http://dx.doi.org/10.1117/12.476222.

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Nakagami, Takakiyo. "Optical Fiber Interconnection Links for High-Speed Switching and Computer Systems." In Photonics in Switching. Optica Publishing Group, 1993. http://dx.doi.org/10.1364/ps.1993.ptua.1.

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Among the various optical interconnection technologies being researched today, optical fiber interconnection is one of the most practical for near-term applications. [1] It is very effective for solving the recent problem of data transfer bottlenecks in advanced switching systems and computers. [2]-[4] The merits of optical transmission, including wide bandwidth, immunity to electromagnetic interference, ground-isolation capability, and small cable size, also favor in such short-distance applications. Since their circuit boards and units usually have parallel I/O interfaces, multi-fiber parallel transmission has the advantages of compatibility to the conventional system designs as well as the capacity for high overall transmission throughputs. This paper discusses the technical issues associated with the optical fiber interconnection links mainly focusing on parallel links and touching upon recent developments in Japan. [5]-[12]
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Nakagami, Takakiyo. "Optical Fiber Interconnection Links for High-Speed Switching and Computer Systems." In Photonics in Switching. Optica Publishing Group, 1993. http://dx.doi.org/10.1364/ps.1993.ois144.

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Among the various optical interconnection technologies being researched today, optical fiber interconnection is one of the most practical for near-term applications. [1] It is very effective for solving the recent problem of data transfer bottlenecks in advanced switching systems and computers. [2]-[4] The merits of optical transmission, including wide bandwidth, immunity to electromagnetic interference, ground-isolation capability, and small cable size, also favor in such short-distance applications. Since their circuit boards and units usually have parallel I/O interfaces, multi-fiber parallel transmission has the advantages of compatibility to the conventional system designs as well as the capacity for high overall transmission throughputs. This paper discusses the technical issues associated with the optical fiber interconnection links mainly focusing on parallel links and touching upon recent developments in Japan.
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Lu, Y. C., Julian Cheng, J. C. Zolper, and J. Klem. "Multi-functional Surface-Emitting Laser-Based Integrated Photonic/Optoelectronic Switch For Parallel High-Speed Optical Interconnects." In Photonics in Switching. Optica Publishing Group, 1995. http://dx.doi.org/10.1364/ps.1995.pfb4.

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The monolithic integration of vertical-cavity surface-emitting lasers (VCSELs) with active electronic devices combines the optical source array and its driver circuits into a single IC technology, which is usefill for parallel high-speed optical interconnects. Another motive for the integration of VCSELs with high speed electronics is to provide an optical switching network with a simple optoelectronic interface that allows individual electronic computer processors to communicate with each other through parallel optical channels. A dynamically reconfigurable optical switching network1-2 can simultaneously route optical data between many different electronic processors as they perform parallel processing sequences using shared resources. Each switch of the network must provide an optical link to all the other nodes, as well as an optical ⟺ electrical interface to an electronic processor. Each switch must thus perform both the optical and optoelectronic switching functions in order to convert data between various combinations of electrical and optical input/output (I/O) formats.
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Reports on the topic "High speed switching circuits"

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Citrin, David S. High-Speed All-Optical Switching. Defense Technical Information Center, 2000. http://dx.doi.org/10.21236/ada373458.

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Meyer, Robert, and David Perreault. Neural Networks for High Speed Communication Switching. Defense Technical Information Center, 1999. http://dx.doi.org/10.21236/ada359959.

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Marsland, Robert A., All Mirabedini, and Dan Botez. Circuits and Devices for High-Speed Instrumentation. Defense Technical Information Center, 1996. http://dx.doi.org/10.21236/ada309709.

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Spahn, Olga Blum, Steven Brewer, Roy H. Olsson, et al. High-speed, sub-pull-in voltage MEMS switching. Office of Scientific and Technical Information (OSTI), 2008. http://dx.doi.org/10.2172/928822.

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Nyquist, Dennis P. Electromagnetic Interactions in High-Speed Integrated Electronic Circuits. Defense Technical Information Center, 1989. http://dx.doi.org/10.21236/ada206882.

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Englund, Dirk, Karl Berggren, Jeffrey Shapiro, Chee W. Wong, Franco Wong, and Gregory Wornell. High-Speed Quantum Key Distribution Using Photonic Integrated Circuits. Defense Technical Information Center, 2013. http://dx.doi.org/10.21236/ada606948.

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Waks, Edo, Sangbok Lee, Nader Engheta, and Benjamin Shapiro. Metatronics for Ultra-High-Speed Low-Power Nano-Circuits. Defense Technical Information Center, 2011. http://dx.doi.org/10.21236/ada585948.

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Lee, H. W. H., and R. N. Shelton. Investigation of fullerenes for high speed low latency, photonic switching. Office of Scientific and Technical Information (OSTI), 1997. http://dx.doi.org/10.2172/572758.

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Marsland, Robert A. (SBIR 95-11) Circuits and Devices for High-Speed Instrumentation. Defense Technical Information Center, 1998. http://dx.doi.org/10.21236/ada360051.

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Coldren, Larry A. Efficient, High-Speed, Monolithic Optoelectronic Circuits Using Quantum- Confined Structures. Defense Technical Information Center, 1991. http://dx.doi.org/10.21236/ada239841.

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