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Journal articles on the topic 'High speed switching circuits'

Author: Grafiati

Published: 2 June 2025

Last updated: 31 July 2025

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1

Shanmuga Raju, S., and B. Paulchamy. "Development and Optimization of a Penta-Magnetic Tunnel Junction Circuit Integrated with Hybrid Transmission Gate Logic for Efficient Low-Power and High-Speed Performance." Journal of Nanoelectronics and Optoelectronics 19, no. 12 (2024): 1347–59. https://doi.org/10.1166/jno.2024.3701.

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In response to the ever-increasing need for fast, low-power circuits, conventional CMOS-based designs are becoming increasingly unsuitable, particularly for use in logic circuits and memory devices. The multi-state behavior of Magnetic Tunnel Junction (MTJ) circuits has attracted attention because of their potential in non-volatile memory and logic operations. To achieve the targeted reductions in power consumption and increases in switching speed, it is essential to integrate these circuits with performance-optimizing logic gates. To overcome the drawbacks of traditional circuits, we present

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Manjula, Jayamma, and Subbaiah Boya Rama. "Design of High Performance Repeater for High Speed VLSI Interconnects." Journal of Advancement in Communication System 5, no. 3 (2022): 1–8. https://doi.org/10.5281/zenodo.7385580.

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<em>Process variation and circuit aging in the nanometer regime result in remarkable, unneeded, and ambiguous characteristics of circuit systems. The designers continue to face a significant challenge as a result of these effects on system design. Even though the guard band design can offer some protection from these effects, it also causes more design problems. As a result, circuits need to be given the ability to tune themselves, compensating for variations with a proposed adaptive nature. Supply voltage adaptation for variation resilience in VLSI interconnects is the goal of this work. The

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ALARCÓN, EDUARD, GERARD VILLAR, and ALBERTO POVEDA. "CMOS INTEGRATED CIRCUIT CONTROLLERS FOR SWITCHING POWER CONVERTERS." Journal of Circuits, Systems and Computers 13, no. 04 (2004): 789–811. http://dx.doi.org/10.1142/s0218126604001714.

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Two case examples of high-speed CMOS microelectronic implementations of high-performance controllers for switching power converters are presented. The design and implementation of a current-programmed controller and a general-purpose feedforward one-cycle controller are described. The integrated circuit controllers attain high-performance by means of using current-mode analog signal processing, hence allowing high switching frequencies that extend the operation margin compared to previous designs. Global layout-extracted transistor-level simulation results for 0.8 μm and 0.35 μm standard CMOS

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4

Kazansky, N. A., and P. I. Lysyuk. "Methods of Analysis and Synthesis of Switching Circuits of Photonic Switches Using the Example of Spanke Architecture." World of Transport and Transportation 19, no. 5 (2022): 17–22. http://dx.doi.org/10.30932/1992-3252-2021-19-5-2.

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The development of high-speed rail requires introduction of new telecommunications technology implemented in an integrated digital technological communication system (IDTC). Features of building such systems comprise provision of switching optical data channels using photonic switches (PS). Switching processes in PS occur at the photon (optical) level. A feature of construction of PS is the use of multi-tier topologies, performed using binary switches (BSs). BS is the simplest switching element with the number of input/output ports equal to one or two. The concepts for constructing PS are base

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Shan, Yuxuan. "Research on high frequency reliability of silicon carbide MOSFETs resonant circuit." Journal of Physics: Conference Series 2634, no. 1 (2023): 012021. http://dx.doi.org/10.1088/1742-6596/2634/1/012021.

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Abstract Silicon carbide MOSFETs could process high power at high switching frequency with little loss. The driving circuit produce loss, which is proportional to the switching frequency. Resonant gate driving circuit, which has a inductor to produce resonant with a parasitic capacitor to recycle energy is used to reduce energy loss in the high frequency situation. Firstly, this paper introduces the simplest resonant gate driver. After that, three different types of resonant gate driver with their similar versions are introduced. In these optimized circuits, the third resonant gate driver (RGD

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R., Palanisamy, and Vijayakumar K. "Switching pulse generation for DC-DC boost converter using xilinx-ISE with FPGA processor." TELKOMNIKA Telecommunication, Computing, Electronics and Control 8, no. 2 (2019): 81–85. https://doi.org/10.11591/ijres.v8.i2.pp81-85.

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This paper explains steps to generate switching pulse using XilinxISE with FPGA processor for DC-DC boost converter. The switching pulse generated using Very high speed integrated circuit Hardware Description Language (VHDL) with Xilinx-ISE. VHDL is a programming language, which is used to model and design any complex circuits in a dynamic environment. This paper gives the course of action for generation of switching pulses for DC-DC boost converter using Xilinx-ISE and matlabsimulink. The switching pulse generated using Xilinx-ISE with FPGA-Spartan 6 processor compared with switching pulse ge

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Arai, Takamasa, Ryo Takeda, Tom Neville, and Mike Hawes. "Study of Parasitic Effects for Accurate Dynamic Characterization of SiC MOSFEFTs: Comparison between Experimental Measurements and Numerical Simulations." Solid State Phenomena 360 (August 23, 2024): 103–10. http://dx.doi.org/10.4028/p-4ygp53.

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The high-speed switching capabilities of wide bandgap (WBG) power devices have posed challenges in accurately evaluating their dynamic characteristics, primarily due to the increasing influence of parasitic components in switching test circuits. To address this issue, we investigated the impact of parasitics by conducting dynamic tests and schematic-level transient simulation on a half-bridge switching circuit incorporating SiC MOSFETs. This comparative analysis identified specific parasitic components responsible for undesirable behaviors such as spikes and ringing in the switching waveform.

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Ishikawa, Katsumi, Kaoru Katoh, Ayumu Hatanaka, Kazutoshi Ogawa, Haruka Shimizu, and Natsuki Yokoyama. "High-Speed Drive Circuit with Separate Source Terminal for 600 V / 40 A Normally-off SiC-JFET." Materials Science Forum 740-742 (January 2013): 1060–64. http://dx.doi.org/10.4028/www.scientific.net/msf.740-742.1060.

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When using JFETs with a threshold voltage lower than 2 V in a power supply system or inverter system, a high-speed drive circuit capable of precisely controlling the gate current and a mounting method are important to reduce the switching loss. In this paper, a drive circuit of a normally-off SiC-JFET with a separate source terminal is proposed and the effects are evaluated. By dividing the common source inductance and applying the speed-up capacitor, the turn-on time and turn-on energy losses can be decreased by 40% and 60%, respectively. A speed-up capacitor larger than 100 nF greatly decrea

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LIU, YUYU, JINGUO QUAN, HUAZHONG YANG, and HUI WANG. "MOS CURRENT MODE LOGIC CIRCUITS: DESIGN CONSIDERATION IN HIGH-SPEED LOW-POWER APPLICATIONS AND ITS FUTURE TREND, A TUTORIAL." International Journal of High Speed Electronics and Systems 15, no. 03 (2005): 599–614. http://dx.doi.org/10.1142/s0129156405003351.

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In this paper, a logic style that is becoming increasingly popular is presented, which is called MOS Current Mode Logic (MCML). MCML is a novel and useful logic style for high-speed, low-power and mixed-signal applications. Its high-speed switching, low supply voltage and reduced output voltage swing contribute to its high performance, low power dissipation, and low noise features. MCML circuits are compared to several other logic styles, such as conventional static CMOS, dynamic logic, and traditional emitter coupled logic (ECL) in terms of power, delay and common mode noise immunity. MCML ci

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10

Palanisamy, R., C. S. Boopathi, K. Selvakumar, and K. Vijayakumar. "Switching pulse generation for DC-DC boost converter using Xilinx-ISE with FPGA processor." International Journal of Electrical and Computer Engineering (IJECE) 10, no. 2 (2020): 1722. http://dx.doi.org/10.11591/ijece.v10i2.pp1722-1727.

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This paper explains steps to generate switching pulse using Xilinx-ISE with FPGA processor for DC-DC boost converter. The switching pulse generated using Very high speed integrated circuit Hardware Description Language (VHDL) with Xilinx-ISE. VHDL is a programming language, which is used to model and design any complex circuits in a dynamic environment. This paper gives the course of action for generation of switching pulses for dc-dc boost converter using Xilinx-ISE and matlab simulink. The switching pulse generated using Xilinx-ISE with FPGA-Spartan 6 processor compared with switching pulse

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Palanisamy, R., and K. Vijayakumar. "Switching pulse generation for DC-DC boost converter using Xilinx-ISE with FPGA processor." International Journal of Reconfigurable and Embedded Systems (IJRES) 8, no. 2 (2019): 81. http://dx.doi.org/10.11591/ijres.v8.i2.pp81-85.

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<p>This paper explains steps to generate switching pulse using Xilinx-ISE with FPGA processor for DC-DC boost converter. The switching pulse generated using Very high speed integrated circuit Hardware Description Language (VHDL) with Xilinx-ISE. VHDL is a programming language, which is used to model and design any complex circuits in a dynamic environment. This paper gives the course of action for generation of switching pulses for dc-dc boost converter using Xilinx-ISE and matlab simulink. The switching pulse generated using Xilinx-ISE with FPGA-Spartan 6 processor compared with switchi

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R., Palanisamy, S. Boopathi C., Selvakumar K., and Vijayakumar K. "Switching pulse generation for DC-DC boost converter using Xilinx-ISE with FPGA processor." International Journal of Electrical and Computer Engineering (IJECE) 10, no. 2 (2020): 1722–27. https://doi.org/10.11591/ijece.v10i2.pp1722-1727.

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This paper explains steps to generate switching pulse using Xilinx-ISE with FPGA processor for DC-DC boost converter. The switching pulse generated using Very high speed integrated circuit Hardware Description Language (VHDL) with Xilinx-ISE. VHDL is a programming language, which is used to model and design any complex circuits in a dynamic environment. This paper gives the course of action for generation of switching pulses for dc-dc boost converter using Xilinx-ISE and matlab simulink. The switching pulse generated using Xilinx-ISE with FPGA-Spartan 6 processor compared with switching pulse

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Apoorva, Reddy Proddutoori. "Improvizing Power Optimizations Using Dynamic Cascode Voltage Switching Logic." Journal of Scientific and Engineering Research 6, no. 11 (2019): 311–14. https://doi.org/10.5281/zenodo.12798330.

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In this paper we display another choice the 13-decision demonstrate, based on a graph chart that can be utilized to maximize proficiency Make DCVS circuits yourself. We assess our compared to customary DCVS amalgamation strategies that utilize requested parallel choices graphs that illustrate that our approach will without a doubt succeed as well as or on the other hand superior compared to OBDD based methodologies. Within the journey for high-performance CMOS, dynamic cascode voltage switch (DCVS) circuits are rising as an vital modern range of ponder. consolidated circuits Potential benefits

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14

Yan, Dong, Lijun Hang, Yuanbin He, Zhen He, and Pingliang Zeng. "An Accurate Switching Transient Analytical Model for GaN HEMT under the Influence of Nonlinear Parameters." Energies 15, no. 8 (2022): 2966. http://dx.doi.org/10.3390/en15082966.

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The Gallium Nitride high electron mobility transistor (GaN HEMT) has been considered as a potential power semiconductor device for high switching speed and high power density application since its commercialization. Compared with the traditional Si transistors, GaN HEMT has faster switching speed and lower on-off loss. As a result, it is more sensitive to the nonlinear parameters due to the fast switching speed. The subsequent voltage and current overshooting will affect the efficiency and safety of the GaN HEMT and power electronic systems. In this paper, an accurate switching transient analy

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Dharmireddy, Ajay Kumar, D. Sowjanya, D. Aravind, G. Sowmya, A. Chandu, and Rao G. Venkateswara. "Low Kickback Noise and High-Speed MultiStage Comparator for High-Speed SAR ADC's." International Journal of Microsystems and IoT 2, no. 2 (2024): 614–21. https://doi.org/10.5281/zenodo.10809165.

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In this paper, proposes the design of a high-speed, low-kickback, three-stage comparator built on CMOS technology. This 1.2V supply-operated comparator circuit develops for use in high-speed ADCs. There are three parts to the proposed comparator circuit: a preamplifier, a latch, and a regeneration stage. The input signal amplifies in the preamplifier stage, producing a differential output signal. Once the movement from the preamplifier (PA) stage strengthens, it is stored in the latch stage until the regeneration stage is ready to utilize—simulations in CMOS technology to test the sugges

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Sreeja, Garlapati, and Kumara Shama. "3T-SAPON technique to reduce Power Consumption." Journal of Physics: Conference Series 2571, no. 1 (2023): 012030. http://dx.doi.org/10.1088/1742-6596/2571/1/012030.

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Abstract Scaling down CMOS technology has rapidly improved cost, area effectiveness, switching speed of the circuits & high device reliability. However, scaling has an immense impact on static power consumption in VLSI circuits. For battery operating applications higher power dissipation is not desirable because it reduces the efficiency and cooling effects of the battery. Thus, designing a low-power consuming circuit has become the major criteria in circuit designs. A new circuit model called 3T-SAPON is designed to reduce static power consumption. 3T-SAPON technique power consumption has

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Saravana, Saravana, Vijeya Kumar K.N, Profun C J, and Saranya S. "Design and Implementation of High Speed and Low Power Factorial Circuit." International Journal of Engineering & Technology 7, no. 4.39 (2018): 993–96. http://dx.doi.org/10.14419/ijet.v7i4.39.27744.

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This paper deals with design of factorial circuit which turns on only for valid inputs and thus reduce unwanted transitions in the parallel circuitry by switching off the unused multipliers for inputs less than the maximal. The inputs are fed to the multiplier circuit through tristate buffers and control signals are produced using decoder. This in turn minimizes the dynamic power dissipation and reduces delay. The experimental evaluation of the proposed factorial circuit is done using simulation outputs and by comparing the performance parameters with prior designs in terms of power dissipatio

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18

Song, Jian Jun, Liu Sun, He Ming Zhang, and Hui Yong Hu. "Design and Implementation of High-Speed Dual-Modulus." Applied Mechanics and Materials 109 (October 2011): 271–75. http://dx.doi.org/10.4028/www.scientific.net/amm.109.271.

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This paper presents a new enhanced phase switching 15/16 dual-modulus prescaler. One more divide-by-2 stage was employed in the design compare to the conventional phase switching architecture. Since the operating speed of phase switching circuit is obviously reduced. The inverse phase switching sequence was employed in this circuit to implement glitch-free phase switching. Further more, a dynamic load master-slave DFF was employed as the first divide-by-2 stage which can increase the operating frequency of prescaler. Measurement result shows, this dual-modulus prescaler can operate at 3GHz-200

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Lee, Minwoong, Namho Lee, Huijeong Gwon, Jongyeol Kim, Younggwan Hwang, and Seongik Cho. "Design of Radiation-Tolerant High-Speed Signal Processing Circuit for Detecting Prompt Gamma Rays by Nuclear Explosion." Electronics 11, no. 18 (2022): 2970. http://dx.doi.org/10.3390/electronics11182970.

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Electronic equipment in nuclear power plants and nuclear warfare is damaged by transient effects that cause high-energy pulsed radiation. There is a concern that this type of damage can even cause enormous economic losses and human casualties by paralyzing control systems. To solve this problem, this study proposes a complementary metal-oxide semiconductor (CMOS) logic-based, switching detection circuit that can detect pulsed radiations at a fast rate. This circuit improved response speed and power consumption by using the switching operation of digital logic compared with conventional circuit

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Arafa, Kawther I., Dina M. Ellaithy, Abdelhalim Zekry, Mohamed Abouelatta, and Heba Shawkey. "Successive Approximation Register Analog-to-Digital Converter (SAR ADC) for Biomedical Applications." Active and Passive Electronic Components 2023 (January 4, 2023): 1–29. http://dx.doi.org/10.1155/2023/3669255.

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This study presents a survey of the most promising reported SAR ADC designs for biomedical applications, stressing advantages, disadvantages, and limitations, and concludes with a quantitative comparison. Recent progress in the development of a single SAR ADC architecture is reviewed. In wearable and biosensor systems, a very small amount of total power must be devoured by portable batteries or energy-harvesting circuits in order to function correctly. During the past decade, implementation of the high energy efficiency of SAR ADC has become the most necessary. So, several different implementa

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Bucholc, K. "A circuit for high-speed time switching." IEEE Transactions on Communications 45, no. 3 (1997): 287–88. http://dx.doi.org/10.1109/26.558685.

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Chiba, Yoshikazu, Kazuhiro Hiraide, and Fumio Kondo. "High-speed broadband circuit switching system architecture." Electronics and Communications in Japan (Part I: Communications) 73, no. 11 (1990): 22–33. http://dx.doi.org/10.1002/ecja.4410731103.

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Nakata, Shuhei, and Shota Tanaka. "Temperature Dependence of dV/dt Impact on the SiC-MOSFET." Materials Science Forum 963 (July 2019): 596–99. http://dx.doi.org/10.4028/www.scientific.net/msf.963.596.

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Recentlly, high speed switching circuits using SiC power device have been developed for reduction of switching loss and downsizing of electric products. The high speed switching leads to the rapid changing of the drain voltage (dV/dt) during the switching period. This paper reports the effects of the dV/dt impact on the self-turn-on and the characteristics of SiC-MOSFET, especially the temperature dependence. The results shows that the gate bias voltage to suppress the self-turn-on is negatively correlated with the temperature. And it is also found that the dV/dt impact breaks down the gate so

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Shin, Yangjin, Suyeon Cho, and Ju Lee. "A Study on Series-Parallel Winding Changeover Circuit and Control Method for Expanding the High-Efficiency Operating Range of IPMSM for xEV Drive Systems." World Electric Vehicle Journal 15, no. 11 (2024): 501. http://dx.doi.org/10.3390/wevj15110501.

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The motor characteristics control method using the winding changeover technique can improve the matching ratio between the most frequent operating point of electric vehicle (EV) and the motor’s high-efficiency operating point, thereby enhancing the overall average efficiency of the drive system. This technology reduces back electromotive force and winding resistance by adjusting the effective number of motor winding turns according to the EV’s operating speed, ultimately improving the average efficiency. In this paper, we propose a winding changeover circuit and control method that maximizes t

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Benfdila, Arezki. "Improving High Speed Switching Graphene Transistors Using Bandgap Engineering." Journal of Nano Research 72 (March 21, 2022): 113–22. http://dx.doi.org/10.4028/p-b3jg3k.

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Graphene transistors are considered to be the successors’ of MOS transistors for the next generation of advanced integrated circuits. However, graphene suffers from the absence of energy band gap to experience a semiconductor like characteristics. In order to instigate a bandgap in graphene, several techniques and methods are introduced to beak its symmetry. The most common graphene form is the Graphene Nanoribbon (GNR) sheets. Few techniques have been used to grow GNR sheets. However, the main methods that gave better results are bottom-up techniques mainly based on nanotechnology principles.

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Augeau, Patrick, Philippe Bouysse, Audrey Martin, et al. "A new GaN-based high-speed and high-power switching circuit for envelope-tracking modulators." International Journal of Microwave and Wireless Technologies 6, no. 1 (2013): 13–21. http://dx.doi.org/10.1017/s1759078713001062.

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In this paper, we report a new high-speed and high-power switching circuit based on GaN HEMT's. The elementary switching cell, composed of two GaN HEMT's and two resistors, acts like a power threshold comparator with high-output voltage. Theoretical analysis of static and dynamic circuit operation points out the dependence of efficiency and switching speed to the main circuit elements. Four switching cells are then combined together thanks to SiC Schottky diodes to design a multi-level power switch that can be used as a power supply modulator for envelope tracking power amplifiers. The designe

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Bait-Suwailam, M. M., and O. M. Ramahi. "Simultaneous switching noise mitigation in high-speed circuits using complementary split-ring resonators." Electronics Letters 46, no. 8 (2010): 563. http://dx.doi.org/10.1049/el.2010.0583.

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D., Vaithiyanathan, Megha Singh Kurmi, Alok Kumar Mishra, and Britto Pari J. "Performance analysis of multi-scaling voltage level shifter for low-power applications." World Journal of Engineering 17, no. 6 (2020): 803–9. http://dx.doi.org/10.1108/wje-02-2020-0043.

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Purpose In complementary metal-oxide-semiconductor (CMOS) logic circuits, there is a direct square proportion of supply voltage on dynamic power. If the supply voltage is high, then more amount of energy will be consumed. Therefore, if a low voltage supply is used, then dynamic power will also be reduced. In a mixed signal circuit, there can be a situation when lower voltage circuitry has to drive large voltage circuitry. In such a case, P-type metal-oxide-semiconductor of high-voltage circuitry may not be switched off completely by applying a low voltage as input. Therefore, there is a need f

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Noguchi, Toshihiko, Tomohiro Mizuno, and Munehiro Murata. "High-Speed Switching Method of MOSFETs Using Switching Assist Auxiliary Circuit." IEEJ Transactions on Industry Applications 133, no. 12 (2013): 1186–92. http://dx.doi.org/10.1541/ieejias.133.1186.

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Song, Rong, Yonghe Wu, Chengkai Lin, et al. "High-Speed Shift Register with Dual-Gated Thin-Film Transistors for a 31-Inch 4K AMOLED Display." Micromachines 13, no. 10 (2022): 1696. http://dx.doi.org/10.3390/mi13101696.

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In this work, a promising dual-gated thin film transistor (TFT) structure has been proposed and introduced in the shift register (SR)-integrated circuits to reduce the rising time. The threshold voltage can be simultaneously changed by the top gate and the bottom gate in the proposed dual-gated TFTs. When the SR circuits start to export the scan signals in the displays, the driving currents in the SR circuits are increased by switching the working station of driving TFTs from the enhancement characterization to the depletion characterization. Subsequently, the detailed smart spice simulation h

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Yu, Jiajia. "Influence of SiC MOSFET Drive Control Parameters on Short Circuit Characteristics." Applied and Computational Engineering 125, no. 1 (2025): 40–46. https://doi.org/10.54254/2755-2721/2025.20008.

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This paper focuses on the short-circuit characteristics of SiC MOSFETs. The SiC MOSFET, categorized as a third-generation wide bandgap power semiconductor, shows significant promise for use in high-voltage applications. Short-circuit faults are categorized into hard-switch short circuits and load short circuits. The drive parameters, including Gate Resistance, Gate-Source Voltage, and DC Bus Voltage, significantly affect the short-circuit characteristics. Increasing Gate Resistance can slow down the rise rate and peak value of short-circuit current, reducing the risk of device damage, although

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Sánta, Botond, Dániel Molnár, Patrick Haiber, et al. "Nanosecond resistive switching in Ag/AgI/PtIr nanojunctions." Beilstein Journal of Nanotechnology 11 (January 8, 2020): 92–100. http://dx.doi.org/10.3762/bjnano.11.9.

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Nanometer-scale resistive switching devices operated in the metallic conductance regime offer ultimately scalable and widely reconfigurable hardware elements for novel in-memory and neuromorphic computing architectures. Moreover, they exhibit high operation speed at low power arising from the ease of the electric-field-driven redistribution of only a small amount of highly mobile ionic species upon resistive switching. We investigate the memristive behavior of a so-far less explored representative of this class, the Ag/AgI material system in a point contact arrangement established by the condu

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Hino, Shiro, Naruhisa Miura, Akihiko Furukawa, et al. "SiC-MOSFET Structure Enabling Fast Turn-On and -Off Switching." Materials Science Forum 717-720 (May 2012): 1097–100. http://dx.doi.org/10.4028/www.scientific.net/msf.717-720.1097.

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High speed switching is desired to reduce switching losses of SiC-MOSFETs. In order to realize SiC-MOSFETs capable of high speed switching, we numerically evaluated the electric field induced in SiC-MOSFETs during switching using an equivalent circuit model. Based on the evaluation, we designed a SiC-MOSFET, which successfully demonstrated high speed switching with a dV/dt of over 70 V/ns.

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HUANG, WEN-TZENG, SUN-YEN TAN, and YUAN-JEN CHANG. "A NOVEL DESIGN METHODOLOGY FOR REDUCING SIMULTANEOUS SWITCHING NOISE EVALUATED BY A DIFFERENTIAL-IBIS STRUCTURE." Journal of Circuits, Systems and Computers 19, no. 06 (2010): 1275–97. http://dx.doi.org/10.1142/s0218126610006670.

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Modern electronic products increasingly require high speed, high density, and low-voltage operation. In such designs, the power-delivery system could be affected by input noise to the point that it becomes unstable. Simultaneous switching noise (SSN) is a major factor that interferes with power integrity. Although decoupling capacitors cannot effectively alleviate the problem of SSN, they have been generally used in the HP Simulation Program with Integrated Circuit Emphasis model for reducing SSN. The differential I/O buffer information specification (D-IBIS) model uses equivalent circuits to

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Karpagam, G., E. Konguvel E.Konguvel, and M. Thangamani M.Thangamani. "A Low Power VLSI Implementation of STTRAM based TCAM for High Speed Switching Circuits." International Journal of Computer Applications 115, no. 7 (2015): 38–42. http://dx.doi.org/10.5120/20167-2299.

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Veselka, J. J., D. A. Herr, T. O. Murphy, L. L. Buhl, and S. K. Korotky. "Crosstalk measurements of integrated high-speed Ti:LiNbO/sub 3/ Delta beta -reversal switching circuits." Journal of Lightwave Technology 7, no. 6 (1989): 908–10. http://dx.doi.org/10.1109/50.32357.

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Ghobadi, Amir, Kagan Topalli, Necmi Biyikli, and Ali Kemal Okyay. "COMPLEMENTARY SPIRAL RESONATORS FOR ULTRAWIDEBAND SUPPRESSION OF SIMULTANEOUS SWITCHING NOISE IN HIGH-SPEED CIRCUITS." Progress In Electromagnetics Research C 46 (2014): 117–24. http://dx.doi.org/10.2528/pierc13120208.

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Artur, Rojek. "AN EXPERIMENTAL ANALYSIS OF DC MAGNETIC BLOWOUT HIGH-SPEED CIRCUIT BREAKERS' PARAMETERS." Eastern-European Journal of Enterprise Technologies 4, no. 5 (106) (2020): 35–40. https://doi.org/10.15587/1729-4061.2020.210232.

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High-speed circuit breakers (HSCB) used in DC circuits are one of the basic elements of overload, short-circuit and electric shock protection. Such breakers are used in transport (trams, trolleybuses, subways and railways) in electric power supply facilities and in vehicles. The performance and capability of limiting the current depend on the HSCB design and solutions applied in it. The circuit parameters, particularly its inductance also affect the performance. Additionally, each DC breaking in the RL circuit is accompanied by overvoltages whose level depends on the circuit parameters and bre

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Tuluhong, Ayiguzhali, Weiqing Wang, Yongdong Li, Haiyun Wang, and Lie Xu. "Research on Modelling and Stability Characteristics of Electric Traffic Energy System Based on ZVS-DAB Converter." Journal of Electrical and Computer Engineering 2020 (May 28, 2020): 1–10. http://dx.doi.org/10.1155/2020/5450628.

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We study and describe mostly used traditional simplified circuits for full-bridge Zero Voltage Switching-Dual Active Bridge (ZVS-DAB) converter and deduce their mathematical model. On this basis, we propose a high-frequency (HF) mathematical model, which takes into account conduction loss and HF characteristics of the ZVS-DAB converter model. We compare the static and dynamic stabilities of the traditional and the proposed HF mathematical model by simulation. Finally, the high-frequency planar transformer (HFPT) with good heat dissipation and the wide band gap (WBG) semiconductor SiC switches

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Sato, Shinji, Fumiki Kato, Hidekazu Tanisawa, et al. "Development of a High-Speed Switching Silicon Carbide Power Module." Materials Science Forum 963 (July 2019): 864–68. http://dx.doi.org/10.4028/www.scientific.net/msf.963.864.

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We developed a silicon carbide (SiC) power module that can switch large currents at high speed. The withstand voltage of this power module is 1200 V, and two SiC MOSFETs are built-in and constitute a circuit for one inverter phase. This power module incorporates a snubber circuit for reducing the surge voltage generated by the SiC MOSFET for high-speed switching. In this study, switching at 270 A (a current density of 1000 A/cm 2 or more for the SiC MOSFET) was performed to evaluate this module. The turn-off switching time tf was ~10 ns, and the maximum dv/dt was 80 kV/us. Furthermore, this re

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Shah, Minsha, Hitesh Mandaliya, Lavkesh Lachhvani, Manu Bajpai, and Rachana Rajpal. "Microcontroller Based High Voltage, High Speed Trigger Control Circuit for SMARTEX-C." WSEAS TRANSACTIONS ON ELECTRONICS 12 (September 13, 2021): 100–105. http://dx.doi.org/10.37394/232017.2021.12.14.

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Microcontroller based trigger control circuit for fast pulsing of electrode potentials on wide range of time scales has been designed, installed, and tested for electron plasma experiments which are carried out in partial toroidal trap SMall Aspect Ratio Toroidal Electron plasma EXperiment in C – shaped geometry (SMARTEX – C), a device to create and confine non-neutral plasma (electron plasma). The sequence of trap operation is inject-hold-dump for which electrodes need to be pulsed with applied voltages at a high switching speed of few nanoseconds. Also this sequence of operation needs to be

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Fehr, E. Scott, Stephen A. Szygenda, and Granville E. Ott. "An Integrated Hardware Array for Very High Speed Logic Simulation." VLSI Design 4, no. 2 (1996): 107–18. http://dx.doi.org/10.1155/1996/13931.

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A hardware architecture is proposed which allows direct mapping of design simulation topology onto an acceleration platform. In order to clarify architectural principles, the simulation is confined to functional verification of unit delay, binary valued gate level logic designs. Under this approach, a rank ordered design description is executed on a massively parallel processor grid which implements an efficient and direct model of the design, similar to prototyping. Architectural innovation reduces logic complexity and execution time of boolean evaluation and fanout switching circuits, while

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Kang, Zhuang, Xiaofeng Xie, Yang Liu, et al. "A High-Voltage Pulse Modulator Composed of SiC MOSFETs/IGBTs in a Hybrid Connecting State." Electronics 13, no. 11 (2024): 2108. http://dx.doi.org/10.3390/electronics13112108.

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In order to solve problems such as a slow switching speed, a high switching power, a loss of pure IGBT modulators, and the weak withstanding load short-circuit ability of pure SiC MOSFET modulators used for vacuum loads, this paper proposes a new scheme for high-voltage pulse modulators based on SiC MOSFET/IGBT hybrid connecting circuits. It has a low power loss like the pure SiC MOSFET modulator and a strong withstanding load short-circuit ability like the pure IGBT modulator. Firstly, the principle circuit of the hybrid connecting modulator are discussed and chosen. And the basic working pro

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MILLER, D. A. B. "QUANTUM WELL OPTOELECTRONIC SWITCHING DEVICES." International Journal of High Speed Electronics and Systems 01, no. 01 (1990): 19–46. http://dx.doi.org/10.1142/s0129156490000034.

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Quantum well semiconductor structures allow small, fast, efficient optoelectronic devices such as optical modulators and switches. These are capable of logic themselves and have good potential for integration with electronic integrated circuits for parallel high speed interconnections. Devices can be made both in waveguides and two-dimensional parallel arrays. Working arrays of optical logic and memory devices have been demonstrated, to sizes as large as 2 048 elements, all externally accessible in parallel with free-space optics. This article gives an overview of the physics underlying the op

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Mandal, Ashis Kumar. "All-Optical DFT Using TOAD-Based Cross-Bar Switches." Journal of Circuits, Systems and Computers 28, no. 09 (2019): 1950156. http://dx.doi.org/10.1142/s0218126619501561.

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The discovery of ultra-high-speed all-optical switches in the very recent past based on semiconductor optical amplifier (SOA) especially in the interferometric configuration is very pronouncing due to their features like high repetition rate, low power consumption, fast switching time, noise and jitter tolerance, being easily integrable and operationally versatile, thereby bringing a revolution in all-optical information processing systems. In this work, an all-optical computing tool namely SOA-based [Formula: see text] terahertz optical asymmetric demultiplexer (TOAD) is used because it can b

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Arseniuk, Dmytro, and Yuri Zinkovskyi. "MINIMIZING HIGH-FREQUENCY SWITCHING LOSSES IN WIDEBAND GAN HEMTS FOR FLYBACK CONVERTERS." Information and Telecommunication Sciences, no. 2 (December 21, 2023): 53–60. http://dx.doi.org/10.20535/2411-2976.22023.53-60.

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Background. In the realm of pulse power supplies, flyback converters play a pivotal role in efficient voltage conversion and providing electrical isolation. Typically, these converters utilize silicon transistors. However, they encounter several issues that hinder their energy efficiency and operational stability. A primary concern is the increase in switching losses at high frequencies. This is attributed to the lower switching speed and higher on-state resistance characteristic of silicon transistors. Such inefficiency leads to substantial power dissipation, thereby reducing overall efficien

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Ait Belaid, Khaoula, Hassan Belahrach, and Hassan Ayad. "Investigation and Analysis of the Simultaneous Switching Noise in Power Distribution Network with Multi-Power Supplies of High Speed CMOS Circuits." Active and Passive Electronic Components 2017 (2017): 1–10. http://dx.doi.org/10.1155/2017/9703029.

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The paper studies a simultaneous switching noise (SSN) in a power distribution network (PDN) with dual supply voltages and two cores. This is achieved by reducing the admittance matrix Y of the PDN then calculating frequency domain impedance with rational function approximation using vector fitting. This paper presents a method of computing the simultaneous switching noise through a switching current, whose properties and details are described. Thus, the results are discussed and performed using MATLAB and PSpice tools. It demonstrated that the presence of many cores in the same PCB influences

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Srilakshmi, K., A. V. S. Karthikeya Chowdary, D. Lakshmi Soumya, Ch Hemasri, and G. Pavan Kumar. "Performance Analysis of High Speed Low Power BCD Adder using CMOS and Dynamic logic." Indian Journal Of Science And Technology 18, no. 21 (2025): 1703–15. https://doi.org/10.17485/ijst/v18i21.700.

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Background: In the field of high-speed digital circuits, the efficiency of Binary Coded Decimal (BCD) adders consists of significant importance in optimizing the speed of arithmetic operations in computing systems. BCD arithmetic is crucial in scientific and financial computing systems that require decimal accuracy. Objectives: This study examines the performance of BCD adders as designed using two different logic families, Complementary Metal Oxide Semiconductor (CMOS) and dynamic logic. CMOS logic which is meant to have low static power dissipation and dynamic logic which is meant to have hi

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Kishore, K. Hari, K. Akhil, G. Viswanath, and N. Pavan Kumar. "Design and Implementation of 8x8 Multiplier using 4-2 Compressor and 5-2 Compressor." International Journal of Reconfigurable and Embedded Systems (IJRES) 5, no. 3 (2016): 131. http://dx.doi.org/10.11591/ijres.v5.i3.pp131-135.

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In this paper, a 8x8 multiplier is realized by using 4-2 and 5-2 compressors. Low-power high speed 4-2 compressors and 5-2 compressors are extensively utilized for numerical realizations. Both the compressors circuits that is the 4-2 compressor circuit and 5-2 compressor circuit internally consist of the logic gates i.e. the XOR and XNOR gates. 4-2 compressor circuit has been designed uses a brand new partial-product reduction format that consecutively reduces the utmost output new style of number needs less variety of MOSFET’s compared to Wallace Tree Multipliers. The 4-2 compressor used is c

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Mladenov, Valeri. "A Unified and Open LTSPICE Memristor Model Library." Electronics 10, no. 13 (2021): 1594. http://dx.doi.org/10.3390/electronics10131594.

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In this paper, a unified and open linear technology simulation program with integrated circuit emphasis (LTSPICE) memristor library is proposed. It is suitable for the analysis, design, and comparison of the basic memristors and memristor-based circuits. The library could be freely used and expanded with new LTSPICE memristor models. The main existing standard memristor models and several enhanced and modified models based on transition metal oxides such as titanium dioxide, hafnium dioxide, and tantalum oxide are included in the library. LTSPICE is one of the best software for analysis and de

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