Journal articles: 'High voltage/low voltage redundancy'

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Malinowski, M. "Cascaded multilevel converters in recent research and applications." Bulletin of the Polish Academy of Sciences Technical Sciences 65, no. 5 (October 1, 2017): 567–78. http://dx.doi.org/10.1515/bpasts-2017-0062.

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Abstract Multilevel converters have been intensively investigated and developed since 1960s and have found successful industrial applications. The aim of this paper is to present state of the art as well as recent research and applications of cascaded multilevel converters, which are a very interesting solution for power distribution systems and renewable energy sources. Cascaded multilevel converters can easily operate at medium and high voltage based on the series connection of power modules (cells), which use standard low-voltage component configurations. Series connections of modules (cells) allow for high quality output voltages and input currents, reduction of passive components and availability of component redundancy. Due to these features the cascaded multilevel converters have been recognized as attractive solutions for high-voltage direct-current (HVDC) transmission, solid state transformers (SST) and photovoltaic (PV) systems.

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Shi, Yong, and Zhuoyi Xu. "Wide Load Range ZVS Three-level DC-DC Converter: Modular Structure, Redundancy Ability, and Reduced Filters Size." Energies 12, no. 18 (September 15, 2019): 3537. http://dx.doi.org/10.3390/en12183537.

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In future dc distributed power systems, high performance high voltage dc-dc converters with redundancy ability are welcome. However, most existing high voltage dc-dc converters do not have redundancy ability. To solve this problem, a wide load range zero-voltage switching (ZVS) three-level (TL) dc-dc converter is proposed, which has some definitely good features. The primary switches have reduced voltage stress, which is only Vin/2. Moreover, no extra clamping component is needed, which results simple primary structure. Redundancy ability can be obtained by both primary and secondary sides, which means high system reliability. With proper designing of magnetizing inductance, all primary switches can obtain ZVS down to 0 output current, and in addition, the added conduction loss can be neglected. TL voltage waveform before the output inductor is obtained, which leads small volume of the output filter. Four secondary MOSFETs can be switched in zero-current switching (ZCS) condition over wide load range. Finally, both the primary and secondary power stages are modular architecture, which permits realizing any given system specifications by low voltage, standardized power modules. The operation principle, soft switching characteristics are presented in this paper, and the experimental results from a 1 kW prototype are also provided to validate the proposed converter.

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Mishra, Santanu, and Xingsheng Zhou. "Design Considerations for a Low-Voltage High-Current Redundant Parallel Voltage Regulator Module System." IEEE Transactions on Industrial Electronics 58, no. 4 (April 2011): 1330–38. http://dx.doi.org/10.1109/tie.2010.2049714.

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García-Leyva, Lancelot, Dennis Andrade, Sergio Gómez, Antonio Calomarde, Francesc Moll, and Antonio Rubio. "New redundant logic design concept for high noise and low voltage scenarios." Microelectronics Journal 42, no. 12 (December 2011): 1359–69. http://dx.doi.org/10.1016/j.mejo.2011.09.007.

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Gu, Xin, Bingxu Wei, Guozheng Zhang, Zhiqiang Wang, and Wei Chen. "Improved Synchronized Space Vector PWM Strategy for Three-Level Inverter at Low Modulation Index." Electronics 8, no. 12 (November 23, 2019): 1400. http://dx.doi.org/10.3390/electronics8121400.

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Aimed at reducing the switching loss and common-mode voltage amplitude of high-power medium-voltage three-level inverter under low modulation index conditions, an improved synchronous space vector PWM strategy is proposed in this paper. The switching times in each fundamental period are reduced by the re-division of small regions and the full use of the redundant switching state. The sum of switching algebra is introduced as an evaluation index and the switching state with the minimum value of the sum of switching algebra are adopted. Then, the common mode voltage amplitude is reduced. The theoretical analysis and experimental results show that the improved modulation strategy proposed in this paper can effectively reduce the switching loss and common-mode voltage amplitude of the inverter under the condition of the low modulation index. Moreover, the neutral-point voltage ripple is also reduced simultaneously.

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Mahmoudi, Morad, Abdellah El Barkany, and Ahmed El Khalfi. "Toward an Integrated Approach of HV and MV Circuit-Breakers Optimization Maintenance Planning and Reliability Assessment: A Case Study." International Journal of Engineering Research in Africa 29 (March 2017): 133–53. http://dx.doi.org/10.4028/www.scientific.net/jera.29.133.

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This paper investigates technical and organizational tools to improve maintenance planning performances. Indeed, maintaining a high level of reliability and availability of a Medium Voltage electrical network protection system such as the Medium Voltage and High Voltage circuit-breaker and its numerical protection relay at a low operating expenses cost is one of the most critical and challenging tasks for MV electrical distribution network operators. This work has mainly two goals. Firstly, to propose an operating expenses budget function that evaluates the Planned Scheduled Preventive Maintenance Policy combined with a Condition-based maintenance fora real series-parallel multi-assets MV electrical distribution system with active redundancy under the reliability and the maintenance frequency visits of these components. Secondly, to implement an integrated genetic algorithm approach in order to look for the optimal perfect and planned preventive maintenance scheduling policy and condition-based maintenance that minimizes the maximum operating expenses cost of the entire system.The method determines the optimal schedule of preventive maintenance actions based on minimization both reliabilty and operating expenses costs. Conclusions and recommendations for practice are made on the basis of obtained results.

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Pham, Khoa Dang, Quan Vinh Nguyen, and Nho-Van Nguyen. "PWM Strategy to Alleviate Common-Mode Voltage with Minimized Output Harmonic Distortion for Five-Level Cascaded H-Bridge Converters." Energies 14, no. 15 (July 24, 2021): 4476. http://dx.doi.org/10.3390/en14154476.

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High-frequency components of common-mode voltage (CMV) induce the shaft voltage and bearing current, which lead to premature failures in motors. In addition, due to non-zero average CMV, the low-frequency components of CMV, particularly the third-order harmonic component, have been reported to cause difficulties in common-mode filter design. Furthermore, the utilization of distant voltage vectors in the pulse-width modulation (PWM) with reduced CMV magnitudes gives rise to high output harmonic distortion compared to PWM ones without CMV reduction. In an attempt to solve the aforementioned issues, this article presents a PWM strategy that features reduced CMV magnitudes, zero average CMV, and improved output harmonic distortion for a five-level cascaded H-bridge (CHB) converter. In addition, the carrier rotation technique based on the phase-leg redundancy of the CHB topology is also combined with the proposed scheme to achieve equal power loss distribution among power switching devices. Both simulation and experimental results confirm that the proposed strategy produces better output harmonic distortion than that of POD-SPWM and APOD-SPWM under the condition of reduced CMV magnitudes, zero average CMV, and equal power loss distribution.

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Jiaxiong, YE, WANG Jikang, PENG Yuanquan, FAN Xinming, and LIU Yijun. "High Quality NLM Method for Medium Voltage Hybrid Bridge MMC." E3S Web of Conferences 236 (2021): 01030. http://dx.doi.org/10.1051/e3sconf/202123601030.

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Medium voltage hybrid bridge multilevel converter (MMC) usually has a lower number of links. Therefore, the traditional Nearest Level Modulation (NLM) method has the problems of low equivalent switching frequency and poor output quality. And the traditional Carrier Phase-shifted Pulse Width Modulation (CPS-PWM) modulation has problems such as difficulty in hybrid bridge control, difficulty in redundant configuration, and large amount of calculation. In response to the above problems, this paper proposes a new high-quality NLM method. Based on the traditional NLM modulation method, PWM modulation output and module voltage equalization are realized through the time difference between one module input and one module exit in each control cycle. It achieves the purpose of improving the equivalent switching frequency and output power quality, and at the same time has the advantages of the traditional NLM modulation method with small calculation amount, redundant configuration and hybrid bridge modulation. This article describes the three modulation methods and compares their effects. Finally, the theoretical analysis is verified by PSCAD simulation.

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Hu, Yang, Heng Zhang, Jing Chen, Huan Zhang, Xinmeng Liu, Jiachen Li, Hanyu Chen, and Haiyang Hu. "A Multi-Functional De-Icing Equipment Using Modular Parallel PWM Current Source Converters." E3S Web of Conferences 256 (2021): 01033. http://dx.doi.org/10.1051/e3sconf/202125601033.

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For transmission line de-icing, a five level specific harmonic elimination (5l-she) modulation method for high-power parallel current source is proposed, which realizes the current balance of DC bridge arm and the suppression of common mode voltage, and ensures the power quality of grid connected current at low switching frequency. In addition the reactive power of the low voltage load can be compensated at the same time. Firstly, the switching states are classified according to the different mode lengths of PWM current, and the common mode voltage corresponding to each switching state is calculated. Secondly, the current sharing control strategy is established based on the analysis of the influence of redundant switching state on the current sharing of DC bridge arm. Then, the 5l-she waveform is constructed based on the switching state with lower common mode voltage, and the redundant switching states is optimized according to the current sharing strategy. Finally, the effectiveness of the proposed method is verified by simulation.

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Babenko, V. P., and V. K. Bityukov. "Protection of battery-powered devices against accidental swap of power supply connections." Russian Technological Journal 10, no. 6 (December 1, 2022): 52–59. http://dx.doi.org/10.32362/2500-316x-2022-10-6-52-59.

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Objectives. Battery-powered devices (e.g., wireless sensors, pacemakers, watches and other wrist-worn devices, virtual reality glasses, unmanned aerial vehicles, robots, pyrometers, cars, DC/DC converters, etc.) are widely used today. For such devices, it is highly important to ensure safe primary power supply connection, including protection against reverse polarity. The conventional solution to the reverse polarity problem, involving the use of Schottky diodes during system redundancy or increasing power by combining two or more power supplies in the OR-ing circuit due to a large voltage drop, results in significant power losses at high currents, heat dissipation problems, and an increase in the mass and size of the equipment. For this reason, it becomes necessary to develop efficient batterypowered equipment protection against incorrect reverse polarity connection.Methods. The problem is solved using circuit simulation in the Electronics Workbench environment.Results. When protecting equipment against reverse voltage polarity, it is shown that the minimum level of losses and low voltage drop are provided by “ideal diode” circuit solutions based on discrete components and microcircuits of the “integrated diode” type with external and internal power metal–oxide–semiconductor field-effect transistors (MOSFETs). The circuit simulation of ideal diodes based on p- and n-channel transistors with superior technical parameters allows the characteristics and voltage and power losses in the protected circuits to be specified along with a presentation of the proposed technical solution simplicity. The contemporary component base of protection devices is discussed in terms of efficiency.Conclusions. Examples of equipment for protecting against reverse voltage polarity are given along with circuit solutions based on discrete and integrated components. The simulation of the transfer characteristics of protection devices shows the limit for the minimum input voltage value of around 4 V using a MOSFET transistor.

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Xun, Zhuyu, Hongfa Ding, and Zhou He. "A Novel Switched-Capacitor Inverter with Reduced Capacitance and Balanced Neutral-Point Voltage." Electronics 10, no. 8 (April 16, 2021): 947. http://dx.doi.org/10.3390/electronics10080947.

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A novel three-phase switched-capacitor multilevel inverter (SCMLI) with reduced capacitance and balanced neutral-point voltage is proposed in this paper. Applying only one DC source, the three-phase seven-level topology possessing voltage-boosting capability is accomplished without the high-voltage stress of power switches. Owing to the inherent redundant switching states of the proposed topology, two charging approaches that can effectively limit the voltage ripples and path selection for capacitors can be realized. This provides the presented topology with reduced capacitance, balanced neutral-point voltage, good performance in not only the three-phase four-wire system but also the three-phase three-wire system, and low total harmonic distortion (THD) of the output voltage. A comprehensive comparison with previous SCMLIs in various aspects is conducted to validate the merits mentioned above. The simulation results accord with theoretical analyses, confirming the feasibility of the proposed three-phase SCMLI.

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Zakerian, Ali, and Daryoosh Nazarpour. "New Hybrid Structure Based on Improved Switched Inductor Z-Source and Parallel Inverters for Renewable Energy Systems." International Journal of Power Electronics and Drive Systems (IJPEDS) 6, no. 3 (September 1, 2015): 636. http://dx.doi.org/10.11591/ijpeds.v6.i3.pp636-647.

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Nowadays, more and more distributed generations and renewable energy sources, such as wind, solar and tidal power, are connected to the public grid by the means of power inverters. They often form microgrids before being connected to the public grid. Due to the availability of high current power electronic devices, it is inevitable to use several inverters in parallel for high-power and/or low-cost applications. So, inverters should be connected in parallel to provide system redundancy and high reliability, which are important for critical customers. In this paper, the modeling, designing and stability analysis of parallel-connected three-phase inverters are derived for application in renewable energy systems. To enlarge voltage adjustability, the proposed inverter employs an improved switched inductor Z-source impedance network to couple the main circuit and the power source. Compared with the classical Z-source inverter (ZSI) and switched inductor Z-source inverter (SL-ZSI), the proposed inverter significantly increases the voltage boost inversion ability and also can increase the power capacity and the reliability of inverter systems. The proposed topology and its performances are validated using simulation results which are obtained in Matlab/Simulink.

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Yurish, Sergey Y. "Advanced Analog-to-Digital Conversion Using Voltage-to-Frequency Converters for Remote Sensors." Key Engineering Materials 381-382 (June 2008): 623–26. http://dx.doi.org/10.4028/www.scientific.net/kem.381-382.623.

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This paper presents an advanced analog-to-digital conversion technique based on a voltage-to-frequency-to-digital conversion that is suitable for remote sensors, telemetry applications and multichannel data acquisition systems. A voltage-to-frequency conversion part can be based, for example, on high performance, charge-balance voltage-to-frequency converter (VFC), where monostable is replaced by a bistable, driven by an external clock, or other existing high performance VFCs. The frequency-to-digital converter “bottleneck” problem in such promised ADC scheme was solved due to proposed advanced method of the dependent count for frequency-to-digital conversion. This ADC technique lets receive many advantages such as high accuracy, relatively low power consumption, low cost solution, wide dynamic range, great stability and faster conversion time in comparison with existing VFC-based techniques. The conversion rate (6.25 µs to 6.25 ms) in such ADC scheme is programmable, non-redundant, shorter than for pulse counting technique and comparable with successive-approximation and Σ- ADC.

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Sharov, I. M., O. A. Demin, A. A. Sudakov, and A. D. Yarlykov. "Development and research of uninterruptible power supply system for networks with supply voltage up to 24 V." Russian Technological Journal 10, no. 5 (October 21, 2022): 60–72. http://dx.doi.org/10.32362/2500-316x-2022-10-5-60-72.

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Objectives. Due to the continuous rapid development of renewable energy sources, requirements for secondary power supply systems keep increasing from year to year. Productive uptime for end users is dependent on the efficiency and stability of the power supply system. Such systems should be able to distribute and store energy from renewable sources having various parameters and configurations. Therefore, the present work is aimed at developing technical solutions for efficient uninterruptible secondary power supply systems in low voltage DC networks.Methods. Advanced circuitry solutions are used for performing pulse conversions with high efficiency. The flexible hardware-software system is used for implementing the parameter control system.Results. An uninterruptible power supply for low-voltage DC networks is developed. The description of subsystems and calculations for all main elements including the power ones are given. Using a contemporary component base, the system prototype is assembled, configured, and measured by parameters. The presented solutions allow achieving the universality of the system in terms of the input and output voltage range. Support for the fast-charging Power Delivery protocol is integrated. As well as regulating the battery charging current and voltage, the Li+ battery charging controller permits changes in the number of chargeable cells. The monitoring and control unit monitors network parameters and controls the system automation. Using a microcontroller as the control device, it is possible to easily change control parameters by changing software settings. Dual redundancy of the module monitoring the built-in battery parameters is used to ensure the reliability and safety of system functioning. Support for the standardized I2C communication protocol with a separate power bus allows any necessary sensors to be connected for monitoring system parameters. External high-power devices controlled by a PWM signal may be added, if required. In the paper, the Li+ battery charging profile recommended by the manufacturer is provided.Conclusions. The designed system provides stable power supply to end users at a power consumption up to 40 W for at least 45 min. The automation demonstrates reliable operation.

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Köse, Hüseyin, and Mehmet Timur Aydemir. "Design and implementation of a 22 kW full-bridge push–pull series partial power converter for stationary battery energy storage system with battery charger." Measurement and Control 53, no. 7-8 (July 30, 2020): 1454–64. http://dx.doi.org/10.1177/0020294020944944.

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A wide variety of AC/DC power converter topologies have been developed in order to improve the system efficiency, input power factor and system redundancy for stationary battery energy storage systems. Due to the nature of high-power batteries, there is a big voltage difference between battery terminals from the end of discharge to the high charge value. To prevent unregulated battery voltages from harming the system loads, several techniques are used in the industry. A well-known old technique named as diode dropper is simple but suffers from low efficiency. Using a DC-DC converter is more advantageous, although it increases the cost. In this paper, the use of partial power processing converters which attract interest these days has been proposed as an alternative. The proposed full bridge/push-pull series connected partial power converter has a slight modification compared to the classical one presented in the literature. A system with 22 kW power rating was designed and tested. In order to compare the results, a two-switch buck-boost converter was also designed and tested for the same conditions. The results show that the proposed converter is superior to both the two-switch buck-boost converter and other topologies in terms of efficiency and response speed. Efficiencies of 97%–99% have been attained with the proposed converter.

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Kim, Kihyun, Sein Oh, and Hyungil Chae. "Conception and Simulation of a 2-Then-1-Bit/Cycle Noise-Shaping SAR ADC." Electronics 10, no. 20 (October 18, 2021): 2545. http://dx.doi.org/10.3390/electronics10202545.

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A 2-then-1-bit/cycle noise-shaping successive-approximation register (SAR) analog-to-digital converter (ADC) for high sampling rate and high resolution is presented. The conversion consists of two phases of a coarse 2-bit/cycle SAR conversion for high speed and a fine 1-bit/cycle noise-shaping SAR conversion for high accuracy. The coarse conversion is performed by both voltage and time comparison for low power consumption. A redundancy after the coarse conversion corrects the error caused by a jitter noise during the time comparison. Additionally, a mismatch error between signal and reference paths is eliminated with the help of a tail-current-sharing comparator. The proposed ADC was designed in a 28 nm CMOS process, and the simulation result shows a 68.2 dB signal-to-noise distortion (SNDR) for a sampling rate of 480 MS/s and a bandwidth of 60 MHz with good energy efficiency.

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Bhattacharya, Sumantra, Caroline Willich, and Josef Kallo. "Design and Demonstration of a 540 V/28 V SiC-Based Resonant DC–DC Converter for Auxiliary Power Supply in More Electric Aircraft." Electronics 11, no. 9 (April 26, 2022): 1382. http://dx.doi.org/10.3390/electronics11091382.

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Efficient and robust power electronic converters are vital to the success of the electrification of aircraft. Especially, low voltage auxiliary converters, which usually supply high current and low voltage loads, are not readily available industrially and need special attention. In terms of energy density and efficiency, LLC converters are among the most commonly used and efficient topologies for automotive and aerospace applications. In the case of aerospace applications, a fault-tolerant topology is highly desirable to reduce the need for redundant components and weight by removing backup systems. To solve this issue, this study introduces a new 2.0 kW LLC-based converter with a reconfigurable fault-tolerant architecture. With the help of a specially designed secondary side, the proposed converter can reconfigure itself so that even if one of the semiconductor switches fails permanently, the converter can still maintain power at nominal voltage levels, ensuring that the aircraft’s vital functionality is preserved. This paper also describes the basic operation principle, component-design aspects, conduction loss reduction techniques, and control system algorithm. Finally, a 2.0 kW experimental prototype is built to verify and demonstrate the operation of the proposed reconfigurable LLC converter.

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Bhattacharya, Sumantra, Caroline Willich, and Josef Kallo. "Design and Demonstration of a 540 V/28 V SiC-Based Resonant DC–DC Converter for Auxiliary Power Supply in More Electric Aircraft." Electronics 11, no. 9 (April 26, 2022): 1382. http://dx.doi.org/10.3390/electronics11091382.

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Efficient and robust power electronic converters are vital to the success of the electrification of aircraft. Especially, low voltage auxiliary converters, which usually supply high current and low voltage loads, are not readily available industrially and need special attention. In terms of energy density and efficiency, LLC converters are among the most commonly used and efficient topologies for automotive and aerospace applications. In the case of aerospace applications, a fault-tolerant topology is highly desirable to reduce the need for redundant components and weight by removing backup systems. To solve this issue, this study introduces a new 2.0 kW LLC-based converter with a reconfigurable fault-tolerant architecture. With the help of a specially designed secondary side, the proposed converter can reconfigure itself so that even if one of the semiconductor switches fails permanently, the converter can still maintain power at nominal voltage levels, ensuring that the aircraft’s vital functionality is preserved. This paper also describes the basic operation principle, component-design aspects, conduction loss reduction techniques, and control system algorithm. Finally, a 2.0 kW experimental prototype is built to verify and demonstrate the operation of the proposed reconfigurable LLC converter.

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Sirisha, B., and P. Satishkumar. "Simplified Space Vector Pulse Width Modulation based on Switching Schemes with Reduced Switching Frequency and Harmonics for Five Level Cascaded H-Bridge Inverter." International Journal of Electrical and Computer Engineering (IJECE) 8, no. 5 (October 1, 2018): 3417. http://dx.doi.org/10.11591/ijece.v8i5.pp3417-3426.

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This paper presents a simplified control strategy of spacevector pulse width modulation technique with a three segment switching sequence and seven segment switching sequence for high power applications of multilevel inverters. In the proposed method, the inverter switching sequences are optimized for minimization of device switching frequency and improvement of harmonic spectrum by using the three most desired switching states and one suitable redundant state for each space vector. The proposed three-segment sequence is compared with conventional seven-segment sequence for five level Cascaded H-Bridge inverter with various values of switching frequencies including very low frequency. The output spectrum of the proposed sequence design shows the reduction of device switching frequency, current and line voltage THD, thereby minimizing the filter size requirement of the inverter, employed in industrial applications, where sinusoidal output voltage is required.

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Sirisha, B., and Dr P. Satishkumar. "Simplified Space Vector Pulse Width Modulation Based on Switching Schemes with Reduced Switching Frequency and Harmonics for Five Level Cascaded H-Bridge Inverter." International Journal of Advances in Applied Sciences 7, no. 2 (June 1, 2018): 127. http://dx.doi.org/10.11591/ijaas.v7.i2.pp127-134.

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This paper presents a simplified control strategy of SVPWM with a three segment switching sequence and 7 segment switch frequency for high power multilevel inverter. In the proposed method, the inverter switching sequences are optimized for minimization of device switching sequence frequency and improvement of harmonic spectrum by using the three most derived switching states and one suitable redundant state for each space vector. The proposed 3-segment sequence is compared with conventional 7-segment sequence similar for five level Cascaded H-Bridge inverter with various values of switching frequencies including very low frequency. The output spectrum of the proposed sequence design shows the reduction of device switching frequency and states current and line voltage. THD this minimizing the filter size requirement of the inverter, employed in industrial applications. Where sinusoidal output voltage is required<em>.</em>

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Porcello, Darrell M., Chi Shun Ho, Rolf H. Joho, and John R. Huguenard. "Resilient RTN Fast Spiking in Kv3.1 Null Mice Suggests Redundancy in the Action Potential Repolarization Mechanism." Journal of Neurophysiology 87, no. 3 (March 1, 2002): 1303–10. http://dx.doi.org/10.1152/jn.00556.2001.

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Fast spiking (FS), GABAergic neurons of the reticular thalamic nucleus (RTN) are capable of firing high-frequency trains of brief action potentials, with little adaptation. Studies in recombinant systems have shown that high-voltage-activated K+ channels containing the Kv3.1 and/or Kv3.2 subunits display biophysical properties that may contribute to the FS phenotype. Given that RTN expresses high levels of Kv3.1, with little or no Kv3.2, we tested whether this subunit was required for the fast action potential repolarization mechanism essential to the FS phenotype. Single- and multiple-action potentials were recorded using whole-cell current clamp in RTN neurons from brain slices of wild-type and Kv3.1-deficient mice. At 23°C, action potentials recorded from homozygous Kv3.1 deficient mice (Kv3.1−/−) compared with their wild-type (Kv3.1+/+) counterparts had reduced amplitudes (−6%) and fast after-hyperpolarizations (−16%). At 34°C, action potentials in Kv3.1−/− mice had increased duration (21%) due to a reduced rate of repolarization (−30%) when compared with wild-type controls. Action potential trains in Kv3.1−/− were associated with a significantly greater spike decrement and broadening and a diminished firing frequency versus injected current relationship ( F/I) at 34°C. There was no change in either spike count or maximum instantaneous frequency during low-threshold Ca2+ bursts in Kv3.1−/− RTN neurons at either temperature tested. Our findings show that Kv3.1 is not solely responsible for fast spikes or high-frequency firing in RTN neurons. This suggests genetic redundancy in the system, possibly in the form of other Kv3 members, which may suffice to maintain the FS phenotype in RTN neurons in the absence of Kv3.1.

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Vardhan, Mangi Shetti Harsha, S. Maddilety, and Dr P. Sankar Babu. "An Advanced Power Flow Control in Small Scale DC Power Structure by Using Multilevel Converter." International Journal of Research In Science & Engineering, no. 12 (November 19, 2021): 1–8. http://dx.doi.org/10.55529/ijrise.12.1.8.

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Because they combine outstanding harmonic performance with low switching frequencies, multilevel transforms are attractive options in Small-Scale DC Power Ne2rks. High dependability can also be obtained by including redundant submodules into the cascaded transform chain. DC microgrids are developing as the next generation of smallscale electric power structures, with very low line impedance. This phenomena creates high currents in microgrids even with little voltage changes; hence, a power flow controller must have quick transient reaction and accurate power flow management. Multi-level transforms are used as power flow controllers in this work to provide high speed and high accuracy power flow management in a dc microgrid. Because a multi-level transform is employed, the output filter can be tiny. The linear controller, such as PI or PID, is established and widely used in the power electronics sector, but its performance degrades as system parameters change. In this paper, a neural structure (NN) based voltage management technique for a DC-DC transform is developed. This project also shows how to construct the output LC filter of a multi-level transform to meet a current ripple requirement. In comparison to typical 2-level transforms, we can demonstrate that a multilevel transform with a smaller filter may provide high-speed and high-precision power flow management for low line impedance situations. MATLAB/Simulink Simulation results are used to evaluate the control performance of each output current in the step response while accounting for transient variations in the power flow.

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Vardhan, Mangi Shetti Harsha, S. Maddilety, and Dr P. Sankar Babu. "An Advanced Power Flow Control in Small Scale DC Power Structure by Using Multilevel Converter." International Journal of Research In Science & Engineering, no. 26 (November 29, 2022): 1–8. http://dx.doi.org/10.55529/ijrise.26.1.8.

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Because they combine outstanding harmonic performance with low switching frequencies, multilevel transforms are attractive options in Small-Scale DC Power Ne2rks. High dependability can also be obtained by including redundant submodules into the cascaded transform chain. DC microgrids are developing as the next generation of smallscale electric power structures, with very low line impedance. This phenomena creates high currents in microgrids even with little voltage changes; hence, a power flow controller must have quick transient reaction and accurate power flow management. Multi-level transforms are used as power flow controllers in this work to provide high speed and high accuracy power flow management in a dc microgrid. Because a multi-level transform is employed, the output filter can be tiny. The linear controller, such as PI or PID, is established and widely used in the power electronics sector, but its performance degrades as system parameters change. In this paper, a neural structure (NN) based voltage management technique for a DC-DC transform is developed. This project also shows how to construct the output LC filter of a multi-level transform to meet a current ripple requirement. In comparison to typical 2-level transforms, we can demonstrate that a multilevel transform with a smaller filter may provide high-speed and high-precision power flow management for low line impedance situations. MATLAB/Simulink Simulation results are used to evaluate the control performance of each output current in the step response while accounting for transient variations in the power flow.

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Petridis, Stefanos, Orestis Blanas, Dimitrios Rakopoulos, Fotis Stergiopoulos, Nikos Nikolopoulos, and Spyros Voutetakis. "An Efficient Backward/Forward Sweep Algorithm for Power Flow Analysis through a Novel Tree-Like Structure for Unbalanced Distribution Networks." Energies 14, no. 4 (February 9, 2021): 897. http://dx.doi.org/10.3390/en14040897.

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The increase of distributed energy resources (DERs) in low voltage (LV) distribution networks requires the ability to perform an accurate power flow analysis (PFA) in unbalanced systems. The characteristics of a well performing power flow algorithm are the production of accurate results, robustness and quick convergence. The current study proposes an improvement to an already used backward-forward sweep (BFS) power flow algorithm for unbalanced three-phase distribution networks. The proposed power flow algorithm can be implemented in large systems producing accurate results in a small amount of time using as little computational resources as possible. In this version of the algorithm, the network is represented in a tree-like structure, instead of an incidence matrix, avoiding the use of redundant computations and the storing of unnecessary data. An implementation of the method was developed in Python programming language and tested for 3 IEEE feeder test cases (the 4 bus feeder, the 13 bus feeder and the European Low Voltage test feeder), ranging from a low (4) to a very high (907) buses number, while including a wide variety of components witnessed in LV distribution networks.

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Luan, Jian, Xuqiang Zheng, Danyu Wu, Yuzhen Zhang, Linzhen Wu, Lei Zhou, Jin Wu, and Xinyu Liu. "A 56 GS/s 8 Bit Time-Interleaved ADC in 28 nm CMOS." Electronics 11, no. 5 (February 23, 2022): 688. http://dx.doi.org/10.3390/electronics11050688.

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This paper presents a real-time output 56 GS/s 8 bit time-interleaved analog-to-digital converter (ADC), where the full-speed converted data are output by 16-lane transmitters. A 64-way 8 bit asynchronous SAR array using monotonous and split switching strategy with 1 bit redundancy is utilized to achieve a high linearity and high-power efficiency. A low-power ring voltage-controlled oscillator-based injection-locked phase-locked loop combining with a phase interpolator-based time-skew adjuster is developed to generate the 8 equally spaced sampling phases. Digital gain correction, digital-detection-analog-correction offset calibration, and coarse–fine two-step time-skew calibration are combined to optimize the ADC’s performances. An edge detector and phase selector associated with a common near-end data-transmission position and far-end data-collection instant are designed to avoid reset competition and implement deterministic latency. Fabricated in a 28 nm CMOS process, the prototype ADC achieves an outstanding SNDR of 36.38 dB at 56 GS/s with a 19.9 GHz input, where 7.25 dB and 9.33 dB are optimized by offset-gain calibration and time-skew calibration, respectively. The ADC core occupies an area of 1.2 mm2 and consumes 432 mW power consumption.

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Lou, Qinghui, Liguo Sun, Haisong Lu, Weifeng Xu, Zhebei Wang, Dan Cai, and Xiangjian Shi. "A High Speed Redundant IO Bus for Energy Power Controller System." Journal of Physics: Conference Series 2113, no. 1 (November 1, 2021): 012024. http://dx.doi.org/10.1088/1742-6596/2113/1/012024.

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Abstract This paper designs and implements a High Speed Redundant IO Bus for Energy Power Controller System. The physical layer adopts multi-point low-voltage differential signal standard. This bus has the characteristics of high real-time, high throughput and easy expansion. The controller communicates with IO module by A/B bus alternately, monitors link status in real time and collects IO module data. Non real time slots can be used to control non real time messages for IO modules such as time synchronizing and memory monitoring. The controller ARM core runs QNX real-time operating system, and transmits the message needed to communicate with IO modules to the FPGA through DMA. After receiving the message, the FPGA parses the message and automatically fills in the CRC check code and frame end flag at the end of the message. When the FPGA receives the data feedback from the IO module, it performs CRC verification. If the verification passes, it fills the corresponding module receiving buffer. Otherwise, it fills the CRC verification error flag in the register of the corresponding IO module to reduce the load of the arm core.

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Vujović, Ivan, and Željko Đurišić. "Idejno rešenje regionalnog Data Centra kod Beograda napajanog iz obnovljivih izvora energije." Energija, Ekonomija, Ekologija 23, no. 3 (2021): 10–17. http://dx.doi.org/10.46793/eee21-3.10v.

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Telecommunications and computer equipment centralisation trends for the purpose of achieving economic benefits, usage of technological innovations and new technical solutions implementation leads to the requirements for building bigger Data Centres (DCs). An increase in the size of the DC facility i.e. the number of racks inside occupied with equipment and the number of devices that enables the proper functioning of that equipment leads to necessarily power energy requirements increasing for power supply. For the DCs that require a large amount of energy, the building of their own, usually renewable energy sources (RES) is cost-effective. In such a caser, RES are primary and Power System (PS) is secondary and redundant power source. A concept of a DC primary powered from RES is presented in this paper. Generated electrical energy in RES is transmitted in PS through high voltage switch-gears (SGs) while DC is power supplied from PS through low voltage, medium voltage and high voltage SG-s. For the purpose of realisation of such facility, it is necessary to enable adequate conditions related to geographical location, physical access to the facility, possibility of connecting to the PS and possibility of connecting to the telecommunications centres. Based on carried out researches related to RESs potential, available roads, power supply infrastructure and telecommunication infrastructure, development conditions for DC on location near to Belgrade, close to power transformer station „Belgrade 20“ are analysed in this paper. From the aspect of DC power supply, proposed solution includes wind farm, solar plant and landfill gas power plant, as well as related SGs. Telecommunication connections from DC to the PS and other important telecommunication centres are provided. These connections are realised through optical cables placed next to the electrical lines and cables, and, when that is not possible, placed independently in the ground. The design of the DC interior is given and calculations of the required electrical energy for the power supply of the equipment and devices in the facility are performed. Based on calculation results, capacity calculation of the RES and calculation of SGs are performed. Design of the interior optical connections inside DC is also given. A General assessment of the investment and economics of building such DC are given at the end of the paper.

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Mohd Alsofyani, Ibrahim, and Kyo-Beum Lee. "Predictive Torque Control Based on Discrete Space Vector Modulation of PMSM without Flux Error-Sign and Voltage-Vector Lookup Table." Electronics 9, no. 9 (September 21, 2020): 1542. http://dx.doi.org/10.3390/electronics9091542.

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The conventional finite set–predictive torque control of permanent magnet synchronous motors (PMSMs) suffers from large flux and torque ripples, as well as high current harmonic distortions. Introducing the discrete space vector modulation (DSVM) into the predictive torque control (PTC-DSVM) can improve its steady-state performance; however, the control complexity is further increased owing to the large voltage–vector lookup table that increases the burden of memory. A simplified PTC-DSVM with 73 synthesized voltage vectors (VVs) is proposed herein, for further improving the steady-state performance of the PMSM drives with a significantly lower complexity and without requiring a VV lookup table. The proposed scheme for reducing the computation burden is designed to select an optimal zone of space vector diagram (SVD) in the utilized DSVM based on the torque demand. Hence, only 10 out of 73 admissible VVs will be initiated online upon the optimal SVD zone selection. Additionally, with the proposed algorithm, no flux error is required to control the flux demand. The proposed PTC-DSVM exhibits high performance features, such as low complexity with less memory utilization, reduced torque and flux ripples, and less redundant VVs in the prediction process. The simulation and experimental results for the 11 kW PMSM drive are presented to prove the effectiveness of the proposed control strategy.

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Sharma, Vivek, M. J. Hossain, S. M. Nawazish Ali, and Muhammad Kashif. "A Photovoltaic-Fed Z-Source Inverter Motor Drive with Fault-Tolerant Capability for Rural Irrigation." Energies 13, no. 18 (September 6, 2020): 4630. http://dx.doi.org/10.3390/en13184630.

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In recent years, photovoltaic (PV) systems have emerged as economical solutions for irrigation systems in rural areas. However, they are characterized by low voltage output and less reliable configurations. To address this issue in this paper, a promising inverter configuration called Impedance (Z)-source inverter (ZSI) is designed and implemented to obtain high voltage output with single-stage power conversion, particularly suitable for irrigation application. An improved and efficient modulation scheme and design specifications of the network parameters are derived. Additionally, a suitable fault-tolerant strategy is developed and implemented to improve reliability and efficiency. It incorporates an additional redundant leg with an improved control strategy to facilitate the fault-tolerant operation. The proposed fault-tolerant circuit is designed to handle switch failures of the inverter modules due to the open-circuit and short-circuit faults. The relevant simulation and experimental results under normal, faulty and post-fault operation are presented. The post-fault operation characteristics are identical to the normal operation. The motor performance characteristics such as load current, torque, harmonic spectrum, and efficiency are thoroughly analysed to prove the suitability of the proposed system for irrigation applications. This study provides an efficient and economical solution for rural irrigation utilized in developing countries, for example, India.

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Zhao, Chong, Siyu Jiang, Yu Xie, Longze Wang, Delong Zhang, Yiyi Ma, Yan Zhang, and Meicheng Li. "Analysis of Fault and Protection Strategy of a Converter Station in MMC-HVDC System." Sustainability 14, no. 9 (April 30, 2022): 5446. http://dx.doi.org/10.3390/su14095446.

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With the development of power energy technology, flexible high voltage direct current (HVDC) systems with high control degree of freedom flexibility, power supply to passive systems, small footprint, and other advantages stand out in the field of long-distance large-capacity transmission engineering. HVDC transmission technology based on a modular multilevel converter has been widely used in power grids due to its advantages such as large transmission capacity, less harmonic content, low switching loss, and wide application field. In the modular multilevel converter (MMC)-based HVDC system, the protection strategy of converter station internal faults is directly related to the reliability and security of the power transmission system. Starting from the MMC topological structure, this paper establishes the MMC mathematical model in a synchronous rotation coordinate system by combining the working state of sub-modules and the relationship between each variable of the upper and lower bridge arms of each phase of the MMC. It provides a theoretical basis for the design of the MMC-HVDC control system. The causes of the AC system faults and the internal faults of the converter station in the MMC-HVDC system are analyzed, and the sub-module faults and bridge arm reactor faults in the converter station are studied. The sub-module redundancy protection and bridge arm overcurrent protection strategies are designed for the faults, and the correctness of the scheme is verified by Matlab/Simulink.

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31

Leow, Yoong Yang, and Chia Ai Ooi. "T-shaped hybrid alternate arm converter with arm energy balancing control for battery energy storage systems." Journal of Electrical Engineering 72, no. 6 (December 1, 2021): 395–400. http://dx.doi.org/10.2478/jee-2021-0056.

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Abstract Multilevel voltage source converters (VSCs), such as modular multilevel converter (MMC), cascaded H-Bridge (CHB) and alternate arm converter (AAC), are competent topologies for battery energy storage systems (BESSs) due to modularity, scalability and low harmonic distortion. However, there is a lack of studies about interfacing AAC with a BESS due to the arm energy balancing issue. Redundant sub-modules (SMs) are inserted passively into MMC, CHB and AAC to achieve high reliability; consequently, some of them are constantly idling, resulting in low SM utilization. We propose a novel topology -T-shaped hybrid alternate arm converter (TSHAAC) for BESS applications. In addition to the aforementioned features, the proposed TSHAAC requires lower number of SMs than MMC and AAC, along with lower number of switches than CHB. Moreover, an adapted arm energy balancing control is proposed to take advantage of the redundant SMs that are idling to achieve faster balancing than in conventional AAC configuration. The simulation results validate the integration of TSHAAC configuration in a BESS; the adapted arm energy balancing control is able to improve the balancing duration by 27 %.

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32

Quillen, William S. "High Voltage Versus Low Voltage." Physical Therapy 66, no. 12 (December 1, 1986): 1968. http://dx.doi.org/10.1093/ptj/66.12.1968.

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Xu, Daiguo, Kaikai Xu, Shiliu Xu, Lu Liu, and Tao Liu. "A System-Level Correction SAR ADC with Noise-Tolerant Technique." Journal of Circuits, Systems and Computers 27, no. 13 (August 3, 2018): 1850202. http://dx.doi.org/10.1142/s021812661850202x.

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A system-level correction successive approximation register analog-to-digital converter (SAR ADC) with regulated comparator of noise-tolerant technique is proposed. First, a substrate voltage boost technique is provided to improve the linearity and speed of sampling switch. Secondly, the proposed SAR ADC provides a comparator of noise regulation without redundant comparison cycle. The proposed comparator would be regulated in high-speed large noise state in large input differential signals. In the condition of small input differential signals, the comparator would be adjusted to low-speed small noise state. Furthermore, a high-speed low-power technique is proposed to optimize the performance of dynamic comparator. Additionally, a fast SAR logic structure is provided to increase the conversion speed of SAR ADC. To demonstrate the proposed techniques, a design example of SAR ADC is fabricated in 65[Formula: see text]nm CMOS technology. The SAR ADC is able to tolerate about 1.1 LSB noise errors in post-simulation with the operation state regulated automatically. The core occupies an active area of only 0.025[Formula: see text]mm2 and consumes 1.5[Formula: see text]mW. Measurement results achieve SFDR [Formula: see text][Formula: see text]dB and SNDR [Formula: see text][Formula: see text]dB, resulting in the FOM of 21.6[Formula: see text]fJ per conversion step.

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Wong, Rita A. "High Voltage Versus Low Voltage Electrical Stimulation." Physical Therapy 66, no. 8 (August 1, 1986): 1209–14. http://dx.doi.org/10.1093/ptj/66.8.1209.

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35

Nahman, J., and D. Jelovac. "High-voltage/medium(low)-voltage substation earthing systems." IEE Proceedings C Generation, Transmission and Distribution 134, no. 1 (1987): 75. http://dx.doi.org/10.1049/ip-c.1987.0012.

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36

Frost, B. G., A. Thesen, and D. C. Joy. "Low Voltage Electron Holography - High Voltage Electron Holography." Microscopy and Microanalysis 8, S02 (August 2002): 28–29. http://dx.doi.org/10.1017/s143192760210136x.

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Shubin, V. V. "A High Voltage CMOS Voltage Level Converter for a Low Voltage Process." Russian Microelectronics 51, no. 3 (June 2022): 155–63. http://dx.doi.org/10.1134/s1063739722020081.

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38

Ryoo, H. J., S. A. Nikiforov, G. H. Rim, S. V. Shenderey, H. S. Oh, and S. I. Chung. "DLC Coatings by PI3D: Low-Voltage žersus High-Voltage Biasing." Acta Physica Polonica A 115, no. 6 (June 2009): 1146–48. http://dx.doi.org/10.12693/aphyspola.115.1146.

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39

Lei Wang and S. H. K. Embabi. "Low-voltage high-speed switched-capacitor circuits without voltage bootstrapper." IEEE Journal of Solid-State Circuits 38, no. 8 (August 2003): 1411–15. http://dx.doi.org/10.1109/jssc.2003.814418.

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40

Stochino, G. "Low offset, high voltage class AB bipolar voltage-current converter." Electronics Letters 32, no. 18 (1996): 1636. http://dx.doi.org/10.1049/el:19961150.

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MANHAS, PARSHOTAM S., and K. PAL. "REALIZATION OF LOW-VOLTAGE DIFFERENTIAL VOLTAGE CURRENT CONVEYOR." Journal of Circuits, Systems and Computers 21, no. 04 (June 2012): 1250031. http://dx.doi.org/10.1142/s0218126612500314.

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This paper presents floating gate MOSFET (FGMOS)-based second generation differential voltage current conveyor (DVCCII) at low voltage levels. In analog circuit design, the FGMOS transistors are very often used in low voltage circuits, where the reduction obtained in the transistor apparent threshold voltage is of great importance. The given circuit provides very high input impedance at its Y-terminals, low output impedance at X-terminal and high impedance at Z-terminals and consumes less power. This circuit is a powerful building block, especially for applications demanding differential or floating inputs. The circuit behavior has been verified using PSpice simulations for 0.5 μm technology and indicates the excellent performance.

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Chattopadhyay, Ritwik, Subhashish Bhattacharya, Nicole C. Foureaux, Igor A. Pires, Helder de Paula, Lênin Moraes, Porfírio C. Cortizio, Sidelmo M. Silva, Braz Cardoso Filho, and José A. de S. Brito. "Low-Voltage PV Power Integration into Medium Voltage Grid Using High-Voltage SiC Devices." IEEJ Journal of Industry Applications 4, no. 6 (2015): 767–75. http://dx.doi.org/10.1541/ieejjia.4.767.

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Peric, Dragoslav, and Miladin Tanaskovic. "Reliability of supply of switchgear for auxiliary low voltage in substations extra high voltage to high voltage." Tehnika 70, no. 6 (2015): 999–1004. http://dx.doi.org/10.5937/tehnika1506999p.

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Wang, Shuren, Fahad Saeed Alsokhiry, and Grain Philip Adam. "Impact of Submodule Faults on the Performance of Modular Multilevel Converters." Energies 13, no. 16 (August 6, 2020): 4089. http://dx.doi.org/10.3390/en13164089.

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Modular multilevel converter (MMC) is well suited for high-power and medium-voltage applications. However, its performance is adversely affected by asymmetry that might be introduced by the failure of a limited number of submodules (SMs) or even by severe deviations in the values of SM capacitors and arm inductors, particularly when the number of SMs per arm is relatively low. Although a safe-failed operation is easily achieved through the incorporation of redundant SMs, the SMs’ faults make MMC arms present unequal impedances, which leads to undesirable internal dynamics because of unequal power distribution between the arms. The severity of these undesirable dynamics varies with the implementation of auxiliary controllers that regulate the MMC internal dynamics. This paper studied the impact of SMs failure on the MMC internal dynamics performance, considering two implementations of internal dynamics control, including a direct control method for suppressing the fundamental component that may arise in the dc-link current. Performances of the presented and widely-appreciated conventional methods for regulating MMC internal dynamics were assessed under normal and SM fault conditions, using detailed time-domain simulations and considering both active and reactive power applications. The effectiveness of control methods is also verified by the experiment. Related trade-offs of the control methods are presented, whereas it is found that the adverse impact of SMs failure on MMC ac and dc side performances could be minimized with appropriate control countermeasures.

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Wu, A., and C. K. Ng. "High performance low power low voltage adder." Electronics Letters 33, no. 8 (1997): 681. http://dx.doi.org/10.1049/el:19970464.

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Psomopoulos, Constantinos S., Dimitrios A. Barkas, Stavros D. Kaminaris, George C. Ioannidis, and Panagiotis Karagiannopoulos. "Recycling potential for low voltage and high voltage high rupturing capacity fuse links." Waste Management 70 (December 2017): 204–11. http://dx.doi.org/10.1016/j.wasman.2017.09.018.

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Retdian, Nicodimus, Jieting Zhang, Takahide Sato, and Shigetaka Takagi. "Low-Voltage Variable Gain Current Amplifier for High-Voltage Signal Processing." IEEJ Transactions on Electronics, Information and Systems 129, no. 8 (2009): 1511–17. http://dx.doi.org/10.1541/ieejeiss.129.1511.

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Yan Yin and R. Zane. "Dual Low-Voltage IC Design for High-Voltage Floating Gate Drives." IEEE Transactions on Circuits and Systems I: Regular Papers 55, no. 6 (July 2008): 1751–58. http://dx.doi.org/10.1109/tcsi.2008.917995.

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Ting-Ting Song, Huai Wang, H. S. H. Chung, S. Tapuhi, and A. Ioinovici. "A High-Voltage ZVZCS DC--DC Converter With Low Voltage Stress." IEEE Transactions on Power Electronics 23, no. 6 (November 2008): 2630–47. http://dx.doi.org/10.1109/tpel.2008.2003984.

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Liang, Lixiao, Bo Yi, and Xing Bi Chen. "A Negative Low-Voltage Power Supply Integrated With High-Voltage Devices." IEEE Transactions on Electron Devices 65, no. 5 (May 2018): 1849–55. http://dx.doi.org/10.1109/ted.2018.2815722.

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Journal articles on the topic 'High voltage/low voltage redundancy'

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