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Journal articles on the topic 'IC Design Automation'
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Davidson, Scott. "Electronic Design Automation for IC Implementation, Circuit Design, and Process Technology and Electronic Design Automation for IC System Design, Verification, and Testing." IEEE Design & Test 35, no. 3 (2018): 98–99. http://dx.doi.org/10.1109/mdat.2018.2814988.
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Researcher. "THE TRANSFORMATIVE IMPACT OF AUTOMATION IN IC DESIGN AND RTL GENERATION." International Journal of Research In Computer Applications and Information Technology (IJRCAIT) 7, no. 2 (2024): 1290–99. https://doi.org/10.5281/zenodo.14170876.
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This article examines the transformative impact of automation on Integrated Circuit (IC) design and Register Transfer Level (RTL) generation in the semiconductor industry. As IC complexity continues to grow exponentially, traditional manual design methods have become increasingly untenable. We analyze how automation technologies, particularly in RTL generation, are addressing these challenges and reshaping the design landscape. The article presents a historical perspective on RTL generation, from manual coding to AI-driven optimization, and quantifies the benefits of automation through case studies of leading semiconductor companies. Key improvements include significant reductions in design cycle time, enhanced performance, and increased power efficiency. The article also explores emerging trends in IC design automation, such as AI-driven optimization, higher levels of abstraction, and seamless integration across the design flow. By discussing both current implementations and future possibilities, this work provides insights into how automation is not only improving design efficiency but also enabling new paradigms in semiconductor development. The potential challenges and opportunities presented by these advancements, including quantum-ready design and the democratization of chip design, are also considered, offering a comprehensive view of the future of IC design automation.
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KS, Srinidhi, and Ravi HK. "Automation Checks during PNR flow in IC Design." International Journal of Engineering Research in Electronics and Communication Engineering 9, no. 8 (2022): 6–10. http://dx.doi.org/10.36647/ijerece/09.08.a002.
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Automation is a technology in that there are different kind of approaches and procedures can be referred. The process of turning manual checks to automatic checks provides impressive benefits. Time saving, cost effective, higher quality, accurate result, less error in the tests which normally caused by human are the most important reasons to thinking about automation. The first and foremost step is to find out what should be automated. It is important to know the reason of automation if, it is worth or not. Here, the question is based on which reason it should decide for automation? For instance, after finishing all the runs of Innovus, Voltus, Pegasus, Quantus top level person must verify that whether it is meeting the specifications or not for checking that they need to go through all the audit files. Audit files doesn’t contain detailed information’s like incremental tag, tool version, time stamp, md5sum’s, waivable warnings, must fix warnings, must fix errors, input directory paths, Bump locations and VDD and VSS locations etc. and other factor is Time consuming.By doing automation it will gives required detailed information like latest incremental tag and tool version, md5sum its unique id, time stamp, errors, warnings, setup and hold views etc. so it can be automated by developing script using programming language called TCL (tool command language). These scripts will work for any block of a chip which is of 16nm technology.
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Researcher. "DECODING EDA IN IC PHYSICAL DESIGN: EXPLORING DESIGN, FLOW ALGORITHMS, AND TOOLS." International Journal of Computer Engineering and Technology (IJCET) 15, no. 5 (2024): 606–17. https://doi.org/10.5281/zenodo.13869210.
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This comprehensive article explores the critical role of Electronic Design Automation (EDA) in modern Integrated Circuit (IC) physical design. It examines the evolving landscape of semiconductor manufacturing, detailing the key stages of IC physical design, including floorplanning, placement, routing, and timing analysis. The article delves into the sophisticated flow algorithms that drive EDA tools, discussing wire length optimization, signal delay minimization, and power distribution balancing. It also highlights the features of leading EDA tools and their integration of advanced algorithms. Finally, the piece looks toward the future of EDA in IC design, exploring the potential impact of machine learning, 3D IC design, and quantum computing on the field.
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Huang, Yu. "Artificial Intelligence in Electronic Design Automation Assisting Physical Failure Analysis." EDFA Technical Articles 20, no. 3 (2018): 54–55. http://dx.doi.org/10.31399/asm.edfa.2018-3.p054.
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Kajtez, Nemanja, Yue Zhang, and Basel Halak. "Lockit: A Logic Locking Automation Software." Electronics 10, no. 22 (2021): 2817. http://dx.doi.org/10.3390/electronics10222817.
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The significant rise in the cost of manufacturing nanoscale integrated circuits (ICs) has led the majority of IC design companies to outsource the fabrication of their products to other companies, often located in different countries. The multinational nature of the hardware supply chain has led to a host of security threats, including IP piracy, IC overproduction, and Trojan insertion. To combat these, researchers have proposed logic locking techniques to protect the intellectual properties of the design and increase the difficulty of malicious modification of its functionality. However, the adoption of logic locking approaches has been rather slow due to the lack of integration with the IC production process and the lack of efficacy of existing algorithms. This work automates the logic locking process by developing software using Python that performs the locking on a gate-level netlist, which can be integrated with the existing digital synthesis tools. Analysis of the latest logic locking algorithms has demonstrated that the SFLL-HD algorithm is one of the most secure and versatile when trading-off levels of protection against different types of attacks and was thus selected for implementation. The presented tool can also be expanded to incorporate the latest locking mechanisms to keep up with the fast-paced development in this field. The paper also presents a case study to demonstrate the functionality of the tool and how it could be used to explore the design space and compare different locking solutions.
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Y.Priya, Mrs., and Kumar Mr. K. Santhosh. "Machine Learning Role in IC Design of VLSI." International Journal of Research 12, no. 5 (2025): 460–70. https://doi.org/10.5281/zenodo.15525593.
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AI has influenced the field of integrated circuits, this being its first application in AI. This technology replaces the traditional VLSI design methodology existing today. Automation of design developments have been implemented by replacing the time-consuming manual design’s generated by humans. This advancement would lead to massive revolution in the area of hardware computation and AI research domain. With the advent of modern chip, which are highly complex, it is a very tedious and slow process to design with humanly aids. Artificial Intelligence (AI) has been playing an increasingly important role in VLSI (Very Large-Scale Integration) design and semiconductor manufacturing. AI technologies are being used to improve the efficiency, accuracy, and performance of various aspects of VLSI design the process of confirming the critical design’s manually also finds no hope. Hence automation of various task is done in past 40 years, and many other complex tasks are automated. When someone comes with a new idea (in view with computation, processing, optimization, interconnect fabrication) the process of designing is automated. Companies such as IBM and Intel are enabled with their own CAD Organization for handling these automated tasks. CAD tools have been sold by many companies such as Cadence, Synopsis and Mentor Graphics serves as implementation of AI in Chip design. Machine learning has extended its arm in aiding feasible solution for many kinds of problems in many engineering fields.
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Makris, C. A., and C. Toumazou. "Analog IC design automation. II. Automated circuit correction by qualitative reasoning." IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 14, no. 2 (1995): 239–54. http://dx.doi.org/10.1109/43.370423.
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Mirkovic, Dejan, та Predrag Petkovic. "Design automation of ΔΣ switched capacitor modulators using spice and MATLAB". Serbian Journal of Electrical Engineering 11, № 1 (2014): 47–59. http://dx.doi.org/10.2298/sjee131017005m.
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Concerning the fact that the design of contemporary integrated circuits (IC) is practically impossible without using sophisticated Electronic Design Automation (EDA) software, this paper gives some interesting thoughts and considerations about that issue. As technology processes advances on year basis consequently EDA industry is forced to follow this trend as well. This, on the other hand, requires IC designer to frequently and efficiently accommodate to new working environments. Authors of this paper suggest a method for high level circuit analysis that is based on using common (open source or low cost) circuit simulators but precise and fast enough to meet requirements imposed by demanding mixed-signal blocks. The paper demonstrates the proposed EDA procedure on an example of second order ?? modulator design. It illustrates considerable simulation time saving which is more than welcome in a world of analogue and mixed-signal design.
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Ammes, Gabriel, Paulo Francisco Butzen, André Inácio Reis, and Renato Ribas. "Two-Level and Multilevel Approximate Logic Synthesis." Journal of Integrated Circuits and Systems 17, no. 3 (2023): 1–14. http://dx.doi.org/10.29292/jics.v17i3.661.
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Approximate computing represents a modern design paradigm that allows systems to have imprecise or inexact execution, aiming to optimize circuit area, performance, and power dissipation. The automatic construction of approximate integrated circuits (IC) is performed through computer-aided design (CAD) tools available in electronic design automation (EDA) frameworks. Approximate logic synthesis (ALS), in particular, treats two-level and multilevel topologies of combinational blocks in the development of digital IC design. This work provides a survey of ALS methods presented in the literature, from the pioneers until the state-of-the-art approaches.
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Toumazou, C., and C. A. Makris. "Analog IC design automation. I. Automated circuit generation: new concepts and methods." IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 14, no. 2 (1995): 218–38. http://dx.doi.org/10.1109/43.370422.
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Zhang, Ren Cai, Xiang Yu, Xing Ju Liu, Jin Hai Zhai, and Zhen Wu Ning. "Study on Mechanical Automation with Design of Rapid Milk Detector Based on Freezing Point." Advanced Materials Research 703 (June 2013): 282–86. http://dx.doi.org/10.4028/www.scientific.net/amr.703.282.
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An efficient automated milk detector based on freezing point depression is designed. This detector shares characters of high efficiency and good stability with accuracy and automation. Its main parts include temperature sensor of IC (Integrated Circuit), pinion-rack mechanism and crank-rocker mechanism and electronic control system. Monitoring in-situ change of milk freezing curve and developing efficiency of sampling can be available by means of pinion-rack mechanism and IC temperature sensor mechatronics design. As a result, adulterating status of milk can be discriminated in a rapid and accurate and automated way. The detector may be employed to detect liquid foods other than milk as well.
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Ma, Shu Qing, and Chuan Jun Wang. "Design of Laboratory Management System Based on RFID." Advanced Materials Research 945-949 (June 2014): 2689–92. http://dx.doi.org/10.4028/www.scientific.net/amr.945-949.2689.
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RFID (Radio Frequency Identification, RFID) technology is developed in the eighty s of the 20th century a automatic Identification technology. Using radio frequency way between non-contact rf card reader and two-way data transmission, in order to achieve the purpose of target recognition and data exchange. Article from the traditional type of code, compared magnetic card and IC card, rf card has a non-contact, fast reading, no wear, is not affected by the environment, the characteristics of long service life, easy to use and have anti-collision function, can handle multiple CARDS at the same time. Abroad, rfid technology has been widely used in industrial automation, business automation, transportation control management, and many other fields.
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ACITO, Bill. "“A Cross-Domain, System Planning Methodology”." International Symposium on Microelectronics 2018, no. 1 (2018): 000005–12. http://dx.doi.org/10.4071/2380-4505-2018.1.000005.
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Abstract Through several decades of electronic product design, three high-level design domains have emerged; IC (SoC) design, package (SiP) design and board (PCB/PWB) design. These three domains are separated and somewhat isolated, based on the EDA tools they use and by domain expertise. In many cases, the design tools come from 2 or 3 different EDA companies, leading to limited or no methods of sharing design data across the three domains. This typically leads to an “over-the-wall” design approach, resulting in downstream layout complexities for the package and board design teams, requiring domain expertise (human in the loop) in these design domains. Typically, this high-level of complexity occurs because the package substrate and board form-factor are not planned and optimized in context of the IC(s). Thus, the automation of these layouts becomes nearly impossible and tremendous human interaction (domain expertise) is the only way to complete the designs cost-effectively. Moreover, this methodology directly impacts time-to-market and results in products that do not live up to cost or performance expectations.
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Gibb, Stuart W., John W. Wood, R. Fauzi, and C. Mantoura. "Automation of flow injection gas diffusion-ion chromatography for the nanomolar determination of methylamines and ammonia in seawater and atmospheric samples." Journal of Automatic Chemistry 17, no. 6 (1995): 205–12. http://dx.doi.org/10.1155/s1463924695000320.
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The automation and improved design and performance of Flow Injection Gas Diffusion-Ion Chromatography (FIGD-IC), a novel technique for the simultaneous analysis of trace ammonia (NH3) and methylamines (MAs) in aqueous media, is presented. Automated Flow Injection Gas Diffusion (FIGD) promotes the selective transmembrane diffusion of MAs and NH3from aqueous sample under strongly alkaline (pH > 12, NaOH), chelated (EDTA) conditions into a recycled acidic acceptor stream. The acceptor is then injected onto an ion chromatograph where NH3and the MAs are fully resolved as their cations and detected conductimetrically. A versatile PC interfaced control unit and data capture unit (DCU) are employed in series to direct the selonoid valve switching sequence, IC operation and collection of data. Automation, together with other modifications improved both linearily (R2> 0.99 MAs 0-100 nM, NH30-1000 nM) and precision (<8%) of FIGD-IC at nanomolar concentrations, compared with the manual procedure. The system was successfully applied to the determination of MAs and NH3in seawater and in trapped particulate and gaseous atmospheric samples during an oceanographic research cruise.
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Dehbashian, Maryam, and Mohammad Maymandi-Nejad. "An enhanced optimization kernel for analog IC design automation using the shrinking circles technique." Engineering Applications of Artificial Intelligence 58 (February 2017): 62–78. http://dx.doi.org/10.1016/j.engappai.2016.11.007.
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Lagos-Eulogio, Pedro, Pedro Miranda-Romagnoli, Juan Carlos Seck-Tuoh-Mora, and Norberto Hernández-Romero. "Improvement in Sizing Constrained Analog IC via Ts-CPD Algorithm." Computation 11, no. 11 (2023): 230. http://dx.doi.org/10.3390/computation11110230.
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In this work, we propose a variation of the cellular particle swarm optimization algorithm with differential evolution hybridization (CPSO-DE) to include constrained optimization, named Ts-CPD. It is implemented as a kernel of electronic design automation (EDA) tool capable of sizing circuit components considering a single-objective design with restrictions and constraints. The aim is to improve the optimization solutions in the sizing of analog circuits. To evaluate our proposal’s performance, we present the design of three analog circuits: a differential amplifier, a two-stage operational amplifier (op-amp), and a folded cascode operational transconductance amplifier. Numerical simulation results indicate that Ts-CPD can find better solutions, in terms of the design objective and the accomplishment of constraints, than those reported in previous works. The Ts-CPD implementation was performed in Matlab using Ngspice and can be found on GitHub (see Data Availability Statement).
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Li, Weihui, Haoyu Wen, and Peiji Duan. "Key technologies and international trends in EDA field of digital IC design: a patent analysis." SHS Web of Conferences 140 (2022): 01020. http://dx.doi.org/10.1051/shsconf/202214001020.
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Currently, Electronics Design Automation (EDA) software tools are highly monopolized internationally. In China, EDA suffers from the pain of “stuck neck”. This paper will find out the key technologies in the EDA field through 3D sand table clustering algorithm, and analyze a series of patent data of monopoly three companies (Synopsys, Cadence, Mentor Graphic), in order to help local EDA enterprises perceive the technology status and development trend of the international EDA field.
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Sutita, Yuwono izzah, and Heri Irwan. "Perancangan Arduino Uno pada Design Mesin Pick and Place Sorting Colour Automation untuk Meningkatkan Produktivitas." Journal of Manufacturing in Industrial Engineering & Technology 3, no. 2 (2024): 72–82. https://doi.org/10.30651/mine-tech.v3i2.23987.
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Arduino Uno adalah sebuah mikrokontroler open-source yang berbasis pada mikrokontroler Atmel AVR. Arduino Uno memungkinkan pengguna untuk merancang dan mengembangkan berbagai proyek elektronik dengan mudah. Arduino Uno ini menggunakan Intergrated Circuit(IC) yaitu mikrokontroler ATMega328P. Arduino Uno dirancang agar mudah digunakan oleh pemula sekalipun. Tersedia banyak tutorial dan komunitas yang siap membantu. Arduino Uno digunakan untuk mengendalikan putaran motor servo Sg90, dan untuk membaca warna pada sensor TCS3200, dan .Tujuan dari jurnal ini untuk mengetahui Komponen apa saja yang digunakan untuk Mengendalikan Input/Output dan juga cara penulisan Program dari Arduino Uno tersebut. Dari hasil Jurnal ini dapat mengetahui komponen apa saja yang digunakan pada Mesin robot pick and place sorting colour automation dan untuk pembuatan rancangan mesin. Dari rancangan ini diharapkan dapat mengendalikan Mesin robot pick and place sorting colour automation secara bersamaan.
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Wang, Ke Sheng, Jia Lin, Jia Cheng, and Lin Hong Ji. "Investigation on the Development of Knowledge-Based Engineering and its Application in Rapid Design of Process Chamber of IC Equipment." Applied Mechanics and Materials 373-375 (August 2013): 2147–55. http://dx.doi.org/10.4028/www.scientific.net/amm.373-375.2147.
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Design capability of process chamber in IC equipment is of great significance for enhancing the core competitiveness of IC industry. The traditional design methodologies adopted by most enterprises are based on experience and the efficiency is not high. As a new intelligent design methodology, Knowledge-based Engineering (KBE) can realize automation of repeat design and complete the product design quickly to meet market demands. In this paper, the background of KBE is discussed systematically and the evolution of different phases of the technology is described. The definitions of KBE given by the relevant institutions from different perspectives are enumerated and the structure framework is shown. KBE is also compared with other design methodologies commonly used. The main technologies of KBE are introduced in detail, and the domestic and overseas application status of KBE is analyzed. In addition, the roles of this methodology in product design are summed up and the future trends are predicted. At the same time, the design demands and tasks of process chamber are confirmed according to the practice of IC equipment. Moreover, current prevalent problems in the field are pointed out, and the basic ideas and the key steps applying KBE to the rapid design of process chamber are put forward.
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Baungarten-Leon, Emilio Isaac, Susana Ortega-Cisneros, Mohamed Abdelmoneum, Ruth Yadira Vidana Morales, and German Pinedo-Diaz. "The Genesis of AI by AI Integrated Circuit: Where AI Creates AI." Electronics 13, no. 9 (2024): 1704. http://dx.doi.org/10.3390/electronics13091704.
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The typical Integrated Circuit (IC) development process commences with formulating specifications in natural language and subsequently proceeds to Register Transfer Level (RTL) implementation. RTL code is traditionally generated through manual efforts, using Hardware Description Languages (HDL) such as VHDL or Verilog. High-Level Synthesis (HLS), on the other hand, converts programming languages to HDL; these methods aim to streamline the engineering process, minimizing human effort and errors. Currently, Electronic Design Automation (EDA) algorithms have been improved with the use of AI, with new advancements in commercial (such as ChatGPT, Bard, among others) Large Language Models (LLM) and open-source tools presenting an opportunity to automate the chip design process. This paper centers on the creation of AI by AI, a Convolutional Neural Network (CNN) IC entirely developed by an LLM (ChatGPT-4), and its manufacturing with the first fabricable open-source Process Design Kit (PDK), SKY130A. The challenges, opportunities, advantages, disadvantages, conversation flow, and workflow involved in CNN IC development are presented in this work, culminating in the manufacturing process of AI by AI using a 130 nm technology, marking a groundbreaking achievement as possibly the world’s first CNN entirely written by AI for its IC manufacturing with a free PDK, being a benchmark for systems that can be generated today with LLMs.
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Mascorro-Guardado, Emma, Susana Ortega-Cisneros, Emilio Isaac Baungarten-Leon, et al. "Design and Test of Offset Quadrature Phase-Shift Keying Modulator with GF180MCU Open Source Process Design Kit." Electronics 13, no. 9 (2024): 1705. http://dx.doi.org/10.3390/electronics13091705.
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This article explores the evolution of integrated circuits (ICs), highlighting the fundamental role of open source Electronic Design Automation (EDA) tools in their development. It describes the IC’s design flow, differentiating between Front-end and Back-end design stages, and details the process of implementing the digital stage in offset quadrature phase-shift keying (OQPSK) modulation in an IC, including its hardware description language (HDL), the implementation test in the field-programmable gate array (FPGA), and the physical layout using the first manufactured open source process design kits (PDKs) in Global Foundries’ 180 nm, as well as the use of OpenLane and Caravel. To conclude, the results of the physical tests obtained from the digital modulation are presented, as well as the performance of the raised cosine shaping filter.
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Cárdenas Concha, Luz Sheyla, Francisco Elías Rodríguez Novoa, and Eddier Albino Flores Flores. "Technological Surveillance and Competitive Intelligence to improve research lines in university education." Revista Ciencia y Tecnología 18, no. 4 (2022): 43–61. http://dx.doi.org/10.17268/rev.cyt.2022.04.03.
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The research is related to the field of knowledge, considering research, development and innovation (R+D+i), using tools of Technological Surveillance and Competitive Intelligence (VT-IC), with the objective of determining an improvement proposal for research lines in university education. The work of descriptive design and cross-sectional, presents a mixed approach; analyzing qualities and academic research needs through expert judgment. The methodology used literature reviews and consultation of scientific databases to propose a VT-IC model. The results of the model were evaluated in two interactions (Delphi Method) ending with a rating of very good in 80%. Conclusions: The application of VT-IC model required an internal and external analysis, considering needs, problems, research areas and above all the experience of researchers, allowing new paradigms and approaches linked to educational processes and new areas of research, experts consider applicable, allowing automation and new mechanisms to search for information that allows decision making, rethinking research areas, professional competencies, new lines of research and future trends for an organizational alignment, oriented to a disruptive design approach to the generation of intelligent curricula.
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Li, Jiulin. "A study of advances in machine learning-based electronic design automation." Applied and Computational Engineering 102, no. 1 (2024): 96–101. http://dx.doi.org/10.54254/2755-2721/102/20241005.
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Abstract. The electronic design automation (EDA) is a convenient tool for designing integrated circuits (IC), which is employed extensively both in academic and engineering. The design of integrated circuits is conducted in accordance with a defined design flow, commonly referred to as the chip design flow, which can be divided into two distinct parts, the front-end design and the back-end design. Following a long period of evolution, the chip design flow of EDA has been gradually improved. Besides, it achieved some accomplishments during this period. However, with the growing demand of ICs, especially Very Large-Scale Integration Circuit (VLSI), the existing EDA is not adequate for the requirement. In addition, the EDA technology has been so developed that it is relatively less flexible. In this context, concerns about the future of EDA have recently emerged. In response to this challenge, research has mentioned that machine learning methods (ML methods) can improve the functionality of EDA. The ML method covers most of steps of EDAs design flow, especially back-end design. The machine learning-based electronic design automation is still in its infancy, which is presented with a multitude of challenges. Therefore, the paper explores the development of EDA by reviewing and organizing the related literature, and summarizes the application of ML methods in EDA, thereby providing the future development trend of ML-based EDA.
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Valencia-Ponce, Martin Alejandro, Astrid Maritza González-Zapata, Luis Gerardo de la Fraga, Carlos Sanchez-Lopez, and Esteban Tlelo-Cuautle. "Integrated Circuit Design of Fractional-Order Chaotic Systems Optimized by Metaheuristics." Electronics 12, no. 2 (2023): 413. http://dx.doi.org/10.3390/electronics12020413.
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Nowadays, a huge amount of research is done on introducing and implementing new fractional-order chaotic systems. In the majority of cases, the implementation is done using embedded hardware, and very seldom does it use integrated circuit (IC) technology. This is due to the lack of design automation tools ranging from the system level down to layout design. At the system level, the challenge is guaranteeing chaotic behavior by varying all parameters while optimizing dynamical characteristics, such as the Lyapunov spectrum and the Kaplan–Yorke dimension. Using embedded hardware, the implementation is straightforward, but one must perform a scaling process for IC design, in which the biases may be lower than 1 volt but the amplitudes of the state variables of the chaotic systems can have values higher than one. In this manner, this paper describes three levels of abstraction to design fractional-order chaotic systems: The first one shows the optimization of a case study, the mathematical model of the fractional-order Lorenz system to find the fractional-orders of the derivatives, and the coefficients that generate better chaotic behavior. The second level is the block description of a solution of the mathematical model, in which the fractional-order derivatives are approximated in the Laplace domain by several approximation methods. The third level shows the IC design using complementary metal–oxide–semiconductor (CMOS) technology. The transfer functions approximating the fractional-order derivatives are synthesized by active filters that are designed using operational transconductance amplifiers (OTAs). The OTAs are also used to design adders and subtractors, and the multiplication of variables is done by designing a CMOS four-quadrant multiplier. The paper shows that the simulation results scaling the mathematical model to have amplitudes lower than ±1 are in good agreement with the results using CMOS IC technology of 180 nm.
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Taufik, Taufik, and Wahyuni Putri. "Perancangan Prototype Early Warning System pada Kontrol On/Off Belt Conveyor Menggunakan PLC Siemens S7-300." Jurnal Optimasi Sistem Industri 14, no. 1 (2016): 116. http://dx.doi.org/10.25077/josi.v14.n1.p116-137.2015.
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Nowdays, automation system become important aspect in manufacturing process because could make integration manufacturing process on it more effective and more efficient. PLC or Programmable Logic Controller is one kind of automation system. Many industries use PLC as automation control device in manufacturing process to control all kind of process. For example at transportation process of coals in generator industry. Coals could be burned because main elements of coals are carbon, hydrogen, and oxygen. Base on this prototype early warning system design, we get the result if sensor thermocouple detect temperature more large than setpoint temperature (it is 2000C), then PLC will give an order to shut down the output, that is belt conveyor. Result of this prototype design could used at coals transportation as an early warning system. Design of prototype early warning system could detect and prevent fire because of consequence of burned coals until spreading of fire could be avoided.Keywords: PLC Siemens S7-300, IC AD 595, Sensor Thermocouple KAbstrakPada masa sekarang ini, sistem otomasi menjadi aspek penting dalam proses manufakturing karena mampu mengintegrasikan proses manufaktur sehingga menjadi lebih efektif dan efisien. PLC atau Programmable Logic Controller merupakan salah satu jenis sistem otomasi. Banyak industri menggunakan PLC sebagai alat pengendali otomatis pada proses manufaktur untuk mengendalikan semua jenis proses. Sebagai contohnya adalah proses transportasi batubara pada industri pembangkit listrik. Batubara dapat dibakar karena elemen utamanya adalah karbon, hidrogen dan oksigen. Pada desain prototype early warning system, jika sensor thermocouple mendeteksi temperatur melebihi set poin yang ditentukan (200°C), maka PLC akan memberikan perintah untuk mematikan belt conveyor. Hasil dari prototype ini dapat digunakan pada sistem transportasi batubara sebagai early warning system. Desain dari prototype early warning system dapat mendeteksi dan mencegah kebakaran akibat terbakarnya batubara.Keywords: PLC Siemens S7-300, IC AD 595, Sensor Thermocouple K
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S.Govindaraj and G.Lakshmi. "RePhoSim: A Scalable, Modular, and Signal Flow Modeling Approach for Large Scale Integrated Photonic Circuits." Spectrum International Journal of Multidisciplinary Research 1, no. 1 (2023): 1–8. https://doi.org/10.5281/zenodo.8162907.
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Due to the complexity in the rigorous electromagnetic simulation (EM) the design and verification of large scale integrated photonic circuits require approximate numerical simulations. In this article a reconfigurable photonic simulation (RePhoSim) approach is proposed based on traditional VLSI front end functional simulation approach. The evolution of photonic integrated circuits (ICs) become larger and more complex, demands design and simulation approaches similar to electronic design automation (EDA) tools. In VLSI electronic circuits, the functional simulation is accomplished by hardware description language (HDL). In this article, we present a scalable, modular, and signal flow modeling technique using VHDL for large scale integrated (LSI) photonic IC. Apart from the behavioral modeling of LSI photonic IC, quasi-rigorous empirical modeling is developed based on the finite-difference beam propagation method (FD-BPM). Using our proposed approach, a 4×4 dilated Banyan switch fabric is demonstrated by designing 1×2, 2×1, 2×2 crossbar switches and Mach−Zehnder modulator (MZM). The transmission levels of the designed photonic components and a datacenter architecture of 4×4 dilated Banyan switch fabrics are estimated. The proposed approach greatly reduces the computational complexity in the large scale integrated photonic circuits and the proposed approach enables the electronic IC designer to design the photonic ICs with different levels of abstractions
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Ige, Afolabi, Linhao Yang, Hang Yang, Jennifer Hasler, and Cong Hao. "Analog System High-Level Synthesis for Energy-Efficient Reconfigurable Computing." Journal of Low Power Electronics and Applications 13, no. 4 (2023): 58. http://dx.doi.org/10.3390/jlpea13040058.
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The design of analog computing systems requires significant human resources and domain expertise due to the lack of automation tools to enable these highly energy-efficient, high-performance computing nodes. This work presents the first automated tool flow from a high-level representation to a reconfigurable physical device. This tool begins with a high-level algorithmic description, utilizing either our custom Python framework or the XCOS GUI, to compile and optimize computations for integration into an Integrated Circuit (IC) design or a Field Programmable Analog Array (FPAA). An energy-efficient embedded speech classifier benchmark illustrates the tool demonstration, automatically generating GDSII layout or FPAA switch list targeting.
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Tamir, Azwad, Milad Salem, Jie Lin, Qutaiba Alasad, and Jiann-shiun Yuan. "Multi-Tier 3D IC Physical Design with Analytical Quadratic Partitioning Algorithm Using 2D P&R Tool." Electronics 10, no. 16 (2021): 1930. http://dx.doi.org/10.3390/electronics10161930.
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In this study, we developed a complete flow for the design of monolithic 3D ICs. We have taken the register-transfer level netlist of a circuit as the input and synthesized it to construct the gate-level netlist. Next, we partitioned the circuit using custom-made partitioning algorithms and implemented the place and route flow of the entire 3D IC by repurposing 2D electronic design automation tools. We implemented two different partitioning algorithms, namely the min-cut and the analytical quadratic (AQ) algorithms, to assign the cells in different tiers. We applied our flow on three different benchmark circuits and compared the total power dissipation of the 3D designs with their 2D counterparts. We also compared our results with that of similar works and obtained significantly better performance. Our two-tier 3D flow with AQ partitioner obtained 37.69%, 35.06%, and 12.15% power reduction compared to its 2D counterparts on the advanced encryption standard, floating-point unit, and fast Fourier transform benchmark circuits, respectively. Finally, we analyzed the type of circuits that are more applicable for a 3D layout and the impact of increasing the number of tiers of the 3D design on total power dissipation.
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Andwika, Ida Bujangga, Eli Yundari, and Yolla Florenza. "Hospital Management Information System in Increasing Efficiency." IC-ITECHS 5, no. 1 (2024): 890–94. https://doi.org/10.32664/ic-itechs.v5i1.1604.
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Healthcare services are the main topic because of the high complexity challenges in the health sector. The purpose of this study is to determine the implementation of Hospital Information System (HIS) in increasing the efficency of healthcare services. The research design used in this article is a literature review method related to Hospital Information Systems in supporting the efficiency of hospital services using databases. In this study, the researcher collected literature review data with a thematic structure based on the concept of thinking using the keywords "hospital information system", "information system efficiency", and "healthcare efficiency" which were compiled to answer scientific questions by grouping and discussing literature sources accordingly to the theme or topic. The results showed that Hospital Information System can minimize the complexity of healthcare services by increasing organizational efficiency through innovation in developing information system based on business process management, service automation, reducing costs, improving hospital performance, which aims to develop human resources, organizational development, and technological quality improvement to achieve efficency in healthcare services.
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Qing, Bai Yuan, Gang Li, Bo Zeng, and Zhao Sheng Teng. "Single-Phase Prepayment Meter Based on RFID+STS." Applied Mechanics and Materials 333-335 (July 2013): 2384–90. http://dx.doi.org/10.4028/www.scientific.net/amm.333-335.2384.
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The emergence of the radio frequency type prepayment meter will guide the inhabitant energy meter management toward automation from IC card management and the artificial metering work. In this paper, it introduces the principle of the single-phase prepayment meter based on radio frequency identification (RFID), develops a method of energy sale management that integrates radio frequency identification and IEC62055-41 standard transfer specification (STS), and designs its hardware and software. This design makes full use of the advantages that radio frequency card is passivity and non-contact, and STS is a sound and versatile specification. The production practices shows that the radio frequency card reads and writes stably, has strong ability of anti-interference, delivers data credibly, and the management is real-time and convenience.
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Moturu, Anoosha, Jessica Howe, and Grace Tran. "Qualitative Review of Wrong-Site Surgeries: What Side Will My Surgery Take Place?" Proceedings of the International Symposium on Human Factors and Ergonomics in Health Care 7, no. 1 (2018): 267–73. http://dx.doi.org/10.1177/2327857918071063.
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Wrong site surgeries (WSS) are classified as “never events” and signify adverse events that are preventable. The prevalence of procedures in the wrong location is up to 50 WSS per week in the United States. Informed consent (IC) related contributing factors include communication breakdowns between staff and across units, lack of cross-checking documents, equipment-related issues, and lack of automation in document coordination. As part of a patient safety initiative, a qualitative review of IC and WSS-related factors was conducted using patient safety event (PSE) data within a large healthcare system in the mid-Atlantic region. A word search query of the PSE database containing 132,683 PSEs from 2009 to 2017 was performed using a comprehensive codebook, and inter-rater reliability was established. Qualitative analysis of the PSE data indicated highest frequencies of the following codes: mAbsence of consent for treatment (25.7%), Incorrect or missing information recorded in the IC form (15.5%), and Ambiguity in laterality of the procedure on IC form/other medical documentation (12.5%). These contributing factors often lead to Late procedure start times (6.6%) and New consent document procurement (6.42%). These findings inform the need for system-based interventions to reduce risk. A targeted intervention focused on improving the design of IC forms and other medical documents could address some of these vulnerabilities. Developing a system-based approach to cross check procedure information could increase the reliability of system safeguards to reduce the risk of potential patient harm.
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Martins, Ricardo. "Closing the Gap Between Electrical and Physical Design Steps with an Analog IC Placement Optimizer Enhanced with Machine-Learning-Based Post-Layout Performance Regressors." Electronics 13, no. 22 (2024): 4360. http://dx.doi.org/10.3390/electronics13224360.
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The design of integrated circuits in the analog spectrum is intricate due to the signals’ continuous nature. Additionally, it is strongly affected by the physical implementation of their devices and interconnections on the layout, a design task that has stubbornly defied all automation attempts. In this paper, one limitative factor is identified that must be addressed to finally push automation tools into the analog integrated circuit design flow: accurate assessment of post-layout performance degradation. For this purpose, a performance-driven placement generator highly integrated with off-the-shelf tools already adopted by circuit/layout designers, i.e., circuit simulator, verification tools (layout-versus-schematic) and layout extractor, is proposed. Toward maximum post-layout accuracy, this generator promotes an exhaustive simulation-based synthesis, extracting, simulating and verifying the post-layout functional behavior of every candidate floorplan. Additionally, to bypass the time-consuming extractions/simulations and accelerate synthesis, novel post-layout performance regressors based on different highly accurate machine learning techniques are also being developed. The data used to train them can be directly and conveniently acquired from previous precise post-placement simulations. Experimental results over two analog circuit structures show that a set of performance regressors based on tree-based models, while operating on compressed design spaces, allow for the speeding up of synthesis by more than 20×, which represents a step toward an efficient fully automatic performance-driven analog integrated circuit design flow.
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Khairullah, Shawkat Sabah, and Abdel-Nasser Sharkawy. "Design and Implementation of a Reliable and Secure Controller for Smart Home Applications Based on PLC." Journal of Robotics and Control (JRC) 3, no. 5 (2022): 614–21. http://dx.doi.org/10.18196/jrc.v3i5.15972.
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Programmable logic controllers (PLCs) are increasingly being used to realize modern safety-critical instrumentation and control (IC) applications. Examples of these applications are industrial automation and control systems, plant process safety protection systems, smart home systems and digital IC systems embedded in nuclear power plants (NPPs) that require high levels of performance, reliability, and flexibility. The PLC is a flexible, programmable, and robust digital device that can execute all logical and mathematical runtime functions of the IC application and operate in harsh-critical environments. This paper proposes a PLC-based home security controller based on the ladder logic programming model. The design, analysis, and hardware implementation of this controller are presented in this paper. The designed system consists of three basic modules which are a sensing module used for reading the data of the input field devices for the smart home application, a computation-based decisional module used for executing the programming model, and an actuating module used for sending the control commands to the output field devices. The proposed home security system utilized different types of sensors such as a laser photoelectric sensor, a motion or proximity sensor, and a limit switch. In addition, a siren speaker, a light tower including three lights red, yellow, and green, two push-pull switches and emergency push-pull buttons were used as control inputs and output indicators in the implementation of this work This designed system is implemented on the Allen-Bradley CompactLogix PLC controller and Human Machine Interface (HMI) panel programmed as the graphical user interface. The experimental simulation results of the real hardware connection demonstrate that the proposed system is reliable, safe, and feasible for smart home security applications.
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Hou, Yuemin, and Linhong Ji. "ON FORMATION OF STRUCTURES: DESIGN EXAMPLES AND DISCUSSION." Proceedings of the Design Society 1 (July 27, 2021): 2287–96. http://dx.doi.org/10.1017/pds.2021.490.
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AbstractThis paper discusses the formation of structures by taking the process of gene transcription and translation as the template. The hypothesis of this paper is that the gene transcription and translation process can describe the formation of structures both in engineering design and in biology. The paper first presents design examples including integrated circuit (IC) chambers, flapping wings of bird robots, and typical mechanisms and formulate the formation patterns of the design process as four steps: information interpretation, selection of building blocks, the connection of building blocks, and formation of structures. The key step of the formation process is to assemble building blocks for structures both in engineering and in biology. Building blocks in biology are amino acids while they are structures in design. The autonomous degree of the formation process depends on the level of building blocks. The reuse degree of the building blocks depends on the level of building blocks too. In biology, structures of proteins are self-organized, so one way towards design automation is to use lower-level building blocks.
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Mushtaq, Ahmed, V. Kiran, and Nandy Subrata. "Debug Utility for Validation of OASIS Parser." International Journal of Engineering and Advanced Technology (IJEAT) 9, no. 5 (2020): 914–17. https://doi.org/10.35940/ijeat.E9912.069520.
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In EDA industry, GDSII format is the IC industry de facto standard for IC layout data exchange. The designs developed may require up to 1 Billion Byte (1TByte) of disk data. This huge amount of Big Data not only slows down the runtimes from design to physical verification but also increases the time to get a design to market. On the other hand, OASIS stream format which is replacement to GDSII is relatively new and is emerging in the industry. The OASIS stream format significantly reduces the data and thereby the tool is much likely to run faster. There hasn’t been significant development in enhancing the robustness of its usage due to lack of in-house test cases. This paper presents an approach to develop a debug utility for OASIS parser validation to increase its robustness. The debug utility is implemented using a Singleton design pattern. The utility essentially enables us to compare the data associated with both the stream formats and highlights the differences. The effective memory utilization of the proposed design is zero since all the structure are dynamically created and destroyed after its use. Iterative and unit testing were performed on the utility and the proposed design was tested with real time test cases to verify its robustness.
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Kung, Ying-Shieh, Seng-Chi Chen, Jin-Mu Lin, and Tsung-Chun Tseng. "FPGA-realization of a speed control IC for induction motor drive." Engineering Computations 33, no. 6 (2016): 1835–52. http://dx.doi.org/10.1108/ec-08-2015-0260.
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Purpose – The purpose of this paper is to integrate the function of a speed controller for induction motor (IM) drive, such as the speed PI controller, the current vector controller, the slip speed estimator, the space vector pulse width modulation scheme, the quadrature encoder pulse, and analog to digital converter interface circuit, etc. into one field programmable gate array (FPGA). Design/methodology/approach – First, the mathematical modeling of an IM drive, the field-oriented control algorithm, and PI controller are derived. Second, the very high speed IC hardware description language (VHDL) is adopted to describe the behavior of the algorithms above. Third, based on electronic design automation simulator link, a co-simulation work constructed by ModelSim and Simulink is applied to verify the proposed VHDL code for the speed controller intellectual properties (IP). Finally, the developed VHDL code will be downloaded to the FPGA for further control the IM drive. Findings – In realization aspect, it only needs 5,590 LEs, 196,608 RAM bits, and 14 embedded 9-bit multipliers in FPGA to build up a speed control IP. In computational power aspect, the operation time to complete the computation of the PI controller, the slip speed estimator, the current vector controller are only 0.28 μs, 0.72 μs, and 0.96 μs, respectively. Practical implications – Fast computation in FPGA can speed up the speed response of IM drive system to increase the running performance. Originality/value – This is the first time to realize all the function of a speed controller for IM drive within one FPGA.
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Takeuchi, Yoshimi. "Message from Editor-in-Chief." International Journal of Automation Technology 1, no. 1 (2007): 3. http://dx.doi.org/10.20965/ijat.2007.p0003.
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On behalf of the editorial committee of International Journal of Automation Technology, I would like to sincerely ask all of you a favour of me to activate this journal since I am convinced that the automation technology is indispensable to the convenience and prosperity of human being. The automation technology began with the development and introduction of numerical control (NC) machine tools in the latter of 1950s. In 1960s, the technology was applied to assemble electric goods and automobiles together with the development of a wide variety of automationrelated methods such as industrial robots, semiconductor technologies and so on. In 1970s, this tendency had greatly affected the automation of production systems, which was called FA (Factory Automation or Flexible Manufacturing System), that is, flexible systems to rapidly cope with the change in the sort and quantity of products. The construction of FA is still continuing even now. The current state of art in production automation is the evolution by making the most of IT (Information Technology), where there are infinite tasks to be solved, for example, the cooperation with design, manufacturing and sales, life cycle control of products from production to waste by IC tag, product liability management, lean production taking account of environment protection and energy saving, product development with individuality and characteristic, production sustaining human skill, manufacture of high value-added products, development of future products, etc. After the bubble disruption in 1990, Japan has been suffering from the economical recession for 15 years, thus resulting in hanging low of automation technology development as well as decreased equipment investment. In addition, our serious problem in Japan is the disappearance of valuable technologies and manufacturing spirit by the mass retirement of engineers who have born the automation technology and supported excellent product manufacture. Thus, it is an important issue to improve and develop the automation technologies further. From the above mentioned viewpoint, the journal focuses on the advanced automation technologies ranging from fundamental technologies to a variety of industrial applications, which meet the requirements, especially from industries. The journal covers all sorts of automation technologies regarding design, manufacturing, assembly, inspection, transportation, logistics, machine tools, robotic system, control system and instruments, and so on. There are some journals with respect to the automation specific to scientific and fundamental research, however, no journal exists, which aims at providing engineering researches and practical developments. Thus, the journal takes up a large amount of practical examples relating advanced automation technologies as review papers, research and development papers, news and interview so that the readers can take interest in the journal. The editorial committee wants IJAT to serve engineers and managers for the requirement of automation technology developments, and is all concerned for your contribution to IJAT.
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Majeed, M. A. Mushahhid, and Sreehari Rao Patri. "A hybrid of WOA and mGWO algorithms for global optimization and analog circuit design automation." COMPEL - The international journal for computation and mathematics in electrical and electronic engineering 38, no. 1 (2019): 452–76. http://dx.doi.org/10.1108/compel-04-2018-0175.
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PurposeThis paper aims to resolve the sizing issues of analog circuit design by using proposed metaheuristic optimization algorithm.Design/methodology/approachThe hybridization of whale optimization algorithm and modified gray wolf optimization (WOA-mGWO) algorithm is proposed, and the same is applied for the automated design of analog circuits.FindingsThe proposed hybrid WOA-mGWO algorithm demonstrates better performance in terms of convergence rates and average fitness of the function after testing it with 23 classical benchmark functions. Moreover, a rigorous performance evaluation is done with 20 independent runs using Wilcoxon rank-sum test.Practical implicationsFor evaluating the performance of the proposed algorithm, a conventional two-stage operational amplifier is considered. The aspect ratios calculated by simulating the algorithm in MATLAB are later used to design the operational amplifier in Cadence environment using 180nm CMOS standard process.Originality/valueThe hybrid WOA-mGWO algorithm is tailored to improve the exploration ability of the algorithm by combining the abilities of two metaheristic algorithms, i.e. whale optimization algorithm and modified gray wolf optimization algorithm. To build further credence and to prove its profound existence in the latest state of the art, a statistical study is also conducted over 20 independent runs, for the robustness of the proposed algorithm, resulting in best, mean and worst solutions for analog IC sizing problem. A comparison of the best solution with other significant sizing tools proving the efficiency of hybrid WOA-mGWO algorithm is also provided. Montecarlo simulation and corner analysis are also performed to validate the endurance of the design.
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Jaikla, Winai, Wichai Nramat, Amornchai Chaichana, Wasakorn Traiphat, and Peerawut Suwanjan. "Wien-Bridge Sinusoidal Oscillator with Electronic and Amplitude Controllability Using Single Off-the-shelf Integrated Circuit." Journal of Physics: Conference Series 3022, no. 1 (2025): 012014. https://doi.org/10.1088/1742-6596/3022/1/012014.
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Abstract The article proposes a design for a Wien-bridge sinusoidal oscillator. The design employs a single commercially available LT1228 integrated circuit (IC), along with four resistors and two capacitors. The proposed oscillator produces a sinusoidal output signal with a variable amplitude while providing the stability of both the oscillation frequency and conditions. No extra active components are necessary to realize this functionality, and the output impedance remains low. Its structure enables independent adjustment of both the oscillation frequency and the oscillation state. Experimental observations confirmed the practicality of the proposed Wien-bridge sinusoidal oscillator. The oscillator exhibited a frequency range that may be linearly adjusted from 16.18 kHz to 157.13 kHz. Due to its simple construction and utilization of off-the-shelf integrated circuit, the proposed oscillator is suitable for use in automation and control systems.
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Chekardovsky, S. M., I. A. Chekardovskaya, and A. P. Burtsev. "Problems of artificial intelligence in construction." Proceedings of the Southwest State University 29, no. 1 (2025): 27–39. https://doi.org/10.21869/2223-1560-2025-29-1-27-39.
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Purpose. The study presents the key aspects of the introduction and use of artificial intelligence (AI) in the construction industry. The challenges faced by builders when implementing AI, such as the high cost of equipment and the need for retraining, are discussed. The advantages of AI are also considered, including improving design efficiency, reducing costs and improving control over construction processes. Special attention is paid to the use of AI in monitoring construction sites, risk forecasting, automation of typical operations and the use of autonomous technology. The article emphasizes that despite the existing problems, it is a powerful tool for the transformation of the construction industry, which can significantly improve the quality and speed of construction.Methods. The research uses methods of statistical and comparative analysis, the «golden square» method in the context of digitalization of the IC, focused on managing complex situations.Results. A classifier of threats and risks for IC in difficult situations has been developed from the point of view of the sustainable development of artificial intelligence in the construction industry.Conclusion. Artificial intelligence in construction opens up new horizons for improving efficiency and optimizing processes. From BIM technologies to autonomous robots and drones, and is becoming an integral part of the modern construction industry. However, despite all the advantages, there are also challenges, such as the high cost of equipment and the need for retraining. Nevertheless, the potential in construction is huge, and its implementation promises significant improvements in the quality, speed and safety of construction work. The paper provides an overview of the problems of IC in modern conditions. The analysis of the application of the "golden square" method in the context of digitalization of the IC, focused on managing complex situations, is presented. A classifier of threats and risks for the UK in difficult situations from the point of view of sustainable development has been developed.
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Niu, Qun Feng, Zhi Gong Zhang, Yan Bo Hui, and Li Wang. "Design of an Automatic In-Out Oil Controlling and Management System Based on RF Technology." Advanced Materials Research 482-484 (February 2012): 1768–72. http://dx.doi.org/10.4028/www.scientific.net/amr.482-484.1768.
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Regarding high precision and automatic control requirements for management and control system of oil depot, this paper applied RF technology in in-out oil management and automatic control theory in automatic control system of oil depot. Thus, a novel oil depot automatic in-out control system based on three level structure and RF technology was designed. In the system, the three level structures are composed of on-site control level, site management level and remote management level. A mode of combining control instruments with PLC controller was adopted in on-site control level and VB .Net was used as software for upper computer. The designed non-contact IC card management software for oil access and in-out oil control system will simplify the operation process of employees; approve levels of safe management and data accuracy for oil access in oil depot. Field tests show that this system has advantage of high control accuracy achieved 0.2 magnitude, high precision of data acquisition and easy operation for control management. The system provides an efficient technology approach for raising the level of automation and management in the oil industry.
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Nguyen, Hoang Trong, and Trang Hoang. "A Novel Framework of Genetic Algorithm and Spectre to Optimize Delay and Power Consumption in Designing Dynamic Comparators." Electronics 12, no. 16 (2023): 3392. http://dx.doi.org/10.3390/electronics12163392.
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In integrated circuit (IC) design, analog circuits contribute significantly as the interface between real and digital world signals. Although they make up a relatively small portion of the overall circuit, their design process is often most time-consuming, mostly from the phase of manual iteration of circuit parameters to meet design specifications. Therefore, the design automation of analog circuits with the help of efficient optimization techniques arises as a promising candidate to address the issue. Among optimization algorithms, while the genetic algorithm (GA) has been shown to be effective in finding near-optimal solutions, it has not been extensively applied to the field of analog circuit design. Hence, this paper proposes a method to utilize GA in the optimization of a widely used circuit topology, namely the comparator. The comparator is considered the fundamental block in the design of most analog-to-digital converters (ADCs). For high-speed ADCs, dynamic comparators are usually chosen for the purpose of high speed and power efficiency. In summary, this paper introduces an innovative GA-Spectre architecture to optimize the dynamic comparator with respect to delay and power consumption. The post-optimized results are optimistic with a 72.61 ps delay and 3.11 µW power dissipation.
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Anwar, Nur Effendi, and Helga Ferdilla. "Pengaturan Kecepatan Dan Pengendalian Motor DC 5 V-110 V Menggunakan IC Tipe NE 555." Jurnal Teknologi Riset Terapan 1, no. 2 (2024): 113–23. https://doi.org/10.35912/jatra.v1i2.3157.
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Purpose: To determine the regulation of the rotation speed of a DC motor using an NE 555 type IC and by providing a stable voltage with the same working frequency but varying DC motor speed control pulse cycles. Methodology: This research method includes several stages, the stages in the research are as follows: The data required is the specifications of each component and the specifications of the hardware design to be made. The selection of tools and materials used must be in accordance with what is expected for setting and controlling the speed of a DC motor Result: The effect of the armature current (Ia) on the rotation speed of the motor is directly proportional; that is, the greater the rotation speed of the series self-amplifying DC motor. Contribution: This study can provide practical insight into how to implement DC motor speed adjustment in various applications, such as in the fields of automation, robotics, and other small control systems. This may help readers who wish to apply the techniques taught in their projects. Limitations: Dependence on specific ICs: Focusing on the use of the NE 555 IC may limit the understanding of other alternatives that may be more suitable or efficient for certain applications. This article could be better if it includes a comparison with other available methods or ICs.
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Adamu, Murtala Zungeru Haruna Isah Paul Obafemi Abraham-Attah and Ahmad Abubakar Sadiq. "AN ELECTRONIC SWITCH SENSOR WITH A POINTTO-POINT INTRUSIVE MONITORING SYSTEM." International Journal of Information Technology, Modeling and Computing (IJITMC) 1, November (2018): 01–12. https://doi.org/10.5281/zenodo.1423256.
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Sophistications in theft and other criminal damages necessitates for the symbiotic blending of technology with security needs. In this research, electronic switches in the form of sensors were used to implement a point-to point intrusive monitoring system for the detection of an unauthorized access to commercial and residential buildings. The system is a simple and reliable security system and uses switch sensor technology to revolutionize the standards of living. The system is also simple, adaptable and cost-effective. It is designed in six major units which include; the power supply, the input/sensor micro-switches, the monitoring and indicator, the timing, the tone generation and output units. To ensure steady power supply in the circuit, the power unit constitutes both the mains and DC supplies. The alarm unit are being activated by the normally closed sensor micro-switches unit which is connected in an electronic/door mat at both the entrance and exit of buildings. In order to facilitate easy location of the intruder, the exact point of intrusion is being determined by the monitoring and indicator unit which constitutes the quad R/S flipflop IC and LED’s. The timing/tone generation unit is built on the 555 timer IC, in the Astable mode, which output keeps changing as far as there is a breakage of the sensors. The output of the system is mainly the LEDs and buzzer, which gives electrical light and audio signal to notify the owner of an intruder in the building. Major design issues considered include; efficiency, portability, cost-effectiveness, durability, compatibility as well as the availability of required materials. This system works on the principle of the micro-switch sensor and dependent on the condition that an intruder entered through the door and stepped in any one of the switches under the mat. Verification and validation of the system indicate compliances to design specification hence the output requirements were met
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Чекалдин, И. Р., А. В. Русанов, В. А. Смерек, and А. И. Сукачев. "DESIGN METHODOLOGY FOR DIGITAL IP-BLOCKS OF INTEGRATED CIRCUITS." ВЕСТНИК ВОРОНЕЖСКОГО ГОСУДАРСТВЕННОГО ТЕХНИЧЕСКОГО УНИВЕРСИТЕТА 20, no. 2 (2024): 102–9. http://dx.doi.org/10.36622/1729-6501.2024.20.2.016.
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рассмотрены основные этапы разработки цифровых сложно-функциональных (СФ/IP) блоков в составе сверхбольших интегральных схем (СБИС) и систем на кристалле (СНК). Обозначены основные преимущества концепции проектирования интегральных микросхем (ИМС) с применением стандартных ячеек (standard cells) и СФ-блоков, а также сформулированы основные цели применения данной концепции. Определено место СФ-блоков в маршруте проектирования СНК на примере спиралевидного маршрута, на основе которого выделена иерархия приоритетности некоторых этапов проектирования заказных СФ-блоков. Рассмотрены аспекты стандартизации в проектировании на уровне моделей во избежание конфликтных ситуаций при размещении и подключении ячеек. Проанализирован состав итоговых топологических, схемотехнических файлов описания, необходимый и достаточный для поставки разработанного блока заказчику и последующего его применения в маршруте проектирования коммерческого изделия. Приведены способы защиты коммерческой информации при передаче файлов топологии на предприятия по производству кристаллов ИМС. Программные возможности (проведение верификации, синтез цифровых автоматов, проектирование топологии с использование средств автоматизации) при проектировании СФ-блоков были описаны в рамках функциональных возможностей программных средств, предоставляемых компаниями Cadence, Mentor Graphics, Synopsis. Кратко затронуты компетентные действия заказчика СФ-блока после получения им необходимых файлов моделирования, топологии, описания и документации this paper considers the main stages of the development of complex-functional digital IP-blocks as part of ultra-large integrated circuits (ULSI) and systems on chip (SoC). Formulated the main advantages and disadvantages of the integrated circuits (IC) design concept using standard cells and IP-blocks are outlined, and the main objectives of the application of this concept. The place of IP-blocks in the SoC design route is determined, on basis of which the hierarchy of priority of some stages of the design of custom IP-blocks is highlighted. Some aspects of standardization in design at the model level are considered in order to avoid conflict situations when placing and connecting cells. The composition of the final topological, circuit design and description files is analyzed, which is necessary and sufficient for the delivery of the developed block to the customer, and its subsequent application in the design route. The methods of protecting commercial information when transferring topology files to enterprises producing IC crystals are given. Software capabilities (verification, synthesis of digital automata, topology design using automation tools) in the design of IP-blocks were described within the framework of the functionality of software tools provided by Cadence, Mentor Graphics, Synopsis. The relevant actions of the IP-block customer after receiving the necessary modeling, topology, description and documentation files are briefly touched
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Ahmad, Afaq, Sabir Hussain, M. A. Raheem, Ahmed Al Maashri, Sayyid Samir Al Busaidi, and Medhat Awadalla. "ASIC vs FPGA based Implementations of Built-In Self-Test." International Journal of Advanced Natural Sciences and Engineering Researches 7, no. 6 (2023): 14–20. http://dx.doi.org/10.59287/ijanser.942.
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Linear Feedback Shift Registers (LFSRs) are play key role in testing of for Very Large Scale Integration (VLSI) Integrated Circuits (ICs) testing. Due to tremendous IC complex growth, testing of recent VLSI ICs technology have become more complicated. This led to develop a popular alternate viable solution in the form of Built-In Self-Test (BIST) technology as compared to Automatic Test Equipment (ATE). However, the challenges of BIST technology remain the subject of research. Furthermore, implementation of BIST’s LFSR on Application Specific Integrated Circuit (ASIC) versus Field Programmable Gate Array on (FPGA) platform is current area of research especially in context to power consumption. Hence, to make an informed choice between ASIC and FPGA for implementing BIST’s LFSR we focus on study of design of reconfigurable LFSR on ASIC versus FPGA platform. The Electronic Design Automation (EDA) tool, Cadence is used for implementing BIST’s LFSR on ASIC platform. Whereas, Hardware Description Language (HDL), Verilog is used to implement BIST’s LFSR on FPGA platform. During experimental methodology, maximum frequency, the critical path delay is investigated to assess the power dissipation. The functional and timing simulation models are used to verify the implemented reconfigurable BIST’s LFSR designs. The obtained results show that the performance, in terms of speed and power, of ASIC implementation is far better than traditional FPGA implementation.
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Naaz, Miss Falak, Prof Gayatri Bhoyar, and Prof Amol Dhankar. "A Review Paper on Google Assistance Based Consumer Vacuum Suction Dusting Robot." International Journal for Research in Applied Science and Engineering Technology 10, no. 8 (2022): 1–4. http://dx.doi.org/10.22214/ijraset.2022.45848.
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Abstract: In modern days as automation is taking place thereby reducing the time required for doing household chores that results in increasing time utilization for other stuffs. One of such automated device is Vacuum Cleaner. While vacuum cleaners have made life easier in household chores, they are noisy as well as bulky. Hence it is required to improve the technology of vacuum cleaning to overcome these deficiencies. Here, is an attempt to achieve the same objective to develop a compact and efficient vacuum cleaner robot for office and home use. The proposed robot is disk-shaped, controlled by NodeMCU and work on Google voice command. The proposed system comprises of Node MCU, motor driving IC L239D, DC motors and IR sensor. Node MCU will be controlling the entire operation with the help of control signals, motors along with the help of motor driving IC will be helping in motion of the robot in any direction and IR sensors will be helping in detection of barriers for the navigation of the robot. To provide the commands to the robot we will make use of Google Assistant which can engage in two way communication. The PCB designing will be done with the help of Diptrace PCB design software and the programming part will be done with the Arduino IDE programming software. As the robot is working on voice commands it won’t be involving human efforts and time thereby making it a fully autonomous robot.
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Gusmão, António, Pedro Alves, Nuno Horta, Nuno Lourenço, and Ricardo Martins. "Differentiable Constraints’ Encoding for Gradient-Based Analog Integrated Circuit Placement Optimization." Electronics 12, no. 1 (2022): 110. http://dx.doi.org/10.3390/electronics12010110.
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Analog IC design is characterized by non-systematic re-design iterations, often requiring partial or complete layout re-design. The layout task usually starts with device placement, where the several performance figures and constraints to be met escalate its complexity immensely, and, due to the inherent tradeoffs, an “optimal” floorplan solution does not usually exist. Deep learning models are now establishing for the automation of the placement task of analog integrated circuit layout design, promising to bypass the limitations of existing approaches based on: time-consuming optimization processes with several constraints; or placement retargeting from legacy designs/templates, which rely heavily on legacy layout data. However, as the complexity of analog design cases tackled by these methodologies increases, a broader set of topological constraints must be supported to cover the different layout styles and circuit classes. Here, model-independent differentiable encodings for regularity, boundary, proximity, and symmetry island constraints are formulated for the first time in the literature, and an unsupervised loss function is used for the artificial neural network model to learn how to generate placements that follow them. The use of a deep learning model makes push-button speed placement generation possible, additionally, as only sizing data are required for its training, it discards the need to acquire legacy layouts containing insights into this vast set of, often neglected, constraints. The model is ultimately used to produce floorplans from scratch at push-button speed for real state-of-the-art analog structures, including technology nodes not used for training. A case-study comparison with a floorplan design made by a human-expert presents improvements in the fulfillment of every constraint, reaching an overall improvement of around 70%, demonstrating the approach’s value in placement design.
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Quynh, Nguyen Vu. "Using radial basis function neural network for PMSM to overcome the changing load." Vietnam Journal of Science and Technology 59, no. 2 (2021): 234–48. http://dx.doi.org/10.15625/2525-2518/59/2/14921.
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This paper presents a using Radial Basis Function Neural Network (RBFNN) for PMSM to overcome the changing load. Firstly, a mathematic model of the PMSM drive is derived; then, to increase the performance of the PMSM drive system, a Fuzzy PI controller in which an RBFNN adjusts its parameters is applied to the speed controller for coping with the effect of the system dynamic uncertainty and the external load. Secondly, the Very high-speed integrated circuit Hardware Description Language (VHDL) is adopted to describe the behaviour of the speed control IC which includes the circuits of space vector pulse width modulation (SVPWM), coordinate transformation, RBFNN, and Fuzzy PI. Thirdly, the simulation work is performed by MATLAB/Simulink and ModelSim co-simulation mode, provided by Electronic Design Automation (EDA) Simulator Link. The PMSM, inverter, and speed command are performed in Simulink, and the speed controller of the PMSM drive is executed in ModelSim. Finally, the co-simulation results validate the effectiveness of the proposed algorithm based speed control system