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Journal articles on the topic 'Id-Vg characteristic'

Author: Grafiati

Published: 4 June 2025

Last updated: 1 August 2025

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1

Fadliondi, Kunta Biddinika Muhammad, and Ohmi Shun-ichiro. "The Humidity Dependence of Pentacene Organic MetalOxide-Semiconductor Field-Effect Transistor." TELKOMNIKA Telecommunication, Computing, Electronics and Control 15, no. 2 (2017): 578–83. https://doi.org/10.12928/TELKOMNIKA.v15i2.5834.

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Metal-oxide-semiconductor field-effect transistors (MOSFET) were fabricated using organic semiconductor pentacene. The humidity dependence of drain current gate voltage (ID-VG) characteristic and drain current drain voltage characteristic (ID-VD) will be explained. Firstly, the thermal oxidation method was used to grow SiO2 gate insulator with thickness of 11 nm. Secondly, the thermal evaporation method was used to form Au source and drain electrodes with thickness of 28 nm. The channel width and length of the transistors were 500 and 200 respectively. By the same method, organic semiconductor

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2

Kondo, Jun, Murali Lingalugari, Pik-Yiu Chan, Evan Heller, and Faquir Jain. "Modeling and Fabrication of Quantum Dot Channel Field Effect Transistors Incorporating Quantum Dot Gate." MRS Proceedings 1551 (2013): 149–54. http://dx.doi.org/10.1557/opl.2013.899.

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ABSTRACTQuantum dot gate (QDG) field-effect transistors (FET) have shown three-state transfer characteristics. Quantum dot channel (QDC) field-effect transistors (FET) have exhibited fourstate ID-VG characteristics. This project aims at studying the effect of incorporating cladded quantum dot layers in the gate region of QDC-FET. Four-state characteristics are explained by carrier transport in narrow energy mini-bands which are manifested in a quantum dot superlattice (QDSL) channel. QDSL is formed by an array of cladded quantum dots (such as SiOx-Si and GeOx-Ge). Multi-state FETs are needed i

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3

Cao, Zhong, Zhong Liang Xiao, Yun Lin Dai, Masao Kamahori, and Maki Shimoda. "Electrical Characteristics of Extended Gate FET Sensing Chip Constructed for Detection of DNA." Advanced Materials Research 97-101 (March 2010): 4189–92. http://dx.doi.org/10.4028/www.scientific.net/amr.97-101.4189.

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An extended gate field effect transistor (EGFET) sensing chip has been constructed by using one gold plate electrode for molecule recognition and FET part for signal transduction. By using a 70.7mV DC voltage onto a Ag/AgCl reference electrode, the electrical characteristics of immobilization of the oligonucleotide probe of P1 and hybridization with the target single strand DNA of P2 on the EGFET sensing chip were examined in detail. The electrical signals on the change of a threshold voltage (VT) shift at a constant ID (3000μA) in VG-ID characteristic were obtained, and the VT shift value due

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4

Wang, Ying, Chan Shan, Wei Piao, et al. "3D Numerical Simulation of a Z Gate Layout MOSFET for Radiation Tolerance." Micromachines 9, no. 12 (2018): 659. http://dx.doi.org/10.3390/mi9120659.

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In this paper, for the first time, an n-channel metal-oxide-semiconductor field-effect transistor (NMOSFET) layout with a Z gate and an improved total ionizing dose (TID) tolerance is proposed. The novel layout can be radiation-hardened with a fixed charge density at the shallow trench isolation (STI) of 3.5 × 1012 cm−2. Moreover, it has the advantages of a small footprint, no limitation in W/L design, and a small gate capacitance compared with the enclosed gate layout. Beside the Z gate layout, a non-radiation-hardened single gate layout and a radiation-hardened enclosed gate layout are simul

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Maouhoub, Noureddine, and Khalid Rais. "Extraction of series resistance and mobility degradation parameter in MOSFETs using iterative method." Computer Science and Information Technologies 1, no. 1 (2020): 26–31. https://doi.org/10.11591/csit.v1i1.p26-31.

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Series resistance and mobility attenuation parameter are parasitic phenomena that limit the scaling of advanced MOSFETs. In this work, an iterative method is proposed to extract the series resistance and mobility degradation parameter in short channel MOSFETs. It also allows us to extract the surface roughness amplitude. The principle of this method is based on the exponential model of effective mobility and the least squares methods. From these, two analytical equations are obtained to determine the series resistance and the low field mobility as function of the mobility degradation. The mobi

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Noureddine, Maouhoub, and Rais Khalid. "Extraction of series resistance and mobility degradation parameter in MOSFETs using iterative method." Computer Science and Information Technologies 1, no. 1 (2020): 26–31. https://doi.org/10.5281/zenodo.4063533.

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Series resistance and mobility attenuation parameter are parasitic phenomena that limit the scaling of advanced MOSFETs. In this work, an iterative method is proposed to extract the series resistance and mobility degradation parameter in short channel MOSFETs. It also allows us to extract the surface roughness amplitude. The principle of this method is based on the exponential model of effective mobility and the least squares methods. From these, two analytical equations are obtained to determine the series resistance and the low field mobility as function of the mobility degradation. The mobi

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7

Lin, Jing-Jenn, Ji-Hua Tao, and You-Lin Wu. "Subthreshold Characteristics of a Metal-Oxide–Semiconductor Field-Effect Transistor with External PVDF Gate Capacitance." Crystals 9, no. 12 (2019): 673. http://dx.doi.org/10.3390/cryst9120673.

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An organic ferroelectric capacitor, using polyvinylidene difluoride (PVDF) as the dielectric, was fabricated. By connecting the PVDF capacitor in series to the gate of a commercially purchased metal-oxide–semiconductor field-effect transistor (MOSFET), drain current (ID)–drain voltage (VD) characteristics and drain current (ID)–gate voltage (VG) characteristics were measured. In addition, the subthreshold slopes of the MOSFET were determined from the ID–VG curves. It was found that the subthreshold slope could be effectively reduced by 23% of its original value when the PVDF capacitor was adde

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8

Podlepetsky, Boris, Viacheslav Pershenkov, Alexander Bakerenkov, Vladislav Felitsyn, and Alexander Rodin. "Effect of Temperature and Electrical Modes on Radiation Sensitivity of MISFET Dose Sensors." Proceedings 2, no. 13 (2018): 954. http://dx.doi.org/10.3390/proceedings2130954.

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The temperature and electrical modes influences on radiation sensitivity of n-channel MISFETs sensors of the total ionizing dose were investigated. There were measured the MISFET-based dosimeter output voltages V as function of the radiation doses D at const values of the drain current ID and the drain–source voltage VD, as well as the (ID–VG) characteristics before, during and after irradiations at different temperatures T (VG is the gate voltage). It was shown how the conversion function V(D) and the radiation sensitivity SD are depending on the temperature T for different electrical modes.

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9

Zhang, Hejing, Fan Yang, Jie Zhang, et al. "P‐7.4: Study on The Effect of Organic Thin‐film on Electrical Characteristics of Amorphous Silicon TFT." SID Symposium Digest of Technical Papers 56, S1 (2025): 1196–98. https://doi.org/10.1002/sdtp.19037.

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In this paper, three different structures of TFTs with and without PI were fabricated, and their Id‐Vg transfer characteristics were also compared systematically. The results indicated that PI had certain influences on both the initial Id‐Vg transfer chara cteristics and the PBTS stability of T FTs. The leakage current of TFT s with PI w as at least 3 times higher than that without PI a t 60℃ 60℃, which was unfavorable for the performance of TFTs as GDL circuits and IS. The main reason was the impact of impure polar ions or/and water vapor in PI on the back channel of TFTs. Finally, this study

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10

Nagahisa, Yuichi, and Eisuke Tokumitsu. "Suppression of Hole Current in Graphene Transistors with N-Type Doped SiC Source/Drain Regions." Materials Science Forum 717-720 (May 2012): 679–82. http://dx.doi.org/10.4028/www.scientific.net/msf.717-720.679.

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To achieve graphene channel transistors which have high on/off drain current ratio and unipolar behavior of drain current – gate voltage (ID-VG) characteristics, we fabricated and characterized the top gated graphene channel transistors with n-type doped SiC source/drain regions. Graphene layer was formed on SiC by high temperature annealing in vacuum, and Al2O3 was used as a gate insulator. For the graphene channel transistor with heavily doped n-SiC source/drain regions (doping concentration ND=4.5x1019cm-3) and a 4~6ML graphene channel, ambipolar behavior was observed. On the other hand, wh

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11

Алексеев, Р. П., М. И. Черных, А. Н. Цоцорин, И. В. Семейкин та Г. В. Быкадорова. "Подавление эффекта квазинасыщения вольт-амперных характеристик мощных сверхвысокочастотных латеральных транзисторов". Физика и техника полупроводников 55, № 8 (2021): 689. http://dx.doi.org/10.21883/ftp.2021.08.51141.9658.

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Was been performed the analysis of electric parameters of a new generation of RF LDMOS transistors developed by JSC "NIIET". In comparison with the devices of the previous generation was revealed a significant suppression of the effect of quasi-saturation of ID – VG and ID – VD characteristics. Comparison with a foreign-made device shows that the achieved results are close to the world level.

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12

Takeyama, Akinori, Keigo Shimizu, Takahiro Makino, et al. "Radiation Hardness of 4H-SiC JFETs in MGy Dose Ranges." Materials Science Forum 1004 (July 2020): 1109–14. http://dx.doi.org/10.4028/www.scientific.net/msf.1004.1109.

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Silicon carbide junction field effect transistors (SiC JFETs) were irradiated with gamma-rays up to 9 MGy (H2O). With increasing dose, apparent shift of drain current-gate voltage (ID-VG) curves to negative voltage side as observed for SiC metal oxide semiconductor (MOS) FETs did not take place. No significant difference is observed between drain and gate leakage currents of irradiated JFETs. This strongly indicates that defects as leakage paths were introduced into not bulk region but the interface between bulk and the passivation layer of SiO2. While, the transfer characteristics including t

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13

K., Ullah S. Riaz M.Habib F. Abbas S. Naseem G. Abbas. "Effect of High Temperature on the Impact Ionization of N-Channel Fully Depleted SOI MOSFET." International Journal of Engineering Works 1, no. 3 (2014): 48–51. https://doi.org/10.5281/zenodo.15750.

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High temperature effects on the impact ionization of the n-channel fully depleted (FD) SOI MOSFET are investigated over a wide range of temperature from 300 to the 600 K by using TCAD. In particular, we have studied the current voltage characteristics (Id-Vd and Id-Vg ) , threshold voltage (Vth)and transconductance (gm). By the simulation results, we have analyzed that impact ionization decreases with increasing the temperature and vice versa. Furthermore, we have observed that threshold voltage and transconductance are both inversely proportional to the temperature. 

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14

Vudumula, Pavan, and Siva Kotamraju. "Effect of Temperature on the Electrical Characteristics of 4H-SiC Planar n/p-Type Junctionless FET: Physics Based Simulation." Materials Science Forum 963 (July 2019): 679–82. http://dx.doi.org/10.4028/www.scientific.net/msf.963.679.

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In this paper, we have explored planar junctionless FET (JLFET) in 4H-SiC as a potential device for future industrial applications. We show the differences in static electrical characteristics (Id-Vg, Id-Vd, subthreshold current and Ion/Ioff ratio) between n and p-type JLFETs whilst varying the lattice temperature (T) from 300 K to 700 K using 2D numerical simulations. The oxide-SiC interface traps have shown minimum influence on the device current conduction characteristics. For the same one-micron channel length and an equal area of cross-section, the p-type JLFET exhibits lower off-state cu

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15

Cheng, Chin-Lung, Chien-Wei Liu, Bau-Tong Dai, and Ming-Yen Lee. "Physical and Electrical Characteristics of Carbon Nanotube Network Field-Effect Transistors Synthesized by Alcohol Catalytic Chemical Vapor Deposition." Journal of Nanomaterials 2011 (2011): 1–7. http://dx.doi.org/10.1155/2011/125846.

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Carbon nanotubes (CNTs) have been explored in nanoelectronics to realize desirable device performances. Thus, carbon nanotube network field-effect transistors (CNTNFETs) have been developed directly by means of alcohol catalytic chemical vapor deposition (ACCVD) method using Co-Mo catalysts in this work. Various treated temperatures, growth time, and Co/Mo catalysts were employed to explore various surface morphologies of carbon nanotube networks (CNTNs) formed on the SiO2/n-type Si(100) stacked substrate. Experimental results show that most semiconducting single-walled carbon nanotube network

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16

Jayakumar, Ganesh, Per-Erik Hellström, and Mikael Östling. "Monolithic Wafer Scale Integration of Silicon Nanoribbon Sensors with CMOS for Lab-on-Chip Application." Micromachines 9, no. 11 (2018): 544. http://dx.doi.org/10.3390/mi9110544.

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Silicon ribbons (SiRi) have been well-established as highly sensitive transducers for biosensing applications thanks to their high surface to volume ratio. However, selective and multiplexed detection of biomarkers remains a challenge. Further, very few attempts have been made to integrate SiRi with complementary-metal-oxide-semiconductor (CMOS) circuits to form a complete lab-on-chip (LOC). Integration of SiRi with CMOS will facilitate real time detection of the output signal and provide a compact small sized LOC. Here, we propose a novel pixel based SiRi device monolithically integrated with

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17

Kutsuki, Katsuhiro, Sachiko Kawaji, Yukihiko Watanabe, Shinichiro Miyahara, and Jun Saito. "Improved Evaluation Method for Channel Mobility in SiC Trench MOSFETs." Materials Science Forum 821-823 (June 2015): 757–60. http://dx.doi.org/10.4028/www.scientific.net/msf.821-823.757.

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We proposed an improved method for evaluating the effective channel mobility (μeff), involving an appropriate definition of the threshold voltage (Vth) based on the ideal gate bias voltage – drain current (VG-ID) characteristics. Using this method, the dependence of μeff on the effective field (Eeff) could be evaluated even for SiC trench MOSFETs with large interface state density (Dit) values. The dominant influence on μeff in the low Eeff region was found to be Coulomb scattering caused by interface states at the SiC/SiO2 interfaces.

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18

Mohammed, Bushra H., and Estabraq Talib Abdullah. "Performance Study of Pentacene based Organic Field Effect Transistor by Using monolayer, bilayer and trilayer and Gate Insulators." Iraqi Journal of Physics (IJP) 18, no. 44 (2020): 85–97. http://dx.doi.org/10.30723/ijp.v18i44.512.

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In this paper, Pentacene based-organic field effect transistors (OFETs) by using monolayer , bilayer and three layers of three different gate insulators (ZrO2, PVA and CYEPL) , two layers of different gate insulators (ZrO2/PVA and ZrO2/CYEPL ) and three layers of different gate insulators (ZrO2/PVA/CYEPL) were studied its electrical performance (output (Id-Vd)and transfer(Id-Vg) characteristics)by using the gradual-channel approximation model. The device exhibits a typical output curve of a field-effect transistor (FET). Furthermore, analysis of electrical characterization was done to investig

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19

Hino, Shiro, Tomohiro Hatayama, Naruhisa Miura, Tatsuo Oomori, and Eisuke Tokumitsu. "Fabrication and Characterization of 4H-SiC MOSFET with MOCVD-Grown Al₂O₃ Gate Insulator." Materials Science Forum 556-557 (September 2007): 787–90. http://dx.doi.org/10.4028/www.scientific.net/msf.556-557.787.

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We have fabricated and characterized MOS capacitors and lateral MOSFETs using Al2O3 as a gate insulator. Al2O3 films were deposited by metal-organic chemical vapor deposition (MOCVD) at temperatures as low as 190 oC using tri-ethyl-aluminum and H2O as precursors. We first demonstrate from the capacitance – voltage (C-V) measurements that the Al2O3/SiC interface has lower interface state density than the thermally-grown SiO2/SiC interface. No significant difference was observed between X-ray photoelectron spectroscopy (XPS) Si 2p spectrum from the Al2O3/SiC interface and that from the SiC subst

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20

Yu, Dongliang, Ying Shen, Mengmeng Hu, Weibin Zhang, and Wenzhi Fan. "P‐1.37: The Impact of Polysilicon Low Power Etching Process on LTPS TFT Characteristics and Reliability." SID Symposium Digest of Technical Papers 56, S1 (2025): 828–30. https://doi.org/10.1002/sdtp.18942.

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This paper investigates the effects of different polysilicon etching powers on the electric characteristics of low temperature polycrystalline silicon (LTPS) thin‐film transistors (TFTs). The study reveals that lower etching powers result in a weaker hump effect in the TFT Id‐Vg curves. The influence is more pronounced in TFTs with narrower channel widths. Despite minimal differences in the taper of polysilicon film after dry etching with different powers, the stability of TFTs under positive bias temperature stress (PBTS) degrades with increasing dry etching power, indicating that plasma inte

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Wang, Yi Tzu, Hsiang-Shun Kao, and Jiun-Yun Li. "Cryogenic Characteristics of Ferroelectric Capacitors and Ferroelectric Field-Effect Transistors." ECS Meeting Abstracts MA2025-01, no. 31 (2025): 1593. https://doi.org/10.1149/ma2025-01311593mtgabs.

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Ferroelectricity exhibits two stable states with permanent polarizations, making it promising for nonvolatile memory applications. Compared to conventional perovskite ferroelectrics, hafnium-based ferroelectric materials, such as Hf0.5Zr0.5O2 (HZO), attracts much attention due to their compatibility with CMOS technology [1]. Furthermore, with the high demand in high-performance computing and the emerging quantum computing, cryogenic memory technologies become more important due to the required much lower operational temperatures. In this work, we investigate the properties of HZO-based ferroel

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Patel, Dax, Soham Sojitra, Jay Kadia, Bhavik Chaudhary, and Rutu Parekh. "Comparative Study of Double Gate and Silicon on Insulator MOSFET by Varying Device Parameters." Trends in Sciences 19, no. 7 (2022): 3216. http://dx.doi.org/10.48048/tis.2022.3216.

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A comparative study of the single gate MOSFET (SG MOSFET), double-gate MOSFET (DG MOSFET) and silicon-on-insulator MOSFET (SOI MOSFET) is done using MOSFET simulation tool. Device simulation is done by varying different physical parameters of the device structure such as oxide thickness, channel length, temperature and different gate electrodes. Contour plots of SOI and DG MOSFET for electron concentration and potential at initial and final bias are simulated. The drain current vs gate voltage (Id-Vg) characteristics performance simulations show that DG MOSFET is better than SOI MOSFET for dif

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Ahmad, Neda, Sonam Rewari, and Vandana Nath. "Optimizing DC and RF characteristics of Pseudomorphic AlGaN/InGaN/GaN HEMT for GHZ application." Serbian Journal of Electrical Engineering 21, no. 2 (2024): 275–95. http://dx.doi.org/10.2298/sjee2402275a.

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This paper presents a design and in-depth analysis of DC and RF characteristics of Pseudomorphic AlGaN/InGaN/GaN High Electron Mobility Transistor (HEMT) for microwave application. Experimental data from an AlGaN/InGaN/GaN HEMT is used to validate the simulation results based on the Id-Vg curve and transconductance, demonstrating their close agreement. Subsequently, the study focuses on investigating the impact of varying device parameters namely Indium (In) proportion of InGaN, gate length, source to gate length (Lsg) and gate to drain length (Lgd), and InGaN layer thickness. Sequential analy

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Kang, Soo Cheol, So Young Kim, Sang Kyung Lee, et al. "Channel Defect Profiling and Passivation for ZnO Thin-Film Transistors." Nanomaterials 10, no. 6 (2020): 1186. http://dx.doi.org/10.3390/nano10061186.

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The electrical characteristics of Zinc oxide (ZnO) thin-film transistors are analyzed to apprehend the effects of oxygen vacancies after vacuum treatment. The energy level of the oxygen vacancies was found to be located near the conduction band of ZnO, which contributed to the increase in drain current (ID) via trap-assisted tunneling when the gate voltage (VG) is lower than the specific voltage associated with the trap level. The oxygen vacancies were successfully passivated after the annealing of ZnO in oxygen ambient. We determined that the trap-induced Schottky barrier lowering reduced a d

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Shima, Akio, Kikuo Watanabe, Toshiyuki Mine, Naoki Tega, Hirotaka Hamamura, and Yasuhiro Shimamoto. "Reliable 4H-SiC MOSFET with High Threshold Voltage by Al₂O₃-Inserted Gate Insulator." Materials Science Forum 821-823 (June 2015): 725–28. http://dx.doi.org/10.4028/www.scientific.net/msf.821-823.725.

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We investigated the effect of an Al2O3 insertion layer in the gate insulator to make Vth higher and to improve the transconductance Gm in a SiC-MOSFET. Insertion of the Al2O3 layer successfully enlarged Vth by about 4 V. The Vth difference sub-threshold Id-Vg characteristics measured by sweeping the gate voltage bi-directionally indicates that insertion of the Al2O3 layer decreased the number of traps of electrons in the gate insulator. Due to this decrease, device reliability in long-term operation was improveed by smaller Vth shift in PBTI. It was also found that the insertion of the Al2O3 l

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Huang, Yi-Cheng, Yu-Wen Lai, Zhe-Yu Lin, et al. "Novel Model of Field-Effect Sensing Mechanism for Hg (II) Ion Detection on ZnO-Based TFT Sensor with Conjugation of Au Nps and ssDNA Aptamer." ECS Meeting Abstracts MA2024-02, no. 66 (2024): 4987. https://doi.org/10.1149/ma2024-02664987mtgabs.

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Mercury(Hg) has been regarded as a highly mobile, bio-accumulated, non-degradable, irreversible substance which pollute the ecological environment deeply and become the concern of global sustainability [1]. Although the aspect and approach for detect the mercury has developed for several decades, but it is uncomplicated for us to find all the pollutants since the mercury being the contaminant in the natural environment for such a long time. Traditional methods to detect the heavy metallic ions such as atomic absorption spectroscopy, inductively coupled plasma/ mass spectrometry, inductively co

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Mohd Salleh, Siti NorFarah Nadia, Alhan Farhanah Abd Rahim, Nurul Syuhadah Mohd Razali, Rosfariza Radzali, Ainorkhilah Mahmood, and Irni Hamiza Hamzah. "Study of Strained-SiGe Channel P-MOSFET Using Silvaco TCAD: Impact of Channel Thickness." Key Engineering Materials 947 (May 31, 2023): 39–45. http://dx.doi.org/10.4028/p-3a337l.

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Compressively strained SiGe is an interesting channel material for sub 45 nm p-MOSFETs because of its superior hole mobility (up to 10x over bulk Si channels) and compatibility with current Si manufacturing technologies. In this work, the impact of heterostructure composition and SiGe channel thickness on the electrical characteristics of p-MOSFET are studied. Using strained Si0.8Ge0.2 p-MOSFET, the thickness was altered to a few thicknesses of 3 nm, 5 nm, 7 nm, and 9 nm respectively. The optimal thickness was then used for Ge compositions (x = 0.2). The project was realized utilizing computer

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Doria, Rodrigo Trevisoli, Ewerton Teixeira Fonte, Fernando José Costa, and Renan Trevisoli. "(Invited) Reliability in Ultimate CMOS Compatible Devices." ECS Meeting Abstracts MA2025-01, no. 36 (2025): 1725. https://doi.org/10.1149/ma2025-01361725mtgabs.

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The evolution of the field effect transistor technology has led to the reduction of the device dimensions to a few tenths of nanometers or even smaller. As the devices' dimensions are reduced, the occurrence of short-channel effects becomes unavoidable and degrades, to some extent, the electrical characteristics of the devices even when multiple gate or nanowire technologies are applied. This effect contributes to the variability of the devices, and, as a consequence, to its reliability. In ultimate devices such as nanowire FETs, reliability is inherently important since small variations in th

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Syeda Fahima Nazreen and M Tanseer Ali. "Impact of Si and GaAs as Semiconductor Materials: Designing to Application-Level Comparison." AIUB Journal of Science and Engineering (AJSE) 23, no. 2 (2024): 186–91. http://dx.doi.org/10.53799/ajse.v23i2.710.

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The semiconductor industry has been making life easier by providing loads of electronic devices. With the advancement of technology, electronic devices need to be updated. This gradual upgradation has led the industry towards nanotechnology. The study is to provide an analytical comparison of the impact of Si and GaAs as semiconductor materials in designing 3D density gradient nanowire MOSFETS. The model has been designed and evaluated on the basis of the characteristics curve and transconductance range. The drain current in the Id-Vg and Id-Vd curve for GaAs used model is higher than the Si u

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Osykin, Andrey, Aleksandr Potupchik, and Kirill Panyshev. "Verilog-A model of the impurity freeze-out in LDD regions at cryogenic temperatures." Modeling of systems and processes 16, no. 2 (2023): 93–100. http://dx.doi.org/10.12737/2219-0767-2023-16-2-93-100.

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The article shows the practical implementation of the impurity freeze-out effect in the lightly-doped areas of the drain and source (LDD) in the Verilog-A model of the resistor. This model is based on a theoretical understanding of the freeze-out effect at cryogenic temperatures and data from the TCAD simulation of a MOSFET. The TCAD simulation data were represented by transconductance characteristics of n- and p-channel transistors Id(Vg) in linear mode (Vd=0.1 V) at temperature range from -200 °C to 27 °C for transistors with dimensions 10 um × 10 um. The model is applicable to the use as pa

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B. Awale, Rahul. "ELECTRON TRANSPORT IN GRAPHENE BASED NANOTRANSISTOR AND USE OF NEGATIVE CAPACITANCE FOR STEEPER SUB-THRESHOLD SLOPE." International Journal of Advanced Research 11, no. 09 (2023): 766–96. http://dx.doi.org/10.21474/ijar01/17587.

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Graphene has demonstrated tremendous promise in recent years as a material that, in the future, could replace silicon-based materials because of its exceptional electrical transfer characteristics. The diffusive MOSFETs suffer from short channel effects caused by their shorter channels, however graphene has numerous unusual features. The strongest material yet tested, Graphene exhibits a significant and nonlinear diamagnetism, has great mobility at room temperature, a low atomic thickness, a high current density, and is almost transparent. A single sheet of carbon atoms organized in a hexagona

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Lebedev, Alexander A., Vitalii V. Kozlovski, Leonid Fursin, et al. "Impact of Proton Irradiation on Power 4H-SiC MOSFETs." Materials Science Forum 1004 (July 2020): 1074–80. http://dx.doi.org/10.4028/www.scientific.net/msf.1004.1074.

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Impact of 15 MeV proton irradiation on electrical characteristics and low frequency noise has been studied in high-power vertical 4H-SiC MOSFETs of 1.2 kV-class at doses 1012 £ F £ 1014 cm-2. The maximum value of the field-effect mobility µFЕ depends weakly on F up to F = 2×1013 cm-2. At F = 4×1013 cm-2, the character of the µFЕ(Vg) dependence changes radically. The maximum µFЕ decreases approximately threefold. The dose Fcr corresponding to the complete degradation of the device is about 1014 cm-2. It can be estimated as Fcr» he/n0, where he is the electron removal rate and n0 is the initial

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Katayama, Ritsu, and Toshiya Sakata. "Simple Fabrication Method for Solution-gated One-piece Transistors for Biosensing Applications." ECS Meeting Abstracts MA2023-01, no. 34 (2023): 1918. http://dx.doi.org/10.1149/ma2023-01341918mtgabs.

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INTRODUCTION Solution-gated field-effect transistors (FETs) with silicon or other semiconductive materials as channels can specifically and selectively detect ions and biomolecules related to biological functions by chemically modifying the gate electrode surface, and these are known as biologically coupled FETs (Bio-FETs) [1]. Since Bio-FETs can directly detect the charges of ions and biomolecules, they do not require to label fluorescent dyes and to induce redox reactions based on enzymes. Therefore, Bio-FETs are expected to be used as in vitro diagnostic devices for a label-free monitoring

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Kawanago, Takamasa, Takahiro Matsuzaki, Ryosuke Kajikawa, et al. "(Invited, Digital Presentation) Low Voltage Operation of CMOS Inverter Based on WSe₂ n/p FETs." ECS Meeting Abstracts MA2022-02, no. 15 (2022): 825. http://dx.doi.org/10.1149/ma2022-0215825mtgabs.

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Transition metal dichalcogenides (TMDC) have remarkable properties for the next generation of electronic devices [1]. A complementary metal-oxide-semiconductor (CMOS) inverter consisting of pairs of p-type and n-type field-effect transistor (FET) is a fundamental building block in modern digital electronics [2]. Therefore, realization of both p-type and n-type FETs based on semiconducting TMDC is of particular importance. Among various semiconducting TMDC, tungsten diselenide (WSe2) is a promising candidate for constructing a CMOS inverter because of its high mobility, symmetric electron and h

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Kawanago, Takamasa, Ryosuke Kajikawa, Iriya Muneta, et al. "Fabrication and Characterization of Self-Aligned WSe₂ p-Type Field-Effect Transistor." ECS Meeting Abstracts MA2023-01, no. 29 (2023): 1781. http://dx.doi.org/10.1149/ma2023-01291781mtgabs.

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Semiconducting transition metal dichalcogenides (TMDCs) have been growing interests as channel materials in field effect transistors (FET) for next generation low power digital electronics. [1]. Since a complementary metal oxide-semiconductor (CMOS) inverter constructed from pairs of n-type and p-type FETs is a fundamental building blocks in modern digital electronics [2], implementation of both n-type and p-type FETs with semiconducting TMDCs is of particular importance [3]. Among various semiconducting TMDCs, tungsten diselenide (WSe2) is a promising candidate for constructing a CMOS inverte

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Maneux, Cristell, Chhandak Mukherjee, Marina Deng, et al. "(Invited) Strategies for Characterization and Parameter Extraction of Vertical Junction-Less Nanowire FETs Dedicated to Design Technology Co-Optimization." ECS Meeting Abstracts MA2023-01, no. 33 (2023): 1863. http://dx.doi.org/10.1149/ma2023-01331863mtgabs.

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In the era of emerging computing paradigms and artificial neural networks, hardware and functionality requirements are in the surge. In order to meet low power and latency criteria, new architectures for in-memory computing are being explored as alternatives to traditional von Neumann machines, which requires technological breakthrough at the semiconductor device level such as vertical gate-all-around junctionless nanowire field effect transistors (VNWFET), that can address many process challenges such as downscaling, short-channel effects, compactness and electrostatic control. Its integratio

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Long, Wei-Yu, Po-Han Shia, Yuxuan LU, and Chih-Ting Lin. "Impact of Silicon Dioxide Periodic Grating Structure on Electrical Properties of Graphene." ECS Meeting Abstracts MA2024-01, no. 33 (2024): 1662. http://dx.doi.org/10.1149/ma2024-01331662mtgabs.

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Our study breaks away from the conventional focus on 3D transistor structures, aiming to explore the potential of two-dimensional materials. Graphene, a key player of two-dimensional materials, draws significant attention due to its exceptional electrical properties and chemical stability. Rather than delving into the intrinsic properties of graphene, our research focuses on examining the impact that other materials in contact with graphene have on graphene’s behavior. With a thickness of just one atomic layer, graphene's band structure is easily influenced by materials in contact with it, giv

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Katayama, Ritsu, and Toshiya Sakata. "Highly Sensitive DNA Sensing in Subthreshold Regime with ITO-Based One-Piece Thin Film Transistor." ECS Meeting Abstracts MA2024-01, no. 33 (2024): 1610. http://dx.doi.org/10.1149/ma2024-01331610mtgabs.

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INTRODUCTION Solution-gated field-effect transistors (FETs) with silicon or other semiconductive materials as channels can specifically and selectively detect ions and biomolecules in biological samples by chemically modifying the gate electrode surface, and these are known as biologically coupled FETs (Bio-FETs) [1]. Since Bio-FETs can directly detect the charges of ions and biomolecules, they do not require to label fluorescent dyes and to induce redox reactions based on enzymes. Therefore, Bio-FETs are expected to be used as in vitro diagnostic devices for a label-free monitoring of health

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Zhao, Qing-Tai, Fengben Xi, Yi Han, Jin Hee Bae, and Detlev Gruetzmacher. "(Invited, Digital Presentation) Approach to Neuromorphic Computing with Ferroelectric Schottky Barrier FETs." ECS Meeting Abstracts MA2022-01, no. 29 (2022): 1298. http://dx.doi.org/10.1149/ma2022-01291298mtgabs.

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Neuromorphic computing inspired by neural network systems of the human brain enables energy efficient computing as a solution of the von Neumann bottleneck. A neural network consists of thousands or even millions of neurons which communicate with each other through connected synapses. Synapses can memorize and process the information simultaneously. The plasticity of a synapse to strengthen or weaken its activity over time make it be capable of learning and computing. Thus, artificial synapses which can emulate functionalities and the plasticity of bio-synapses form the backbone of a neuromorp

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Ciou, Fong-Min, Po-Hsun Chen, Ting-Chang Chang, et al. "Analysis of the buffer trap-induced kink effect in AlGaN/GaN HEMT on SiC substrate." Semiconductor Science and Technology, June 13, 2022. http://dx.doi.org/10.1088/1361-6641/ac7819.

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Abstract In this study, the mechanism of the kink effect observed during the switching operation in AlGaN/GaN high electron mobility transistors is thoroughly analyzed. The ID-VG characteristic shows a drop in ID and a positive shift in VT when kink effect occurs. Then through Silvaco software to simulate the trap position, the negative buffer trap induces the VT to shift positively, dominating the decrease of the ID. By using long term DC stress test under the bias condition where the kink phenomenon occurred, the VT will shift in the negative direction, which shows the hole generated by impa

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Ohmi, Shun-ichiro, Kazuaki Takayama, and Hiroshi Ishiwara. "Croconic Acid Thin Film Formation for Ferroelectric Gate OFETs." MRS Proceedings 1587 (2013). http://dx.doi.org/10.1557/opl.2013.1199.

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ABSTRACTPentacene-based ferroelectric gate transistors with croconic acid (CrA) thin film was fabricated for the first time. The memory window (MW) of 1.9 V was obtained from the capacitance-voltage (C-V) characteristics of Al/CrA(50 nm)/SiO2/Si(100) metal-ferroelectric-insulator-semiconductor (MFIS) diode, where the deposition temperature of CrA was room temperature (RT). Butterfly type C-V characteristics was observed for Al/CrA(50 nm)/Al/SiO2/ Si(100) metal-ferroelectric-metal (MFM) diode. Furthermore, a pentacene-based p-type organic field-effect transistor (OFET) with CrA gate insulator w

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Sanyal, Indraneel, Yu-Chih Chen, Chuan-Yue Yu, and Jen-Inn Chyi. "Evidence of charged interface states limited scattering in GaN heterostructures." Journal of Applied Physics 134, no. 8 (2023). http://dx.doi.org/10.1063/5.0159380.

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This study provides experimental evidence of charged interface states limited scattering in III-nitride heterostructures. Temperature-dependent Hall measurements and temperature-dependent ID–VG measurements indicate a significant influence of the charged interface states on the electron mobility in different AlGaN/GaN heterostructures where the characteristic of the interface is controlled by modulating the growth conditions. Charged interface states at the AlGaN/GaN heterointerface lead to electron scattering as the distance between the centroid of the two-dimensional electron gas and the int

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Choi, Kwang-Il, Dong Ho Nam, Sung Soo Park, Jae Kyeong Jeong, and Ga Won Lee. "Device Performance and Reliability Characterization of Interface and Bulk Effect in Amorphous Indium Gallium Zinc Oxide (a-IGZO) Thin Film Transistor." MRS Proceedings 1108 (2008). http://dx.doi.org/10.1557/proc-1108-a09-12.

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Abstracta-IGZO TFT is a promising candidate device for an alternative to poly-Si TFTs or a-Si TFTs, because they provide better uniformity in terms of their important device parameters, including the threshold voltage and mobility due to their amorphous phase, and a high mobility (>10 cm2/Vs) is attainable with these devices even in the amorphous phase. Recently, a-IGZO TFTs have been extensively studied by various groups. However, there is little report on interface and bulk effect on device performances and reliability as separately. For investigating the interface and bulk effect, we fab

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Min, Shin-Yi, Kasidit Toprasertpong, Mitsuru TAKENAKA, and Shinichi TAKAGI. "Unipolar polarization switching and high-endurance memory operation of HZO/Si anti-ferroelectric FETs." Japanese Journal of Applied Physics, February 3, 2025. https://doi.org/10.35848/1347-4065/adb163.

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Abstract We experimentally demonstrate the anti-ferroelectric (AFE) behavior of a Hf1-xZrxO2 (HZO)/Si FET and its potential for high-endurance nonvolatile memory operation. The AFE-HZO FET with Zr content of 75 % exhibits a double polarization switching and half-loop switching of its double hysteresis under bipolar and unipolar bias conditions, respectively. The counterclockwise hysteresis in the transfer Id -Vg characteristics is demonstrated under unipolar Vg sweep through half-loop polarization in AFeFET. The steep subthreshold swing values were observed for both forward and backward Vg swe

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"A study of MOSFET Device for The characterization of ID-VG and ID-VD Curves." Al-Salam Journal for Engineering and Technology, November 5, 2022, 40–45. http://dx.doi.org/10.55145/ajest.2023.01.01.005.

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In this paper, the MOSFET device structure has been simulated using an open-source simulator and the characterization of the ID-VG and ID-VD curves has been studied. The n-channel MOSFET device structure for three distinct generations has been simulated using the provided parameters, getting the corresponding I-V curves and observing their surface charge - Vg properties using the online simulator Nanohub. Based on the reported electrical characteristics, we may deduce that the Vth values decrease when the MOSFET device is scaled down. The current Id when Vg is zero is substantially higher in t

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Oiwa, tomohiro, and Eisuke Tokumitsu. "Fabrication of IGZO and In2O3-channel Ferroelectric-gate Thin Film Transistors." MRS Proceedings 1250 (2010). http://dx.doi.org/10.1557/proc-1250-g13-07.

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AbstractWe have fabricated and characterized ferroelectric-gate TFTs using In-Ga-Zn-O (IGZO) or In2O3 as a channel material. The ferroelectric gate insulator used in this work is (Bi,La)4Ti3O12 (BLT). We observed normal n-channel transistor operation for both IGZO and In2O3-channel TFTs. However, a charge injection type hysteresis was observed for IGZO channel TFTs in drain current – gate voltage (ID-VG) characteristics. Post fabrication anneal at 300oC reduced the charge-injection-tyoe hystereesis and the subthreshold swing was also improved from 0.27 to 0.19 V/decade. On the other hand, when

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Jain, Faquir C., Mukesh Gogna, Fuad Alamoody, et al. "Modeling and Fabrication of Cladded Ge Quantum Dot Gate Silicon MOSFETs Exhibiting 3-State Behavior." MRS Proceedings 1108 (2008). http://dx.doi.org/10.1557/proc-1108-a05-04.

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AbstractThis paper presents electrical transfer (Id-Vg) and output (Id-Vds) characteristics of a GeOx-cladded-Ge quantum dot (QD) gate Si MOSFET devices. In QD gate FETs, the manifestation of an intermediate state ‘i” makes it a 3-state device. The intermediate state originates due to compensation of increment in the gate voltage by a similar increase in the threshold voltage, which occurs via charge neutralization in the QD gate due to transfer of charge from the inversion layer to either first or second of the two QD layers.

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Tokumitsu, Eisuke, Masaru Senoo, and Etsu Shin. "Fabrication of Transparent Ferroelectric-Gate Thin Film Transistors with Nonvolatile Memory Operation." MRS Proceedings 902 (2005). http://dx.doi.org/10.1557/proc-0902-t10-54.

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AbstractWe demonstrate transparent thin film transistors (TFTs) with nonvolatile memory operation using Bi4-xLaxTi3O12 (BLT) as a gate insulator and indium tin oxide (ITO) as a channel. ITO is also used for the gate, source and drain electrodes. Drain current-drain voltage (ID-VD) characteristics of transparent ITO/BLT ferroelectric-gate TFTs exhibit excellent n-channel transistor operations. On current of 0.35 mA was obtained when the applied gate voltage is 6V. On the other hand, the off current of the device is as low as 10-10A, which indicates that the ITO channel is sufficiently depleted

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Maeda, Keiji, Hiroki Koyanagi, and Toshihide Jinnai. "Subthreshold Characteristics and Interface State Density of a-Si:H TFT." MRS Proceedings 297 (January 1, 1993). http://dx.doi.org/10.1557/proc-297-889.

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Inverted-staggered a-Si:H TFT was prepared by successive PECVD of a- SiN1.7:H and a- Si:H layers. Drain current ID vs gate voltage VG characteristics of the TFT were investigated. The gate-voltage swing defined by S=dVG/d(log ID) in the subthreshold region was 1.4 V at room temperature. If the observed S value is attributed to the bulk gap state density, the space- charge layer width is estimated to be about 450 A. This value is too small compared with the a-Si:H layer width of about 3000 A in the TFT, which exhibits good performance. On the other hand, if the S value is attributed to the inte

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Tan, Chung Foong, L. W. Teo, C.-S. Yin, et al. "Performance Characteristics of 65nm PFETs Using Molecular Implant Species for Source and Drain Extensions." MRS Proceedings 1070 (2008). http://dx.doi.org/10.1557/proc-1070-e03-02.

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ABSTRACTWe investigated the performance of 65nm pFETs whereby the source and drain extensions (SDE) were implanted with Carborane, (C2B10H12) a novel form of molecular species. The high atomic mass of this molecule (146 a.m.u.) and the number of boron atoms transported per ion enables the productivity at low energy required for manufacturing of ultra shallow junctions for advanced scaling. In this investigation, Carborane was implanted at 13 keV to produce a Boron profile near equivalent to that produced by the reference BF2 implant. Results of electrical measurements did not exhibit any compr

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