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Journal articles on the topic 'IDCT'

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Published: 4 June 2021
Last updated: 18 February 2022

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1

Jung, Seulkee, and Seongsoo Lee. "Design of Unified HEVC 4×4 IDCT/IDST Block." Journal of IKEEE 19, no. 2 (June 30, 2015): 271–75. http://dx.doi.org/10.7471/ikeee.2015.19.2.271.

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2

Huang, Hai, and Liyi Xiao. "Variable Length Reconfigurable Algorithms and Architectures for DCT/IDCT Based on Modified Unfolded Cordic." Open Electrical & Electronic Engineering Journal 7, no. 1 (June 14, 2013): 71–81. http://dx.doi.org/10.2174/1874129001307010071.

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A coordinate rotation digital computer (CORDIC) based variable length reconfigurable DCT/IDCT algorithm and corresponding architecture are proposed. The proposed algorithm is easily to extend to the 2n-point DCT/IDCT. Furthermore, we can easily construct the N-point DCT/IDCT with two N/2-pt DCTs/IDCTs based the proposed algorithm. The architecture based on the proposed algorithm can support several power-of-two transform sizes. To speed up the computation of DCT/IDCT without losing accuracy, we develop the modified unfolded CORDIC with the efficient carry save adder (CSA). The rotation angles of CORDIC used in proposed algorithm are arithmetic sequence. For convenience, we develop the architecture of N-point IDCT with the orthogonal property of DCT and IDCT transforms. The proposed architecture are modeled with MATLAB language and performed in DCT-based JPEG process, the experimental results show that the peak signal to noise ratio (PSNR) values of proposed architectures are higher than the existing CORDIC based architectures at both different quantization factors and different test images. Furthermore, the proposed architectures have higher regularity, modularity, computation accuracy and suitable for VLSI implementation.
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3

Diab, C., M. Oueidat, and R. Prost. "A new IDCT-DFT relationship reducing the IDCT computational cost." IEEE Transactions on Signal Processing 50, no. 7 (July 2002): 1681–84. http://dx.doi.org/10.1109/tsp.2002.1011208.

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4

Liang, Hong, He Weifeng, He Guanghui, and Mao Zhigang. "Area-efficient HEVC IDCT/IDST architecture for 8K × 4K video decoding." IEICE Electronics Express 13, no. 6 (2016): 20160019. http://dx.doi.org/10.1587/elex.13.20160019.

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5

Huang, Hai, Liyi Xiao, and Jiaming Liu. "CORDIC-Based Unified Architectures for Computation of DCT/IDCT/DST/IDST." Circuits, Systems, and Signal Processing 33, no. 3 (October 3, 2013): 799–814. http://dx.doi.org/10.1007/s00034-013-9661-9.

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6

Ko, Lu-Ting, Jwu-E. Chen, Hsi-Chin Hsin, Yaw-Shih Shieh, and Tze-Yun Sung. "A Unified Algorithm for Subband-Based Discrete Cosine Transform." Mathematical Problems in Engineering 2012 (2012): 1–31. http://dx.doi.org/10.1155/2012/912194.

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Discrete cosine transform (DCT) and inverse DCT (IDCT) have been widely used in many image processing systems and real-time computation of nonlinear time series. In this paper, the unified DCT/IDCT algorithm based on the subband decompositions of a signal is proposed. It is derived from the data flow of subband decompositions with factorized coefficient matrices in a recursive manner. The proposed algorithm only requires(4(log2n)−1−1)and(4(log2n)−1−1)/3multiplication time forn-point DCT and IDCT, with a single multiplier and a single processor, respectively. Moreover, the peak signal-to-noise ratio (PSNR) of the proposed algorithm outperforms the conventional DCT/IDCT. As a result, the subband-based approach to DCT/IDCT is preferable to the conventional approach in terms of computational complexity and system performance. The proposed reconfigurable architecture of linear array DCT/IDCT processor has been implemented by FPGA.
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7

Hou, Ping-Jen, Syamsiah Syam, Wen-Chien Lan, Keng-Liang Ou, Bai-Hung Huang, Ka-Chun Chan, Chi-Hsun Tsai, et al. "Development of a Surface-Functionalized Titanium Implant for Promoting Osseointegration: Surface Characteristics, Hemocompatibility, and In Vivo Evaluation." Applied Sciences 10, no. 23 (November 30, 2020): 8582. http://dx.doi.org/10.3390/app10238582.

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This study aimed to evaluate the impact of surface-modified biomedical titanium (Ti) dental implant on osseointegration. The surfaces were modified using an innovative dip-coating technique (IDCT; sandblasted, large-grit, and acid-etched, then followed by coating with the modified pluronic F127 biodegradable polymer). The surface morphology and hemocompatibility evaluations were investigated by field-emission scanning electron microscopy, while the contact analysis was observed by goniometer. The IDCT-modified Ti implant was also implanted in patients with missing teeth by single-stage surgical procedure then observed immediately and again four months after placement by cone-beam computerized tomography (CBCT) imaging. It was found that the IDCT-modified Ti implant was rougher than the dental implant without surface modification. Contact angle analysis showed the IDCT-modified Ti implant was lower than the dental implant without surface modification. The hemocompatibility evaluations showed greater red blood cell aggregation and fibrin filament formation on the IDCT-modified Ti implant. The radiographic and CBCT image displayed new bone formation at four months after the IDCT-modified Ti implant placement. Therefore, this study suggests that the IDCT-modified Ti dental implant has great potential to accelerate osseointegration.
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8

Huang, W., and M. G. Bayerl. "Indeterminate Dendritic Cell Tumor (IDCT) of GI Tract, Lymph Node and Spleen Masquerading as Refractory Inflammatory Bowel Disease." American Journal of Clinical Pathology 154, Supplement_1 (October 2020): S108. http://dx.doi.org/10.1093/ajcp/aqaa161.236.

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Abstract Introduction/Objective Indeterminate dendritic cell tumor (IDCT) is an extremely rare neoplasm, most frequently presenting in skin with cells resembling precursors to Langerhans cells. We report an exceptional case of IDCT occurring in GI tract, spleen, and lymph nodes of a 66-year-old lady, mimicking inflammatory bowel disease (IBD). Methods Four years prior to the diagnosis of IDCT, she was diagnosed with ulcerative colitis (UC) based on bloody diarrhea and pan-colitis. Her colitis became refractory to medical treatments and she developed pancytopenia, splenomegaly and abdominal lymphadenopathy. A FNA of abdominal lymph node and a colonoscopic biopsy both showed non-necrotizing granulomas, which along with her multiple oral ulcers suggested Crohn’s disease. Due to failure to medical treatments, she underwent proctocolectomy and ileostomy, followed later by subtotal colectomy with excision of a splenule and lymph nodes. Results All specimens from the final operation showed involvement by IDCT characterized by polygonal cells with abundant eosinophilic cytoplasm, oval nuclei with occasional nuclear grooves, open chromatin and eosinophilic nucleoli. By immunohistochemistry, the tumor cells expressed S100, CD1a, cyclin D1, BRAFV600E. Langerin staining was observed in <5% of cells, suggesting partial differentiation of tumor cells (frequently seen in IDCT) vs. reactive Langerhans cells. No overt cytological atypia and no necrosis were observed. Eosinophils, neutrophils, lymphocytes and plasma cells were sparse. There was no emperioloperesis. The colon showed multifocal active and chronic inflammation and ulcerations associated with the IDCT infiltrate. These specimens were diagnostic of IDCT. Conclusion Absence Langerin in the majority of cells excluded the possibility of Langerhans cell histiocytosis. The presence of CD1a and absence of bone involvement excluded the possibility of Erdheim-Chester disease. Retrospectively, it appears that the patient’s symptoms were due to IDCT rather than IBD. The clinical course of IDCT is highly variable, but the BRAF mutation offers a promising new therapeutic target for this patient.
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9

Sung, Tze-Yun, Yaw-Shih Shieh, and Hsi-Chin Hsin. "An Efficient VLSI Linear Array for DCT/IDCT Using Subband Decomposition Algorithm." Mathematical Problems in Engineering 2010 (2010): 1–21. http://dx.doi.org/10.1155/2010/185398.

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Discrete Cosine transform (DCT) and inverse DCT (IDCT) have been widely used in many image processing systems and real-time computation of nonlinear time series. In this paper, a novel lineararray of DCT and IDCT is derived from the data flow of subband decompositions representing the factorized coefficient matrices in the matrix formulation of the recursive algorithm. For increasing the throughput as well as decreasing the hardware cost, the input and output data are reordered. The proposed 8-point DCT/IDCT processor with four multipliers, simple adders, and less registers and ROM storing the immediate results and coefficients, respectively, has been implemented on FPGA (field programmable gate array) and SoC (system on chip). The linear-array DCT/IDCT processor with the computation complexityO(5N/8)and hardware complexityO(5N/8)is fully pipelined and scalable for variable-length DCT/IDCT computations.
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10

Aggoun, A., and I. Jalloh. "Two-dimensional DCT∕IDCT architecture." IEE Proceedings - Computers and Digital Techniques 150, no. 1 (2003): 2. http://dx.doi.org/10.1049/ip-cdt:20030063.

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11

Huang, Hai, Jia Ming Liu, Xue Bin Lu, and Bin Yu. "Design and Implementation of Unified DCT/IDCT Architecture Based on FPGA." Advanced Materials Research 981 (July 2014): 323–26. http://dx.doi.org/10.4028/www.scientific.net/amr.981.323.

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This paper proposes a unified architecture for computation of discrete cosine transform (DCT) and its inverse transform (IDCT). The matrix decomposition algorithm is used to deduce the proposed algorithm. Based on this algorithm, a unified DCT/IDCT architecture is developed. Then, this architecture is modeled in HDL, verified and implemented with FPGA. Experiment results show that the unified DCT/IDCT architecture has low hardware complexity and high calculation accuracy.
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12

Qi, Jin, Can Qun Yang, Cheng Chen, Qiang Wu, and Tao Tang. "Accelerating IDCT Algorithm on Xeon Phi Coprocessor." Advanced Materials Research 756-759 (September 2013): 3114–20. http://dx.doi.org/10.4028/www.scientific.net/amr.756-759.3114.

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Inverse Discrete Cosine Transform (IDCT) is an important operation for image and videos decompression. How to accelerate the IDCT algorithm has been frequently studied. Recently Intel has proposed Xeon Phi coprocessors based on the many integrated core (MIC) architecture. Xeon Phi is integrated with 61 cores and 512-bit SIMD extension within each core, thus providing very high performance. In this paper, we employ the Knights Corner (a beta version of Xeon Phi) to accelerate the IDCT algorithm. By employing the 512-bit SIMD instruction and data pre-fetching optimization, our implementation achieves (1) averagely 5.82 speedup over the none-SIMD version, (2) averagely 27.3% performance benefit with the data pre-fetching optimization, and (3) averagely 1.53 speedup on one Knights Corner coprocessor over the implementation on one octal-core Intel Xeon E5-2670 CPU.
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13

BHATTACHARYA, ARUP K., and SYED S. HAIDER. "A VLSI IMPLEMENTATION OF THE INVERSE DISCRETE COSINE TRANSFORM." International Journal of Pattern Recognition and Artificial Intelligence 09, no. 02 (April 1995): 303–14. http://dx.doi.org/10.1142/s0218001495000146.

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The Inverse Discrete Cosine Transform (IDCT) is an important function in HDTV, digital TV and multimedia systems complying with JPEG or MPEG standards for video compression. However, the IDCT is computationally intensive and therefore very expensive to implement in VLSI using direct matrix multiplication. By properly arranging the input coefficient sequence and the output data, the rows and columns of the transform matrix can be reordered to build modular regularity suitable for custom implementation in VLSI. This regularity can be exploited, so that a single permutation can be used to derive each output column from the previous one using a circular shift of an accumulator’s input data multiplied in a special sequence. This technique, using only one 1-dimensional IDCT processor and seven constant multipliers, and its implementation are presented. Operation of 58 MHz under worst case conditions is easily achieved, thus making the design applicable to a wide range of video and real time image processing applications. Fabricated in 0.5 micron triple metal CMOS technology, the IDCT contains 70,000 transistors occupying 7 mm2 square silicon. The design has been used on an AT&T MPEG video decoder chip.
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14

Cufer, Tanja, Eduardo L. Cazap, Lucia Beatriz Delgado, Raghunadharao Digumarti, Natasha B. Leighl, Mohamed M. Meshref, Hironobu Minami, et al. "Global survey on barriers to clinical cancer research." Journal of Clinical Oncology 30, no. 15_suppl (May 20, 2012): e16505-e16505. http://dx.doi.org/10.1200/jco.2012.30.15_suppl.e16505.

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e16505 Background: Many authorities, including ASCO, have raised concerns about growing barriers to clinical cancer research. We believe this is the first global survey of perceived barriers to clinical cancer research from the investigator perspective. Methods: The ASCO International Affairs Committee invited 300 oncologists in 19 countries to complete a web-based survey. Eighty responded, with 41 from high-income countries (HIC) and 39 from low- and middle-income countries (LMIC). Most responders were medical oncologists (62%), at academic hospitals (90%). Barriers were ranked from 1 (most) to 8 (least) important. Results: Most responders reported participating in academia-driven (ADCT) (92%) and industry-driven clinical trials (IDCT) (89%) in the last 5 years, with a significantly higher proportion from HIC compared to LMIC involved in more than 10 ADCT (71% vs. 29%; p=0.008) and IDCT (71% vs. 29%; p=0.017) in that time. Most of the responders (45% from HIC vs. 55% from LMIC; p=NS) reported “no change” in the last 5 years in the proportion of their trials that were IDCT. Of those who said it has become more difficult to conduct ADCT (40/80) and IDCT (27/80), a significantly higher share came from HIC than from LMIC in the case of both ADCT (29/40; 73% vs. 11/40; 28%; p=0.001) and IDCT (19/27; 70% vs. 8/27; 30%; p=0.009). Average time reported from regulatory initiation to the first-patient-in was up to 90 days for 39% of responders, 90-120 days for 26% and more than 120 days for 30%, with extremes reported most frequently by LMIC responders. A lack of funding was ranked the most important barrier to ADCT by both HIC (3.15) and by LMIC (3.18) responders, and a lack of patients the least important by both HIC (5.27) and LMIC (5.59) responders. LMIC responders considered competent authorities (regulatory) procedures a more important barrier than HIC responders (3.87 vs. 4.67). Conclusions: Though investigators from HIC are involved in more ADCT and IDCT than LMIC counterparts, they are more likely to perceive the barriers to conducting trials as worsening. Of note, no major shift towards greater IDCT was reported in our survey. With regards to ADCT, the main barrier that should be improved globally is financing, with an additional focus in LMIC on regulatory procedures optimization.
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Ahlam Fadhil Mahmood, Dr, and Abdulkreem Mohameed Salih. "FPGA Implementation of Multiplierless DCT/IDCT Chip." AL-Rafdain Engineering Journal (AREJ) 19, no. 4 (August 28, 2011): 55–67. http://dx.doi.org/10.33899/rengj.2011.26797.

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POPE, F. "WS081 Inherited abnormalities of connective tissue (IDCT)." Journal of the European Academy of Dermatology and Venereology 9 (September 1997): S95—S96. http://dx.doi.org/10.1016/s0926-9959(97)89240-9.

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17

Sima, Mihai, Sorin Cotţofaná, Jos T. J. Van Eijndhoven, Stamatis Vassiliadis, and Kees Vissers. "IEEE-Compliant IDCT on FPGA-Augmented TriMedia." Journal of VLSI signal processing systems for signal, image and video technology 39, no. 3 (March 2005): 195–212. http://dx.doi.org/10.1007/s11265-005-4840-y.

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18

Liang, Hong, He Weifeng, Zhu Hui, and Mao Zhigang. "A full-pipelined 2-D IDCT/IDST VLSI architecture with adaptive block-size for HEVC standard." IEICE Electronics Express 10, no. 9 (2013): 20130210. http://dx.doi.org/10.1587/elex.10.20130210.

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19

Syam, Syamsiah, Chia-Jen Wu, Wen-Chien Lan, Keng-Liang Ou, Bai-Hung Huang, Yu-Yeong Lin, Takashi Saito, et al. "The Potential of a Surface-Modified Titanium Implant with Tetrapeptide for Osseointegration Enhancement." Applied Sciences 11, no. 6 (March 15, 2021): 2616. http://dx.doi.org/10.3390/app11062616.

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In this study, the innovative dip-coating technique treated titanium (IDCT-Ti) implant with tetrapeptide Gly-Arg-Gly-Asp (GRGD) coating was investigated for its potential to enhance osseointegration. The L929 fibroblast cells were cultured in different concentrations of the GRGD (1%, 2%, and 5%). The cell viability was assessed through 3-[4,5-dimethylthiazol-2-yl]-2,5-diphenyltetrazolium bromide (MTT) assay and live/dead staining. The surface topography and nano-indentation were analyzed by atomic force microscopy. The hemocompatibility was evaluated via field-emission scanning electron microscopy, while contact angle analysis was detected by a goniometer. Radiograph evaluation was determined by panoramic imaging. It was found that the cell growth increased and had a survival rate of more than 70% in 1% GRGD. The mortality of L929 increased with the higher concentration of GRGD. The IDCT-Ti coated with 1% GRGD showed a nano-surface with a Young’s modulus that was similar to human cortical bone, and it displayed greater red blood cell accumulations with abundant fibrin formation. As regards the wettability, the IDCT-Ti coated with 1% GRGD was lower than the SLA (sandblasted, large-grit, and acid-etched) treated implant. The X-ray image exhibited no bone loss around the implant at six months after placement. As a result, this study suggests that the IDCT-Ti implant, coated with 1% GRGD, has a tremendous likeliness to enhance osseointegration.
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Mochizuki, Takashi. "Error estimation for IDCT finite word-length calculation." Electronics and Communications in Japan (Part III: Fundamental Electronic Science) 77, no. 6 (1994): 92–106. http://dx.doi.org/10.1002/ecjc.4430770609.

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21

Wu, J. L., S. H. Hsu, and W. J. Duh. "Two-stage convolver-based DCT and IDCT algorithms." IEE Proceedings I Communications, Speech and Vision 138, no. 6 (1991): 611. http://dx.doi.org/10.1049/ip-i-2.1991.0079.

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22

Johnson, D., V. Akella, and B. Stott. "Micropipelined asynchronous discrete cosine transform (DCT/IDCT) processor." IEEE Transactions on Very Large Scale Integration (VLSI) Systems 6, no. 4 (December 1998): 731–40. http://dx.doi.org/10.1109/92.736146.

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Yeong-Kang Lai and Yu-Fan Lai. "A reconfigurable IDCT architecture for universal video decoders." IEEE Transactions on Consumer Electronics 56, no. 3 (August 2010): 1872–79. http://dx.doi.org/10.1109/tce.2010.5606340.

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Ruetz, P. A., and P. Tong. "A 160 Mpixel/s IDCT processor for HDTV." IEEE Micro 12, no. 5 (October 1992): 28–32. http://dx.doi.org/10.1109/40.166710.

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Tian-Sheuan Chang, Chin-Sheng Kung, and Chein-Wei Jen. "A simple processor core design for DCT/IDCT." IEEE Transactions on Circuits and Systems for Video Technology 10, no. 3 (April 2000): 439–47. http://dx.doi.org/10.1109/76.836290.

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KUO, Shan-Chun, Hong-Yuan JHENG, Fan-Chieh CHENG, and Shanq-Jang RUAN. "Energy-Efficient IDCT Design for DS-CDMA Watermarking Systems." IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences E96.A, no. 5 (2013): 995–96. http://dx.doi.org/10.1587/transfun.e96.a.995.

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Cariow, Aleksandr, Marta Makowska, and Paweł Strzelec. "Small-Size FDCT/IDCT Algorithms with Reduced Multiplicative Complexity." Radioelectronics and Communications Systems 62, no. 11 (November 2019): 559–76. http://dx.doi.org/10.3103/s0735272719110025.

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Wu, J. L., S. H. Hsu, and W. J. Duh. "A novel two-stage algorithm for DCT and IDCT." IEEE Transactions on Signal Processing 40, no. 6 (June 1992): 1610–12. http://dx.doi.org/10.1109/78.139274.

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Chang, T. S., C. Chen, and C. W. Jen. "New distributed arithmetic algorithm and its application to IDCT." IEE Proceedings - Circuits, Devices and Systems 146, no. 4 (1999): 159. http://dx.doi.org/10.1049/ip-cds:19990537.

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Zhou, M., and J. De Lameillieure. "IDCT output range before clipping in MPEG video coding." Signal Processing: Image Communication 11, no. 2 (December 1997): 137–45. http://dx.doi.org/10.1016/s0923-5965(96)00042-2.

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Choi, Kiho, Sunyoung Lee, and Euee Jang. "Zero coefficient-aware IDCT algorithm for fast video decoding." IEEE Transactions on Consumer Electronics 56, no. 3 (August 2010): 1822–29. http://dx.doi.org/10.1109/tce.2010.5606332.

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32

Martuza, Muhammad, and Khan A. Wahid. "Low Cost Design of a Hybrid Architecture of Integer Inverse DCT for H.264, VC-1, AVS, and HEVC." VLSI Design 2012 (May 13, 2012): 1–10. http://dx.doi.org/10.1155/2012/242989.

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The paper presents a unified hybrid architecture to compute the 8×8 integer inverse discrete cosine transform (IDCT) of multiple modern video codecs—AVS, H.264/AVC, VC-1, and HEVC (under development). Based on the symmetric structure of the matrices and the similarity in matrix operation, we develop a generalized “decompose and share” algorithm to compute the 8×8 IDCT. The algorithm is later applied to four video standards. The hardware-share approach ensures the maximum circuit reuse during the computation. The architecture is designed with only adders and shifters to reduce the hardware cost significantly. The design is implemented on FPGA and later synthesized in CMOS 0.18 um technology. The results meet the requirements of advanced video coding applications.
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Chen, C. H., B. D. Liu, and J. F. Yang. "Direct Recursive Structures for Computing Radix-<tex>$r$</tex>Two-Dimensional DCT/IDCT/DST/IDST." IEEE Transactions on Circuits and Systems I: Regular Papers 51, no. 10 (October 2004): 2017–30. http://dx.doi.org/10.1109/tcsi.2004.835685.

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CHEN, YUAN-HO, and HSIAO-TZU LIU. "HARDWARE-EFFICIENT MULTI-STANDARD VIDEO TRANSFORM CORE." Journal of Circuits, Systems and Computers 23, no. 08 (June 18, 2014): 1450119. http://dx.doi.org/10.1142/s0218126614501199.

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This study presents a unified hybrid architecture to compute the inverse discrete cosine transform (IDCT) of multiple modern video decoders such as moving picture experts group (MPEG-4), H.264, VC-1 and high efficiency video coding (HEVC). The proposed hardware sharing architecture requires a lower hardware cost than that for individual implementations, and maximizes the proportion of the circuit that is reused during the computation. The proposed architecture design needs only adders and shifters to significantly reduce the hardware cost. Thus, the resource sharing method can increase the circuit sharing capability and achieve high hardware efficiency. For verification, a TSMC 0.18-μm CMOS process is applied to implement the IDCT chip, and the maximum throughput rate of the proposed design is 1000 MP/s with a hardware cost of 16.5 k gates.
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LIU Yuan-yuan, 刘媛媛, 陈贺新 CHEN He-xin, and 赵岩 ZHAO Yan. "Pipeline architectures of device-saving three dimensional DCT/IDCT algorithm." Optics and Precision Engineering 23, no. 11 (2015): 3270–78. http://dx.doi.org/10.3788/ope.20152311.3270.

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Chatterjee, Subiman, and Kishor Sarawadekar. "WHT and Matrix Decomposition-Based Approximated IDCT Architecture for HEVC." IEEE Transactions on Circuits and Systems II: Express Briefs 66, no. 6 (June 2019): 1043–47. http://dx.doi.org/10.1109/tcsii.2018.2874071.

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Yang, Z. Y., S. Yu, L. Q. Chen, J. Zhou, Y. J. Qiao, and W. Y. Gu. "QAM accommodated double-side band fast OFDM based on IDCT." Optics Express 21, no. 26 (December 20, 2013): 32441. http://dx.doi.org/10.1364/oe.21.032441.

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Chen, Yuan-Ho, and Yi-Fan Ko. "High-throughput IDCT architecture for high-efficiency video coding (HEVC)." International Journal of Circuit Theory and Applications 45, no. 12 (June 13, 2017): 2260–69. http://dx.doi.org/10.1002/cta.2376.

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Honarvar Shakibaei Asli, Barmak, Jan Flusser, Yifan Zhao, John Ahmet Erkoyuncu, Kajoli Banerjee Krishnan, Yasin Farrokhi, and Rajkumar Roy. "Ultrasound Image Filtering and Reconstruction Using DCT/IDCT Filter Structure." IEEE Access 8 (2020): 141342–57. http://dx.doi.org/10.1109/access.2020.3011970.

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Choi, K., and E. S. Jang. "Scaled zero coefficient-aware IDCT algorithm for fast video decoding." Electronics Letters 46, no. 25 (2010): 1668. http://dx.doi.org/10.1049/el.2010.2437.

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41

Shen-Fu Hsiao, Wei-Ren Shiue, and Jian-Ming Tseng. "A cost-efficient and fully-pipelinable architecture for DCT/IDCT." IEEE Transactions on Consumer Electronics 45, no. 3 (1999): 515–25. http://dx.doi.org/10.1109/30.793535.

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Slawecki, D., and W. Li. "DCT/IDCT processor design for high data rate image coding." IEEE Transactions on Circuits and Systems for Video Technology 2, no. 2 (June 1992): 135–46. http://dx.doi.org/10.1109/76.143413.

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Miyazaki, Takashi, Takao Nishitani, Masato Edahiro, Ikuko Ono, and Kaoru Mitsuhashi. "DCT/IDCT processor for HDTV developed with dsp silicon compiler." Journal of VLSI signal processing systems for signal, image and video technology 5, no. 2-3 (April 1993): 151–58. http://dx.doi.org/10.1007/bf01581292.

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Chan, Yuk-Hee, and Wan-Chi Siu. "General approach for the realization of DCT/IDCT using convolutions." Signal Processing 37, no. 3 (June 1994): 357–63. http://dx.doi.org/10.1016/0165-1684(94)90004-3.

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45

Ruiz, G. A., J. A. Michell, and A. Burón. "High Throughput Parallel-Pipeline 2-D DCT/IDCT Processor Chip." Journal of VLSI Signal Processing Systems for Signal, Image, and Video Technology 45, no. 3 (December 2006): 161–75. http://dx.doi.org/10.1007/s11265-006-9764-7.

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46

Zhu, Pingping, Jianguo Liu, and Shengkui Dai. "Fixed-point IDCT without multiplications based on B.G. Lee's algorithm." Digital Signal Processing 19, no. 4 (July 2009): 770–77. http://dx.doi.org/10.1016/j.dsp.2008.11.004.

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47

Chiper, D. F., M. N. S. Swamy, M. O. Ahmad, and T. Stouraitis. "Systolic algorithms and a memory-based design approach for a unified architecture for the computation of DCT/DST/IDCT/IDST." IEEE Transactions on Circuits and Systems I: Regular Papers 52, no. 6 (June 2005): 1125–37. http://dx.doi.org/10.1109/tcsi.2005.849109.

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48

Liu, Fu, Wen Wei Fu, and Hui Tang. "Encoding and Reconstruction about Video Image via Compressed Sensing." Advanced Materials Research 765-767 (September 2013): 2617–20. http://dx.doi.org/10.4028/www.scientific.net/amr.765-767.2617.

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Abstract:
A new method for encoding and reconstruction high quality video image is given in this paper which uses the theory of compressed sensing. First the image frame of video is transformed into DCT domain. Then Image coding and decoding process using CS theory is given, frame I in image sequences is coded by frame coding mode after doing CS sampling to the DCT coefficients and the difference vector dv of the t-th fame for fame P. CS reconstruction and IDCT are done during decoding. Finally, the high quality reconstructed image is obtained. The experimental results shows that for images with sparseness, the image coding and decoding system integrated with CS theory and its methods can be used to obtain reconstructed images with high quality, and comparing with DCT and IDCT method, the method has some improvement in the term of PSNR for general images.
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49

You, Jaehee. "DCT/IDCT Constant Geometry Array Processor for Codec on Display Panel." JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE 18, no. 4 (August 31, 2018): 403–22. http://dx.doi.org/10.5573/jsts.2018.18.4.403.

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50

Pai, C. Y., W. E. Lynch, and A. J. Al-Khalili. "Low-power data-dependent 8×8 DCT/IDCT for video compression." IEE Proceedings - Vision, Image, and Signal Processing 150, no. 4 (2003): 245. http://dx.doi.org/10.1049/ip-vis:20030564.

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