Relevant bibliographies by topics / Ideal metal-semiconductor interface

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Academic literature on the topic 'Ideal metal-semiconductor interface'

Author: Grafiati
Published: 4 June 2021
Last updated: 16 February 2022

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Journal articles on the topic "Ideal metal-semiconductor interface"

1

Mönch, Winfried. "Electronic properties of ideal and interface-modified metal-semiconductor interfaces." Journal of Vacuum Science & Technology B: Microelectronics and Nanometer Structures 14, no. 4 (July 1996): 2985. http://dx.doi.org/10.1116/1.588947.

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2

FLORES, F. "ALKALI-ATOM ADSORPTION ON SEMICONDUCTOR SURFACES: METALLIZATION AND SCHOTTKY-BARRIER FORMATION." Surface Review and Letters 02, no. 04 (August 1995): 513–37. http://dx.doi.org/10.1142/s0218625x95000480.

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Alkali metals deposited on weakly ionic semiconductors are neither reactive nor form large three-dimensional islands, offering an ideal system in which Schottky junctions can be analyzed. In this paper, the alkali-metal-semiconductor interface is reviewed with a special emphasis on the formation of the Schottky barrier. Two regimes are clearly differentiated for the deposition of AMs on a semiconductor: in the high-coverage limit the Schottky barrier is shown to depend, for not very defective interfaces, on the semiconductor charge neutrality level. For low coverages, different one- and two-dimensional structures appear on the semiconductor surface presenting an insulating behavior. For depositions around a metal monolayer, a Mott metal-insulator transition appears; then, the interface Fermi energy is pinned by the metallic density of states at the position determined by the semiconductor charge neutrality level. This situation defines the Schottky barrier height of a thick-metal overlayer.
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Murakami, Masanori, Yasuo Koide, and Takeo Oku. "Microstructural Analysis at Metal/Semiconductor Interface for Ideal Ohmic Contacts." Materia Japan 37, no. 12 (1998): 998. http://dx.doi.org/10.2320/materia.37.998.

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4

Gao, Xian, Ji Long Tang, Dan Fang, Fang Chen, Shuang Peng Wang, Hai Feng Zhao, Xuan Fang, et al. "The Electrical Characteristics of GaAs-MgO Interfaces of GaAs MIS Schottky Diodes." Advanced Materials Research 1118 (July 2015): 270–75. http://dx.doi.org/10.4028/www.scientific.net/amr.1118.270.

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Many researches pay attention to the metal-semiconductor interface barrier, due to its effect on device. Deliberate growing an interface layer to affect and improve the quality of device, especially metal-insulator-semiconductor (MIS) structures, arouses wide attention. In this paper, Be-doped GaAs was grown on substrate wafer by molecular beam epitaxy (MBE) on purpose before depositing insulator layer, and then MgO film as the dielectric interface layer of Au/GaAs were deposited using atomic layer deposition (ALD) method. The interface electrical characteristics of the metal-insulator-semiconductor (MIS) structures were investigated in detail. The barrier height and ideal factor of GaAs diode parameters were calculated by means of current-voltage (I-V) characteristics. Experimental result showed that along with the increasing of the doping content, the Schottky barrier height increasing, but the ideal factor decrease at first and then increase.
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Khanna, Shaweta, Arti Noor, Man Singh Tyagi, and Sonnathi Neeleshwar. "Interface States and Barrier Heights on Metal/4H-SiC Interfaces." Materials Science Forum 615-617 (March 2009): 427–30. http://dx.doi.org/10.4028/www.scientific.net/msf.615-617.427.

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Available data on Schottky barrier heights on silicon and carbon rich faces of 4H-SiC have been carefully analyzed to investigate the mechanism of barrier formation on these surfaces. As in case of 3C and 6H-SiC, the barrier heights depend strongly upon method of surface preparation with a considerable scatter in the barrier height for a given metal-semiconductor system. However, for each metal the barrier height depends on the metal work function and strong pinning of the Fermi level has not been observed. The slopes of the linear relation between the barrier heights and metal work functions varies over a wide range from 0.2 to about 0.75 indicating that the density of interface states depends strongly on the method of surface preparation. By a careful examination of the data on barrier heights we could identify a set of nearly ideal interfaces in which the barrier heights vary linearly with metal work function approaching almost to the Schottky limit. The density of interface states for these interfaces is estimated to lie between 4.671012 to 2.631012 states/ cm2 eV on the silicon rich surface and about three times higher on the carbon rich faces. We also observed that on these ideal interfaces the density of interface states was almost independent of metal indicating that the metal induced gap states (MIGS) play no role in determining the barrier heights in metal-4H-SiC Schottky barriers.
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Korošak, Dean, and Bruno Cvikl. "On the role of the interface charge in non-ideal metal–semiconductor contacts." Applied Surface Science 250, no. 1-4 (August 2005): 63–69. http://dx.doi.org/10.1016/j.apsusc.2004.12.024.

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Habersat, Daniel B., Aivars J. Lelis, G. Lopez, J. M. McGarrity, and F. Barry McLean. "On Separating Oxide Charges and Interface Charges in 4H-SiC Metal-Oxide-Semiconductor Devices." Materials Science Forum 527-529 (October 2006): 1007–10. http://dx.doi.org/10.4028/www.scientific.net/msf.527-529.1007.

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We have investigated the distribution of oxide traps and interface traps in 4H Silicon Carbide MOS devices. The density of interface traps, Dit, was characterized using standard C-V techniques on capacitors and charge pumping on MOSFETs. The number of oxide traps, NOT, was then calculated by measuring the flatband voltage VFB in p-type MOS capacitors. The amount that the measured flatband voltage shifts from ideal, minus the contributions due to the number of filled interface traps Nit, gives an estimate for the number of oxide charges present. We found Dit to be in the low 1011cm−2eV−1 range in midgap and approaching 1012 −1013cm−2eV−1 near the band edges. This corresponds to an Nit of roughly 2.5 ⋅1011cm−2 for a typical capacitor in flatband at room temperature. This data combined with measurements of VFB indicates the presence of roughly 1.3 ⋅1012cm−2 positive NOT charges in the oxide near the interface for our samples.
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8

Ghazai, Alaa, and Marwaa Mohammed. "(Au, Ag)/Al0.08In0.08Ga0.84N/ (Au, Ag) Metal-semiconductor-metal (MSM) Photodetectors." Iraqi Journal of Nanotechnology, no. 1 (January 23, 2021): 72–79. http://dx.doi.org/10.47758/ijn.vi1.36.

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Metal-semiconductor-metal (MSM) photodetectors (PDs) based on gold and silver (Au, Ag)/Al0.08In0.08Ga0.84N (commercial sample)/ (Au, Ag) have been fabricated and characterized. The effect of annealing temperature of As deposit, 400, 500, and 600 0C for 30 min on the topography and electrical properties of Au contact on Al0.08In0.08Ga0.84N thin film have been characterized and optimized using Current-Voltage (I-V) characteristic. Schottky barrier height (SBH) and ideality factor (n) of Au/ Al0.08In0.08Ga0.84N interface were 1.223 eV and 1.773 at 50 0C annealing temperature for 30 min respectively, and it is found that contact has a high-quality surface. Also, with the same procedure, the effect of annealing time of 15, 30, 45 minutes, and 1 hour have been studied and optimized. The results revealed that the best annealing time is 30 min which has the highest SBH. Au contact compared with Ag contact used to first time as best our knowledge with the optimal condition to select the best metal for MSM photodetectors (PDs). The ideal characterization of Au, Ag/AlInGaN/Au, Ag MSMPDs on Si substrate depend on responsivities of 0.201 and 0.153 A W-1, quantum efficiencies of 71% and 57%, and NEPs of 3.55×10-4 and 1.45×10-3W-1, respectively have been also studied compared. The height SBH and QE for the samples grown on Si was at Au contact which proposed to use in such optoelectronic devices.
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Fraivillig, Jim, Richard Koba, and Kent Hutchings. "Semiconductor-to-metal attachment with silver-filled TPI bondlines." Additional Conferences (Device Packaging, HiTEC, HiTEN, and CICMT) 2015, HiTEN (January 1, 2015): 000064–67. http://dx.doi.org/10.4071/hiten-session2-paper2_4.

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In the attachment of semiconductor chips and submounts to metal heat sinks, bondlines utilizing silver-filled thermoplastic polyimide adhesive (TPI) are very durable across a wide range of environmental conditions (thermal, physical, chemical, radiation). TPI bondlines can withstand an extreme CTE-mismatch between the laminated materials, and have excellent bonding with adhesive-layer thicknesses down to only a few microns. To provide electrical conductivity and enhance thermal conductivity, the TPI bondline can be compounded with a high concentration of silver particles, and retain durability and adhesion. There are two general constructions of silver-filled TPI bondlines:Bondfoil – thin layers of silver-filled B-staged TPI coatings on either side of a metal carrier/substrate. The thickness of the (cured) TPI coatings would be 2–10 μm/side. TPI-priming (B- or C-staged; partially or fully cured) of a semiconductor surface may be required.TPI coating only – thin layers of silver-filled TPI polymer (1–3 μm/surface; B- or C-staged) on the interface surfaces to be bonded. A minimal amount of A-staged TPI (liquid: polymer in solvent) may be added to the bondline construction to optimize surface wetting during lamination.The ultimate in robustness and thinness, silver-filled TPI bondlines can provide:Continuous operation at 350°C, as well as temporary exposure to 450°C. Thermogravimetric analysis (TGA) of the TPI polymer shows that degradation does not start until well above 500°C. [See opposite.]Thermal shock durability -- the CTE-mismatched TPI bondline between silicon and aluminum can survive repeated thermal shocks with a ΔT of 300–400°C.Thermal impedance as low as 0.06 °C-cm2/W (0.01°C-in2/W) when using a silver-filled TPI bondfoil, and about 0.01 °C-cm2/W (0.002°C-in2/W) when using just silver-filled TPI coatings on the interface surfaces (no metal foil). In both constructions, the thermal impedance includes all interface resistances.Shear strength of 10 MPa to an aluminum surface and 1–2 MPa to silicon. These features make TPI bondlines ideal for demanding, CTE-mismatched semiconductor packages. As opposed to cross-linked thermoset bondlines -- which are brittle, especially when highly filled -- thermoplastic polyimide bondlines remain ductile and resist cracking, even when highly stressed.
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Negrín-Montecelo, Yoel, Martín Testa-Anta, Laura Marín-Caba, Moisés Pérez-Lorenzo, Verónica Salgueiriño, Miguel A. Correa-Duarte, and Miguel Comesaña-Hermo. "Titanate Nanowires as One-Dimensional Hot Spot Generators for Broadband Au–TiO2 Photocatalysis." Nanomaterials 9, no. 7 (July 9, 2019): 990. http://dx.doi.org/10.3390/nano9070990.

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Metal–semiconductor nanocomposites have become interesting materials for the development of new photocatalytic hybrids. Along these lines, plasmonic nanoparticles have proven to be particularly efficient photosensitizers due to their ability to transfer plasmonic hot electrons onto large bandgap semiconductors such as TiO2, thus extending the activity of the latter into a broader range of the electromagnetic spectrum. The extent of this photosensitization process can be substantially enhanced in those geometries in which high electromagnetic fields are created at the metal–semiconductor interface. In this manner, the formation of plasmonic hot spots can be used as a versatile tool to engineer the photosensitization process in this family of hybrid materials. Herein, we introduce the use of titanate nanowires as ideal substrates for the assembly of Au nanorods and TiO2 nanoparticles, leading to the formation of robust hybrids with improved photocatalytic properties. Our approach shows that the correct choice of the individual units together with their rational assembly are of paramount importance in the development of complex nanostructures with advanced functionalities.
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Dissertations / Theses on the topic "Ideal metal-semiconductor interface"

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Iffländer, Tim. "Electronic and Magnetic Properties of the Fe/GaAs(110) Interface." Doctoral thesis, 2015. http://hdl.handle.net/11858/00-1735-0000-0028-86DE-A.

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Book chapters on the topic "Ideal metal-semiconductor interface"

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Tiwari, Sandip. "Semiconductor interfaces and junctions." In Semiconductor Physics, 228–47. Oxford University Press, 2020. http://dx.doi.org/10.1093/oso/9780198759867.003.0006.

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This chapter discusses understanding interfaces, how bulk state reasoning needs to evolve under the constraints of the surface and how these changes relate to interfaces. Interfaces and junctions connect semiconductors to the world and introduce perturbations of their own. Starting with a discussion of the SiO­­­2-Si interface—an amorphous-crystalline interface—with its local evolution, more general conditions—of metals, insulators and semiconductors—with defect states, induced gap states and Fermi pinning are discussed. Next, neutrality level as a defining idea for the establishment of the electronic behavior of metal-semiconductor and semiconductor-semiconductor interfaces is examined. Crystalline continuity leading to heterostructures with conduction band and valence band discontinuities are developed and related to bulk bandstructure. This allows one to analytically describe and show the junction band diagrams of abrupt and graded junctions. Nitride systems often have a polarized junction, that is, have large polarization—spontaneous and often piezoelectric—whose origin is explored.
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