Journal articles: 'Implementations'

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Haycraft, Joshua. "Implementations." postmedieval: a journal of medieval cultural studies 7, no. 3 (October 2016): 388–92. http://dx.doi.org/10.1057/s41280-016-0006-2.

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K, Sucharitha, and Rahul Reddy P. "An Efficient Implementation of Multipliers for ASIC Implementations." International Journal of VLSI & Signal Processing 3, no. 1 (April 25, 2016): 1–4. http://dx.doi.org/10.14445/23942584/ijvsp-v3i1p101.

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van Roggen, Walter. "Lisp implementations." ACM SIGPLAN Lisp Pointers 1, no. 3 (August 1987): 50–52. http://dx.doi.org/10.1145/1317203.1317214.

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van Roggen, Walter. "Lisp implementations." ACM SIGPLAN Lisp Pointers 1, no. 1 (April 1987): 46–55. http://dx.doi.org/10.1145/1862396.1862404.

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Abed, Sa’ed, Reem Jaffal, Bassam Mohd, and Mohammad Alshayeji. "FPGA Modeling and Optimization of a SIMON Lightweight Block Cipher." Sensors 19, no. 4 (February 21, 2019): 913. http://dx.doi.org/10.3390/s19040913.

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Security of sensitive data exchanged between devices is essential. Low-resource devices (LRDs), designed for constrained environments, are increasingly becoming ubiquitous. Lightweight block ciphers provide confidentiality for LRDs by balancing the required security with minimal resource overhead. SIMON is a lightweight block cipher targeted for hardware implementations. The objective of this research is to implement, optimize, and model SIMON cipher design for LRDs, with an emphasis on energy and power, which are critical metrics for LRDs. Various implementations use field-programmable gate array (FPGA) technology. Two types of design implementations are examined: scalar and pipelined. Results show that scalar implementations require 39% less resources and 45% less power consumption. The pipelined implementations demonstrate 12 times the throughput and consume 31% less energy. Moreover, the most energy-efficient and optimum design is a two-round pipelined implementation, which consumes 31% of the best scalar’s implementation energy. The scalar design that consumes the least energy is a four-round implementation. The scalar design that uses the least area and power is the one-round implementation. Balancing energy and area, the two-round pipelined implementation is optimal for a continuous stream of data. One-round and two-round scalar implementations are recommended for intermittent data applications.

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NEDJAH, NADIA, RODRIGO MARTINS DA SILVA, and LUIZA DE MACEDO MOURELLE. "ANALOG HARDWARE IMPLEMENTATIONS OF ARTIFICIAL NEURAL NETWORKS." Journal of Circuits, Systems and Computers 20, no. 03 (May 2011): 349–73. http://dx.doi.org/10.1142/s0218126611007347.

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There are several possible implementations of artificial neural network that are based either on software or hardware systems. Software implementations are rather inefficient due to the fact that the intrinsic parallelism of the underlying computation is usually not taken advantage of in a mono-processor kind of computing system. Existing hardware implementations of ANNs are efficient as the dedicated datapath used is optimized and the hardware is usually parallel. Hardware implementations of ANNs may be either digital, analog, or even hybrid. Digital implementations of ANNs tend to be of high complexity, thus of high cost, and somehow imprecise due to the use of lookup table for the activation function. On the other hand, analog implementation of ANNs are generally very simple and much more precise. In this paper, we focus on possible analog implementations of ANNs. The neuron is based on a simple operational amplifier. The reviewed implementations allow for the use of both negative and positive synaptic weights. An alternative implementation permits the realization of the training process.

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Seo, Hwajeong, Hyunjun Kim, Kyungbae Jang, Hyeokdong Kwon, Minjoo Sim, Gyeongju Song, Siwoo Uhm, and Hyunji Kim. "Secure HIGHT Implementation on ARM Processors." Mathematics 9, no. 9 (May 6, 2021): 1044. http://dx.doi.org/10.3390/math9091044.

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Secure and compact designs of HIGHT block cipher on representative ARM microcontrollers are presented in this paper. We present several optimizations for implementations of the HIGHT block cipher, which exploit different parallel approaches, including task parallelism and data parallelism methods, for high-speed and high-throughput implementations. For the efficient parallel implementation of the HIGHT block cipher, the SIMD instructions of ARM architecture are fully utilized. These instructions support four-way 8-bit operations in the parallel way. The length of primitive operations in the HIGHT block cipher is 8-bit-wise in addition–rotation–exclusive-or operations. In the 32-bit word architecture (i.e., the 32-bit ARM architecture), four 8-bit operations are executed at once with the four-way SIMD instruction. By exploiting the SIMD instruction, three parallel HIGHT implementations are presented, including task-parallel, data-parallel, and task/data-parallel implementations. In terms of the secure implementation, we present a fault injection countermeasure for 32-bit ARM microcontrollers. The implementation ensures the fault detection through the representation of intra-instruction redundancy for the data format. In particular, we proposed two fault detection implementations by using parallel implementations. The two-way task/data-parallel based implementation is secure against fault injection models, including chosen bit pair, random bit, and random byte. The alternative four-way data-parallel-based implementation ensures all security features of the aforementioned secure implementations. Moreover, the instruction skip model is also prevented. The implementation of the HIGHT block cipher is further improved by using the constant value of the counter mode of operation. In particular, the 32-bit nonce value is pre-computed and the intermediate result is directly utilized. Finally, the optimized implementation achieved faster execution timing and security features toward the fault attack than previous works.

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Weissbart, Léo, Łukasz Chmielewski, Stjepan Picek, and Lejla Batina. "Systematic Side-Channel Analysis of Curve25519 with Machine Learning." Journal of Hardware and Systems Security 4, no. 4 (October 16, 2020): 314–28. http://dx.doi.org/10.1007/s41635-020-00106-w.

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AbstractProfiling attacks, especially those based on machine learning, proved to be very successful techniques in recent years when considering the side-channel analysis of symmetric-key crypto implementations. At the same time, the results for implementations of asymmetric-key cryptosystems are very sparse. This paper considers several machine learning techniques to mount side-channel attacks on two implementations of scalar multiplication on the elliptic curve Curve25519. The first implementation follows the baseline implementation with complete formulae as used for EdDSA in WolfSSl, where we exploit power consumption as a side-channel. The second implementation features several countermeasures, and in this case, we analyze electromagnetic emanations to find side-channel leakage. Most techniques considered in this work result in potent attacks, and especially the method of choice appears to be convolutional neural networks (CNNs), which can break the first implementation with only a single measurement in the attack phase. The same convolutional neural network demonstrated excellent performance for attacking AES cipher implementations. Our results show that some common grounds can be established when using deep learning for profiling attacks on very different cryptographic algorithms and their corresponding implementations.

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MORALES-SANDOVAL, M., C. FEREGRINO-URIBE, R. CUMPLIDO, and I. ALGREDO-BADILLO. "A SINGLE FORMULA AND ITS IMPLEMENTATION IN FPGA FOR ELLIPTIC CURVE POINT ADDITION USING AFFINE REPRESENTATION." Journal of Circuits, Systems and Computers 19, no. 02 (April 2010): 425–33. http://dx.doi.org/10.1142/s0218126610006153.

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A formula for point addition in elliptic curves using affine representation and its implementation in FPGA is presented. The use of this new formula in hardware implementations of scalar multiplications for elliptic curve cryptography has the main advantages of: (i) reducing area for the implementations of elliptic curve point addition, and (ii) increasing the resistance to side channel attacks of the hardware implementation itself. Hardware implementation of scalar multiplication for elliptic curve cryptography using this new formulation requires low area resources while keeping high performance compared to implementations using projective coordinates, which are usually considered faster than the affine coordinates.

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Shikfa, Abdullatif. "Garbled Circuits: Optimizations and Implementations." Information & Security: An International Journal 37 (2017): 11–27. http://dx.doi.org/10.11610/isij.3701.

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Chugh, Ritesh, Subhash C. Sharma, and Andrés Cabrera. "Lessons Learned from Enterprise Resource Planning (ERP) Implementations in an Australian Company." International Journal of Enterprise Information Systems 13, no. 3 (July 2017): 23–35. http://dx.doi.org/10.4018/ijeis.2017070102.

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Successful Enterprise Resource Planning (ERP) implementations are a boon for organisations. However, there have been many instances of failed ERP implementations globally resulting in millions of wasted dollars. It is vital to learn from past ERP implementations so that such expensive mistakes are not recurrent. This qualitative exploratory case study aims to explore and document the lessons learned from ERP implementations in an Australian global natural resources company to mitigate such problems in the future. A single case study was conducted with the aim to understand experiences from different sites of the company that have already undergone proprietary ERP system implementation. Data was collected through interviews of key participants who were involved in the implementation. Analysis of the interviews has resulted in comprehensive lessons learned around the project focus areas. Finally, ten tips, divided in 4 categories i.e. People, Strategy, Technology and Management have been identified, to guide future ERP implementations and increase chances of success.

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van Egmond, Marielle, Shushma Patel, and Dilip Patel. "Exploring Human Dynamics in Global Information System Implementations." International Journal of Software Science and Computational Intelligence 5, no. 3 (July 2013): 76–90. http://dx.doi.org/10.4018/ijssci.2013070105.

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Global information systems (IS) are often designed and implemented without due consideration or management of the human aspect of information systems. The lack of acknowledgement of human factors generates cost overruns, time delays and may ultimately lead to a partial failure of the system or even an aborted implementation. In this paper the authors present the concept of the information system implementation transformation (ISIT) cloud that covers dynamics of global information system implementations. The authors have depicted these dynamics as interpretative readiness curves in relation to IS implementation phases. The authors argue that human elements are impacting the overall level of implementation readiness. The authors support their argument by discussing the role of attitudes towards IS implementations, after which the authors break it down into a focus on the role of culture and finally link our ISIT concept to the layered reference model of the brain (LRMB) to understand the role of cognitive elements within IS implementations. The results of their approach provide improved understanding of the human elements of global information system implementations and its organizational readiness.

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Fang, Jing‐Jing, and Chang‐Kai Liao. "Part II: implementations." International Journal of Clothing Science and Technology 17, no. 5 (October 2005): 307–19. http://dx.doi.org/10.1108/09556220510616174.

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Mohácsi, János, Szabolcs Szigeti, and Tamás Máray. "Testing IPv6 implementations." Computer Networks and ISDN Systems 30, no. 16-18 (September 1998): 1617–25. http://dx.doi.org/10.1016/s0169-7552(98)00170-6.

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Angilella, Silvia, and Alfio Giarlotta. "Implementations of PACMAN." European Journal of Operational Research 194, no. 2 (April 2009): 474–95. http://dx.doi.org/10.1016/j.ejor.2008.01.006.

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Hudomalj, Uroš, Christopher Mandla, and Markus Plattner. "FPGA Implementations of Algorithms for Preprocessing of High Frame Rate and High Resolution Image Streams in Real Time." Annals of Emerging Technologies in Computing 5, no. 2 (April 1, 2021): 50–61. http://dx.doi.org/10.33166/aetic.2021.02.005.

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This paper presents FPGA implementations of image filtering and image averaging – two widely applied image preprocessing algorithms. The implementations are targeted for real time processing of high frame rate and high resolution image streams. The developed implementations are evaluated in terms of resource usage, power consumption, and achievable frame rates. For the evaluation, Microsemi’s Smartfusion2 Advanced Development Kit is used. It includes a SmartFusion2 M2S150 SoC FPGA. The performance of the developed implementation of image filtering algorithm is compared to a solution provided by MATLAB’s Vision HDL Toolbox, which is evaluated on the same platform. The performance of the developed implementations are also compared with FPGA implementations found in existing publications, although those are evaluated on different FPGA platforms. Difficulties with performance comparison between implementations on different platforms are addressed and limitations of processing image streams with FPGA platforms discussed.

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Callen, J. L., J. Braithwaite, and J. I. Westbrook. "Contextual Implementation Model: A Framework for Assisting Clinical Information System Implementations." Journal of the American Medical Informatics Association 15, no. 2 (March 1, 2008): 255–62. http://dx.doi.org/10.1197/jamia.m2468.

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Zhu, Hufei, Wen Chen, and Yanpeng Wu. "Efficient Implementations for Orthogonal Matching Pursuit." Electronics 9, no. 9 (September 14, 2020): 1507. http://dx.doi.org/10.3390/electronics9091507.

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Based on the efficient inverse Cholesky factorization, we propose an implementation of OMP (called as version 0, i.e., v0) and its four memory-saving versions (i.e., the proposed v1, v2, v3 and v4). In the simulations, the proposed five versions and the existing OMP implementations have nearly the same numerical errors. Among all the OMP implementations, the proposed v0 needs the least computational complexity, and is the fastest in the simulations for almost all problem sizes. As a tradeoff between computational complexities/time and memory requirements, the proposed v1 seems to be better than all the existing ones when only considering the efficient OMP implementations storing G (i.e., the Gram matrix of the dictionary), the proposed v2 and v3 seem to be better than the only existing one when only considering the efficient implementations not storing G, and the proposed v4 seems to be better than the naive implementation that has the (known) minimum memory requirements. Moreover, all the proposed five versions only include parallelizable matrix-vector products in each iteration, and do not need any back-substitutions that are necessary in some existing efficient implementations (e.g., those utilizing the Cholesky factorization).

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Asgar, Talukdar S., and Tariq M. King. "Formalizing Requirements in ERP Software Implementations." Lecture Notes on Software Engineering 4, no. 1 (2016): 34–40. http://dx.doi.org/10.7763/lnse.2016.v4.220.

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Fuketa, Masao, Kazuhiro Morita, and Jun-ichi Aoe. "Comparisons of Efficient Implementations for DAWG." International Journal of Computer Theory and Engineering 8, no. 1 (February 2016): 48–52. http://dx.doi.org/10.7763/ijcte.2016.v8.1018.

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Aristo, Julian. "PENGARUH DUKUNGAN MANAJEMEN PUNCAK, MANAJEMEN PROYEK DAN KETERLIBATAN PENGGUNA TERHADAP TINGKAT KESUKSESAN IMPLEMENTASI ENTERPRISE RESOURCE PLANNING PADA PERUSAHAAN DI JABODETABEK." Jurnal Riset Manajemen dan Bisnis (JRMB) Fakultas Ekonomi UNIAT 2, no. 2 (June 27, 2017): 147–54. http://dx.doi.org/10.36226/jrmb.v2i2.45.

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Enterprise Resource Planning (ERP) systems have become vital strategic tools in today’s competitive business environment. Implementation of ERP systems is a highly complex process which is influenced not only by technical, but also by other factors. The purpose of this research to find out factors influencing the success of ERP implementations in companies in Jabodetabek. In this research three factors of success implementation ERP were selected on the bases of previous research that includes top management support, project management and user involvement. The results indicate that top management support and project management are key factors affecting the success of ERP implementations, while user involvement does not affect the success of ERP implementations. Top management support, project management and user involvement affect the success rate of 72.7% of ERP implementations. While the rest equal to 27.3% influenced by other variables not included in this research model. Keywords: Enterprise Resource Planning, Top management support, project management, user involvement

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Heponiemi, Tarja, Kia Gluschkoff, Tuulikki Vehko, Anu-Marja Kaihlanen, Kaija Saranto, Sari Nissinen, Janna Nadav, and Sari Kujala. "Electronic Health Record Implementations and Insufficient Training Endanger Nurses’ Well-being: Cross-sectional Survey Study." Journal of Medical Internet Research 23, no. 12 (December 23, 2021): e27096. http://dx.doi.org/10.2196/27096.

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Background High expectations have been set for the implementations of health information systems (HIS) in health care. However, nurses have been dissatisfied after implementations of HIS. In particular, poorly functioning electronic health records (EHRs) have been found to induce stress and cognitive workload. Moreover, the need to learn new systems may require considerable effort from nurses. Thus, EHR implementations may have an effect on the well-being of nurses. Objective This study aimed to examine the associations of EHR-to-EHR implementations and the sufficiency of related training with perceived stress related to information systems (SRIS), time pressure, and cognitive failures among registered nurses. Moreover, we examined the moderating effect of the employment sector (hospital, primary care, social services, and others) on these associations. Methods This study was a cross-sectional survey study of 3610 registered Finnish nurses in 2020. EHR implementation was measured by assessing whether the work unit of each respondent had implemented or will implement a new EHR (1) within the last 6 months, (2) within the last 12 months, (3) in the next 12 months, and (4) at no point within the last 12 months or in the forthcoming 12 months. The associations were examined using analyses of covariance adjusted for age, gender, and employment sector. Results The highest levels of SRIS (adjusted mean 4.07, SE 0.05) and time pressure (adjusted mean 4.55, SE 0.06) were observed among those who had experienced an EHR implementation within the last 6 months. The lowest levels of SRIS (adjusted mean 3.26, SE 0.04), time pressure (adjusted mean 4.41, SE 0.05), and cognitive failures (adjusted mean 1.84, SE 0.02) were observed among those who did not experience any completed or forthcoming implementations within 12 months. Nurses who perceived that they had received sufficient implementation-related training experienced less SRIS (F1=153.40, P<.001), time pressure (F1=80.95, P<.001), and cognitive failures (F1=34.96, P<.001) than those who had received insufficient training. Recent implementations and insufficient training were especially strongly associated with high levels of SRIS in hospitals. Conclusions EHR implementations and insufficient training related to these implementations may endanger the well-being of nurses and even lead to errors. Thus, it is extremely important for organizations to offer comprehensive training before, during, and after implementations. Moreover, easy-to-use systems that allow transition periods, a re-engineering approach, and user involvement may be beneficial to nurses in the implementation process. Training and other improvements would be especially important in hospitals.

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Sewberath Misser, Navin, Bas van Zaane, Joris E. N. Jaspers, Hein Gooszen, and Johan Versendaal. "Implementing Medical Technological Equipment in the OR: Factors for Successful Implementations." Journal of Healthcare Engineering 2018 (August 29, 2018): 1–7. http://dx.doi.org/10.1155/2018/8502187.

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Operating rooms (ORs) more and more evolve into high-tech environments with increasing pressure on finances, logistics, and a not be neglected impact on patient safety. Safe and cost-effective implementation of technological equipment in ORs is notoriously difficult to manage, specifically as generic implementation activities omit as hospitals have implemented local policies for implementations of technological equipment. The purpose of this study is to identify success factors for effective implementations of new technologies and technological equipment in ORs, based on a systematic literature review. We accessed ten databases and reviewed included articles. The search resulted in 1592 titles for review, and finally 37 articles were included in this review. We distinguish influencing factors and resulting factors based on the outcomes of this research. Six main categories of influencing factors on successful implementations of medical equipment in ORs were identified: “processes and activities,” “staff,” “communication,” “project management,” “technology,” and “training.” We identified a seventh category “performance” referring to resulting factors during implementations. We argue that aligning the identified influencing factors during implementation impacts the success, adaptation, and safe use of new technological equipment in the OR and thus the outcome of an implementation. The identified categories in literature are considered to be a baseline, to identify factors as elements of a generic holistic implementation model or protocol for new technological equipment in ORs.

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Hussain, Hanaa M., Khaled Benkrid, Ali Ebrahim, Ahmet T. Erdogan, and Huseyin Seker. "Novel Dynamic Partial Reconfiguration Implementation of K-Means Clustering on FPGAs: Comparative Results with GPPs and GPUs." International Journal of Reconfigurable Computing 2012 (2012): 1–15. http://dx.doi.org/10.1155/2012/135926.

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K-means clustering has been widely used in processing large datasets in many fields of studies. Advancement in many data collection techniques has been generating enormous amounts of data, leaving scientists with the challenging task of processing them. Using General Purpose Processors (GPPs) to process large datasets may take a long time; therefore many acceleration methods have been proposed in the literature to speed up the processing of such large datasets. In this work, a parameterized implementation of the K-means clustering algorithm in Field Programmable Gate Array (FPGA) is presented and compared with previous FPGA implementation as well as recent implementations on Graphics Processing Units (GPUs) and GPPs. The proposed FPGA has higher performance in terms of speedup over previous GPP and GPU implementations (two orders and one order of magnitude, resp.). In addition, the FPGA implementation is more energy efficient than GPP and GPU (615x and 31x, resp.). Furthermore, three novel implementations of the K-means clustering based on dynamic partial reconfiguration (DPR) are presented offering high degree of flexibility to dynamically reconfigure the FPGA. The DPR implementations achieved speedups in reconfiguration time between 4x to 15x.

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Никешин, Алексей Вячеславович, and Виктор Зиновьевич Шнитман. "Experience of Implementation of the Protocol TLS 1.3 Verification." Russian Digital Libraries Journal 24, no. 5 (November 6, 2021): 902–22. http://dx.doi.org/10.26907/1562-5419-2021-24-5-902-922.

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This paper presents the experience of verifying server implementations of the TLS cryptographic protocol version 1.3. TLS is a widely used cryptographic protocol designed to create secure data transmission channels and provides the necessary functionality for this: confidentiality of the transmitted data, data integrity, and authentication of the parties. The new version 1.3 of the TLS protocol was introduced in August 2018 and has a number of significant differences compared to the previous version 1.2. A number of TLS developers have already included support for the latest version in their implementations. These circumstances make it relevant to do research in the field of verification and security of the new TLS protocol implementations. We used a new test suite for verifying implementations of the TLS 1.3 for compliance with Internet specifications, developed on the basis of the RFC8446, using UniTESK technology and mutation testing methods. The current work is part of the TLS 1.3 protocol verification project and covers some of the additional functionality and optional protocol extensions. To test implementations for compliance with formal specifications, UniTESK technology is used, which provides testing automation tools based on the use of finite state machines. The states of the system under test define the states of the state machine, and the test effects are the transitions of this machine. When performing a transition, the specified impact is passed to the implementation under test, after which the implementation's reactions are recorded and a verdict is automatically made on the compliance of the observed behavior with the specification. Mutational testing methods are used to detect non-standard behavior of the system under test by transmitting incorrect data. Some changes are made to the protocol exchange flow created in accordance with the specification: either the values of the message fields formed on the basis of the developed protocol model are changed, or the order of messages in the exchange flow is changed. The protocol model allows one to make changes to the data flow at any stage of the network exchange, which allows the test scenario to pass through all the significant states of the protocol and in each such state to test the implementation in accordance with the specified program. So far, several implementations have been found to deviate from the specification. The presented approach has proven effective in several of our projects when testing network protocols, providing detection of various deviations from the specification and other errors.

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Cifredo-Chacón, María-Ángeles, Fernando Perez-Peña, Ángel Quirós-Olozábal, and Juan-José González-de-la-Rosa. "Implementation of Processing Functions for Autonomous Power Quality Measurement Equipment: A Performance Evaluation of CPU and FPGA-Based Embedded System." Energies 12, no. 5 (March 9, 2019): 914. http://dx.doi.org/10.3390/en12050914.

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Motivated by the effects of deregulation over power quality and the subsequent need of new types of measurements, this paper assesses different implementations of an estimate for the spectral kurtosis, considered as a low-level harmonic detection. Performance of a processor-based system is compared with a field programmable gate array (FPGA)-based solution, in order to evaluate the accuracy of this processing function for implementation in autonomous measurement equipment. The fourth-order spectrum, with applications in different fields, needs advanced digital signal processing, making it necessary to compare implementation alternatives. In order to obtain reproducible results, the implementations have been developed using common design and programming tools. Several characteristics of the implementations are compared, showing that the increasing complexity and reduced cost of the current FPGA models make the implementation of complex mathematical functions feasible. We show that FPGAs improve the processing capability of the best processor using an operating frequency 33 times lower. This fact strongly supports its implementation in hand-held instruments.

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KASER, OWEN, C. R. RAMAKRISHNAN, I. V. RAMAKRISHNAN, and R. C. SEKAR. "EQUALS – a fast parallel implementation of a lazy language." Journal of Functional Programming 7, no. 2 (March 1997): 183–217. http://dx.doi.org/10.1017/s0956796897002669.

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This paper describes EQUALS, a fast parallel implementation of a lazy functional language on a commercially available shared-memory parallel machine, the Sequent Symmetry. In contrast to previous implementations, we propagate normal form demand at compile time as well as run time, and detect parallelism automatically using strictness analysis. The EQUALS implementation indicates the effectiveness of NF-demand propagation in identifying significant parallelism and in achieving good sequential as well as parallel performance. Another important difference between EQUALS and previous implementations is the use of reference counting for memory management, instead of mark-and-sweep or copying garbage collection. Implementation results show that reference counting leads to very good scalability and low memory requirements, and offers sequential performance comparable to generational garbage collectors. We compare the performance of EQUALS with that of other parallel implementations (the 〈v, G〉-machine and GAML) as well as with the performance of SML/NJ, a sequential implementation of a strict language.

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Nişancı, Görkem, Paul G. Flikkema, and Tolga Yalçın. "Symmetric Cryptography on RISC-V: Performance Evaluation of Standardized Algorithms." Cryptography 6, no. 3 (August 10, 2022): 41. http://dx.doi.org/10.3390/cryptography6030041.

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The ever-increasing need for securing computing systems using cryptographic algorithms is spurring interest in the efficient implementation of common algorithms. While the algorithms can be implemented in software using base instruction sets, there is considerable potential to reduce memory cost and improve speed using specialized instructions and associated hardware. However, there is a need to assess the benefits and costs of software implementations and new instructions that implement key cryptographic algorithms in fewer cycles. The primary aim of this paper is to improve the understanding of the performance and cost of implementing cryptographic algorithms for the RISC-V instruction set architecture (ISA) in two cases: software implementations of the algorithms using the rv32i instruction set and using cryptographic instructions supported by dedicated hardware in additional functional units. For both cases, we describe a RISC-V processor with cryptography hardware extensions and hand-optimized RISC-V assembly language implementations of eleven cryptographic algorithms. Compared to implementations with only the rv32i instruction set, implementations with the cryptography set extension provide a 1.5× to 8.6× faster execution speed and 1.2× to 5.8× less program memory for five of the eleven algorithms. Based on our performance analyses, a new instruction is proposed to increase the implementation efficiency of the algorithms.

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Manda, Tiwonge Davis, and Terje Aksel Sanner. "The Mobile is Part of a Whole." International Journal of User-Driven Healthcare 4, no. 1 (January 2014): 1–16. http://dx.doi.org/10.4018/ijudh.2014010101.

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A challenge with mHealth in developing countries is that implementations are frequently treated as standalone solutions. Implementations fail because they are not sufficiently aligned with existing health information infrastructures (II). An interesting tool for evaluating implementation efforts in the context of the overall health II strategy, and thus potentially useful for identifying and mitigating risks, is the Bootstrap strategy. Bootstrapping is concerned with addressing take-off challenges facing novel solution implementations through incremental progression, resource maximization, mutual learning, and complexity mitigation. Although the strategy has been previously employed in retrospect to explain how implementation take-off challenges can be alleviated, less is known about its effectiveness as a tool for real time implementation risk assessment. Drawing on an action research mHealth project in Malawi, the study confirms bootstrapping as an effective tool for risk assessment, although the case also reveals that it may not always be easy to mitigate risks identified.

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Jacobsen, Annika, Ricardo de Miranda Azevedo, Nick Juty, Dominique Batista, Simon Coles, Ronald Cornet, Mélanie Courtot, et al. "FAIR Principles: Interpretations and Implementation Considerations." Data Intelligence 2, no. 1-2 (January 2020): 10–29. http://dx.doi.org/10.1162/dint_r_00024.

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The FAIR principles have been widely cited, endorsed and adopted by a broad range of stakeholders since their publication in 2016. By intention, the 15 FAIR guiding principles do not dictate specific technological implementations, but provide guidance for improving Findability, Accessibility, Interoperability and Reusability of digital resources. This has likely contributed to the broad adoption of the FAIR principles, because individual stakeholder communities can implement their own FAIR solutions. However, it has also resulted in inconsistent interpretations that carry the risk of leading to incompatible implementations. Thus, while the FAIR principles are formulated on a high level and may be interpreted and implemented in different ways, for true interoperability we need to support convergence in implementation choices that are widely accessible and (re)-usable. We introduce the concept of FAIR implementation considerations to assist accelerated global participation and convergence towards accessible, robust, widespread and consistent FAIR implementations. Any self-identified stakeholder community may either choose to reuse solutions from existing implementations, or when they spot a gap, accept the challenge to create the needed solution, which, ideally, can be used again by other communities in the future. Here, we provide interpretations and implementation considerations (choices and challenges) for each FAIR principle.

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Lindskog, Pernilla, Annika Vänje, Åsa Törnkvist, and Jörgen Eklund. "Sustainable Lean in psychiatry? Assessment through socio-technical principles." International Journal of Quality and Service Sciences 8, no. 1 (March 21, 2016): 53–71. http://dx.doi.org/10.1108/ijqss-07-2015-0056.

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Purpose – This paper aims to identify conditions affecting sustainability of Lean implementations in Swedish psychiatric healthcare, from a socio-technical perspective. Design/methodology/approach – Longitudinal focus group interviews were conducted with 24 first-line managers within Swedish psychiatric healthcare. The analysis was made using Cherns’ ten socio-technical principles and a framework for sustainable development work in healthcare. Findings – The most critical socio-technical principles for a sustainable Lean implementation were boundary location; power and authority; and compatibility. At hospital level, socio-technical principles were inhibited by the weak ownership of the Lean implementation. However, strong ownership at division level meant the same principles were supported. Unclear goals made follow-ups difficult which had negative effects on the learning processes in the Lean implementation. The role and responsibility of first-line managers were unclear in that they perceived they lacked power and authority resulting in negative effects on the participation – an important sustainability concept. Originality/value – Empirically based papers assessing Lean implementations in psychiatry are rare. This study is a contribution to the research area of sustainable Lean implementations in healthcare. The practical implication of this study is that decision makers, senior managers, first-line managers and psychiatrists can be supported in reaching sustainable implementations of Lean.

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Smith, Ricky A. "Why CMMS Implementations Fail." Proceedings of the Water Environment Federation 2003, no. 5 (January 1, 2003): 717–29. http://dx.doi.org/10.2175/193864703784606846.

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Friedel, Richard. "Forward: IP Systems Implementations." SMPTE Motion Imaging Journal 131, no. 5 (June 2022): 8. http://dx.doi.org/10.5594/jmi.2022.3167767.

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Bond, Elden A. "Diversity of Microcomputer Implementations." Journal of Research on Computing in Education 20, no. 4 (June 1988): 321–30. http://dx.doi.org/10.1080/08886504.1988.10781846.

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Böhlen, Michael H. "Temporal database system implementations." ACM SIGMOD Record 24, no. 4 (December 1995): 53–60. http://dx.doi.org/10.1145/219713.219758.

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Milligan, M. K., and H. G. Cragon. "Processor implementations using queues." IEEE Micro 15, no. 4 (1995): 58–66. http://dx.doi.org/10.1109/40.400642.

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Noblin, Alice M., Kendall Cortelyou-Ward, and Steven Ton. "Electronic Health Record Implementations." Health Care Manager 30, no. 1 (January 2011): 45–50. http://dx.doi.org/10.1097/hcm.0b013e3182078b4f.

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Weinert, M., G. Schneider, R. Podloucky, and J. Redinger. "FLAPW: applications and implementations." Journal of Physics: Condensed Matter 21, no. 8 (January 30, 2009): 084201. http://dx.doi.org/10.1088/0953-8984/21/8/084201.

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LI, PENG, and ANDREW M. MAIDEN. "Ten implementations of ptychography." Journal of Microscopy 269, no. 3 (July 31, 2017): 187–94. http://dx.doi.org/10.1111/jmi.12614.

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McBryan, Oliver A., and Eric F. Van de Velde. "Hypercube Algorithms and Implementations." SIAM Journal on Scientific and Statistical Computing 8, no. 2 (March 1987): s227—s287. http://dx.doi.org/10.1137/0908023.

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McBrayer, Patrick. "Successful ATM Network Implementations." Information Systems Management 15, no. 1 (January 1998): 67–70. http://dx.doi.org/10.1201/1078/43183.15.1.19980101/31105.10.

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Tolmeijer, Suzanne, Markus Kneer, Cristina Sarasua, Markus Christen, and Abraham Bernstein. "Implementations in Machine Ethics." ACM Computing Surveys 53, no. 6 (December 29, 2020): 1–38. http://dx.doi.org/10.1145/3419633.

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Sharma, Sushil K. "Assessing e-government implementations." Electronic Government, an International Journal 1, no. 2 (2004): 198. http://dx.doi.org/10.1504/eg.2004.005178.

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Korniyenko, O. V., and M. S. Sharawi. "GPS software receiver implementations." IEEE Potentials 26, no. 3 (May 2007): 42–46. http://dx.doi.org/10.1109/mp.2007.361644.

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Joslin, David. "Extensions in Pascal implementations." ACM SIGPLAN Notices 20, no. 11 (November 1985): 39–45. http://dx.doi.org/10.1145/988291.988297.

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Anderson, John R. "Implementations, algorithms, and more." Behavioral and Brain Sciences 10, no. 3 (September 1987): 498–505. http://dx.doi.org/10.1017/s0140525x00023785.

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Choi, Yanghee. "OSI implementations in Korea." Computer Standards & Interfaces 5, no. 4 (January 1986): 267–70. http://dx.doi.org/10.1016/0920-5489(86)90036-x.

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Hitchcock, SM. "SPARC: architecture to implementations." Microprocessors and Microsystems 14, no. 6 (July 1990): 417–20. http://dx.doi.org/10.1016/0141-9331(90)90114-b.

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Brown, James A., and Ramiro Guerreiro. "APL2 implementations of unification." ACM SIGAPL APL Quote Quad 17, no. 4 (May 1987): 216–25. http://dx.doi.org/10.1145/384282.28342.

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Obermann, S. F., and M. J. Flynn. "Division algorithms and implementations." IEEE Transactions on Computers 46, no. 8 (1997): 833–54. http://dx.doi.org/10.1109/12.609274.

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Journal articles on the topic 'Implementations'

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