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Journal articles on the topic 'Integrated circuits Integrated circuits Recursive programming'

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Published: 4 June 2021

Last updated: 5 February 2022

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1

Templeton, Gary F. "Object-oriented programming of integrated circuits." Communications of the ACM 46, no. 3 (2003): 105–8. http://dx.doi.org/10.1145/636772.636802.

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Campbell, R. H., A. M. Koelmans, and M. R. McLauchlan. "STRICT: a design language for strongly typed recursive integrated circuits." IEE Proceedings I Solid State and Electron Devices 132, no. 2 (1985): 108. http://dx.doi.org/10.1049/ip-i-1.1985.0023.

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Campbell, R. H., A. M. Koelmans, and M. R. McLauchlan. "STRICT: a design language for strongly typed recursive integrated circuits." IEE Proceedings E Computers and Digital Techniques 132, no. 2 (1985): 108. http://dx.doi.org/10.1049/ip-e.1985.0016.

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Alshayeb, Mohammad, Muhammad E. S. Elrabaa, Ayman Hroub, Amran Al-Aghbari, Aiman H. El-Maleh, and Abdelhafid Bouhraoua. "Towards a Test Definition Language for Integrated Circuits." Journal of Circuits, Systems and Computers 24, no. 03 (2015): 1550027. http://dx.doi.org/10.1142/s0218126615500279.

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The Standard Test Interface Language (STIL) is the de-facto standard for transferring test data between the test generation environment and the test equipment. STIL's flexibility and extensibility facilitates its use as the sole input language for automatic test-pattern generation (ATPG). However, STIL format is complex and does not provide support for algorithmic interactive testing which necessitate the use of additional programming languages to do that. In this paper, we propose a new Test Definition Language for Integrated Circuits (TDLIC) based on the Extensible Markup Language (XML). TDL

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Zhang, Yi, Junlong Zhou, Li Chen, and Jin Sun. "A Variability-Aware Robust Design Methodology for Integrated Circuits by Geometric Programming." Journal of Circuits, Systems and Computers 28, no. 05 (2019): 1950073. http://dx.doi.org/10.1142/s0218126619500737.

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Process variations have continuously posed significant challenges to the performance and yield of integrated circuits (ICs). The performance modeling and robust optimization method considering process variations has become an important research task in today’s IC design. Aiming at solving the problems of strong nonlinearity and high-dimensional problems in circuit design, this paper proposes a general robust optimization method for ICs by geometric programming. This method first employs regularization sparse models to model a specific performance metric as a posynomial function in terms of des

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Jantos, P., D. Grzechca, and J. Rutkowski. "Evolutionary algorithms for global parametric fault diagnosis in analogue integrated circuits." Bulletin of the Polish Academy of Sciences: Technical Sciences 60, no. 1 (2012): 133–42. http://dx.doi.org/10.2478/v10175-012-0019-4.

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Evolutionary algorithms for global parametric fault diagnosis in analogue integrated circuitsAn evolutionary method for analogue integrated circuits diagnosis is presented in this paper. The method allows for global parametric faults localization at the prototype stage of life of an analogue integrated circuit. The presented method is based on the circuit under test response base and the advanced features classification. A classifier is built with the use of evolutionary algorithms, such as differential evolution and gene expression programming. As the proposed diagnosis method might be applie

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Пирогов, А. А., Ю. А. Пирогова, С. А. Гвозденко, Д. В. Шардаков, and Б. И. Жилин. "DEVELOPMENT OF RECONFIGURABLE DEVICES BASED ON PROGRAMMABLE LOGIC INTEGRATED CIRCUITS." ВЕСТНИК ВОРОНЕЖСКОГО ГОСУДАРСТВЕННОГО ТЕХНИЧЕСКОГО УНИВЕРСИТЕТА, no. 6 (January 10, 2021): 90–97. http://dx.doi.org/10.36622/vstu.2020.16.6.013.

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Цифровая фильтрация распознаваемых сигналов является непременной процедурой при обнаружении и распознавании сообщений. Под фильтрацией понимают любое преобразование сигналов, при котором во входной последовательности обрабатываемых данных целенаправленно изменяются определенные соотношения между различными параметрами сигналов. Системы, избирательно меняющие форму сигналов, устраняющие или уменьшающие помехи, извлекающие из сигналов определенную информацию и т.п., называют фильтрами. Соответственно, фильтры с любым целевым назначением являются частным случаем систем преобразования сигналов. Пр

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Uchevler, Bahram N., and Kjetil Svarstad. "Modelling and Assertion-Based Verification of Run-Time Reconfigurable Designs Using Functional Programming Abstractions." International Journal of Reconfigurable Computing 2018 (July 10, 2018): 1–25. http://dx.doi.org/10.1155/2018/3276159.

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With the increasing design and production costs and long time-to-market for Application Specific Integrated Circuits (ASICs), implementing digital circuits on reconfigurable hardware is becoming a more common practice. A reconfigurable hardware combines the flexibility of the software domain with the high performance of the hardware domain and provides a flexible life cycle management for the product with a lower cost. A complete design and assertion-based verification flow for Run-Time Reconfigurable (RTR) designs using functional programming abstractions of Haskell are proposed in this artic

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Ettahri, Ouafaa, Aziz Oukaira, Mohamed Ali, et al. "A Real-Time Thermal Monitoring System Intended for Embedded Sensors Interfaces." Sensors 20, no. 19 (2020): 5657. http://dx.doi.org/10.3390/s20195657.

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This paper proposes a real-time thermal monitoring method using embedded integrated sensor interfaces dedicated to industrial integrated system applications. Industrial sensor interfaces are complex systems that involve analog and mixed signals, where several parameters can influence their performance. These include the presence of heat sources near sensitive integrated circuits, and various heat transfer phenomena need to be considered. This creates a need for real-time thermal monitoring and management. Indeed, the control of transient temperature gradients or temperature differential variat

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Yang, Le, Zhao Yang Guo, Shan Shan Yong, Feng Guo, and Xin An Wang. "A Hardware Implementation of Real Time Lossless Data Compression and Decompression Circuits." Applied Mechanics and Materials 719-720 (January 2015): 554–60. http://dx.doi.org/10.4028/www.scientific.net/amm.719-720.554.

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This paper presents a hardware implementation of real time data compression and decompression circuits based on the LZW algorithm. LZW is a dictionary based data compression, which has the advantage of fast speed, high compression, and small resource occupation. In compression circuit, the design creatively utilizes two dictionaries alternately to improve efficiency and compressing rate. In decompression circuit, an integrated State machine control module is adopted to save hardware resource. Through hardware description and language programming, the circuits finally reach function simulation

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Cho, Minji, Heechul Lee, and Doohyung Woo. "Nonuniformity-Immune Read-In Integrated Circuit for Infrared Sensor Testing Systems." Electronics 9, no. 10 (2020): 1603. http://dx.doi.org/10.3390/electronics9101603.

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In this study, a novel IR projector driver that can minimize nonuniformity in electric circuits, using a dual-current-programming structure, is proposed to generate high-quality infrared (IR) scenes for accurate sensor evaluation. Unlike the conventional current-mode structure, the proposed system reduces pixel-to-pixel nonuniformity by assigning two roles (data sampling and current driving) to a single transistor. A prototype of the proposed circuit was designed and fabricated using the SK-Hynix 0.18 µm CMOS process, and its performance was analyzed using post-layout simulation data. It was v

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Fernández, Carolina, Sergio Giménez, Eduard Grasa, and Steve Bunch. "A P4-Enabled RINA Interior Router for Software-Defined Data Centers." Computers 9, no. 3 (2020): 70. http://dx.doi.org/10.3390/computers9030070.

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The lack of high-performance RINA (Recursive InterNetwork Architecture) implementations to date makes it hard to experiment with RINA as an underlay networking fabric solution for different types of networks, and to assess RINA’s benefits in practice on scenarios with high traffic loads. High-performance router implementations typically require dedicated hardware support, such as FPGAs (Field Programmable Gate Arrays) or specialized ASICs (Application Specific Integrated Circuit). With the advance of hardware programmability in recent years, new possibilities unfold to prototype novel networki

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Cheang, Sin Man, Kwong Sak Leung, and Kin Hong Lee. "Genetic Parallel Programming: Design and Implementation." Evolutionary Computation 14, no. 2 (2006): 129–56. http://dx.doi.org/10.1162/evco.2006.14.2.129.

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This paper presents a novel Genetic Parallel Programming (GPP) paradigm for evolving parallel programs running on a Multi-Arithmetic-Logic-Unit (Multi-ALU) Processor (MAP). The MAP is a Multiple Instruction-streams, Multiple Data-streams (MIMD), general-purpose register machine that can be implemented on modern Very Large-Scale Integrated Circuits (VLSIs) in order to evaluate genetic programs at high speed. For human programmers, writing parallel programs is more difficult than writing sequential programs. However, experimental results show that GPP evolves parallel programs with less computat

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Yau, Her-Terng, Yu-Chi Pu, and Simon Cimin Li. "An FPGA-Based PID Controller Design for Chaos Synchronization by Evolutionary Programming." Discrete Dynamics in Nature and Society 2011 (2011): 1–11. http://dx.doi.org/10.1155/2011/516031.

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This paper is concerned with the design of a field programmable gate arrays- (FPGAs-) based digital proportional-integral-derivative (PID) controller for synchronization of a continuous chaotic model. By using the evolutionary programming (EP) algorithm, optimal control gains in PID-controlled chaotic systems are derived such that a performance index of integrated absolute error (IAE) is as minimal as possible. To verify the system performance, basic electronic components, including OPA resistor and capacitor elements, were used to implement the chaotic Sprott circuits, and FPGA technology was

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Perisic, D. M., V. Petrovic, and B. Kovacevic. "Frequency Locked Loop Based on the Time Nonrecursive Processing." Engineering, Technology & Applied Science Research 8, no. 5 (2018): 3450–55. http://dx.doi.org/10.48084/etasr.2256.

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This paper describes one new approach to frequency locked loop (FLL), which is based on the time non-recursive processing of input periods. System parameters are defined by the ratio of frequencies. The conditions, under which the described system can have the properties of a FLL, are analyzed. All math analyses were made by the use of Z transform approach. It was shown that FLL is extremely fast and that it is suitable for usage in different predicting, tracking and modulation applications, for the measurements of frequency and for other applications. The FLL realization in the technique of s

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Palanisamy, R., C. S. Boopathi, K. Selvakumar, and K. Vijayakumar. "Switching pulse generation for DC-DC boost converter using Xilinx-ISE with FPGA processor." International Journal of Electrical and Computer Engineering (IJECE) 10, no. 2 (2020): 1722. http://dx.doi.org/10.11591/ijece.v10i2.pp1722-1727.

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This paper explains steps to generate switching pulse using Xilinx-ISE with FPGA processor for DC-DC boost converter. The switching pulse generated using Very high speed integrated circuit Hardware Description Language (VHDL) with Xilinx-ISE. VHDL is a programming language, which is used to model and design any complex circuits in a dynamic environment. This paper gives the course of action for generation of switching pulses for dc-dc boost converter using Xilinx-ISE and matlab simulink. The switching pulse generated using Xilinx-ISE with FPGA-Spartan 6 processor compared with switching pulse

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Palanisamy, R., and K. Vijayakumar. "Switching pulse generation for DC-DC boost converter using Xilinx-ISE with FPGA processor." International Journal of Reconfigurable and Embedded Systems (IJRES) 8, no. 2 (2019): 81. http://dx.doi.org/10.11591/ijres.v8.i2.pp81-85.

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<p>This paper explains steps to generate switching pulse using Xilinx-ISE with FPGA processor for DC-DC boost converter. The switching pulse generated using Very high speed integrated circuit Hardware Description Language (VHDL) with Xilinx-ISE. VHDL is a programming language, which is used to model and design any complex circuits in a dynamic environment. This paper gives the course of action for generation of switching pulses for dc-dc boost converter using Xilinx-ISE and matlab simulink. The switching pulse generated using Xilinx-ISE with FPGA-Spartan 6 processor compared with switchi

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Stojanovic, Goran, Ljiljana Zivanov, and Mirjana Damnjanovic. "Optimal design of circular inductors." Facta universitatis - series: Electronics and Energetics 18, no. 1 (2005): 57–70. http://dx.doi.org/10.2298/fuee0501057s.

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The scope of this work is to introduce a software tool for optimization of circular spiral inductors. It is based on compact model, where the physical behavior is described through analytical expressions in geometric programming (GP) form. This paper describes three significant innovations (a) optimization of circular inductor via GP, (b) new expressions for inductance and Q-factor in GP form, (c) globally optimal trade-off curves between maximum self-resonant frequency and inductance values or minimum inductor area and inductance values. The proposed optimization algorithm is flexible because

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Semka, E. V., A. B. Buslaev, V. V. Ovcharov, A. A. Pirogov, and S. A. Gvozdenko. "Software driver for working with different types of SPI interfaces." Issues of radio electronics 49, no. 9 (2020): 38–45. http://dx.doi.org/10.21778/2218-5453-2020-9-38-45.

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Field-Programmable Gate Arrays (FPGAs) are configurable integrated circuits whose logic is defined through programming. The use of FPGAs makes it possible to obtain devices capable of changing the configuration, adapting to a specific task due to their flexibly changeable, programmable structure. When developing complex devices, ready-made IP-cores can be used as components for design. The use of software IP-cores allows them to be used most effectively in the final structure, to a significant extent to reduce design costs. A software driver has been developed for working with different types

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Biernat, Adam, and Włodzimierz Przyborowski. "Measuring system for comprehensive testing of electrical machines." Bulletin of the Military University of Technology 69, no. 1 (2020): 35–56. http://dx.doi.org/10.5604/01.3001.0014.2791.

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The article presents a measuring system designed for a comprehensive experimental testing of various types of electric machines. These tests include measurements of electrical, electromagnetic, kinematic, as well as mechanical and thermal quantities. The basic measurements of electrical machines include currents and voltages in electrical circuits, including voltages on resistive and generally impedance elements of these circuits, and induced voltages. Depending on the machine class and type, the measured values are constant or change over time. Some magnitudes of electromagnetic transformatio

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Simeu, E., H. N. Nguyen, P. Cauvet, S. Mir, L. Rufer, and R. Khereddine. "Using Signal Envelope Detection for Online and Offline RF MEMS Switch Testing." VLSI Design 2008 (June 4, 2008): 1–10. http://dx.doi.org/10.1155/2008/294014.

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The test of radiofrequency (RF) integrated circuits at their ever-increasing operating frequency range requires sophisticated test equipment and is time-consuming and, therefore, very expensive. This paper introduces a new method combining low-frequency actuation signal as test stimuli and signal envelope detection applied on the RF output signal in order to provide a low-cost mean for production testing of RF MEMS switches embedded in system-in-package (SiP) devices. The proposed approach uses the principle of alternate test that replaces conventional specification-based testing procedures. T

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Pérez, Armando, Rogelio Ramos, Gisela Montero, Marcos Coronado, Conrado García, and Rubén Pérez. "Virtual Instrument for Emissions Measurement of Internal Combustion Engines." Journal of Analytical Methods in Chemistry 2016 (2016): 1–13. http://dx.doi.org/10.1155/2016/9459516.

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The gases emissions measurement systems in internal combustion engines are strict and expensive nowadays. For this reason, a virtual instrument was developed to measure the combustion emissions from an internal combustion diesel engine, running with diesel-biodiesel mixtures. This software is called virtual instrument for emissions measurement (VIEM), and it was developed in the platform of LabVIEW 2010® virtual programming. VIEM works with sensors connected to a signal conditioning system, and a data acquisition system is used as interface for a computer in order to measure and monitor in rea

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Melnyk, Oleksandr, and Viktoriia Kozarevych. "SIMULATION OF PROGRAMMABLE SINGLE-ELECTRON NANOCIRCUITS." Bulletin of the National Technical University "KhPI". Series: Mathematical modeling in engineering and technologies, no. 1 (March 5, 2021): 64–68. http://dx.doi.org/10.20998/2222-0631.2020.01.05.

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The speed and specializations of large-scale integrated circuits always contradict their versatility, which expands their range and causes the rise in price of electronic devices. It is possible to eliminate the contradictions between universality and specialization by developing programmable nanoelectronic devices, the algorithms of which are changed at the request of computer hardware developers, i.e. by creating arithmetic circuits with programmable characteristics. The development of issues of theory and practice of the majority principle is now an urgent problem, since the nanoelectronic

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Larrabee, Allan R. "The P4 Parallel Programming System, the Linda Environment, and Some Experiences with Parallel Computation." Scientific Programming 2, no. 3 (1993): 23–35. http://dx.doi.org/10.1155/1993/817634.

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The first digital computers consisted of a single processor acting on a single stream of data. In this so-called "von Neumann" architecture, computation speed is limited mainly by the time required to transfer data between the processor and memory. This limiting factor has been referred to as the "von Neumann bottleneck". The concern that the miniaturization of silicon-based integrated circuits will soon reach theoretical limits of size and gate times has led to increased interest in parallel architectures and also spurred research into alternatives to silicon-based implementations of processo

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Arun, C. P. "Brain modeling - from electrical and electronic circuits and modules to objects and threads: Application to Tourette’s Syndrome." European Psychiatry 26, S2 (2011): 1191. http://dx.doi.org/10.1016/s0924-9338(11)72896-6.

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From the time of the discovery of electricity, scientists have actively borrowed ideas from technology to help understand brain function. The earliest ‘models’ depicted connexions between various parts of the nervous system as if they were electrical circuits. With the development of valve and transistor technology, excitatory, inhibitory circuits (and the actions of receptors and ligands) and neural loops came into fashion. Integrated Circuit (IC) hardware technology and modular software design (e.g. in languages such as C and FORTRAN) no doubt ushered in the move towards ‘modularity’. A revi

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Schaper, Jacob A. "Imaging and analysis of submicron single-crystal aluminum whiskers in Al/Cu/Si deposited films." Proceedings, annual meeting, Electron Microscopy Society of America 50, no. 2 (1992): 1290–91. http://dx.doi.org/10.1017/s0424820100131085.

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The formation of stress-relieving hillocks, also referred to as single-crystal whiskers is a well-known occurrence in the preparation of metallic thin films. In the manufacture of Application Specific Integrated Circuits, devices at the wafer level are often processed through the first metallic thin film process, coated with a plasma enhanced oxide (PEO), then stockpiled either at the manufacturer's site or the customer's to await final option-level programming. Whisker growth has been detected on wafers retrieved from the stockpile inventory. This paper describes the techniques employed for i

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Kannan, V. C. "Fresnel fringe contrast in the TEM: Application to study the microstructure of amorphous silicon." Proceedings, annual meeting, Electron Microscopy Society of America 49 (August 1991): 1000–1001. http://dx.doi.org/10.1017/s0424820100089317.

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Amorphous silicon-hydrogen (α - Si:H) alloy films deposited by plasma enhanced chemical vapor deposition (PECVD) of silane exhibit a remarkable property; namely, the films are practically insulators in the as deposited state. When sandwiched between two metals or highly conductive refractory metal silicides, the films can be converted to near conductivity state by “programming” the sandwich structure to complete dielectric breakdown of the insulator. Such α - Si:H films are used in permanently programmable integrated circuits such as PGA (Programmable Gate Arrays) as “antifuse” materials.TEM t

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Nguyen, Thanh-Tung, Abdul Basit Khan, Younghwi Ko, and Woojin Choi. "An Accurate State of Charge Estimation Method for Lithium Iron Phosphate Battery Using a Combination of an Unscented Kalman Filter and a Particle Filter." Energies 13, no. 17 (2020): 4536. http://dx.doi.org/10.3390/en13174536.

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An accurate state of charge (SOC) estimation of the battery is one of the most important techniques in battery-based power systems, such as electric vehicles (EVs) and energy storage systems (ESSs). The Kalman filter is a preferred algorithm in estimating the SOC of the battery due to the capability of including the time-varying coefficients in the model and its superior performance in the SOC estimation. However, since its performance highly depends on the measurement noise (MN) and process noise (PN) values, it is difficult to obtain highly accurate estimation results with the battery having

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Пирогов, А. А., Ю. А. Пирогова, С. А. Гвозденко, Д. В. Шардаков, and Э. В. Сёмка. "DEVELOPMENT OF A PROCEDURE FOR DESIGNING DIGITAL AUTOMATES WITH MEMORY ON FPGA." ВЕСТНИК ВОРОНЕЖСКОГО ГОСУДАРСТВЕННОГО ТЕХНИЧЕСКОГО УНИВЕРСИТЕТА, no. 6 (January 10, 2021): 61–68. http://dx.doi.org/10.36622/vstu.2020.16.6.009.

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Программируемые логические интегральные схемы (ПЛИС) - это настраиваемые интегральные схемы, логика которых определяется программированием. ПЛИС производятся полностью в готовом виде, т.е. относятся к стандартной продукции, что сопровождается известными преимуществами - массовым производством и снижением затрат. Благодаря регулярной структуре ПЛИС реализованы с уровнем интеграции, близким к максимально эффективному. Использование ПЛИС позволяет получить устройства, которые могут менять конфигурацию, подстраиваясь под конкретную задачу, благодаря своей гибко изменяемой, программируемой структур

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Agarwalla, Meenakshi, Manash Pratim Sarma, and Kandarpa Kumar Sarma. "A High Performance Global Routing Algorithm on Julia Parallel Computing Platform." WSEAS TRANSACTIONS ON COMPUTER RESEARCH 9 (August 10, 2021): 103–8. http://dx.doi.org/10.37394/232018.2021.9.12.

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o keep pace with the design requirements of Integrated Circuits (ICs), parallel processing is adopted. The path to be routed between two nodes may or may not be dependent on the previously routed paths. The solution requires careful attention in distributing the nets to be routed to different processors. Previous work on allocating the tasks to processors has been quite successful, reporting upto 3x improvement on 4 cores and 5x improvement on 8 core machine. The advantage of increasing the number of cores diminishes with each added processor and the challenge lies in being able to maintain th

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Abdellah, Marwan, Alessandro Foni, Eleftherios Zisis, et al. "Metaball skinning of synthetic astroglial morphologies into realistic mesh models for in silico simulations and visual analytics." Bioinformatics 37, Supplement_1 (2021): i426—i433. http://dx.doi.org/10.1093/bioinformatics/btab280.

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Abstract Motivation Astrocytes, the most abundant glial cells in the mammalian brain, have an instrumental role in developing neuronal circuits. They contribute to the physical structuring of the brain, modulating synaptic activity and maintaining the blood–brain barrier in addition to other significant aspects that impact brain function. Biophysically, detailed astrocytic models are key to unraveling their functional mechanisms via molecular simulations at microscopic scales. Detailed, and complete, biological reconstructions of astrocytic cells are sparse. Nonetheless, data-driven digital re

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Pisarev, Alexander D. "Energy efficient biomorphic pulse information coding in electronic neurons for the entrance unit of the neuroprocessor." Tyumen State University Herald. Physical and Mathematical Modeling. Oil, Gas, Energy 5, no. 3 (2019): 186–212. http://dx.doi.org/10.21684/2411-7978-2019-5-3-186-212.

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This article studies the implementation of some well-known principles of information work of biological systems in the input unit of the neuroprocessor, including spike coding of information used in models of neural networks of the latest generation.<br> The development of modern neural network IT gives rise to a number of urgent tasks at the junction of several scientific disciplines. One of them is to create a hardware platform&nbsp;— a neuroprocessor for energy-efficient operation of neural networks. Recently, the development of nanotechnology of the main units of the neuroprocess

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Goff, Daniel T., Steve J. A. Majerus, and Walter Merrill. "A 200 °C Quad-Output Buck Type Switched Mode Power Supply IC." Additional Conferences (Device Packaging, HiTEC, HiTEN, and CICMT) 2014, HITEC (2014): 000022–27. http://dx.doi.org/10.4071/hitec-ta16.

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A high temperature (&gt;200 °C), quad-output, buck type switched-mode power supply (SMPS) IC capable of operating over a wide input supply range of 6 V to 15 V is described. The IC is a compact power supply solution for multi-voltage microprocessors, sensors, and actuators. The SMPS topology is a 112 kHz fixed-frequency, synchronous buck converter with slope compensation. A novel internal feedback design enables the output voltages to be pin-programmed to one of three common supply voltages—5 V, 3.3 V, or 1.8 V—while an external resistor divider can also be used for arbitrary voltage progr

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Tabia, Gelo Noel M. "Recursive multiport schemes for implementing quantum algorithms with photonic integrated circuits." Physical Review A 93, no. 1 (2016). http://dx.doi.org/10.1103/physreva.93.012323.

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Pérez-López, Daniel, Aitor López, Prometheus DasMahapatra, and José Capmany. "Multipurpose self-configuration of programmable photonic circuits." Nature Communications 11, no. 1 (2020). http://dx.doi.org/10.1038/s41467-020-19608-w.

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AbstractProgrammable integrated photonic circuits have been called upon to lead a new revolution in information systems by teaming up with high speed digital electronics and in this way, adding unique complementary features supported by their ability to provide bandwidth-unconstrained analog signal processing. Relying on a common hardware implemented by two-dimensional integrated photonic waveguide meshes, they can provide multiple functionalities by suitable programming of their control signals. Scalability, which is essential for increasing functional complexity and integration density, is c

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"Designing chips that work." Philosophical Transactions of the Royal Society of London. Series A: Physical and Engineering Sciences 339, no. 1652 (1992): 3–19. http://dx.doi.org/10.1098/rsta.1992.0022.

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The complexity of integrated circuits continues to grow, and chips with over 10 8 transistors will be in widespread use by the late 1990s. These chips will combine general purpose processors with subsystems for communications and other specialized tasks. They will be far too complex for the design to be tested, and manufacturing volumes will be far too high for the design to be wrong! Mathematical techniques have already been applied to the design of parts of VLSI chips. Most of this work is experimental, and requires an unusual combination of engineering, mathematical and programming skills.

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Chen, Linlin, Qun Sun, Ying Zhao, and Chong Wang. "Design and Experiments of a waveform generator based on DDS technology." Recent Patents on Engineering 13 (June 25, 2019). http://dx.doi.org/10.2174/1872212113666190625120748.

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Background: Signal generator plays crucial role in the field of automatic measurement. However, Domestic signal generator usually uses a number of discrete phase locked loop components, whose circuits are usually complex with low precision and are easy to be affected by the external environment. Objective: Based on direct digital synthesis (DDS) technology, a small sized high precision economic waveform generator with simple structure and operational convenience is developed. Methodology: The hardware circuit is designed with an AT89S52 controller, and the corresponding peripheral circuit. A D

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Humphry, Justine, and César Albarrán Torres. "A Tap on the Shoulder: The Disciplinary Techniques and Logics of Anti-Pokie Apps." M/C Journal 18, no. 2 (2015). http://dx.doi.org/10.5204/mcj.962.

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In this paper we explore the rise of anti-gambling apps in the context of the massive expansion of gambling in new spheres of life (online and offline) and an acceleration in strategies of anticipatory and individualised management of harm caused by gambling. These apps, and the techniques and forms of labour they demand, are examples of and a mechanism through which a mode of governance premised on ‘self-care’ and ‘self-control’ is articulated and put into practice. To support this argument, we explore two government initiatives in the Australian context. Quit Pokies, a mobile app project bet

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Losh, Elizabeth. "Artificial Intelligence." M/C Journal 10, no. 5 (2007). http://dx.doi.org/10.5204/mcj.2710.

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   On the morning of Thursday, 4 May 2006, the United States House Permanent Select Committee on Intelligence held an open hearing entitled “Terrorist Use of the Internet.” The Intelligence committee meeting was scheduled to take place in Room 1302 of the Longworth Office Building, a Depression-era structure with a neoclassical façade. Because of a dysfunctional elevator, some of the congressional representatives were late to the meeting. During the testimony about the newest political applications for cutting-edge digital technology, the microphones periodically malfunctione

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