Relevant bibliographies by topics / Integrated circuits Junction transistors

Contents

  1. Journal articles
  2. Dissertations / Theses
  3. Books
  4. Book chapters
  5. Conference papers
  6. Reports

Academic literature on the topic 'Integrated circuits Junction transistors'

Author: Grafiati
Published: 4 June 2021
Last updated: 7 February 2022

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Journal articles on the topic "Integrated circuits Junction transistors"

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Holmes, Jim, A. Matthew Francis, Ian Getreu, Matthew Barlow, Affan Abbasi, and H. Alan Mantooth. "Extended High-Temperature Operation of Silicon Carbide CMOS Circuits for Venus Surface Application." Journal of Microelectronics and Electronic Packaging 13, no. 4 (2016): 143–54. http://dx.doi.org/10.4071/imaps.527.

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In the last decade, significant effort has been expended toward the development of reliable, high-temperature integrated circuits. Designs based on a variety of active semiconductor devices including junction field-effect transistors and metal-oxide-semiconductor (MOS) field-effect transistors have been pursued and demonstrated. More recently, advances in low-power complementary MOS (CMOS) devices have enabled the development of highly integrated digital, analog, and mixed-signal integrated circuits. The results of elevated temperature testing (as high as 500°C) of several building block circu
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Dvornikov, O. V., V. A. Tchekhovski, V. L. Dziatlau, A. V. Kunts, and N. N. Prokopenko. "Low temperature multi-differential operational amplifier." Doklady BGUIR 19, no. 5 (2021): 52–60. http://dx.doi.org/10.35596/1729-7648-2021-19-5-52-60.

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A multi-differential operational amplifier, called OAmp3, designed for operation at temperatures up to minus 197 °С and developed on bipolar transistors and junction field-effect transistors of the master slice array МН2ХА030, is considered in the article. The circuitry features of the OAmp3 allow, due to the use of various negative feedback circuits, to implement a set of functions necessary for signal processing on a single amplifier: amplification (or current – voltage conversion), filtering, shift of the constant output voltage level. The performed measurements of OAmp3, connected as instr
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Kazior, Thomas E. "Beyond CMOS: heterogeneous integration of III–V devices, RF MEMS and other dissimilar materials/devices with Si CMOS to create intelligent microsystems." Philosophical Transactions of the Royal Society A: Mathematical, Physical and Engineering Sciences 372, no. 2012 (2014): 20130105. http://dx.doi.org/10.1098/rsta.2013.0105.

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Advances in silicon technology continue to revolutionize micro-/nano-electronics. However, Si cannot do everything, and devices/components based on other materials systems are required. What is the best way to integrate these dissimilar materials and to enhance the capabilities of Si, thereby continuing the micro-/nano-electronics revolution? In this paper, I review different approaches to heterogeneously integrate dissimilar materials with Si complementary metal oxide semiconductor (CMOS) technology. In particular, I summarize results on the successful integration of III–V electronic devices
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Neudeck, Philip G., David J. Spry, Michael J. Krasowski, et al. "Upscaling of 500 °C Durable SiC JFET-R Integrated Circuits." Additional Conferences (Device Packaging, HiTEC, HiTEN, and CICMT) 2021, HiTEC (2021): 000064–68. http://dx.doi.org/10.4071/2380-4491.2021.hitec.000064.

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Abstract At HiTEC 2018, NASA Glenn Research Center reported the first demonstration of yearlong 500 °C operation of ceramic-packaged “Generation 10” ~200-transistor integrated circuits (ICs) based on two-level interconnect silicon carbide (4H-SiC) junction field effect transistors and resistors (JFET-R). This HiTEC 2021 submission updates on-going efforts at NASA Glenn spanning two subsequent prototype IC generations “11 and 12” to increase both complexity and durability of these ICs. Increased chip complexities of around 1000 transistors/chip for Gen. 11 and near 3000 transistors/chip for Gen
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Spry, David J., Philip G. Neudeck, Dorothy Lukco, et al. "Prolonged 500°C Operation of 100+ Transistor Silicon Carbide Integrated Circuits." Materials Science Forum 924 (June 2018): 949–52. http://dx.doi.org/10.4028/www.scientific.net/msf.924.949.

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This report describes more than 5000 hours of successful 500 °C operation of semiconductor integrated circuits (ICs) with more than 100 transistors. Multiple packaged chips with two different 4H-SiC junction field effect transistor (JFET) technology demonstrator circuits have surpassed thousands of hours of oven-testing at 500 °C. After 100 hours of 500 °C burn-in, the circuits (except for 2 failures) exhibit less than 10% change in output characteristics for the remainder of 500 °C testing. We also describe the observation of important differences in IC materials durability when subjected to
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Francis, A. Matthew, Jim Holmes, Nick Chiolino, Matthew Barlow, Affan Abbasi, and H. Alan Mantooth. "High-Temperature Operation of Silicon Carbide CMOS Circuits for Venus Surface Application." Additional Conferences (Device Packaging, HiTEC, HiTEN, and CICMT) 2016, HiTEC (2016): 000242–48. http://dx.doi.org/10.4071/2016-hitec-242.

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Abstract In the last decade, significant effort has been expended towards the development of reliable, high-temperature integrated circuits. Designs based on a variety of active semiconductor devices including junction field effect transistors and metal-oxide-semiconductor field effect transistors have been pursued and demonstrated. More recently1,2, advances in low-power complementary MOS devices have enabled the development of highly-integrated digital, analog and mixed-signal integrated circuits. The results of elevated temperature testing (as high as 500°C) for extended periods (up to 100
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Fu, Xiao An, Amita Patil, Philip G. Neudeck, Glenn M. Beheim, Steven Garverick, and Mehran Mehregany. "6H-SiC Lateral JFETs for Analog Integrated Circuits." Materials Science Forum 600-603 (September 2008): 1099–102. http://dx.doi.org/10.4028/www.scientific.net/msf.600-603.1099.

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This paper reports fabrication and electrical characterization of 6H-SiC n-channel, depletion-mode, junction-field-effect transistors (JFETs) for use in high-temperature analog integrated circuits for sensing and control in propulsion, power systems, and geothermal exploration. Electrical characteristics of the resulting JFET devices have been measured across the wafer as a function of temperature, from room temperature to 450oC. The results indicate that the JFETs are suitable for high-gain amplifiers in high-temperature sensor signal processing circuits.
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Neudeck, Philip G., David J. Spry, Michael J. Krasowski, et al. "Yearlong 500 °C Operational Demonstration of Up-scaled 4H-SiC JFET Integrated Circuits." Additional Conferences (Device Packaging, HiTEC, HiTEN, and CICMT) 2018, HiTEC (2018): 000071–78. http://dx.doi.org/10.4071/2380-4491-2018-hiten-000071.

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Abstract This work describes recent progress in the design, processing, and testing of significantly up-scaled 500 °C durable 4H-SiC junction field effect transistor (JFET) integrated circuit (IC) technology with two-level interconnect undergoing development at NASA Glenn Research Center. For the first time, stable electrical operation of semiconductor ICs for over one year at 500 °C in air atmosphere is reported. These groundbreaking durability results were attained on two-level interconnect JFET demonstration ICs with 175 or more transistors on each chip. This corresponds to a more than 7-fo
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Neudeck, Philip G., David J. Spry, Liang Yu Chen, et al. "Prolonged 500 °C Operation of 6H-SiC JFET Integrated Circuitry." Materials Science Forum 615-617 (March 2009): 929–32. http://dx.doi.org/10.4028/www.scientific.net/msf.615-617.929.

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This paper updates the long-term 500 °C electrical testing results from 6H-SiC junction field effect transistors (JFETs) and small integrated circuits that were introduced at ICSCRM-2007. Two packaged JFETs have now been operated in excess of 7000 hours at 500 °C with less than 10% degradation in linear I-V characteristics. Several simple digital and analog demonstration integrated circuits successfully operated for 2000-6500 hours at 500 °C before failure.
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Neudeck, Philip G., David J. Spry, Michael J. Krasowski, et al. "Year-long 500°C Operational Demonstration of Up-scaled 4H-SiC JFET Integrated Circuits." Journal of Microelectronics and Electronic Packaging 15, no. 4 (2018): 163–70. http://dx.doi.org/10.4071/imaps.729648.

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Abstract This work describes recent progress in the design, processing, and testing of significantly up-scaled complex 500°C–durable 4H-SiC junction field effect transistor (JFET) integrated circuit (IC) technology with two-level interconnect undergoing development at NASA Glenn Research Center. For the first time, stable electrical operation of semiconductor ICs for more than 1 y at 500°C in an air atmosphere is reported. These groundbreaking durability results were attained on two-level interconnect JFET demonstration ICs with 175 or more transistors on each chip. This corresponds to a more
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Dissertations / Theses on the topic "Integrated circuits Junction transistors"

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Song, Shiunn Luen Steven 1960. "Characterization and design of the complementary JFET LAMBDA-DIODE SRAM." Thesis, The University of Arizona, 1988. http://hdl.handle.net/10150/276882.

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The LAMBDA-DIODE was invented in integrated-circuit form in 1974. There was a proposal about this device's application in memory circuits at that time. This thesis is to evaluate the circuit performance of the COMPLEMENTARY JFET LAMBDA-DIODE SRAM. It investigates the speed, power consumption and chip area of this circuit compared with the JFET CROSS COUPLED SRAM by using SPICE and breadboard simulation techniques. The results show positive signs of the Λ-DIODE's feasibility for use in VLSI static memory circuits from the chip area aspect if the parasitic capacitance of the JFET device could be
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Wood, Neal Graham. "Silicon carbide junction field effect transistor integrated circuits for hostile environments." Thesis, University of Newcastle upon Tyne, 2018. http://hdl.handle.net/10443/4027.

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Silicon carbide (SiC), in particular its 4H polytype, has long been recognised as an appropriate semiconductor for producing hostile environment electronics due to its wide energy band gap, large chemical bond strength and high mechanical hardness. A strong research foundation has facilitated the development of numerous sensor structures capable of operating at high temperatures and in corrosive atmospheres. Front-end electronics suitable for in situ signal conditioning are however lacking. Junction field effect transistors (JFETs) circumvent the pitfalls of contemporary alternative SiC transi
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Yu, Chi Sun. "Effectiveness of parallel diode linearizers on bipolar junction transistor and its use in dynamic linearization /." access full-text access abstract and table of contents, 2009. http://libweb.cityu.edu.hk/cgi-bin/ezdb/thesis.pl?phd-ee-b23749362f.pdf.

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Thesis (Ph.D.)--City University of Hong Kong, 2009.<br>"Submitted to Department of Electronic Engineering in partial fulfillment of the requirements for the degree of Doctor of Philosophy." Includes bibliographical references (leaves 129-134)
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Fullem, Travis Z. "Radiation detection using single event upsets in memory chips." Diss., Online access via UMI:, 2006.

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Alwardi, Milad. "Design and characterization of integrating silicon junction field-effect transistor amplifiers for operation in the temperature range 40-77 K." Diss., The University of Arizona, 1989. http://hdl.handle.net/10150/184871.

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The very low photon backgrounds to be achieved by future cryogenic astronomical telescopes present the ultimate challenge to the sensitivity of infrared detectors and associated readout electronics. Cooled silicon JFETs, operated around 70 K in transimpedance amplifiers, have shown excellent performance and stability. However, due to Johnson noise in the feedback resistor, the read noise in one second achieved by such amplifiers is about 500 electrons per second. A drastic improvement in sensitivity was demonstrated using a simple form of integrating JFET amplifiers. Therefore, the excellent p
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Rodriguez, Luis. "Design of a Monolithic Bipolar Junction Transistor Amplifier in the Common Emitter with Cascaded Common Collector Configuration." Honors in the Major Thesis, University of Central Florida, 2004. http://digital.library.ucf.edu/cdm/ref/collection/ETH/id/724.

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This item is only available in print in the UCF Libraries. If this is your Honors Thesis, you can help us make it available online for use by researchers around the world by following the instructions on the distribution consent form at http://library.ucf<br>Bachelors<br>Engineering and Computer Science<br>Electrical Engineering
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Hedayati, Raheleh. "High-Temperature Analog and Mixed-Signal Integrated Circuits in Bipolar Silicon Carbide Technology." Doctoral thesis, KTH, Skolan för informations- och kommunikationsteknik (ICT), 2017. http://urn.kb.se/resolve?urn=urn:nbn:se:kth:diva-213697.

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Silicon carbide (SiC) integrated circuits (ICs) can enable the emergence of robust and reliable systems, including data acquisition and on-site control for extreme environments with high temperature and high radiation such as deep earth drilling, space and aviation, electric and hybrid vehicles, and combustion engines. In particular, SiC ICs provide significant benefit by reducing power dissipation and leakage current at temperatures above 300 °C compared to the Si counterpart. In fact, Si-based ICs have a limited maximum operating temperature which is around 300 °C for silicon on insulator (S
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Stein, Félix. "SPICE Modeling of TeraHertz Heterojunction bipolar transistors." Thesis, Bordeaux, 2014. http://www.theses.fr/2014BORD0281/document.

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Les études qui seront présentées dans le cadre de cette thèse portent sur le développement et l’optimisation des techniques pour la modélisation compacte des transistors bipolaires à hétérojonction (TBH). Ce type de modélisation est à la base du développement des bibliothèques de composants qu’utilisent les concepteurs lors de la phase de simulation des circuits intégrés. Le but d’une technologie BiCMOS est de pouvoir combiner deux procédés technologiques différents sur une seule et même puce. En plus de limiter le nombre de composants externes, cela permet également une meilleure gestion de l
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Nausieda, Ivan Alexander. "Pentacene integrated thin-film transistors and circuits." Thesis, Massachusetts Institute of Technology, 2009. http://hdl.handle.net/1721.1/55119.

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Thesis (Ph. D.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2009.<br>Page 179 blank. Cataloged from PDF version of thesis.<br>Includes bibliographical references.<br>Organic semiconductors offer the potential of large-area, mechanically flexible electronics due to their low processing temperatures. We have developed a near-room-temperature (< 95°C) process flow to fabricate pentacene integrated organic thin-film transistors (OTFTs) compatible with plastic substrates such as polyethylene terephthalate (PET). Integration of inkjet printed organic
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Zhang, Min. "Applications of carbon nanotubes on integrated circuits /." View abstract or full-text, 2006. http://library.ust.hk/cgi/db/thesis.pl?ECED%202006%20ZHANGM.

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Books on the topic "Integrated circuits Junction transistors"

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Hammer, Urs. Sub-micron InP/GaAsSb/InP double heterojunction bipolar transistors for ultra high-speed digital integrated circuits. Hartung-Gorre, 2010.

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Greenfield, Joseph D. Practical transistors and linear integrated circuits. Wiley, 1988.

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Supertex. Databook: [integrated circuits and DMOS transistors]. Supertex Inc., 1991.

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Simin, G. S. (Grigoriĭ Solomonovich) and Perelman Minna M, eds. Transistors: From crystals to integrated circuits. World Scientific, 1998.

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Levinshteĭn, M. E. Transistors: From crystals to integrated circuits. World Scientific, 1998.

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Erlbacher, Tobias. Lateral Power Transistors in Integrated Circuits. Springer International Publishing, 2014. http://dx.doi.org/10.1007/978-3-319-00500-3.

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Greenfield, Joseph David. Experiments in Practical Transistors and Linear Integrated Circuits. Wiley, 1988.

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Malvino, Albert Paul. Semiconductor circuit approximations: An introduction to transistors and integrated circuits. 4th ed. McGraw-Hill, 1985.

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Warner, R. M. Transistors: Fundamentals for the integrated-circuit engineer. R.E. Krieger Pub. Co., 1990.

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Solid-state electronics. 3rd ed. Macmillan, 1988.

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Book chapters on the topic "Integrated circuits Junction transistors"

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Javey, Ali. "Carbon Nanotube Field-Effect Transistors." In Integrated Circuits and Systems. Springer US, 2009. http://dx.doi.org/10.1007/978-0-387-69285-2_3.

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Rabaey, Jan. "Nanometer Transistors and Their Models." In Integrated Circuits and Systems. Springer US, 2009. http://dx.doi.org/10.1007/978-0-387-71713-5_2.

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Chowdhury, Srabanti, and Dong Ji. "Vertical GaN Transistors for Power Electronics." In Integrated Circuits and Systems. Springer International Publishing, 2018. http://dx.doi.org/10.1007/978-3-319-77994-2_3.

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Wierzbicki, Andrzej Piotr. "Digital Computers, Transistors and Integrated Circuits." In Intelligent Systems Reference Library. Springer International Publishing, 2014. http://dx.doi.org/10.1007/978-3-319-09033-7_9.

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Požela, Juras. "High-Speed Devices and Integrated Circuits." In Physics of High-Speed Transistors. Springer US, 1993. http://dx.doi.org/10.1007/978-1-4899-1242-8_10.

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Gelinck, Gerwin H., Erik van Veenendaal, Eduard J. Meijer, et al. "From Transistors to Large-scale Integrated Circuits." In Organic Electronics. Wiley-VCH Verlag GmbH & Co. KGaA, 2006. http://dx.doi.org/10.1002/3527608753.ch13.

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Amiri, Iraj Sadegh, Hossein Mohammadi, and Mahdiar Hosseinghadiry. "Invention and Evaluation of Transistors and Integrated Circuits." In Device Physics, Modeling, Technology, and Analysis for Silicon MESFET. Springer International Publishing, 2018. http://dx.doi.org/10.1007/978-3-030-04513-5_1.

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Dummer, G. W. A. "The Development of Components, Tubes, Transistors and Integrated Circuits." In Electronic Inventions and Discoveries. Routledge, 2021. http://dx.doi.org/10.1201/9780203758649-3.

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Wang, Jian-Ping, Mahdi Jamaliz, Angeline Klemm Smith, and Zhengyang Zhao. "Magnetic Tunnel Junction Based Integrated Logics and Computational Circuits." In Nanomagnetic and Spintronic Devices for Energy-Efficient Memory and Computing. John Wiley & Sons, Ltd, 2016. http://dx.doi.org/10.1002/9781118869239.ch5.

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Krishnaswami, Sumi, Anant Agarwal, Craig Capell, et al. "1000 V, 30 A SiC Bipolar Junction Transistors and Integrated Darlington Pairs." In Materials Science Forum. Trans Tech Publications Ltd., 2005. http://dx.doi.org/10.4028/0-87849-963-6.901.

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Conference papers on the topic "Integrated circuits Junction transistors"

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Hériveaux, Laurent, Jessy Clédière, and Stèphanie Anceau. "Electrical Modeling of the Effect of Photoelectric Laser Fault Injection on Bulk CMOS Design." In ISTFA 2013. ASM International, 2013. http://dx.doi.org/10.31399/asm.cp.istfa2013p0361.

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Abstract Fault injection from infrared laser is a common practice among Information Technology Security Evaluation Facility (ITSEF) labs for testing CMOS circuits, and obtained effects are very versatile. However, from our point of view, the details of the phenomenona that occur in the integrated circuit have yet to be investigated. The common hypothesis is that the photoelectric current created during the light stimulation flows through the P-N junctions, and corrupts voltage outputs of the cells. In this paper, we consider the vertical parasitic bipolar junction transistors inherent to CMOS
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LO, D. C. W., and STEPHEN R. FORREST. "Optimum design of In0.53Ga0.47As and InP junction field-effect transistors for optoelectronic integrated circuits." In Optical Fiber Communication Conference. OSA, 1989. http://dx.doi.org/10.1364/ofc.1989.wf5.

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Liu, Dong, John Papapolymerou, Parsian K. Mohseni, et al. "Toward Diamond-Collector Heterojunction Bipolar Transistors via grafted GaAs-Diamond n-p junction." In 2019 IEEE BiCMOS and Compound semiconductor Integrated Circuits and Technology Symposium (BCICTS). IEEE, 2019. http://dx.doi.org/10.1109/bcicts45179.2019.8972766.

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Hussain, Safina, Parameshwaran Gnanachchelvi, Jeffrey C. Suhling, Richard C. Jaeger, Michael C. Hamilton, and Bogdan M. Wilamowski. "The Influence of Uniaxial Normal Stress on the Performance of Vertical Bipolar Transistors." In ASME 2013 International Technical Conference and Exhibition on Packaging and Integration of Electronic and Photonic Microsystems. American Society of Mechanical Engineers, 2013. http://dx.doi.org/10.1115/ipack2013-73233.

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In this paper, we have explored the response of bipolar junction transistors (BJT) to the controlled application of mechanical stress. Mechanical strains and stresses are developed during the fabrication, assembly and packaging of the integrated circuit (IC) chips. Due to these stresses and strains, it has been observed by many researchers that changes can occur in the electrical performance of both analog and digital devices. Stress-induced device parametric shifts affect the performance of analog circuits that depend upon precise matching of bipolar and/or MOS devices, and can cause them to
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Bucur, Viorel, Gabriel Banarie, Stefan Marinca, and Mircea Bodea. "Reducing the Bipolar Junction Transistor Vbe Non-Linearity." In 2019 MIXDES - 26th International Conference "Mixed Design of Integrated Circuits and Systems". IEEE, 2019. http://dx.doi.org/10.23919/mixdes.2019.8787201.

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Pai, Ching-Yao, Jyi-Tsong Lin, Shih-Wei Wang, et al. "Numerical study of performance comparison between junction and junctionless thin-film transistors." In 2010 10th IEEE International Conference on Solid-State and Integrated Circuit Technology (ICSICT). IEEE, 2010. http://dx.doi.org/10.1109/icsict.2010.5667600.

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Riddle, James B. "Semiconductor Wear Out at Nuclear Power Plants." In ISTFA 2000. ASM International, 2000. http://dx.doi.org/10.31399/asm.cp.istfa2000p0377.

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Abstract This paper will examine semiconductor wear out at San Onofre Nuclear Generation Station (SONGS). The topics will include case studies, failure mechanisms, diagnostic techniques, failure analysis techniques and root cause corrective actions. Nuclear power plants are unique in that instrumentation and control circuits are continuously energized, are periodically tested, and have been in operation for greater than 25 years. Root cause evaluations at SONGS have identified numerous semiconductor failures due to wear out. Case studies include light output deterioration in opto-isolators, ju
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Altman, David H., Anurag Gupta, and Matthew Tyhach. "Development of a Diamond Microfluidics-Based Intra-Chip Cooling Technology for GaN." In ASME 2015 International Technical Conference and Exhibition on Packaging and Integration of Electronic and Photonic Microsystems collocated with the ASME 2015 13th International Conference on Nanochannels, Microchannels, and Minichannels. American Society of Mechanical Engineers, 2015. http://dx.doi.org/10.1115/ipack2015-48179.

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GaN on Diamond has been demonstrated to enable notable increases in RF power density without impacting High Electron Mobility Transistor (HEMT) peak junction temperature. However, Monolithic Microwave Integrated Circuits (MMICs) fabricated using GaN on Diamond substrates are subject to the same packaging thermal limitations as their GaN on SiC counterparts. Therefore, efforts to exploit GaN on Diamond to achieve substantial increases in MMIC power are stymied by external packaging thermal resistances that characterize the current “remote cooling” paradigm. This paper explores an intra-chip coo
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Vardhan Reddy, Isukapalli Vishnu, and Suman Lata Tripathi. "Double Gate-Pocket-Junction-less Tunnel Field Effect Transistor." In 2021 Devices for Integrated Circuit (DevIC). IEEE, 2021. http://dx.doi.org/10.1109/devic50843.2021.9455895.

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Tianbing Chen and James Ma. "Advances in bipolar junction transistor modeling." In 2010 10th IEEE International Conference on Solid-State and Integrated Circuit Technology (ICSICT). IEEE, 2010. http://dx.doi.org/10.1109/icsict.2010.5667345.

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Reports on the topic "Integrated circuits Junction transistors"

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Hung, Alfred. S-MMICs: Sub-mm-Wave Transistors and Integrated Circuits. Defense Technical Information Center, 2008. http://dx.doi.org/10.21236/ada488074.

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