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Dissertations / Theses on the topic 'Integrated circuits Junction transistors'

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Published: 4 June 2021

Last updated: 7 February 2022

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1

Song, Shiunn Luen Steven 1960. "Characterization and design of the complementary JFET LAMBDA-DIODE SRAM." Thesis, The University of Arizona, 1988. http://hdl.handle.net/10150/276882.

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The LAMBDA-DIODE was invented in integrated-circuit form in 1974. There was a proposal about this device's application in memory circuits at that time. This thesis is to evaluate the circuit performance of the COMPLEMENTARY JFET LAMBDA-DIODE SRAM. It investigates the speed, power consumption and chip area of this circuit compared with the JFET CROSS COUPLED SRAM by using SPICE and breadboard simulation techniques. The results show positive signs of the Λ-DIODE's feasibility for use in VLSI static memory circuits from the chip area aspect if the parasitic capacitance of the JFET device could be

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2

Wood, Neal Graham. "Silicon carbide junction field effect transistor integrated circuits for hostile environments." Thesis, University of Newcastle upon Tyne, 2018. http://hdl.handle.net/10443/4027.

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Silicon carbide (SiC), in particular its 4H polytype, has long been recognised as an appropriate semiconductor for producing hostile environment electronics due to its wide energy band gap, large chemical bond strength and high mechanical hardness. A strong research foundation has facilitated the development of numerous sensor structures capable of operating at high temperatures and in corrosive atmospheres. Front-end electronics suitable for in situ signal conditioning are however lacking. Junction field effect transistors (JFETs) circumvent the pitfalls of contemporary alternative SiC transi

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3

Yu, Chi Sun. "Effectiveness of parallel diode linearizers on bipolar junction transistor and its use in dynamic linearization /." access full-text access abstract and table of contents, 2009. http://libweb.cityu.edu.hk/cgi-bin/ezdb/thesis.pl?phd-ee-b23749362f.pdf.

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Thesis (Ph.D.)--City University of Hong Kong, 2009.<br>"Submitted to Department of Electronic Engineering in partial fulfillment of the requirements for the degree of Doctor of Philosophy." Includes bibliographical references (leaves 129-134)

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4

Fullem, Travis Z. "Radiation detection using single event upsets in memory chips." Diss., Online access via UMI:, 2006.

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5

Alwardi, Milad. "Design and characterization of integrating silicon junction field-effect transistor amplifiers for operation in the temperature range 40-77 K." Diss., The University of Arizona, 1989. http://hdl.handle.net/10150/184871.

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The very low photon backgrounds to be achieved by future cryogenic astronomical telescopes present the ultimate challenge to the sensitivity of infrared detectors and associated readout electronics. Cooled silicon JFETs, operated around 70 K in transimpedance amplifiers, have shown excellent performance and stability. However, due to Johnson noise in the feedback resistor, the read noise in one second achieved by such amplifiers is about 500 electrons per second. A drastic improvement in sensitivity was demonstrated using a simple form of integrating JFET amplifiers. Therefore, the excellent p

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6

Rodriguez, Luis. "Design of a Monolithic Bipolar Junction Transistor Amplifier in the Common Emitter with Cascaded Common Collector Configuration." Honors in the Major Thesis, University of Central Florida, 2004. http://digital.library.ucf.edu/cdm/ref/collection/ETH/id/724.

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This item is only available in print in the UCF Libraries. If this is your Honors Thesis, you can help us make it available online for use by researchers around the world by following the instructions on the distribution consent form at http://library.ucf<br>Bachelors<br>Engineering and Computer Science<br>Electrical Engineering

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7

Hedayati, Raheleh. "High-Temperature Analog and Mixed-Signal Integrated Circuits in Bipolar Silicon Carbide Technology." Doctoral thesis, KTH, Skolan för informations- och kommunikationsteknik (ICT), 2017. http://urn.kb.se/resolve?urn=urn:nbn:se:kth:diva-213697.

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Silicon carbide (SiC) integrated circuits (ICs) can enable the emergence of robust and reliable systems, including data acquisition and on-site control for extreme environments with high temperature and high radiation such as deep earth drilling, space and aviation, electric and hybrid vehicles, and combustion engines. In particular, SiC ICs provide significant benefit by reducing power dissipation and leakage current at temperatures above 300 °C compared to the Si counterpart. In fact, Si-based ICs have a limited maximum operating temperature which is around 300 °C for silicon on insulator (S

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8

Stein, Félix. "SPICE Modeling of TeraHertz Heterojunction bipolar transistors." Thesis, Bordeaux, 2014. http://www.theses.fr/2014BORD0281/document.

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Les études qui seront présentées dans le cadre de cette thèse portent sur le développement et l’optimisation des techniques pour la modélisation compacte des transistors bipolaires à hétérojonction (TBH). Ce type de modélisation est à la base du développement des bibliothèques de composants qu’utilisent les concepteurs lors de la phase de simulation des circuits intégrés. Le but d’une technologie BiCMOS est de pouvoir combiner deux procédés technologiques différents sur une seule et même puce. En plus de limiter le nombre de composants externes, cela permet également une meilleure gestion de l

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9

Nausieda, Ivan Alexander. "Pentacene integrated thin-film transistors and circuits." Thesis, Massachusetts Institute of Technology, 2009. http://hdl.handle.net/1721.1/55119.

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Thesis (Ph. D.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2009.<br>Page 179 blank. Cataloged from PDF version of thesis.<br>Includes bibliographical references.<br>Organic semiconductors offer the potential of large-area, mechanically flexible electronics due to their low processing temperatures. We have developed a near-room-temperature (< 95°C) process flow to fabricate pentacene integrated organic thin-film transistors (OTFTs) compatible with plastic substrates such as polyethylene terephthalate (PET). Integration of inkjet printed organic

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10

Zhang, Min. "Applications of carbon nanotubes on integrated circuits /." View abstract or full-text, 2006. http://library.ust.hk/cgi/db/thesis.pl?ECED%202006%20ZHANGM.

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11

Mantooth, Homer Alan. "Higher level modeling of analog integrated circuits." Diss., Georgia Institute of Technology, 1990. http://hdl.handle.net/1853/14951.

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12

Kim, Taehoon. "Design, fabrication, and analysis of enhanced mobility silicon germanium transistors." Access restricted to users with UT Austin EID Full text (PDF) from UMI/Dissertation Abstracts International, 2001. http://wwwlib.umi.com/cr/utexas/fullcit?p3034553.

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13

Ryu, Hyeyeon. "Integrated Circuits Based on Individual Single-Walled Carbon Nanotube Field-Effect Transistors." Doctoral thesis, Universitätsbibliothek Chemnitz, 2012. http://nbn-resolving.de/urn:nbn:de:bsz:ch1-qucosa-98220.

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This thesis investigates the fabrication and integration of nanoscale field-effect transistors based on individual semiconducting carbon nanotubes. Such devices hold great potential for integrated circuits with large integration densities that can be manufactured on glass or flexible plastic substrates. A process to fabricate arrays of individually addressable carbon-nanotube transistors has been developed, and the electrical characteristics of a large number of transistors has been measured and analyzed. A low-temperature-processed gate dielectric with a thickness of about 6 nm has been devel

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14

Degnan, Brian Paul. "Temperature robust programmable subthreshold circuits through a balanced force approach." Diss., Georgia Institute of Technology, 2013. http://hdl.handle.net/1853/47548.

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The subthreshold region of operation has simple physics which allows for a balanced-force approach to behavioral modeling that has shown to be robust to temperature, and a model that encapsulates MOSFET behavior across all operational regions has been developed. The subthreshold region of operation also allows for injection of charge onto floating nodes that allows for persistent storage that can be used in a variety of applications. The combination of charge storage and device modeling has allowed for the development of programmable circuits for digital applications.

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15

Jiang, Liangjun. "HOT CARRIER EFFECT ON LDMOS TRANSISTORS." Doctoral diss., University of Central Florida, 2007. http://digital.library.ucf.edu/cdm/ref/collection/ETD/id/3230.

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One of the main problems encountered when scaling down is the hot carrier induced degradation of MOSFETs. This problem has been studied intensively during the past decade, under both static and dynamic stress conditions. In this period it has evolved from a more or less academic research topic to one of the most stringent constraints guaranteeing the lifetime of sub-micron devices. New drain engineering technique leads to the extensive usage of lateral doped drain structures. In these devices the peak of the lateral field is lowered by reducing the doping concentration near the drain and by pr

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16

Massingham, John William. "A design technique for mixed ECL and CMOS circuitry." Thesis, University of Aberdeen, 1994. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.241357.

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In this thesis, the principles of mixing ECL and CMOS technologies have been investigated with the intention of increasing the operating speed of synchronous systems. To achieve this, the design will be primarily CMOS based with the critical path implemented in ECL to reduce the delay and hence improve the execution time. Logic conversion circuitry between the two technologies has been designed, with the CMOS-ECL conversion circuit being a simple enhancement of the basic ECL current switch and ECL-CMOS translation being achieved with 0.5ns using a "double inverter circuit". To reduce the power

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17

Liu, Bin 1957. "Surface and geometrical effect on the punch-through device." Thesis, The University of Arizona, 1988. http://hdl.handle.net/10150/276733.

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The punch-through space-charge-limited load (PTSCLL) may be an alternate VLSI design as a high resistance load device. A surface and geometrical study on the PTSCLL device is presented. From this research, it is found out that the dynamic resistance value increases as the surface bias to a negatively voltage. Also, the resistance increases as the channel length and substrate doping increase. But the resistance value decreases as the channel width, junction depth, and overlap oxide thickness increase. Incorporate these design considerations, it can maximize the resistance value of the PTSCLL.

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18

Mukherjee, Sankha S. "Realization of CoFeB/MgO/CoFeB magnetic tunnel junction devices through materials analysis, process integration and circuit simulation /." Online version of thesis, 2009. http://hdl.handle.net/1850/11336.

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19

Aurangabadkar, Nilesh Kirti Kumar. "Simulations of analog circuit building blocks based on radiation and temperature-tolerant SIC JFET Technologies." Master's thesis, Mississippi State : Mississippi State University, 2003. http://library.msstate.edu/etd/show.asp?etd=etd-05162003-114102.

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20

Saxer, Robert L. "Development and characterization of high performance transistors on glass /." Link to online version, 2006. https://ritdml.rit.edu/dspace/handle/1850/2035.

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21

Suvanam, Sethu Saveda. "Radiation Hardness of 4H-SiC Devices and Circuits." Doctoral thesis, KTH, Integrerade komponenter och kretsar, 2017. http://urn.kb.se/resolve?urn=urn:nbn:se:kth:diva-199907.

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Advances in space and nuclear technologies are limited by the capabilities of the conventional silicon (Si) electronics. Hence, there is a need to explore materials beyond Si with enhanced properties to operate in extreme environments. In this regards, silicon carbide (4H-SiC), a wide bandgap semiconductor, provides suitable solutions. In this thesis, radiation effects of 4H-SiC bipolar devices, circuits and dielectrics for SiC are investigated under various radiation types. We have demonstrated for the first time the radiation hardness of 4H-SiC logic circuits exposed to extremely high doses

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22

Huber, Dieter. "InP/InGaAs single hetero-junction bipolar transistors for integrated photoreceivers operating at 40 Gb/s and beyond /." [Zürich] : [s.n.], 2002. http://e-collection.ethbib.ethz.ch/show?type=diss&nr=14504.

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23

Ross, Kyle Gene. "Distributed amplifier circuit design using a commercial CMOS process technology." Thesis, Montana State University, 2006. http://etd.lib.montana.edu/etd/2006/ross/RossK0806.pdf.

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24

Pandharpure, Shrinivas. "Process development for integration of CoFeB/MgO-based magnetic tunnel junction (MTJ) device on silicon /." Online version of thesis, 2007. http://hdl.handle.net/1850/5060.

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25

Tan, Eugene. "Design, fabrication and characterization of N-channel InGaAsP-InP based inversion channel technology devices (ICT) for optoelectronic integrated circuits (OEIC), double heterojunction optoelectronic switches (DOES), heterojunction field-effect transistors (HFET), bipolar inversion channel field-effect transistors (BICFET) and bipolar inversion channel phototransistors (BICPT)." Thesis, National Library of Canada = Bibliothèque nationale du Canada, 1998. http://www.collectionscanada.ca/obj/s4/f2/dsk1/tape11/PQDD_0006/NQ42767.pdf.

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26

Jaeger, Daniel J. "Investigation of sputtered hafnium oxides for gate dielectric applications in integrated circuits /." Online version of thesis, 2006. http://hdl.handle.net/1850/5194.

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27

Iannazzo, Soteras Mario E. (Mario Enrique). "Design exploration and measurement benchmark of integrated-circuits based on graphene field-effect-transistors : towards wireless nanotransceivers." Doctoral thesis, Universitat Politècnica de Catalunya, 2017. http://hdl.handle.net/10803/460769.

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This doctoral thesis approaches the design requirements for future high / ultra-high data rate (from 100 Mbps to 100 Gbps) nanotransceivers (nanoTRx) applied to wireless nanonetworks which imply short/ultra-short distance ranges (3 cm ¿ 3 m). It explores graphene field-effect-transistors (GFET), by simulation against measurement benchmarks, as a potential solution for implementing large-signal high-frequency circuits, by virtue of graphene¿s one-atom thickness and high carrier-mobility extraordinary properties. Finally, the thesis discusses the challenges faced by GFETs, such as zero-bandgap a

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28

Budihardjo, Irwan Kukuh. "A charge based power MOSFET model /." Thesis, Connect to this title online; UW restricted, 1995. http://hdl.handle.net/1773/5975.

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29

Joshi, Shital. "Analysis and Optimization of Graphene FET based Nanoelectronic Integrated Circuits." Thesis, University of North Texas, 2016. https://digital.library.unt.edu/ark:/67531/metadc849755/.

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Like cell to the human body, transistors are the basic building blocks of any electronics circuits. Silicon has been the industries obvious choice for making transistors. Transistors with large size occupy large chip area, consume lots of power and the number of functionalities will be limited due to area constraints. Thus to make the devices smaller, smarter and faster, the transistors are aggressively scaled down in each generation. Moore's law states that the transistors count in any electronic circuits doubles every 18 months. Following this Moore's law, the transistor has already been sca

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30

Tolstoy, Georg. "High-Efficiency SiC Power Conversion : Base Drivers for Bipolar Junction Transistors and Performance Impacts on Series-Resonant Converters." Doctoral thesis, KTH, Elektrisk energiomvandling, 2015. http://urn.kb.se/resolve?urn=urn:nbn:se:kth:diva-168163.

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This thesis aims to bring an understanding to the silicon carbide (SiC) bipolar junction transistor (BJT). SiC power devices are superior to the silicon IGBT in several ways. They are for instance, able to operate with higher efficiency, at higher frequencies, and at higher junction temperatures. From a system point of view the SiC power device could decrease the cost and complexity of cooling, reduce the size and weight of the system, and enable the system to endure harsher environments. The three main SiC power device designs are discussed with a focus on the BJT. The SiC BJT is compared to

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31

Asibal, Romeo Lim. "Limitations of high speed sigma-delta A/D converter in GaAs technology." Diss., Georgia Institute of Technology, 1991. http://hdl.handle.net/1853/15445.

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32

Lee, Wai Kit. "Modeling the distributed RC effects of BiCMOS technology at high frequency operations /." View abstract or full-text, 2006. http://library.ust.hk/cgi/db/thesis.pl?ECED%202006%20LEE.

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33

Bethel, Ryan H. "Low Voltage BiCMOS Circuit Topologies for the Design of a 19GHz, 1.2V, 4-Bit Accumulator in Silicon-Germanium." Fogler Library, University of Maine, 2007. http://www.library.umaine.edu/theses/pdf/BethelRH2007.pdf.

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34

Lu, Yuan. "Design of high-speed SiGe HBT circuits for wideband transceivers." Available online, Georgia Institute of Technology, 2006, 2006. http://etd.gatech.edu/theses/available/etd-12182006-004829/.

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Thesis (Ph. D.)--Electrical and Computer Engineering, Georgia Institute of Technology, 2007.<br>Cressler, John, Committee Chair ; Laskar, Joy, Committee Member ; Papapolymerou, Ioannis, Committee Member ; Zhou, Haomin, Committee Member ; Milor, Linda, Committee Member.

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35

Chen, Yuh-yue. "Enhanced hot-hole degradation and negative bias temperature instability (NBTI) in p⁺-poly PMOSFETs with oxynitride gate dielectrics /." Digital version accessible at:, 2000. http://wwwlib.umi.com/cr/utexas/main.

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36

Peftitsis, Dimosthenis. "On Gate Drivers and Applications of Normally-ON SiC JFETs." Doctoral thesis, KTH, Elektrisk energiomvandling, 2013. http://urn.kb.se/resolve?urn=urn:nbn:se:kth:diva-122679.

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In this thesis, various issues regarding normally-ON silicon carbide (SiC)Junction Field-Effect Transistors (JFETs) are treated. Silicon carbide powersemiconductor devices are able to operate at higher switching frequencies,higher efficiencies, and higher temperatures compared to silicon counterparts.From a system perspective, these three advantages of silicon carbide can determinethe three possible design directions: high efficiency, high switchingfrequency, and high temperature.The structure designs of the commercially-available SiC power transistorsalong with a variety of macroscopic charac

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37

Zhang, Xibo. "RF integrated circuit design options : from technology to layout /." View Abstract or Full-Text, 2003. http://library.ust.hk/cgi/db/thesis.pl?ELEC%202003%20ZHANG.

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Thesis (M. Phil.)--Hong Kong University of Science and Technology, 2003.<br>Includes bibliographical references (leaves 59-61). Also available in electronic version. Access restricted to campus users.

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38

Nayeem, Mustayeen B. "Applied mechanical tensile strain effects on silicon bipolar and silicon-germanium heterojunction bipolar devices." Thesis, Available online, Georgia Institute of Technology, 2005, 2005. http://etd.gatech.edu/theses/available/etd-07182005-102447/.

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Thesis (M. S.)--Electrical and Computer Engineering, Georgia Institute of Technology, 2006.<br>Dr. John D. Cressler, Committee Chair ; John Papapolymerou, Committee Member ; Joy Laskar, Committee Member.

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39

Low, Aichen. "A floating-gate low dropout voltage regulator." Thesis, Georgia Institute of Technology, 2000. http://hdl.handle.net/1853/14886.

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40

Mishra, Rahul. "Study of reliability mechanisms and their interaction in nanoscale CMOSFETs." Fairfax, VA : George Mason University, 2008. http://hdl.handle.net/1920/3348.

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Thesis (Ph.D.)--George Mason University, 2008.<br>Vita: p. 121. Thesis director: Dimitris E. Ioannou. Submitted in partial fulfillment of the requirements for the degree of Doctor of Philosophy in Electrical and Computer Engineering. Title from PDF t.p. (viewed Jan. 11, 2009). Includes bibliographical references (p. 111-120). Also issued in print.

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41

Ryu, Hyeyeon [Verfasser], Oliver G. [Akademischer Betreuer] Schmidt, and Paolo [Gutachter] Lugli. "Integrated Circuits Based on Individual Single-Walled Carbon Nanotube Field-Effect Transistors / Hyeyeon Ryu ; Gutachter: Paolo Lugli ; Betreuer: Oliver G. Schmidt." Chemnitz : Universitätsbibliothek Chemnitz, 2012. http://d-nb.info/1214244580/34.

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42

Poh, Chung Hang. "Radio frequency circuit design and packaging for silicon-germanium hetrojunction bipolar technology." Thesis, Atlanta, Ga. : Georgia Institute of Technology, 2009. http://hdl.handle.net/1853/31662.

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Thesis (M. S.)--Electrical and Computer Engineering, Georgia Institute of Technology, 2010.<br>Committee Chair: Cressler, John; Committee Member: Laskar, Joy; Committee Member: Papapolymerou, John. Part of the SMARTech Electronic Thesis and Dissertation Collection.

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43

Liu, Zhihong. "A study of thermally nitrided silicon dioxide thin films for metal-oxide-silicon VLSI techology /." [Hong Kong : University of Hong Kong], 1990. http://sunzi.lib.hku.hk/hkuto/record.jsp?B12718488.

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44

Gray, Jordan D. "Large scale reconfigurable analog system design enabled through floating-gate transistors." Diss., Georgia Institute of Technology, 2009. http://hdl.handle.net/1853/34660.

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This work is concerned with the implementation and implication of non-volatile charge storage on VLSI system design. To that end, the floating-gate pFET (fg-pFET) is considered in the context of large-scale arrays. The programming of the element in an efficient and predictable way is essential to the implementation of these systems, and is thus explored. The overhead of the control circuitry for the fg-pFET, a key scalability issue, is examined. A light-weight, trend-accurate model is absolutely necessary for VLSI system design and simulation, and is also provided. Finally, several reconfigura

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45

Singh, Siddhartha. "Phosphorus implants for off-state improvement of SOI CMOS fabricated at low temperature /." Online version of thesis, 2009. http://hdl.handle.net/1850/11427.

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46

Gray, Jordan D. "Application of Floating-Gate Transistors in Field Programmable Analog Arrays." Thesis, Georgia Institute of Technology, 2005. http://hdl.handle.net/1853/7540.

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Floating-gate transistors similar to those used in FLASH and EEPROM can be used to build reconfigurable analog arrays. The charge on the floating gate can be modified to pass or block a signal in a cross-bar switch matrix, or it can be finely tuned to eliminate a threshold difference across a chip or set a bias. By using such a compact and versatile reconfigurable analog memory element, the number of analog circuit components included on an integrated circuit that is field-programmable is significantly higher. As a result, large-scale FPAAs can be built with the same impact on analog design

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47

Wang, Haihong. "Advanced transport models development for deep submicron low power CMOS device design /." Digital version accessible at:, 1999. http://wwwlib.umi.com/cr/utexas/main.

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48

Seth, Sachin. "Using complementary silicon-germanium transistors for design of high-performance rf front-ends." Diss., Georgia Institute of Technology, 2012. http://hdl.handle.net/1853/44721.

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The objective of the research presented in this dissertation is to explore the achievable dynamic range limits in high-performance RF front-ends designed using SiGe HBTs, with a focus on complementary (npn + pnp) SiGe technologies. The performance requirements of RF front-ends are high gain, high linearity, low dc power consumption, very low noise figure, and compactness. The research presented in this dissertation shows that all of these requirements can easily be met by using complementary SiGe HBTs. Thus, a strong case is made in favor of using SiGe technologies for designing high dynamic r

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49

Fernández, S. Alejandro D. "Modelling the temperature dependences of Silicon Carbide BJTs." Thesis, KTH, Skolan för informations- och kommunikationsteknik (ICT), 2016. http://urn.kb.se/resolve?urn=urn:nbn:se:kth:diva-202754.

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Silicon Carbide (SiC), owing to its large bandgap, has proved itself to be a very viable semiconductor material for the development of extreme temperature electronics. Moreover, its electrical properties like critical field (Ecrit) and saturation velocity (vsat) are superior as compared to the commercially abundant Silicon, thus making it a better alternative for RF and high power applications. The in-house SiC BJT process at KTH has matured a lot over the years and recently developed devices and circuits have shown to work at temperatures exceeding 500˚C. However, the functional reliability o

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50

Barthélemy, Hervé. "Conception et application de nouveaux circuits analogiques mettant en oeuvre une boucle translineaire mixte a huit transistors." Paris 11, 1996. http://www.theses.fr/1996PA112234.

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Une nouvelle boucle translineaire mixte composee de huit transistors bipolaires (quatre npn et quatre pnp) est introduite. L'etude des invariances de la structure, a partir de la theorie des graphes, a permis de definir les differentes polarisations utilisables pour celle-ci. Nous en avons aussi deduit la position des miroirs de courant qu'il est possible de connecter sur cette boucle. Une polarisation particuliere parmi celles comprenant deux sources de courant a entierement ete traitee. Les proprietes dynamiques des circuits qui resultent des differentes polarisations sont ensuite analysees.

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