Journal articles: 'Interface Electronic Circuits'

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Manukyan, Vahram K. "Software applications in modeling of physical processes in radio engineering and electronics in the context of distance learning." Physics of Wave Processes and Radio Systems 24, no. 1 (May 6, 2021): 89–97. http://dx.doi.org/10.18469/1810-3189.2021.24.1.89-97.

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This article examines the existing software applications for electronic circuit prototyping that can help evaluate the operation of the entire circuit based on specified parameters and find the best options. Using the TAC application and the Arduino library components, projects and instructions for creating and testing electronic circuits were developed. The resulting application was tested for capabilities and efficiency. The interface design and settings were also assessed to determine whether they simulate real conditions. The functionality of TAC application made it possible to generate alternate circuits. The results of software testing showed that using the application speeds up the learning process significantly when compared to traditional methods and helps eliminate problems that may emerge when designing and assembling circuits. The application may be useful in designing complex electronic circuits and developing teaching aids for students in technical fields.

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Yun, Eun Jeong, Jong Tae Park, and Chong Gun Yu. "An maximum power point tracking interface circuit for low-voltage DC-type energy harvesting sources." Bulletin of Electrical Engineering and Informatics 11, no. 6 (December 1, 2022): 3108–18. http://dx.doi.org/10.11591/eei.v11i6.4124.

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This paper presents a maximum power point tracking (MPPT) interface circuit for low-voltage DC-type energy harvesting sources such as light and thermal energy. Most energy harvesting systems used in miniature-sized sensor systems require start-up circuits because the output voltages of small-sized energy transducers are very low and not enough to directly power electronic systems. The proposed interface circuit is driven directly by the low output voltages of small size energy transducers, eliminating the need for complex start-up circuitry. A simple MPPT controller with the fractional open-circuit voltage (FOCV) method is designed and fabricated in a 65-nm complementary metal oxide semiconductor (CMOS) process. Measurement results show that the designed circuit can track the MPP voltage even in the presence of the open-circuit voltage fluctuations and can operate properly at operating voltages as low as 0.3 V. The interface circuit achieves a peak power efficiency of 97.1% and an MPPT accuracy of over 98.3%.

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Liew Hui Fang, Rosemizi Abd Rahim, Muhammad Izuan Fahmi, Junita Mohd Nordin, and Aini Syuhada Md Zain. "Review of Active Circuit and Passive Circuit Techniques to Improve the Performance of Highly Efficient Energy Harvesting Systems." Journal of Advanced Research in Applied Sciences and Engineering Technology 31, no. 1 (June 13, 2023): 271–90. http://dx.doi.org/10.37934/araset.31.1.271290.

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In piezoelectric energy harvesting systems, energy harvesting circuits are the interface between piezoelectric devices and electrical loads. The conventional view of this interface is based on the concept of impedance matching. In fact, in the power supply circuit can also apply as an electrical boundary conditions, such as voltage and charge, to piezoelectric devices for each energy conversion cycle. The major drawback of piezoelectric power harvesting have low-power relationships in systems within (in the range of μW to mW), then system also have significantly reduced any potential losses in circuits that make up the EH system, whereas other condition into careful selection of circuits and components can enhanced the energy harvesting performance and electricity consumption. In the study of energy harvesting systems, it is an energy harvesting system approach that using active and passive electronic circuit to control voltage and or charge on piezoelectric devices as proposed and review to mechanical inputs for optimized energy conversion. Several factors in the practical limitation of active and passive energy consumption, due to device limitations and the power efficiency of electronic circuits, will be introduced and have played an important role into to enhance optimum and increase efficiency of energy harvesting system.

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Goeritno, Arief, and Ika Setyawibawa. "An Electronic Device Reviewed by Diagnosing on the Modules Embodiment." International Journal of Electronics and Communications Systems 1, no. 2 (December 28, 2021): 41–55. http://dx.doi.org/10.24042/ijecs.v1i2.10383.

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An electronic device with various purposes needs in-depth study from the very beginning of the idea, before getting the final product. It relates to an essential role in providing user's infrastructure and service. The research objectives are to obtain the electronic circuits, modules, and devices by integrating the wiring. The research methods are conducted in the form of designing, manufacturing, assembling, and diagnosing. Designing stage is to obtain several electronic circuits as a liaison and the manufacturing stage to obtain the printed circuit board. The assembling stage is to obtain the gateway boards which controlled by the Arduino modules and diagnosing stage to obtain the interface device for communicating (IDC) is formed by integrating the wiring. Integrating several electronic circuits, modules, and devices have resulted in an IDC. Operating the IDC uses two different systems, i.e. from the telephony system to the radio-frequency system or vice versa with a half-duplex mechanism.

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Žemva, Andrej, Andrej Trost, and Baldomir Zajc. "Educational Programmable System for Prototyping Digital Circuits." International Journal of Electrical Engineering & Education 35, no. 3 (July 1998): 236–44. http://dx.doi.org/10.1177/002072099803500306.

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In this paper, we present an educational programmable system for prototyping digital circuits. The system is composed of the PC and the prototyping board composed of 3 FPGAs. PC is used for designing a digital circuit, programming the FPGAs, automatic generation of the interface logic and hardware verification of the designed circuit.

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Boni, Andrea, Michele Caselli, Alessandro Magnanini, and Matteo Tonelli. "CMOS Interface Circuits for High-Voltage Automotive Signals." Electronics 11, no. 6 (March 21, 2022): 971. http://dx.doi.org/10.3390/electronics11060971.

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The acquisition of high-voltage signals from sensors and actuators in an internal-combustion engine is often required for diagnostic purposes or in the case of conversion to alternative fuels, such as hydrogen, natural gas, or biogas. The integration of electronic interfaces and acquisition circuits in a single device provides benefits in terms of component-count reduction and performance. Nonetheless, the high voltage level of the involved signals makes on-chip design challenging. Additionally, the circuits should be compatible with the CMOS technology, with limited use of high-voltage options and a minimum number of off-chip components. This paper describes the design and the implementation in 350 nm CMOS technology of electronic interfaces and acquisition circuits for typical high-voltage signals of automotive context. In particular, a novel co-design of dedicated voltage clamps with electro-static discharge (ESD) protections is described. The proposed circuits require only a single off-chip resistor, and they are suitable for the acquisition of signals with peak voltages up to 400 V. The measured performance of the silicon prototypes, in the [−40 °C, +125 °C] temperature range, make the proposed electronic interfaces suitable for the automotive domain.

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Polachan, Kurian, Baibhab Chatterjee, Scott Weigand, and Shreyas Sen. "Human Body–Electrode Interfaces for Wide-Frequency Sensing and Communication: A Review." Nanomaterials 11, no. 8 (August 23, 2021): 2152. http://dx.doi.org/10.3390/nano11082152.

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Several on-body sensing and communication applications use electrodes in contact with the human body. Body–electrode interfaces in these cases act as a transducer, converting ionic current in the body to electronic current in the sensing and communication circuits and vice versa. An ideal body–electrode interface should have the characteristics of an electrical short, i.e., the transfer of ionic currents and electronic currents across the interface should happen without any hindrance. However, practical body–electrode interfaces often have definite impedances and potentials that hinder the free flow of currents, affecting the application’s performance. Minimizing the impact of body–electrode interfaces on the application’s performance requires one to understand the physics of such interfaces, how it distorts the signals passing through it, and how the interface-induced signal degradations affect the applications. Our work deals with reviewing these elements in the context of biopotential sensing and human body communication.

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Stornelli, Vincenzo, Leonardo Pantoli, Gianluca Barile, Alfiero Leoni, and Emanuele D’Amico. "Silicon Photomultiplier Sensor Interface Based on a Discrete Second Generation Voltage Conveyor." Sensors 20, no. 7 (April 5, 2020): 2042. http://dx.doi.org/10.3390/s20072042.

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This work presents the design of a discrete second-generation voltage conveyor (VCII) and its capability to be used as electronic interface for silicon photomultipliers. The design addressed here exploits directly at the transistor level, with commercial components, the proposed interface; the obtained performance is valuable considering both the discrete elements and the application. The architecture adopted here realizes a transimpedance amplifier that is also able to drive very high input impedance, as usually requested by photons detection. Schematic and circuital design of the discrete second-generation voltage conveyor is presented and discussed. The complete circuit interface requires a bias current of 20 mA with a dual 5V supply voltage; it has a useful bandwidth of about 106 MHz, and considering also the reduced dimensions, it is a good candidate to be used in portable applications without the need of high-cost dedicated integrated circuits.

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Xu, Yunsong, Shen Yin, Jinyong Yu, and Hamid Reza Karimi. "Design of a TFT-LCD Based Digital Automobile Instrument." Mathematical Problems in Engineering 2014 (2014): 1–8. http://dx.doi.org/10.1155/2014/549790.

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The traditional mechanical instrument lacks the ability to satisfy the market with characters of favorable compatibility, easy upgrading, and fashion. Thus the design of a TFT-LCD (thin film transistor-liquid crystal display) based automobile instrument is carried out. With a 7-inch TFT-LCD and the 32-bit microcontroller MB91F599, the instrument could process various information generated by other electronic control units (ECUs) of a vehicle and display valuable driving parameters on the 7-inch TFT-LCD. The function of aided parking is also provided by the instrument. Basic principles to be obeyed in circuits designing under on-board environment are first pointed out. Then the paper analyzes the signals processed in the automobile instrument and gives an introduction to the sampling circuits and interfaces related to these signals. Following this is the functional categorizing of the circuit modules, such as video buffer circuit, CAN bus interface circuit, and TFT-LCD drive circuit. Additionally, the external EEPROM stores information of the vehicle for history data query, and the external FLASH enables the display of high quality figures. On the whole, the accomplished automobile instrument meets the requirements of automobile instrument markets with its characters of low cost, favorable compatibility, friendly interfaces, and easy upgrading.

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Hasegawa, Daiki, Yuto Takeshita, Feng Li, Kyosuke Sano, Masamitsu Tanaka, Taro Yamashita, and Akira Fujimaki. "Demonstration of Interface Circuits Between Half- and Single- Flux- Quantum Circuits." IEEE Transactions on Applied Superconductivity 31, no. 5 (August 2021): 1–4. http://dx.doi.org/10.1109/tasc.2021.3072846.

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Goeritno, Arief, Ika Setyawibawa, and Dwi Suhartono. "Designing a microcontroller-based half-duplex interface device drove by the touch-tone signal." JURNAL INFOTEL 13, no. 4 (December 9, 2021): 205–15. http://dx.doi.org/10.20895/infotel.v13i4.712.

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The interface device for communicating (IDC) as a bridge for the merger between two different systems based on different protocols and standards can be made of several electronic modules. The two Arduino boards (UNO R3 and MEGA2560 R3) have been constructed as the electronic modules of a gateway become a haft-duplex IDC, and are driven by the touch-tone signal. The research objectives, i.e., assembling some of the hardware for the embodiment of the adapter system, making a program structure, and performing a test of the IDC system. The haft-duplex IDC has been carried out by integrating all components by wiring to form an embedded system. Then, programming the microcontroller modules based on the Arduino software is carried outin six stages. Finally, the simulation test with the provision of conditions is carried out and obtained of six conditions for (i) the circuit of ring detection, (ii) the circuit of voice-operated transmit, (iii) the circuit off/on the hook of the telephone module, (iv) the circuit of tone decoder, (v) dial-up telephone numbers via push buttons and switching IC circuits, and (vi) the circuits of voice recording and storage in the form to playback. The test's success with six conditions has been an indication that the microcontroller-based IDC system is functioning as expected. Completing, the conclusion, and recommendationsrelated to measurement on the various purposes and the real conditions for the half-duplex interface adapter can be implemented.

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Petrović, Predrag B., Maria Vesna Nikolić, and Mihajlo Tatović. "New Electronic Interface Circuits for Humidity Measurement Based on the Current Processing Technique." Measurement Science Review 21, no. 1 (February 1, 2021): 1–10. http://dx.doi.org/10.2478/msr-2021-0001.

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Abstract The paper describes a new electronic conditioning circuit based on the current-processing technique for accurate and reliable humidity measurement, without post-processing requirements. Pseudobrookite nanocrystalline (Fe2TiO5) thick film was used as capacitive humidity transducer in the proposed design. The interface integrated circuit was realized in TSMC 0.18 μm CMOS technology, but commercial devices were used for practical realization. The sensing principle of the sensor was obtained by converting the information on environment humidity into a frequency variable square-wave electric current signal. The proposed solution features high linearity, insensitivity to temperature, as well as low power consumption. The sensor has a linear function with relative humidity in the range of Relative Humidity (RH) 30-90 %, error below 1.5 %, and sensitivity 8.3 x 1014 Hz/F evaluated over the full range of changes. A fast recovery without the need of any refreshing methods was observed with a change in RH. The total power dissipation of readout circuitry was 1 mW.

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SINGH, ADIT D. "Four-valued interface circuits for NMOS VLSI." International Journal of Electronics 63, no. 2 (August 1987): 269–79. http://dx.doi.org/10.1080/00207218708939128.

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Sansen, Willy. "Biomedical and Sensor Interface Circuits [Conference Reports]." IEEE Solid-State Circuits Magazine 6, no. 2 (2014): 76–77. http://dx.doi.org/10.1109/mssc.2014.2316060.

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Rifai, Afaf Fadhil, Wahyudi Purnomo, and Revirda Eka Putri. "RANCANG BANGUN DC TO DC BUCK CONVERTER DENGAN SISTEM KENDALI PI PADA NI ELVIS II DAN ANTARMUKA BERBASIS LABVIEW." JTT (Jurnal Teknologi Terapan) 7, no. 2 (October 11, 2021): 129. http://dx.doi.org/10.31884/jtt.v7i2.333.

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Understanding basic concepts is an important thing in electronics, especially regarding the teaching aid of power electronic components. Given the need for students to study the model of electronic schematic with feedback controller, a media that can support this is needed. One of the developments in component technology and electronic circuits that can be studied is the DC voltage conversion, namely the DC to DC buck converter. This teaching aid model uses software, namely LabVIEW and the control and data acquisition hardware, namely NI ELVIS II. DC to DC buck converter schematic that can reduce the variable output voltage with a value range of 6 - 18VDC from an input voltage of 24VDC. PI feedback controller testing in the system experiment resulted in a difference of 0.1567% error using the PI controller parameter of Kp = 3.00 and Ti = 0.01. The test results with the PI controller show the expected response and can be applied to the buck converter circuit system. Testing the interface of the buck type DC to DC converter system is considered feasible as a learning aid with an overall interface quality value of 83.8% with student responds.

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LITOVSKI, VANČO B., MIONA V. ANDREJEVIĆ, PREDRAG M. PETKOVIĆ, and ROBERT I. DAMPER. "ANN APPLICATION TO MODELING OF THE D/A AND A/D INTERFACE FOR MIXED-MODE BEHAVIORAL SIMULATION." Journal of Circuits, Systems and Computers 13, no. 01 (February 2004): 181–92. http://dx.doi.org/10.1142/s0218126604001325.

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Artificial neural networks are applied for modeling the input and output circuits of the digital part of the digital–analog and analog–digital interface, respectively, in CMOS mixed-mode circuits. The generalization property of the neural networks is exploited to apply the models in a set of previously unknown situations, the most important being loading the model generated from the unloaded circuit. The models developed are applicable in mixed-signal behavioral simulations.

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Heckingbottom, R. "Perspectives in surface and interface analysis for electronic devices and circuits." Surface and Interface Analysis 9, no. 5 (July 1986): 265–73. http://dx.doi.org/10.1002/sia.740090502.

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Kim, Sungmin. "Development of a computer-aided design software for smart garments." International Journal of Clothing Science and Technology 29, no. 6 (November 6, 2017): 845–56. http://dx.doi.org/10.1108/ijcst-02-2017-0011.

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Purpose The purpose of this paper is to develop a computer-aided design software for smart garments. Design/methodology/approach A circuit design software with graphical user interface and an automatic Arduino code generator has been developed. Findings Complex circuit design for smart garment can be performed using an intuitive graphical user interface. Sophisticated C codes for activating the smart garment can be generated without in-depth knowledge of C language and electronic devices. Research limitations/implications Circuit wiring is performed manually. Further work will be focused on the generation of an algorithm that can find the overlap-free design of complex circuit. Practical implications Smart garments with complex functions are expected to be designed more easily without in-depth knowledge of electronic circuits and computer programming. Social implications Researchers of smart garment will be able to concentrate on the actual function of smart garments rather than coding the complex C programs. Originality/value This is the first computer-aided smart garment design software that can not only design the circuit but also generate the computer codes.

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Christensen, C. Paul. "Miniature MEMS Interface Circuits Using Nanoparticle Conductors and Embedded Components." Additional Conferences (Device Packaging, HiTEC, HiTEN, and CICMT) 2011, DPC (January 1, 2011): 001674–706. http://dx.doi.org/10.4071/2011dpc-wp22.

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MEMS devices are typically used in subsystems comprising the MEMS component and the infrastructure required to support it. This infrastructure – signal processing, communication interface, power supply, and system packaging – often determines the size and cost of the subsystem. This paper describes a new approach to fabrication of highly miniaturized electronic circuitry and packaging that is well-suited to interfacing and support of MEMS components. The fabrication process utilizes nanoparticle silver conductors to connect miniature embedded surface-mount components. Interconnect conductors are produced by filling laser-ablated channels with nanoparticle silver pastes that cure at low temperatures. This laser-based approach allows production of very fine line interconnect structures (< 10 micron trace widths), which simplifies conductor routing and reduces layer count. Avoiding subtractive copper processes significantly reduces capital equipment and facilities costs and minimizes waste streams. After interconnection, the component assembly is encapsulated in a thermally conductive epoxy to produce a robust, stackable electronic module. Techniques also have been developed for stacking and interconnection of these circuit modules to form 3D electronic systems of nearly arbitrary form factor. All fabrication processes are CAD/CAM controlled, providing fast adaptability to design change and a smooth transition to production in both small and large volumes. The new fabrication technology has been applied to the challenge of miniaturization of wireless sensor nodes with the goal of constructing complete nodes of sugar-cube size (including an advanced battery). Node form factor can be easily adapted to specific applications.

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Hidalgo-López, José A., Óscar Oballe-Peinado, Julián Castellanos-Ramos, and José A. Sánchez-Durán. "Two-Capacitor Direct Interface Circuit for Resistive Sensor Measurements." Sensors 21, no. 4 (February 22, 2021): 1524. http://dx.doi.org/10.3390/s21041524.

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Direct interface circuits (DICs) avoid the need for signal conditioning circuits and analog-to-digital converters (ADCs) to obtain digital measurements of resistive sensors using only a few passive elements. However, such simple hardware can lead to quantization errors when measuring small resistance values as well as high measurement times and uncertainties for high resistances. Different solutions to some of these problems have been presented in the literature over recent years, although the increased uncertainty in measurements at higher resistance values is a problem that has remained unaddressed. This article presents an economical hardware solution that only requires an extra capacitor to reduce this problem. The circuit is implemented with a field-programmable gate array (FPGA) as a programmable digital device. The new proposal significantly reduces the uncertainty in the time measurements. As a result, the high resistance errors decreased by up to 90%. The circuit requires three capacitor discharge cycles, as is needed in a classic DIC. Therefore, the time to estimate resistance increases slightly, between 2.7% and 4.6%.

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Kintzios, Spyridon. "Bioelectric Sensors: On the Road for the 4.0 Diagnostics and Biomedtech Revolution." Biosensors 10, no. 8 (August 11, 2020): 96. http://dx.doi.org/10.3390/bios10080096.

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Chen, Q., J. He, W. Zhou, and Q. Su. "Surge Protection for Interface Circuits of Communication System." IEEE Power Engineering Review 22, no. 8 (August 2002): 69. http://dx.doi.org/10.1109/mper.2002.4312514.

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Zhuan, Zhang, and Wu Xunwei. "The quaternary interface technique in ECL integrated circuits." Journal of Electronics (China) 9, no. 1 (January 1992): 40–44. http://dx.doi.org/10.1007/bf02778591.

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Ben Ammar, Meriam Ben, Salwa Sahnoun, Ahmed Fakhfakh, Christian Viehweger, and Olfa Kanoun. "Self-Powered Synchronized Switching Interface Circuit for Piezoelectric Footstep Energy Harvesting." Sensors 23, no. 4 (February 6, 2023): 1830. http://dx.doi.org/10.3390/s23041830.

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Piezoelectric Vibration converters are nowadays gaining importance for supplying low-powered sensor nodes and wearable electronic devices. Energy management interfaces are thereby needed to ensure voltage compatibility between the harvester element and the electric load. To improve power extraction ability, resonant interfaces such as Parallel Synchronized Switch Harvesting on Inductor (P-SSHI) have been proposed. The main challenges for designing this type of energy management circuits are to realise self-powered solutions and increase the energy efficiency and adaptability of the interface for low-power operation modes corresponding to low frequencies and irregular vibration mechanical energy sources. In this work, a novel Self-Powered (SP P-SSHI) energy management circuit is proposed which is able to harvest energy from piezoelectric converters at low frequencies and irregular chock like footstep input excitations. It has a good power extraction ability and is adaptable for different storage capacitors and loads. As a proof of concept, a piezoelectric shoe insole with six integrated parallel piezoelectric sensors (PEts) was designed and implemented to validate the performance of the energy management interface circuit. Under a vibration excitation of 1 Hz corresponding to a (moderate walking speed), the maximum reached efficiency and power of the proposed interface is 83.02% and 3.6 mW respectively for the designed insole, a 10 kΩ resistive load and a 10 μF storage capacitor. The enhanced SP-PSSHI circuit was validated to charge a 10 μF capacitor to 6 V in 3.94 s and a 1 mF capacitor to 3.2 V in 27.64 s. The proposed energy management interface has a cold start-up ability and was also validated to charge a (65 mAh, 3.1 V) maganese dioxide coin cell Lithium battery (ML 2032), demonstrating the ability of the proposed wearable piezoelectric energy harvesting system to provide an autonomous power supply for wearable wireless sensors.

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Severo, Lucas Compassi, and Wilhelmus Adrianus Maria Van Noije. "A Generic Test Board for the Electrical Characterization of ULP and ULV Fully-Differential Integrated Analog Circuits." Journal of Integrated Circuits and Systems 14, no. 3 (December 27, 2019): 1–7. http://dx.doi.org/10.29292/jics.v14i3.90.

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The characterization of ultra-low power (ULP) fully-differential/balanced amplifiers and active filters is challenging due to the incompatibility with the classical single-ended (SE) and 50 Ω impedance equipment. Interface circuits between the device under test (DUT) and the equipment are needed to perform the signal conversion and to work as voltage buffers. In this work, we propose a generic test circuits to be used in the characterization of ULP and ultra-low voltage (ULV) analog circuits. The test board includes balun transformers to the signal conversion, a high input impedance and low capacitance output driver and voltage regulators to provide the target DUT supply voltage. The characterization of the proposed PCB demonstrates a bandwidth of 30 MHz, output driver input impedance of 5 MΩ with 2.5 pF capacitance and low input-referred noise. The proposed circuit was applied to the electrical characterization of two fully-differential ULV and ULP analog integrated circuits.

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Tarutani, Y., Y. Ishimaru, H. Wakana, M. Horibe, H. Sugiyama, S. Adachi, Y. Oshikubo, et al. "Fabrication of interface elements for oxide RSFQ circuits." IEEE Transactions on Appiled Superconductivity 13, no. 2 (June 2003): 413–16. http://dx.doi.org/10.1109/tasc.2003.813882.

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Chen, Hao, Chao Long Ou, Fu Sheng Chen, Jie Xiang, Xian Yong Xu, Wei Neng Wang, and Hai Yuan Wang. "Research on the Secondary Interface of Electronic Transformers in Smart Substation." Applied Mechanics and Materials 710 (January 2015): 53–59. http://dx.doi.org/10.4028/www.scientific.net/amm.710.53.

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According to the requirements of smart substation metering system, a digital interface based on IEC 61850 specification is given, then the functional model of the merging unit is discussed. Meanwhile, according to the actual situation, the author proposes an analog output interface, in order to fit with traditional substation secondary equipment. Then the solution based on TMS320F28335 digital control platform is described, for which the voltage control module of the software and hardware circuits are discussed in detail. The experimental data shows that the proposed merging unit and analog voltage output interface can meet the accuracy standard of electronic transformer in the smart substation.

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Liu, Qing, Heming Wang, Fangxu Lyu, Geng Zhang, and Dongbin Lyu. "A Low-Latency, Low-Jitter Retimer Circuit for PCIe 6.0." Electronics 12, no. 14 (July 17, 2023): 3102. http://dx.doi.org/10.3390/electronics12143102.

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As the PCIe 6.0 specification places higher requirements on signal integrity and transmission latency, it becomes especially important to improve signal transmission performance at the physical layer of the transceiver interface. Retimer circuits are a key component of high-speed serial interfaces, and their delay and jitter size directly affect the overall performance of PCIe. For the typical retimer circuit with large-latency and low-jitter performance, this paper proposes a low-latency and low-jitter Retimer circuit based on CDR + PLL architecture for PCIe 6.0, using a jitter-canceling filter circuit to eliminate the frequency difference between the retiming clock and data, reduce the retiming clock jitter, and improve the quality of Retimer output data. The data are sampled using the retiming clock and then output, avoiding the problem of large penetration latency of typical retimer circuits. The circuit is designed using the CMOS 28 nm process. Simulation results show that when 112 Gbps PAM4 data are input to the retimer circuit, the Retimer penetration latency is 27.3 ps, which is 83.5% lower than the typical Retimer structure; the output jitter data are 741 fs, a 31.4% reduction compared to the typical retimer structure.

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Bourdeu D’aguerre, Philippe. "Interface Solo 1400 — testeur de circuits intégrés GR 115." Annales Des Télécommunications 46, no. 9-10 (September 1991): 547–49. http://dx.doi.org/10.1007/bf02998697.

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Rohwerder, M., and M. Stratmann. "Surface Modification by Ordered Monolayers: New Ways of Protecting Materials Against Corrosion." MRS Bulletin 24, no. 7 (July 1999): 43–47. http://dx.doi.org/10.1557/s0883769400052696.

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Metal/polymer composites are used in numerous technical applications. For example, polymer coatings on metal surfaces are used for corrosion protection, metal films on polymers inhibit static buildup, and polymers between two metals can serve as a “glue” for connecting materials that cannot be welded. Polymer/metal composites also play an important role in modern electronics. In condensers, polymers serve as insulating layers between metallic leads and are used to encapsulate entire electronic circuits. In all circumstances, interfaces are formed between the two different materials, and since the chemistry and structure change abruptly, interfacial failure is frequently observed.The cause of failure may just be mechanical (e.g., shrinkage of the polymer during curing), or the interface stability may be degraded by attack of aggressive species, resulting in delamination. More specifically, loss of adhesion is directly caused by interfacial electrochemical reactions that nucleate at a defect and progress into intact regions of the interface. This occurs for encapsulated electronic parts in humid atmospheres as well as for lacquers on automotive parts.Thus the investigation of corrosion reactions at a buried interface is an important area of research, but it is made very difficult by the fact that most electrochemical methods do not give information on localized reaction kinetics at a buried (metal/polymer) interface. This situation has changed with the invention and development of the scanning Kelvin probe (SKP). This method allows, for the first time, local analysis of reactions occurring at a buried metal/polymer interface. Based on the results obtained with the SKP, a detailed reaction model for the delamination process has been developed. This understanding has led to the development of new approaches that protect the interface from delamination. The idea is to chemically modify the interface using Afunctional molecules that promote adhesion between metal and polymer surfaces.

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Amirnudin, Amirul Adlan, Farahiyah Mustafa, Anis Maisarah Mohd Asry, and Sy Yi Sim. "Vibration Based Energy Harvesting Interface Circuit using Diode-Capacitor Topologies for Low Power Applications." International Journal of Power Electronics and Drive Systems (IJPEDS) 8, no. 4 (December 1, 2017): 1943. http://dx.doi.org/10.11591/ijpeds.v8.i4.pp1943-1947.

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<span>A battery-less energy harvesting interface circuit to extract electrical energy from vibration has been proposed in this paper for low power applications. The voltage doubler integrated with DC – DC boost converter circuits were designed and simulated using MultiSIM software. The circuit was then fabricated onto a printed circuit board (PCB), using standard fabrication process. The Cockcroft Walton doubler was chosen to be implemented in this study by utilizing diode-capacitor topologies with additional RC low pass filter. The DC – DC boost converter has been designed using a CMOS step -up DC – DC switching regulators, which are suitable for low input voltage system. The achievement of this interface circuit was able to boost up the maximum voltage of 5 V for input voltage of 800 mV.</span>

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Hato, T., M. Horibe, H. Wakana, M. Hidaka, and K. Tanabe. "Output Interface With Latching Driver for LTS-SFQ Circuits." IEEE Transactions on Appiled Superconductivity 15, no. 1 (March 2005): 1–5. http://dx.doi.org/10.1109/tasc.2004.839769.

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Qingheng Chen, Jinliang He, Wenjun Zhou, and Qi Su. "Surge protection for interface circuits of communication system." IEEE Transactions on Power Delivery 18, no. 1 (January 2003): 85–89. http://dx.doi.org/10.1109/tpwrd.2002.803695.

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Paull, C. J. "A First-Year Practical Exercise in the Design and Construction of a Simple Microprocessor-Based Measurement System." International Journal of Electrical Engineering & Education 25, no. 4 (October 1988): 303–8. http://dx.doi.org/10.1177/002072098802500403.

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The paper describes a first year project introducing practical aspects of work with electronic circuits. A simple Z80-based microcontroller forms the core of the system and students themselves design the analogue interface necessary to link this to a specified transducer.

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OKTYABRSKY, SERGE, MICHAEL YAKIMOV, VADIM TOKRANOV, RAMA KAMBHAMPATI, HASSARAM BAKHRU, SERGEI KOVESHNIKOV, WILMAN TSAI, FENG ZHU, and JACK LEE. "CHALLENGES AND PROGRESS IN III-V MOSFETs FOR CMOS CIRCUITS." International Journal of High Speed Electronics and Systems 18, no. 04 (December 2008): 761–72. http://dx.doi.org/10.1142/s0129156408005746.

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An overview of III-V MOSFET technological challenges in comparison to well-established heterostructure-based FET technologies is presented with an emphasis on required properties and possible solutions. Possible approaches to achieve thermodynamically stable high- k gate stack with low interface trap density are reviewed, followed with our results on amorphous Si interface passivation layer (IPL) in-situ deposited on top of GaAs or strained InGaAs MOSFET channels grown by molecular beam epitaxy. Main issues of Si IPL, namely increased equivalent oxide thickness due to IPL oxidation and Si diffusion into the semiconductor channel, are addressed using an in-situ deposited HfO 2 with ultrathin (down to 0.25 nm) Si IPL and controlling its bonding state at the interface. Enhancement mode inversion-type MOSFET with HfO 2 high- k oxide is demonstrated. The device employs amorphous Si interface passivation layer, sputter-deposited high- k oxide and metal TaN gate and modulation p-doped GaAs / AlGaAs heterostructure with inversion n -channel formed at the interface with the oxide. The MOSFET with equivalent oxide thickness of 3.7 nm and long 100 μm channel have maximum DC transonductance of 0.9 mS/mm, Ion/Ioff = 2×104 (at low Ioff of 30 nA) and effective channel mobility exceeding 1000 cm2/V-s at sheet electron density <2×1012 cm-2.

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Ohme, Bruce W., and Mark R. Larson. "Analog Component Development for 300°C Sensor Interface Applications." Additional Conferences (Device Packaging, HiTEC, HiTEN, and CICMT) 2012, HITEC (January 1, 2012): 000199–206. http://dx.doi.org/10.4071/hitec-2012-wp11.

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The development of Enhanced Geothermal Systems (EGS) for base-load electrical power generation will require electronics for sensing and control during exploration and drilling and also during production. The operating temperature environments for these applications will generally be more extreme than those encountered by electronics currently deployed for oil and gas development and production monitoring. To address this requirement, electronic components have been designed and fabricated for operation at temperatures of 300°C. These integrated circuits use silicon-on-insulator (SOI) fabrication processes to achieve high temperature operation. High-fidelity simulation models have been developed by characterization of SOI devices at 300°C. These device models were employed to design components required for the development of a down-hole orientation module. A wide-bandwidth, low-noise operational amplifier has been developed for use with MEMS accelerometer sensors. A multi-channel synchronous voltage-to-frequency converter with built-in reference and oscillators has also been developed for use with 3-axis flux-gate magnetometers. The components themselves are general purpose and could easily be used for other high-temperature sensor-interface applications. .

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Thomas, G., G. Troussel, and F. Vialettes. "High-voltage technology offers new solutions for interface integrated circuits." IEEE Transactions on Electron Devices 33, no. 12 (December 1986): 2016–24. http://dx.doi.org/10.1109/t-ed.1986.22861.

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Tsukada, Keiji, Takuya Maruizumi, and Hiroyuki Miyagi. "A multiple-ISFET integrated with CMOS interface circuits." Electronics and Communications in Japan (Part II: Electronics) 71, no. 12 (1988): 93–99. http://dx.doi.org/10.1002/ecjb.4420711211.

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Amini, Saber, and David Andrew Johns. "A Normalized Figure of Merit for Capacitive Accelerometer Interface Circuits." IEEE Transactions on Circuits and Systems II: Express Briefs 67, no. 1 (January 2020): 19–22. http://dx.doi.org/10.1109/tcsii.2019.2901851.

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ENOKI, TAKATOMO, EIICHI SANO, and TADAO ISHIBASHI. "PROSPECTS OF InP-BASED IC TECHNOLOGIES FOR 100-GBIT/S-CLASS LIGHTWAVE COMMUNICATIONS SYSTEMS." International Journal of High Speed Electronics and Systems 11, no. 01 (March 2001): 137–58. http://dx.doi.org/10.1142/s0129156401000812.

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This paper describes the device technologies that will be instrumental in achieving 100-Gbit/s-class ultrahigh-speed lightwave communications systems and clarifies the device technology issues we must address before we can make such systems a reality. At the interface between optical and electrical units, their monolithic integration is necessary and a uni-traveling carrier photodiode (UTC-PD) enables us to simplify the interface circuits. In high-speed circuits, InP-based HEMT's and HBT's will still be key devices. Further scaling down of HEMT's and reduction of their parasitic capacitance are the major subjects to achieve 100 Gbit/s operations. For HBT's, reduction of the product of feedback capacitance and base resistance are necessary. Estimations of operation speed for basic circuits in lightwave communications systems are summarized to set targets for designing device structures.

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Devadas, Srinivas, Kurt Keutzer, Sharad Malik, and Albert Wang. "Verification of asynchronous interface circuits with bounded wire delays." Journal of VLSI signal processing systems for signal, image and video technology 7, no. 1-2 (February 1994): 161–82. http://dx.doi.org/10.1007/bf02108195.

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Fernandes, Catarina, and Irene Taurino. "Biodegradable Molybdenum (Mo) and Tungsten (W) Devices: One Step Closer towards Fully-Transient Biomedical Implants." Sensors 22, no. 8 (April 15, 2022): 3062. http://dx.doi.org/10.3390/s22083062.

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Close monitoring of vital physiological parameters is often key in following the evolution of certain medical conditions (e.g., diabetes, infections, post-operative status or post-traumatic injury). The allocation of trained medical staff and specialized equipment is, therefore, necessary and often translates into a clinical and economic burden on modern healthcare systems. As a growing field, transient electronics may establish fully bioresorbable medical devices capable of remote real-time monitoring of therapeutically relevant parameters. These devices could alert remote medical personnel in case of any anomaly and fully disintegrate in the body without a trace. Unfortunately, the need for a multitude of biodegradable electronic components (power supplies, wires, circuitry) in addition to the electrochemical biosensing interface has halted the arrival of fully bioresorbable electronically active medical devices. In recent years molybdenum (Mo) and tungsten (W) have drawn increasing attention as promising candidates for the fabrication of both energy-powered active (e.g., transistors and integrated circuits) and passive (e.g., resistors and capacitors) biodegradable electronic components. In this review, we discuss the latest Mo and W-based dissolvable devices for potential biomedical applications and how these soluble metals could pave the way towards next-generation fully transient implantable electronic systems.

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Hidalgo-Lopez, Jose A., Jesus A. Botin-Cordoba, Jose A. Sanchez-Duran, Juan C. Tejero-Calado, and Oscar Oballe-Peinado. "Improved Calibration Method for Resistive Sensors Using Direct Interface Circuits." IEEE Transactions on Instrumentation and Measurement 69, no. 8 (August 2020): 5693–701. http://dx.doi.org/10.1109/tim.2019.2958583.

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Albertin, Katia F., M. A. Valle, and I. Pereyra. "Study Of MOS Capacitors With TiO2 And SiO2/TiO2 Gate Dielectric." Journal of Integrated Circuits and Systems 2, no. 2 (November 18, 2007): 89–93. http://dx.doi.org/10.29292/jics.v2i2.272.

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MOS capacitors with TiO2 and TiO2/SiO2 dielectric layer were fabricated and characterized. TiO2 films where physical characterized by Rutherford Backscattering, Fourier TransformInfrared Spectroscopy and Elipsometry measurements. Capacitance-voltage (1MHz) and current voltage measurements were utilized to obtain, the effective dielectric constant, effective oxide thickness (EOT), leakage current density and interface quality. The results show that the obtained TiO2 films present a dielectric constant of approximately 40, a good interface quality with silicon and a leakage current density, of 70 mA/cm2 for VG = 1V, acceptable for high performance logic circuits and low power circuits fabrication, indicating that this material is a viable substitute for current dielectric layers in order to prevent tunneling currents.

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Qiao, Zhiliang, Boris Boom, Anne-Johan Annema, Remco Wiegerink, and Bram Nauta. "On Frequency-Based Interface Circuits for Capacitive MEMS Accelerometers." Micromachines 9, no. 10 (September 25, 2018): 488. http://dx.doi.org/10.3390/mi9100488.

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Interface circuits for capacitive MEMS accelerometers are conventionally based on charge-based approaches. A promising alternative to these is provided by frequency-based readout techniques that have some unique advantages as well as a few challenges associated with them. This paper addresses these techniques and presents a derivation of the fundamental resolution limits that are imposed on them by phase noise. Starting with an overview of basic operating principles, associated properties and challenges, the discussions then focus on the fundamental trade-offs between noise, power dissipation and signal bandwidth (BW) for the LC-oscillator-based frequency readout and for the conventional charge-based switched-capacitor (SC) readout. Closed-form analytical formulas are derived to facilitate a fair comparison between the two approaches. Benchmarking results indicate that, with the same bandwidth requirement, charge-based readout circuits are more suitable when optimizing for noise performance, while there is still some room for frequency-based techniques when optimizing for power consumption, especially when flicker phase noise can be mitigated.

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Černý, David, and Josef Dobeš. "GPU Accelerated Nonlinear Electronic Circuits Solver for Transient Simulation of Systems with Large Number of Components." Electronics 9, no. 11 (November 2, 2020): 1819. http://dx.doi.org/10.3390/electronics9111819.

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GPU cards have been used for scientific calculations for many years. Despite their ever-increasing performance, there are cases where they may still have problems. This article addresses possible performance and memory issues and their solutions that may occur during GPU calculations of iterative algorithms. Specifically, the article focuses on the optimization of transient simulation of extra-large highly nonlinear time-dependent circuits in SPICE-like electronic circuit simulator core enhanced with NVIDIA/CUDA (Compute Unified Device Architecture) interface and iterative Krylov Subspace methods with emphasis on improved accuracy. The article presents procedures for solving problems that may occur during this integration and negatively affect either the simulation speed or the accuracy of the calculation. Finally, a comparison of the implementation of an iterative calculation procedure with the use of GPU cards, calculation by the direct method and calculation on the CPU only is presented.

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Williams, Chris, and Shideh Kabiri Ameri. "(Digital Presentation) Fully Integrated Strain-Neutralized 2D Transistors." ECS Meeting Abstracts MA2022-02, no. 62 (October 9, 2022): 2295. http://dx.doi.org/10.1149/ma2022-02622295mtgabs.

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As performant and well-established as conventional silicon-based electronics have become, the era of wearable electronics and the Internet-of-Things has created a demand for robust electronic devices that can conform to the surfaces of the human body. Whereas the mechanical mismatch between rigid silicon electronics and the human body represents a fundamental limit to conventional non-invasive health sensing, wearable electronics and electrodes that can conform to the microscopic features of the skin1,2 can circumvent most of the motion artifacts inherent to conventional, rigid sensing devices, and facilitate continuous health monitoring as is required for modern, more proactive healthcare. Unfortunately, without addressing this fundamental mechanical incompatibility, devices that leverage the high density of transistors available in rigid silicon-based integrated circuits are handicapped by how well they can maintain contact with the body, and consequently are prone to failure at the sensor-circuit interface. The extraordinary properties of two-dimensional materials pose a unique opportunity for addressing this mechanical mismatch. Their unusual mechanical strength combined with their ultimate thinness, optical transparency, and favorable electronic transport properties3 makes them ideal candidates for the next generation of highly conformable wearable electronics free of the constraints of a rigid silicon circuit board—however, minimizing local strain in the vicinity of the active devices to ensure reliable operation remains a priority. Using a design informed by finite element method (FEM) simulations, our proposed strain-neutralizing 2D transistors are configured to resist applied strains on the order of the 30% strains human skin can withstand by redistributing strain away from active regions. Tight binding simulations of the transistor channels helps with further compensation of residual strain in the active regions, alongside careful consideration of materials and device architecture during fabrication. Together, these considerations help realize the possibility of fully integrated strain-neutralized 2D transistors compatible with state-of-the-art conformable wearable sensors. [1]S. Kabiri Ameri et al., “Graphene electronic tattoo sensors,” ACS Nano, 11, 7634–7641, 2017. [2] S. Kabiri Ameri et al., “Imperceptible electrooculography graphene sensor system for human–robot interface”, npj 2D Materials and Applications, 2, 1-7, 2018. [3] A. H. Castro Neto, F. Guinea, N. M. R. Peres, K. S. Novoselov, and A. K. Geim, “The electronic properties of graphene,” Rev. Mod. Phys., vol. 81, no. 1, pp. 109–162, Jan. 2009, doi: 10.1103/RevModPhys.81.109.

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López-Magaña, Carlos, Jorge Rivera, Susana Ortega-Cisneros, Federico Sandoval-Ibarra, and Juan Luis Del Valle. "A Reduced Hardware SNG for Stochastic Computing." Electronics 12, no. 16 (August 8, 2023): 3383. http://dx.doi.org/10.3390/electronics12163383.

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Stochastic Computing (SC) is an alternative way of computing with binary weighted words that can significantly reduce hardware resources. This technique relies on transforming information from a conventional binary system to the probability domain in order to perform mathematical operations based on probability theory, where smaller amounts of binary logic elements are required. Despite the advantage of computing with reduced circuitry, SC has a well known issue; the input interface known as stochastic number generator (SNG), is a hardware consuming module, which is disadvantageous for small digital circuits or circuits with several input data. Hence, in this work, efforts are dedicated to improving a classic weighted binary SNG (WBSNG). For this, one of the internal modules (weight generator) of the SNG was redesigned by detecting a pattern in the involved signals that helped to pose the problem in a different way, yielding equivalent results. This greatly reduced the number of logical elements used in its implementation. This pattern is interpreted with Boolean equations and transferred to a digital circuit that achieves the same behavior of a WBSNG but with less resources.

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Gielen, Georges, Jelle Van Rethy, Jorge Marin, Max M. Shulaker, Gage Hills, H. S. Philip Wong, and Subhasish Mitra. "Time-Based Sensor Interface Circuits in CMOS and Carbon Nanotube Technologies." IEEE Transactions on Circuits and Systems I: Regular Papers 63, no. 5 (May 2016): 577–86. http://dx.doi.org/10.1109/tcsi.2016.2525098.

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Rostami, Mohammad Saleh, Mehdi Saberi, Mohammad Maymandi-Nejad, and Mohamad Sawan. "A Low-Power Time-to-Digital Converter for Sensor Interface Circuits." IEEE Transactions on Circuits and Systems II: Express Briefs 67, no. 12 (December 2020): 2853–57. http://dx.doi.org/10.1109/tcsii.2020.2996505.

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Journal articles on the topic 'Interface Electronic Circuits'

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