Relevant bibliographies by topics / Interleaved SEPIC

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  1. Journal articles
  2. Dissertations / Theses
  3. Book chapters
  4. Conference papers

Academic literature on the topic 'Interleaved SEPIC'

Author: Grafiati
Published: 4 June 2025
Last updated: 15 July 2025

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Journal articles on the topic "Interleaved SEPIC"

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R., Sasikala. "Interleaved Sepic Bridgeless AC-DC Converter for PFC Applications." Journal of Advanced Research in Dynamical and Control Systems 12, no. 01-Special Issue (2020): 593–600. http://dx.doi.org/10.5373/jardcs/v12sp1/20201108.

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Tseng, Sheng Yu, and Shu Yuan Fan. "Interleaved Soft-Switching Converter with L-C-D Snubber for Reflex Charger." Applied Mechanics and Materials 284-287 (January 2013): 2555–60. http://dx.doi.org/10.4028/www.scientific.net/amm.284-287.2555.

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This paper presents a Reflex charger realized by N sets of interleaved soft-switching converters with L-C-D snubbers. The interleaved converters used for implementing the Reflex charging technique can be interleaved boost, interleaved buck-boost, and interleaved sepic converters. The use of the L-C-D snubber in each set of interleaved converter is to reduce turn-off switching losses, hence, to achieve higher conversion efficiencies of the interleaved converters and to extend the lifetime of rechargeable batteries. A prototype of Reflex charger with four sets of interleaved buck-boost con-verters is implemented for charging lead acid batteries of 12V. Experimental results show that the proposed circuit structure can generate the required positive/negative pulses for the Reflex charging.
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Kalirasu, A. "A Novel Single Source Multiple Output Converter Integrating Buck-Boost and Fly Back Yopology for SMPS Applications." Indonesian Journal of Electrical Engineering and Computer Science 8, no. 3 (2017): 733. http://dx.doi.org/10.11591/ijeecs.v8.i3.pp733-736.

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<p>This paper presents a novel single DC input source and multiple DC output suitable for switched mode power supply (SMPS) applications integrating interleaved boost and sepic converter with fly back topology. The proposed converter can be remodeled for any required output voltage power supply without changing hardware structure because wide range of output voltage can be obtained using sepic and boost converters by changing duty cycle command by implementing a simple voltage input pi controller. Conventional fly back topology is added to interleaved circuit to produce desired dc output voltage this voltage can be controlled by choosing turns ratio of fly back transformer. The proposed multi output DC converter is simulated in MATLAB/Simulink environment and results are presented for verifying merits of the converter.</p>
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Azra, Fatima, and M.S.Aspalli. "DesignandSimulation of High-Efficiency High Gain non Isolated Interleaved DC-DC Converter with Reduced Voltage Stress on the Devices." International Journal of Innovative Technology and Exploring Engineering (IJITEE) 9, no. 12 (2020): 312–17. https://doi.org/10.5281/zenodo.5848080.

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In this paper, a non-isolated two interleaved modified step up KY Converter is analyzed and designed, whose efficiency,the voltage conversion ratio is high. There are various types of non -isolated converters such as buck-boost, Cuk, SEPIC, ZETA converters, etc but the voltage gain of these converters is less compare to the proposed interleaved KY converters. The voltage gain, efficiency of the proposed converter is enhanced compared to the previous converters. The voltage stress on semi-conductor devices and the ripple in the input current is reduced because of this interleaving technique. Switches with low on-state resistance are used due to which the conduction losses are reduced. Steady-state analysis and the operating principle are studied in continuous conduction mode (CCM) at ideal conditions. Simulation is also carried out in MATLAB/Simulink for the proposed interleaved KY converter.
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G, Ramanathan, and Bharatiraja C. "A Single Stage Sepic Converter for Electric Vehicles Charging." ECS Transactions 107, no. 1 (2022): 6553–60. http://dx.doi.org/10.1149/10701.6553ecst.

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This proposed system is about bidirectional power flow for charger of an E-Vehicles. The charger connected with PV source is designed, modelled, and implemented. In this topology, the output charging current is regulated by DC-DC converter. The bidirectional interleaved isolated SEPIC converter is proposed in this paper for charging the electric vehicle. The multi-step constant current charging method is used for charging operation. This reduces the number of power electronic components, which in turn minimizes the power loss. Simulation is carried out in MATLAB/Simulink, and the results are obtained, which shows that battery can be charged with this topology.
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R., Sasikala, and Seyezhai R. "Review of AC-DC power electronic converter topologies for power factor correction." International Journal of Power Electronics and Drive System (IJPEDS) 10, no. 3 (2019): 1510–19. https://doi.org/10.11591/ijpeds.v10.i3.pp1510-1519.

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Increased harmonic content and low power factor in power systems caused by power converters have been of great concern. To overcome this, several converter topologies employing advanced semiconductor devices and control schemes have been proposed. The aim of this paper is to identify a low cost, small size, efficient and reliable ac to dc converter to meet the input performance index of uninterrupted power supply. In this paper, comparison between three converters namely AC-DC Cuk rectifier, Fly back converter & Interleaved SEPIC converter have been carried out. For the above converters both bridged and bridgeless topologies have been analysed. The working of all the three types of converter has been illustrated with relevant waveforms followed by the simulation results. Comparison of the three converters have been done based on the parameters namely Displacement Factor, Supply Power Factor& supply THD. The results are verified.
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Tseng, Sheng Yu, and Yi Ren Juang. "Approach to Developing Interleaved Converter with Single-Capacitor Turn-Off Snubber." Applied Mechanics and Materials 284-287 (January 2013): 2477–84. http://dx.doi.org/10.4028/www.scientific.net/amm.284-287.2477.

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This paper presents a systematic approach to developing turn-off snubber for an interleaving converter to smooth out switch turn-off transition. With the approach, the interleaving converter with two turn-off snubbers, which are formed by two L-C-D type snubbers, can be replaced by the one with turn-off snubber composed of a single-capacitor snubber. It can be used in the basic six interleaved converters, such as buck, boost, buck-boost, ‘cuk, zeta and sepic converters. In this research, the structure of the interleaved converter with the turn-off snubber can be conveniently simplified from the derived general configurations, reducing the complexity of circuit structure significantly. Measured results from a buck prototype converter have been verified to prove the feasibility of the derived turn-off snubber.
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Cheng, Hung-Liang, Chun-An Cheng, Chien-Hsuan Chang, En-Chih Chang, Lain-Chyr Hwang, and Yi-Chan Hung. "Interleaved Modified SEPIC Converters with Soft Switching and High Power Factor for LED Lighting Appliance." Applied Sciences 14, no. 15 (2024): 6656. http://dx.doi.org/10.3390/app14156656.

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A novel ac/dc LED driver with power factor correction and soft-switching functions is proposed. The circuit topology mainly consists of two modified single-ended primary inductance converters (SEPIC) with interleaved operation. The first half stage of SEPIC operates like a boost converter and the second half stage operates like a buck–boost converter. Each boost converter is designed to operate in discontinuous current mode (DCM) to function as a power factor corrector (PFC). The two buck–boost converters that share a commonly coupled inductor are designed to operate at near boundary conduction mode (BCM). Without using any active clamping circuit, auxiliary switch or snubber circuit, the active switches can achieve zero-voltage switching on, and all diodes achieve zero-current switching off. First, operation modes in steady state are analyzed, and the mathematical equations for design component parameters are derived. Finally, a prototype circuit of 180 W rated power was built and tested. Experimental results show satisfactory performance of the proposed circuit.
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Gao, Shanshan, Yijie Wang, Yueshi Guan, and Dianguo Xu. "A High Step Up SEPIC-Based Converter Based on Partly Interleaved Transformer." IEEE Transactions on Industrial Electronics 67, no. 2 (2020): 1455–65. http://dx.doi.org/10.1109/tie.2019.2910044.

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R, Sreemallika, and Seyezhai R. "Investigation of Closed Loop Current Control Strategies for Bridgeless Interleaved Sepic Converter." Electrical and Electronics Engineering: An International Journal 3, no. 3 (2014): 63–70. http://dx.doi.org/10.14810/elelij.2014.3306.

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Dissertations / Theses on the topic "Interleaved SEPIC"

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Qin, Yaxiao. "High Efficiency SEPIC Converter For High Brightness Light Emitting Diodes (LEDs) System." Thesis, Virginia Tech, 2012. http://hdl.handle.net/10919/44422.

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This thesis presents an investigation into the characteristics of and driving methods for light emitting diode (LED) lamp system. A comprehensive overview on the lighting development is proposed. The characteristic of the light emitting diode (LED) lamp is described and the requirements of the ballast for the light emitting diode (LED) lamp are presented. Although LED lamps have longer lifetime than fluorescent lamps, the short lifetime limitation of LED driver imposed by electrolytic capacitor has to be resolved. Therefore, an LED driver without electrolytic capacitor in the whole power conversion process is preferred. In this thesis, a single phase, power factor correction converter without electrolytic capacitors for LED lighting applications is proposed, which is a modified SEPIC converter working in discontinuous conduction mode (DCM). Different with a conventional SEPIC converter, the middle capacitor is replaced with a valley-fill circuit. The valley-fill circuit could reduce the voltage stress of output diode and middle capacitor under the same power factor condition, thus achieving higher efficiency. Instead of using an electrolytic capacitor for the filter, a polyester capacitor of better lifetime expectancy is used. An interleaved power factor correction SEPIC with valley fill circuit is proposed to further increase the efficiency and to reduce the input and output filter size and cost. The interleaved converter shows the features such as ripple cancellation, good thermal distribution and scalability.<br>Master of Science
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Suarez, Buitrago Camilo Alexey [UNESP]. "Sistema de carregamento rápido de veículo elétrico puro." Universidade Estadual Paulista (UNESP), 2017. http://hdl.handle.net/11449/150572.

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Submitted by CAMILO ALEXEY SUAREZ BUITRAGO null (camiloalexey@gmail.com) on 2017-05-05T23:51:03Z No. of bitstreams: 1 CAMILO ALEXEY SUAREZ BUITRAGO.pdf: 4865572 bytes, checksum: e8593c9e425def26a441b4b919b9d371 (MD5)<br>Approved for entry into archive by Luiz Galeffi (luizgaleffi@gmail.com) on 2017-05-08T16:36:05Z (GMT) No. of bitstreams: 1 suarezbuitrago_ca_me_ilha.pdf: 4865572 bytes, checksum: e8593c9e425def26a441b4b919b9d371 (MD5)<br>Made available in DSpace on 2017-05-08T16:36:05Z (GMT). No. of bitstreams: 1 suarezbuitrago_ca_me_ilha.pdf: 4865572 bytes, checksum: e8593c9e425def26a441b4b919b9d371 (MD5) Previous issue date: 2017-03-13<br>Coordenação de Aperfeiçoamento de Pessoal de Nível Superior (CAPES)<br>Uma das principais dificuldades para a adoção dos veículos elétricos (VE) é o tempo de abastecimento (carregamento elétrico), considerado elevado quando comparado com o tempo requerido para abastecer um veículo com motor a combustão interna. O carregamento do VE típico de passageiros é geralmente realizado na residência do proprietário, ligando o carregador interno do VE em uma tomada convencional monofásica. Este método de carregamento é conhecido como de Corrente Alternada (CA), requer, tipicamente pelo menos 7 horas para fornecer uma carga completa. Por outro lado, o método de carregamento por Corrente Continua (CC) oferece tempos de carregamento entre 10 e 80 minutos. Contudo, para obter este nível de desempenho, são empregados carregadores externos de alta potência ligados de forma direta ao banco de baterias do VE. Devido ao custo e aos requerimentos de alimentação, estes carregadores rápidos são usados principalmente em aplicações públicas e comerciais. As pesquisas pelas melhores topologias a serem empregadas nos carregadores rápidos ainda são, neste ano de 2017 objeto de estudos em escala mundial. Neste contexto, este trabalho descreve a análise e implementação de um protótipo de carregador externo rápido para VE, o qual é composto por um retificador híbrido trifásico com correção ativa do fator de potência (Etapa CA-CC), seguido de um conversor tipo Buck entrelaçado (Etapa CC-CC). Na etapa CA-CC são impostas correntes de entrada senoidais, obtendo desta forma uma reduzida distorção harmônica total (DHT). Nesta etapa são empregados retificadores SEPIC comutados sob corrente nula (Zero Current Switching, ZCS) controlados por uma simples modulação por histerese, em paralelo com um retificador trifásico a diodos de seis pulsos. O estágio SEPIC processa apenas uma fração da potência total entregue pelo retificador híbrido, reduzindo deste modo os esforços de corrente dos semicondutores empregados, permitindo o uso desta topologia em elevados níveis de potência. Na etapa CC-CC o conversor Buck entrelaçado é controlado por modulação de largura de pulso (Pulse-Width Modulation, PWM), permitindo assim a implantação da técnica de carregamento por corrente constante e tensão constante (Constant Current-Constant Voltage, CC-CV), comumente empregada em baterias de íons de lítio e supercapacitores (SC). Como principal resultado foi obtido o carregamento de um banco de supercapacitores de 2,54 F, com corrente constante de 20 A, variando sua tensão de 180 V a 270 V com uma duração de 40 s, obtendo uma distorção harmônica total de 3,52% na corrente de entrada, ajustando-se ao padrão IEEE 2030.1.1-2015.<br>One of the main barriers against electric vehicle (EV) adoption is related to the battery recharging time, which is relatively high when compared to the time required to fill up a gasoline/diesel internal combustion engine vehicle. EV charging generally is done at home, using the on-board EV charger tied to conventional single phase power inlet, this charging method is known as Alternating Current (AC) and takes at least 7 hours to provide a full charge. On the other hand, the Direct Current (DC) method offers charging times from 1.2 hours to 10 minutes. However, to reach this performance, high power off-board chargers also known as fast-chargers (FC), directly charge the EV battery bank. Due to its cost and power supply requirements FC are used only in public or commercial applications. The researches for the best FC topologies are an active area of studies over the world. This work describes the analysis and implementation of an off-board electric vehicle (EV) Fast Charger prototype. It is composed by a three-phase hybrid rectifier with power factor correction (AC/DC stage), followed by an interleaved buck converter (DC/DC stage). At AC/DC stage, sinusoidal input phase currents are imposed, and consequently low Total Harmonic Distortion (THD) is obtained by the use of Zero Current Switching (ZCS) SEPIC rectifiers, applying a simple hysteresis control technique, in parallel with a conventional three-phase six pulses diode rectifier. The SEPIC converters manage only a fraction of the total power delivered by the hybrid rectifier, reducing the semiconductors current stresses, and allowing the use of this topology for high power levels. At DC/DC stage, the interleaved buck converter is controlled by Pulse Width Modulation (PWM), allowing Constant Current–Constant Voltage (CC-CV) charging technique, typically used for Lithium-ion (Li) batteries and Supercapacitors (SC). As main result of this implementation was obtained a charging process using constant a constant current of 20A over a supercapacitor bank of 2,54 F, raising its voltage from 180V to 270V in less than 40s, having a input phase current THD of 3,52%, fulfilling the requirements of IEEE 2030.1.1-2015 standard.
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Suarez, Buitrago Camilo Alexey. "Sistema de carregamento rápido de veículo elétrico puro /." Ilha Solteira, 2017. http://hdl.handle.net/11449/150572.

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Orientador: Carlos Alberto Canesin<br>Resumo: Uma das principais dificuldades para a adoção dos veículos elétricos (VE) é o tempo de abastecimento (carregamento elétrico), considerado elevado quando comparado com o tempo requerido para abastecer um veículo com motor a combustão interna. O carregamento do VE típico de passageiros é geralmente realizado na residência do proprietário, ligando o carregador interno do VE em uma tomada convencional monofásica. Este método de carregamento é conhecido como de Corrente Alternada (CA), requer, tipicamente pelo menos 7 horas para fornecer uma carga completa. Por outro lado, o método de carregamento por Corrente Continua (CC) oferece tempos de carregamento entre 10 e 80 minutos. Contudo, para obter este nível de desempenho, são empregados carregadores externos de alta potência ligados de forma direta ao banco de baterias do VE. Devido ao custo e aos requerimentos de alimentação, estes carregadores rápidos são usados principalmente em aplicações públicas e comerciais. As pesquisas pelas melhores topologias a serem empregadas nos carregadores rápidos ainda são, neste ano de 2017 objeto de estudos em escala mundial. Neste contexto, este trabalho descreve a análise e implementação de um protótipo de carregador externo rápido para VE, o qual é composto por um retificador híbrido trifásico com correção ativa do fator de potência (Etapa CA-CC), seguido de um conversor tipo Buck entrelaçado (Etapa CC-CC). Na etapa CA-CC são impostas correntes de entrada senoidais, obtendo desta forma uma r... (Resumo completo, clicar acesso eletrônico abaixo)<br>Mestre
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Chen, Jia-Bin, and 陳嘉斌. "Analysis and Design of Interleaved SEPIC AC-DC Converters." Thesis, 2008. http://ndltd.ncl.edu.tw/handle/88926731816033535884.

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碩士<br>國立成功大學<br>電機工程學系碩博士班<br>96<br>In this thesis, interleaved SEPIC ac-dc converters are analyzed and designed. Since the SEPIC converter provides a positive-polarity regulated output voltage with respect to the common terminal of the input voltage, the SEPIC converter applied as a power factor corrector become feasible. Interleaving control is achieved by the time-shift between two SEPIC converter to supply more power to the load. The topologies of typical and interleaved SEPIC are discussed, and the operating principles and design process are also studied in the thesis. Finally, a laboratory prototype of a 400 W interleaved SEPIC ac-dc converter is implemented to verify its feasibility and characteristics.
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Chen, Zong-Yi, and 陳宗毅. "Design and Implementation of Stand-alone Photovoltaic Interleaved SEPIC Charger." Thesis, 2011. http://ndltd.ncl.edu.tw/handle/41187697059468575149.

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碩士<br>中原大學<br>電機工程研究所<br>99<br>In this thesis, the design and implementation of a stand-alone photovoltaic interleaved SEPIC (Single-Ended Primary Inductance Converter) charger is studied. The system architecture includes a photovoltaic module, an interleaved SEPIC converter, a microcontroller, and a lead-acid battery. The SEPIC is a non-isolating DC-DC converter, and works as a major part of this stand-alone photovoltaic charger. The SEPIC has both step-down and step-up functions. Two SEPIC are interleaved operation, they are used in photovoltaic module to charge a lead-acid battery under constant voltage. The charger is controlled by a microcontroller. Furthermore, all the auxiliary powers needed to control circuit is provided by photovoltaic module itself.
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Hsieh, Hsiang-Yu, and 謝祥友. "The Design and Implementation of a Digital Interleaved SEPIC Power Factor Corrector." Thesis, 2015. http://ndltd.ncl.edu.tw/handle/23711016725178013487.

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碩士<br>大同大學<br>電機工程學系(所)<br>103<br>This thesis proposes a digital interleaved SEPIC power factor corrector based on microcontroller. First, the SEPIC topology is adopted as the main circuit to possess buck and boost function. Moreover, the microcontroller incorporated with interleaved switching to drive two parallel SEPIC to implement digital interleaved SEPIC power factor correction. In this thesis, we not only introduce the principle of SEPIC, analyze the operation mode of the proposed interleaved SEPIC, but also complete describe the design considerations of the system parameters. In addition, we also introduce how to design the peripheries of microcontroller, and details the program flow of the power factor correction. Finally, a 300W digital interleaved SEPIC power factor corrector is implemented to verify its feasibility by some experimental results.
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CHANG, YEH, and 張爗. "Fuzzy Voltage Compensator-Applied Adaptive Sliding- Mode PFC Controller for an Interleaved SEPIC Rectifier." Thesis, 2016. http://ndltd.ncl.edu.tw/handle/7cp7jg.

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碩士<br>國立東華大學<br>電機工程學系<br>104<br>The main objective of this thesis is to develop a fuzzy voltage compensator-integrated adaptive sliding-mode power-factor-correction (PFC) controller for an interleaved single-ended primary-inductor converter (SEPIC) rectifier. The setup of the interleaved SEPIC rectifier contains two SEPIC converters in parallel. Under this setup, a reduction of the current stress on the inductors and an increase of the output power capability can usually be achieved. Moreover, effectively to improve the efficiency of the rectifier, an integration of the fuzzy voltage compensator and the adaptive sliding-mode PFC current controller is applied. For experiment studies, implementation of the developed control algorithms in a DSP controller and the DSP-controlled interleaved SEPIC rectifier with load of an inverter-fed AC drive were carried out. From the developed rectifier, simulation and experimental results are illustrated to demonstrate the performance and validity in practical applications.
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Maddur, Chandrash Harsha Kumar. "Maximum power point tracking using ripple correlation control with an interleaved SEPIC converter for photovoltaic applications." Thesis, 2010. http://hdl.handle.net/2152/ETD-UT-2010-05-1166.

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This thesis examines the use of ripple correlation control as a maximum power point tracking algorithm with an interleaved SEPIC converter for use with a solar array. The suitability of existing topologies for use with photovoltaic applications and the tradeoffs involved are discussed. The advantages of interleaving in converters are examined and the benefits it provides to photovoltaic applications are discussed. An interleaved SEPIC converter operated in interleaved mode with a photovoltaic array is studied. The operation of ripple correlation control as a maximum power point tracking technique applied to the interleaved SEPIC converter is examined and simulations with results are presented.<br>text
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Book chapters on the topic "Interleaved SEPIC"

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Rajagopal, Sasikala, and R. Seyezhai. "Simulation and Analysis of Controllers for Bridgeless Interleaved AC–DC SEPIC PFC Converter." In Springer Proceedings in Energy. Springer Singapore, 2021. http://dx.doi.org/10.1007/978-981-16-0669-4_1.

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Lakshmi Praba, B., and R. Seyezhai. "Simulation and Hardware Implementation of Interleaved SEPIC Converter with Valley-Fill Circuit for HBLED System." In Lecture Notes in Mechanical Engineering. Springer Singapore, 2020. http://dx.doi.org/10.1007/978-981-15-4488-0_30.

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Conference papers on the topic "Interleaved SEPIC"

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Nader-Hernández, Andrés, Antonio Sánchez-Squella, Rolando Burgos, and Patricio Valdivia-Lefort. "Design and Control of Double Interleaved Isolated SEPIC for High Voltage Gain DC/DC Applications." In 2024 IEEE International Conference on Automation/XXVI Congress of the Chilean Association of Automatic Control (ICA-ACCA). IEEE, 2024. http://dx.doi.org/10.1109/ica-acca62622.2024.10766784.

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V, Kandasamy, Ramprabu J, Bharaneetharan S, Abishek P, and Pradeep J. "Enhancement of Electric Vehicle Battery Charging Systems Through the Integration of Interleaved Single-Ended Primary Inductor Converters (SEPIC) and Advanced Model Predictive Control (MPC)." In 2025 International Conference on Advances in Renewable Energy & Electric Vehicles (AREEV). IEEE, 2025. https://doi.org/10.1109/areev64307.2025.10925200.

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Bridi, Éder, Hamiltom Confortin Sartori, and e. José Renes Pinheiro. "Analysis of Input Current Ripple in Interleaved Boost Converters with PWM Modulation." In 2024 16th Seminar on Power Electronics and Control (SEPOC). IEEE, 2024. http://dx.doi.org/10.1109/sepoc63090.2024.10747445.

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Heydt, Rafael D., Leandro L. O. Carralero, and Stefânia De O. Silva. "Microinverter Topology using Isolated Interleaved Boost with 3-Level T-Type Inverter." In 2024 16th Seminar on Power Electronics and Control (SEPOC). IEEE, 2024. http://dx.doi.org/10.1109/sepoc63090.2024.10747462.

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Tran, Thien-Dung, Honnyong Cha, Viet-Chan Nguyen, Van-Dai Bui, and Juyeong Park. "Boost-SEPIC Interleaved PFC Converter." In 2023 11th International Conference on Power Electronics and ECCE Asia (ICPE 2023 - ECCE Asia). IEEE, 2023. http://dx.doi.org/10.23919/icpe2023-ecceasia54778.2023.10213797.

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Bor-Ren Lin, Po-Li Chen, and Jyun-Ji Chen. "Interleaved sepic converter with low switching loss." In 2010 IEEE Region 10 Conference (TENCON 2010). IEEE, 2010. http://dx.doi.org/10.1109/tencon.2010.5685946.

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Park, Juyeong, and Honnyong Cha. "Boost-SEPIC Interleaved Converter with Integrated Magnetics." In 2023 11th International Conference on Power Electronics and ECCE Asia (ICPE 2023 - ECCE Asia). IEEE, 2023. http://dx.doi.org/10.23919/icpe2023-ecceasia54778.2023.10213748.

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Kovacevic, Milovan, Arnold Knott, and Michael A. E. Andersen. "Very high frequency interleaved self-oscillating resonant SEPIC converter." In 2013 15th European Conference on Power Electronics and Applications (EPE). IEEE, 2013. http://dx.doi.org/10.1109/epe.2013.6634490.

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Kollati, Sivaprasad, D. Ravi Kishore, Kondragunta Mounika, My Sai Bhaskara Rama Veera Ajay, and Oruganti Naga Neela Mani Krishna. "Firefly Optimized Interleaved Sepic Converter for EV Charging Applications." In 2024 1st International Conference on Innovative Sustainable Technologies for Energy, Mechatronics, and Smart Systems (ISTEMS). IEEE, 2024. http://dx.doi.org/10.1109/istems60181.2024.10560235.

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Zahedi, Neda, Sama Salehi, and Seyed Hossein Hosseini. "An interleaved structure of sepic converter with lower current ripple." In 2018 9th Annual Power Electronics, Drives Systems and Technologies Conference (PEDSTC). IEEE, 2018. http://dx.doi.org/10.1109/pedstc.2018.8343846.

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