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Journal articles on the topic 'Irregular applications'

Author: Grafiati

Published: 4 June 2021

Last updated: 15 February 2022

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1

Chassin de Kergommeaux, J., P. J. Hatcher, and L. Rauchwerger. "Parallel computing for irregular applications." Parallel Computing 26, no. 13-14 (2000): 1681–84. http://dx.doi.org/10.1016/s0167-8191(00)00050-8.

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2

Gutiérrez, E., R. Asenjo, O. Plata, and E. L. Zapata. "Automatic parallelization of irregular applications." Parallel Computing 26, no. 13-14 (2000): 1709–38. http://dx.doi.org/10.1016/s0167-8191(00)00052-1.

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3

Yelick, Katherine A. "Programming models for irregular applications." ACM SIGPLAN Notices 28, no. 1 (1993): 28–31. http://dx.doi.org/10.1145/156668.156680.

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4

Halstead, Robert J., Jason Villarreal, and Walid A. Najjar. "Compiling irregular applications for reconfigurable systems." International Journal of High Performance Computing and Networking 7, no. 4 (2014): 258. http://dx.doi.org/10.1504/ijhpcn.2014.062725.

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5

Benkner, Siegfried. "Optimizing irregular HPF applications using halos." Concurrency: Practice and Experience 12, no. 2-3 (2000): 137–55. http://dx.doi.org/10.1002/(sici)1096-9128(200002/03)12:2/3<137::aid-cpe468>3.0.co;2-d.

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6

Pedrero, Manuel, Eladio Gutierrez, Sergio Romero, and Oscar Plata. "Improving Transactional Memory Performance for Irregular Applications." Procedia Computer Science 51 (2015): 2714–18. http://dx.doi.org/10.1016/j.procs.2015.05.398.

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7

Qian, Hao, Yangdong Deng, Bo Wang, and Shuai Mu. "Towards accelerating irregular EDA applications with GPUs." Integration 45, no. 1 (2012): 46–60. http://dx.doi.org/10.1016/j.vlsi.2011.05.004.

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8

Paudel, Jeeva, and José Nelson Amaral. "Hybrid parallel task placement in irregular applications." Journal of Parallel and Distributed Computing 76 (February 2015): 94–105. http://dx.doi.org/10.1016/j.jpdc.2014.09.014.

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9

Pedrero, Manuel, Eladio Gutierrez, Sergio Romero, and Oscar Plata. "ReduxSTM: Optimizing STM designs for Irregular Applications." Journal of Parallel and Distributed Computing 107 (September 2017): 114–33. http://dx.doi.org/10.1016/j.jpdc.2017.04.009.

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10

Zhang, Tao, Guangshuo Chen, Wei Shu, and Min-You Wu. "Microarchitectural characterization of irregular applications on GPGPUs." ACM SIGMETRICS Performance Evaluation Review 42, no. 2 (2014): 27–29. http://dx.doi.org/10.1145/2667522.2667530.

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11

Ribeiro, Roberto, João Barbosa, and Luís Paulo Santos. "A Framework for Efficient Execution of Data Parallel Irregular Applications on Heterogeneous Systems." Parallel Processing Letters 25, no. 02 (2015): 1550004. http://dx.doi.org/10.1142/s0129626415500048.

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Exploiting the computing power of the diversity of resources available on heterogeneous systems is mandatory but a very challenging task. The diversity of architectures, execution models and programming tools, together with disjoint address spaces and different computing capabilities, raise a number of challenges that severely impact on application performance and programming productivity. This problem is further compounded in the presence of data parallel irregular applications. This paper presents a framework that addresses development and execution of data parallel irregular applications in

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12

Kulkarni, Milind, Martin Burtscher, Rajeshkar Inkulu, Keshav Pingali, and Calin Casçaval. "How much parallelism is there in irregular applications?" ACM SIGPLAN Notices 44, no. 4 (2009): 3–14. http://dx.doi.org/10.1145/1594835.1504181.

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13

Decker, Thomas. "Virtual data space – load balancing for irregular applications." Parallel Computing 26, no. 13-14 (2000): 1825–60. http://dx.doi.org/10.1016/s0167-8191(00)00061-2.

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14

Kreaseck, Barbara, Dean Tullsen, and Brad Calder. "Limits of task-based parallelism in irregular applications." ACM SIGARCH Computer Architecture News 28, no. 1 (2000): 20. http://dx.doi.org/10.1145/346023.346034.

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15

Zhang, Zheng, and Josep Torrellas. "Speeding up irregular applications in shared-memory multiprocessors." ACM SIGARCH Computer Architecture News 23, no. 2 (1995): 188–99. http://dx.doi.org/10.1145/225830.224423.

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16

Ferreira, Afonso, and José Rolim. "Special Issue on Irregular Problems in Supercomputing Applications." Journal of Parallel and Distributed Computing 50, no. 1-2 (1998): 1–2. http://dx.doi.org/10.1006/jpdc.1998.1444.

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17

Li, Zhaoshi, Leibo Liu, Yangdong Deng, Shouyi Yin, Yao Wang, and Shaojun Wei. "Aggressive Pipelining of Irregular Applications on Reconfigurable Hardware." ACM SIGARCH Computer Architecture News 45, no. 2 (2017): 575–86. http://dx.doi.org/10.1145/3140659.3080228.

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18

Kao, Chih-Chen, and Wei-Chung Hsu. "An Adaptive Heterogeneous Runtime Framework for Irregular Applications." Journal of Signal Processing Systems 80, no. 3 (2014): 245–59. http://dx.doi.org/10.1007/s11265-014-0916-x.

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19

Sun, Rui, Washington Ochieng, Cheng Fang, and Shaojun Feng. "A New Algorithm for Lane Level Irregular Driving Identification." Journal of Navigation 68, no. 6 (2015): 1173–94. http://dx.doi.org/10.1017/s0373463315000491.

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Global Navigation Satellite Systems (GNSS) are used widely in the provision of Intelligent Transportation System (ITS) services. Today, there is an increasing demand on GNSS to support applications at lane level. These applications required at lane level include lane control, collision avoidance and intelligent speed assistance. In lane control, detecting irregular driving behaviour within the lane is a basic requirement for safety related lane level applications. There are two major issues involved in lane level irregular driving identification: access to high accuracy positioning and vehicle

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20

Kohn, Scott R., and Scott B. Baden. "Irregular Coarse-Grain Data Parallelism under LPARX." Scientific Programming 5, no. 3 (1996): 185–201. http://dx.doi.org/10.1155/1996/701628.

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LPARX is a software development tool for implementing dynamic, irregular scientific applications, such as multilevel finite difference and particle methods, on high-performance multiple instruction multiple data (MIMD) parallel architectures. It supports coarse-grain data parallelism and gives the application complete control over specifying arbitrary block decompositions. LPARX provides structural abstraction, representing data decompositions as first-class objects that can be manipulated and modified at runtime. LPARX, implemented as a C++ class library, is currently running on diverse MIMD

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21

Baetens, Jan M., and Bernard De Baets. "Cellular automata on irregular tessellations." Dynamical Systems 27, no. 4 (2012): 411–30. http://dx.doi.org/10.1080/14689367.2012.711300.

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22

Biswas, Rupak, Sajal K. Das, Daniel J. Harvey, and Leonid Oliker. "Parallel dynamic load balancing strategies for adaptive irregular applications." Applied Mathematical Modelling 25, no. 2 (2000): 109–22. http://dx.doi.org/10.1016/s0307-904x(00)00040-8.

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23

Tumeo, Antonino, Simone Secchi, and Oreste Villa. "Designing Next-Generation Massively Multithreaded Architectures for Irregular Applications." Computer 45, no. 8 (2012): 53–61. http://dx.doi.org/10.1109/mc.2012.193.

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24

Tumeo, Antonino, and John Feo. "Irregular Applications: From Architectures to Algorithms [Guest editors' introduction]." Computer 48, no. 8 (2015): 14–16. http://dx.doi.org/10.1109/mc.2015.233.

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25

Leidel, John D., Xi Wang, Brody Williams, and Yong Chen. "Toward a Microarchitecture for Efficient Execution of Irregular Applications." ACM Transactions on Parallel Computing 7, no. 4 (2020): 1–24. http://dx.doi.org/10.1145/3418082.

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26

Fink, Stephen J., Scott B. Baden, and Scott R. Kohn. "Efficient Run-Time Support for Irregular Block-Structured Applications." Journal of Parallel and Distributed Computing 50, no. 1-2 (1998): 61–82. http://dx.doi.org/10.1006/jpdc.1998.1437.

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27

Mukherjee, Shubhendu S., Shamik D. Sharma, Mark D. Hill, James R. Larus, Anne Rogers, and Joel Saltz. "Efficient support for irregular applications on distributed-memory machines." ACM SIGPLAN Notices 30, no. 8 (1995): 68–79. http://dx.doi.org/10.1145/209937.209945.

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28

Paillet, Frederick L. "Borehole flowmeter applications in irregular and large-diameter boreholes." Journal of Applied Geophysics 55, no. 1-2 (2004): 39–59. http://dx.doi.org/10.1016/j.jappgeo.2003.06.004.

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29

Liu, Yujie, and Jeffrey M. Falzarano. "Irregular frequency removal methods: theory and applications in hydrodynamics." Marine Systems & Ocean Technology 12, no. 2 (2017): 49–64. http://dx.doi.org/10.1007/s40868-017-0023-5.

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30

Maunder, R., and L. Hanzo. "Near-capacity irregular variable length coding and irregular unity rate coding." IEEE Transactions on Wireless Communications 8, no. 11 (2009): 5500–5507. http://dx.doi.org/10.1109/twc.2009.070624.

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31

Evans, W., D. Kirkpatrick, and G. Townsend. "Right-Triangulated Irregular Networks." Algorithmica 30, no. 2 (2001): 264–86. http://dx.doi.org/10.1007/s00453-001-0006-x.

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32

Kirmani, Shad, Jeonghyung Park, and Padma Raghavan. "An embedded sectioning scheme for multiprocessor topology-aware mapping of irregular applications." International Journal of High Performance Computing Applications 31, no. 1 (2016): 91–103. http://dx.doi.org/10.1177/1094342015597082.

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We consider the problem of mapping irregular applications to multiprocessor architectures whose interconnect topologies affect the latencies of data movement across processor nodes. The starting point for solutions to this problem concerns suitable weighted graph representations of an irregular application and a processor topology. Prior results for this problem have demonstrated that graph partitioning approaches can provide high-quality solutions. Additionally, when coordinate information is available for the weighted graph of the application, the geometric mapping schemes can also provide h

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33

Rahami, H., A. Kaveh, I. Shojaei, and Y. Gholipour. "Analysis of Irregular Structures Composed of Regular and Irregular Parts Using Graph Products." Journal of Computing in Civil Engineering 28, no. 4 (2014): 04014016. http://dx.doi.org/10.1061/(asce)cp.1943-5487.0000375.

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34

Coole, James, and Greg Stitt. "Traversal Caches: A Framework for FPGA Acceleration of Pointer Data Structures." International Journal of Reconfigurable Computing 2010 (2010): 1–16. http://dx.doi.org/10.1155/2010/652620.

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Field-programmable gate arrays (FPGAs) and other reconfigurable computing (RC) devices have been widely shown to have numerous advantages including order of magnitude performance and power improvements compared to microprocessors for some applications. Unfortunately, FPGA usage has largely been limited to applications exhibiting sequential memory access patterns, thereby prohibiting acceleration of important applications with irregular patterns (e.g., pointer-based data structures). In this paper, we present a design pattern for RC application development that serializes irregular data structu

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35

Lynch, James D. "The Galton-Watson process revisited: some martingale relationships and applications." Journal of Applied Probability 37, no. 02 (2000): 322–28. http://dx.doi.org/10.1017/s0021900200015540.

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A martingale is used to study extinction probabilities of the Galton-Watson process using a stopping time argument. This same martingale defines a martingale function in its arguments; consequently, its derivative is also a martingale. The argumentscan be classified as regular or irregular and this classification dictates very different behavior of the Galton-Watson process. For example, it is shown that irregularity of a pointsis equivalent to the derivative martingale sequence atsbeing closable, (i.e., it has limit which, when attached to the original sequence, the martingale structure is re

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36

Romão, E. C., J. B. Aparecido, J. B. Campos-Silva, and L. F. M. Moura. "HEAT TRANSFER IN MULTI-CONNECTED AND IRREGULAR DOMAINS WITH NON-UNIFORM MESHES." Revista de Engenharia Térmica 7, no. 2 (2008): 44. http://dx.doi.org/10.5380/reterm.v7i2.61773.

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In this work is presented a numerical solution for temperature profile in two-dimensional diffusion inside irregular multi-connected geometry. The special discretization has been done by two variants of the finite Element Method: Galerkin Finite Element Method (GFEM) and Least Squares Finite Element Method (LSFEM). Three applications are presented. The first for a regular double connected domain; the second for a regular multi-connected domain and the third application for an irregular multi-connected domain. In all applications are considered Dirichlet boundary conditions. The results obtaine

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37

Blochinger, Wolfgang, Michael Kaufmann, and Martin Siebenhaller. "Visualization Aided Performance Tuning of Irregular Task-Parallel Computations." Information Visualization 5, no. 2 (2006): 81–94. http://dx.doi.org/10.1057/palgrave.ivs.9500123.

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This paper deals with a visualization-based approach to performance analyzing and tuning of highly irregular task-parallel applications. At its core lies a novel automatic layout algorithm for execution graphs which is based on Sugiyama's framework. Our visualization enables the application designer to reliably detect manifestations of parallel overhead and to investigate on their individual root causes. We particularly focus on structural properties of task-parallel computations which are hard to detect in a more analytical way, for example, false sharing and false parallelism. In addition, w

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38

Prins, Jan F., Siddhartha Chatterjee, and Martin Simons. "Irregular Computations in Fortran – Expression and Implementation Strategies." Scientific Programming 7, no. 3-4 (1999): 313–26. http://dx.doi.org/10.1155/1999/607659.

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Modern dialects of Fortran enjoy wide use and good support on high‐performance computers as performance‐oriented programming languages. By providing the ability to express nested data parallelism, modern Fortran dialects enable irregular computations to be incorporated into existing applications with minimal rewriting and without sacrificing performance within the regular portions of the application. Since performance of nested data‐parallel computation is unpredictable and often poor using current compilers, we investigatethreadingandflattening, two source‐to‐source transformation techniques

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39

Lynch, James D. "The Galton-Watson process revisited: some martingale relationships and applications." Journal of Applied Probability 37, no. 2 (2000): 322–28. http://dx.doi.org/10.1239/jap/1014842539.

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A martingale is used to study extinction probabilities of the Galton-Watson process using a stopping time argument. This same martingale defines a martingale function in its argument s; consequently, its derivative is also a martingale. The argument s can be classified as regular or irregular and this classification dictates very different behavior of the Galton-Watson process. For example, it is shown that irregularity of a point s is equivalent to the derivative martingale sequence at s being closable, (i.e., it has limit which, when attached to the original sequence, the martingale structur

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40

Zope, Anup, and Edward Luke. "A Shared Memory Parallel Block Streaming Model for Irregular Applications." International Journal of Networking and Computing 9, no. 1 (2019): 70–96. http://dx.doi.org/10.15803/ijnc.9.1_70.

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41

Vilches, Antonio, Rafael Asenjo, Angeles Navarro, Francisco Corbera, Rub́en Gran, and María Garzarán. "Adaptive Partitioning for Irregular Applications on Heterogeneous CPU-GPU Chips." Procedia Computer Science 51 (2015): 140–49. http://dx.doi.org/10.1016/j.procs.2015.05.213.

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42

Lu, Honghui, Alan L. Cox, Sandhya Dwarkadas, Ramakrishnan Rajamony, and Willy Zwaenepoel. "Compiler and software distributed shared memory support for irregular applications." ACM SIGPLAN Notices 32, no. 7 (1997): 48–56. http://dx.doi.org/10.1145/263767.263772.

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43

Tumeo, Antonino, John Feo, and Oreste Villa. "Special Issue on Theory and Practice of Irregular Applications (TaPIA)." Parallel Computing 59 (November 2016): 21–23. http://dx.doi.org/10.1016/j.parco.2016.10.005.

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44

Codrescu, L., D. S. Wills, and J. Meindl. "Architecture of the Atlas chip-multiprocessor: dynamically parallelizing irregular applications." IEEE Transactions on Computers 50, no. 1 (2001): 67–82. http://dx.doi.org/10.1109/12.902753.

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45

Cao, Qian, Yuan Yu, Huiyong Li, Min Zuo, and Yun Deng. "An Adaptive Task Creation Pruning Strategy for Optimizing Irregular Applications." Chinese Journal of Electronics 24, no. 3 (2015): 535–41. http://dx.doi.org/10.1049/cje.2015.07.017.

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46

Onyejekwe, Okey Oseloka. "Adaptive body-fitted finite difference applications on an irregular domain." Applied Mathematics Letters 4, no. 1 (1991): 1–3. http://dx.doi.org/10.1016/0893-9659(91)90110-h.

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47

Wu, Jingjin, Xuanxing Xiong, Eduardo Berrocal, Jia Wang, and Zhiling Lan. "Topology mapping of irregular parallel applications on torus-connected supercomputers." Journal of Supercomputing 73, no. 4 (2016): 1691–714. http://dx.doi.org/10.1007/s11227-016-1876-7.

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48

Li, Jing, Lei Liu, Yuan Wu, Xiaobing Feng, and Chengyong Wu. "Two-Level Task Scheduling for Irregular Applications on GPU Platform." International Journal of Parallel Programming 45, no. 1 (2015): 79–93. http://dx.doi.org/10.1007/s10766-015-0387-0.

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49

Zhu, Xiu Ge, and Guo Chang Wu. "A Sufficient Condition for Irregular Shearlet Frame." Applied Mechanics and Materials 204-208 (October 2012): 774–77. http://dx.doi.org/10.4028/www.scientific.net/amm.204-208.774.

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Frame theory plays an important role in signal processing and image processing. The shearlets provide optimally space representations for 2D functions that are smooth away from discontinuities along C^2 curves. In the note, a new sufficient condition for irregular shearlet frames is presented. This provides a theoretical foundation for the applications of shearlets in the engineering.

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50

Czarnul, Paweł. "Assessment of OpenMP Master–Slave Implementations for Selected Irregular Parallel Applications." Electronics 10, no. 10 (2021): 1188. http://dx.doi.org/10.3390/electronics10101188.

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The paper investigates various implementations of a master–slave paradigm using the popular OpenMP API and relative performance of the former using modern multi-core workstation CPUs. It is assumed that a master partitions available input into a batch of predefined number of data chunks which are then processed in parallel by a set of slaves and the procedure is repeated until all input data has been processed. The paper experimentally assesses performance of six implementations using OpenMP locks, the tasking construct, dynamically partitioned for loop, without and with overlapping merging re

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