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Relevant bibliographies by topics / Junction Field-Effect Transistor(JFET)

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Academic literature on the topic 'Junction Field-Effect Transistor(JFET)'

Author: Grafiati

Published: 4 June 2021

Last updated: 13 February 2022

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Journal articles on the topic "Junction Field-Effect Transistor(JFET)"

1

Marcoux, J., J. Orchard-Webb, and J. F. Currie. "Complementary metal oxide semiconductor-compatible junction field-effect transistor characterization." Canadian Journal of Physics 65, no. 8 (1987): 982–86. http://dx.doi.org/10.1139/p87-156.

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We report on the fabrication and electrical characterization of a vertical junction-gate field-effect transistor (JFET) that is compatible with all complementary metal oxide semiconductor (CMOS) technologies. It can be used as a buried load for an enhancement n-channel metal oxide semiconductor field-effect transistor (n-MOSFET), replacing the p-MOSFET within the standard CMOS inverter configuration and resulting in a 40% net area economy in standard cells. To be entirely CMOS process compatible, this JFET device differs from others in the literature in that dopant concentrations in the n subs

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Bargieł, Kamil, Damian Bisewski, and Janusz Zarębski. "Modelling of Dynamic Properties of Silicon Carbide Junction Field-Effect Transistors (JFETs)." Energies 13, no. 1 (2020): 187. http://dx.doi.org/10.3390/en13010187.

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The paper deals with the problem of modelling and analyzing the dynamic properties of a Junction Field Effect Transistor (JFET) made of silicon carbide. An examination of the usefulness of the built-in JFET Simulation Program with Integrated Circuit Emphasis (SPICE) model was performed. A modified model of silicon carbide JFET was proposed to increase modelling accuracy. An evaluation of the accuracy of the modified model was performed by comparison of the measured and calculated capacitance–voltage characteristics as well as the switching characteristics of JFETs.

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BLALOCK, BENJAMIN J., SORIN CRISTOLOVEANU, BRIAN M. DUFRENE, F. ALLIBERT, and MOHAMMAD M. MOJARRADI. "THE MULTIPLE-GATE MOS-JFET TRANSISTOR." International Journal of High Speed Electronics and Systems 12, no. 02 (2002): 511–20. http://dx.doi.org/10.1142/s0129156402001423.

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A new SOI device, the MOS-JFET, has been developed that combines two different transistors, JFET and MOSFET, superimposed in a single silicon island so that they share the same body. A unique attribute of the MOS-JFET is that it can be viewed as a four gate transistor (two side junction-based gates, the top MOS gate, and the back gate activated by SOI substrate biasing). Each of these four gates can control the conduction characteristics of the transistor. This novel transistor's multiple gate inputs give rise to exciting circuit opportunities for analog, RF, mixed-signal, and digital applicat

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Ehiagwina, Frederick Ojiemhende, Olufemi Oluseye Kehinde, Lateef Olashile Afolabi, Hassan Jimoh Onawola, and Nurudeen Ajibola Iromini. "Applications, Prospects and Challenges of Silicon Carbide Junction Field Effect Transistor (SIC JFET)." International Journal of Advances in Telecommunications, Electrotechnics, Signals and Systems 5, no. 3 (2016): 133. http://dx.doi.org/10.11601/ijates.v5i3.168.

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Properties of Silicon Carbide Junction Field Effect Transistor (SiC JFET) such as high switching speed, low forward voltage drop and high temperature operation have attracted the interest of power electronic researchers and technologists, who for many years developed devices based on Silicon (Si). A number of power system Engineers have made efforts to develop more robust equipment including circuits or modules with higher power density. However, it was realized that several available power semiconductor devices were approaching theoretical limits offered by Si material with respect to capabil

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Casady, J. B., D. C. Sheridan, A. Ritenour, V. Bondarenko, and R. Kelley. "High Temperature Performance of Normally-off SiC JFET's Compared to Competing Approaches." Additional Conferences (Device Packaging, HiTEC, HiTEN, and CICMT) 2010, HITEC (2010): 000152–59. http://dx.doi.org/10.4071/hitec-jcasady-tp23.

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Normally-off Silicon Carbide (SiC) power Junction Field Effect Transistors (JFETs) were compared with competing power transistor technology at temperatures from 25 °C to 150 °C as limited by the packaging. Switching energies were measured from 1200 V, 125 mΩ and 50 mΩ (room temperature) rated SiC power JFETs and compared with 900 V silicon (Si) super-junction Metal Oxide Semiconductors (MOSFETs) and 1200 V Si Insulated Gate Bipolar Transistors (IGBTs). For both comparisons, measured performance for the SiC power JFET was advantageous at all temperatures when switching at 50 kHz, including a to

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Lee, Hyeyoung, Jin-A. Jeon, Jinyong Kim, et al. "Measurement of Switching Performance of Pixelated Silicon Sensor Integrated with Field Effect Transistor." Sensors 19, no. 24 (2019): 5580. http://dx.doi.org/10.3390/s19245580.

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Silicon shows very high detection efficiency for low-energy photons, and the silicon pixel sensor provides high spatial resolution. Pixelated silicon sensors facilitate the direct detection of low-energy X-ray radiation. In this study, we developed junction field effect transistors (JFETs) that can be integrated into a pixelated silicon sensor to effectively handle many signal readout channels due to the pixelated structure without any change in the sensor resolution; this capability of the integrated system arises from the pixelated structure of the sensor. We focused on optimizing the JFET’s

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Chaw, Chaw Su Nandar Hlaing, and Thiri Nwe. "Analysis on Band Layer Design and J-V characteristics of Zinc Oxide Based Junction Field Effect Transistor." Journal La Multiapp 1, no. 2 (2020): 14–21. http://dx.doi.org/10.37899/journallamultiapp.v1i2.108.

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This paper presents the band gap design and J-V characteristic curve of Zinc Oxide (ZnO) based on Junction Field Effect Transistor (JFET). The physical properties for analysis of semiconductor field effect transistor play a vital role in semiconductor measurements to obtain the high-performance devices. The main objective of this research is to design and analyse the band diagram design of semiconductor materials which are used for high performance junction field effect transistor. In this paper, the fundamental theory of semiconductors, the electrical properties analysis and bandgap design of

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Perez, S., A. M. Francis, J. Holmes, and T. Vrotsos. "Silicon Carbide Junction Field Effect Transistor Compact Model for Extreme Environment Integrated Circuit Design." Additional Conferences (Device Packaging, HiTEC, HiTEN, and CICMT) 2021, HiTEC (2021): 000118–22. http://dx.doi.org/10.4071/2380-4491.2021.hitec.000118.

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Abstract Presented is a temperature and geometry scalable 800°C Silicon Carbide (SiC) Junction Field Effect Transistor (JFET) compact device model designed to simulate the small signal effects of the SiC JFET-R process developed by NASA Glenn Research Center. With the JFET-R process pushing the temperature limits of integrated circuits, a high-fidelity device model capable of predicting the performance over temperature and geometry is required to realize the thermal ruggedness this process provides. A high temperature (HT) packaging system was utilized to characterize a SiC JFET device up to 8

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Kaneko, Mitsuaki, Ulrike Grossner, and Tsunenobu Kimoto. "SiC Vertical-Channel n- and p-JFETs Fully Fabricated by Ion Implantation." Materials Science Forum 963 (July 2019): 841–44. http://dx.doi.org/10.4028/www.scientific.net/msf.963.841.

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Silicon carbide (SiC) n-and p-channel junction field effect transistors (JFETs) with vertical channels were fabricated by direct ion implantation into a high-purity semi-insulating 4H-SiC substrate in order to further develop the path towards complementary JFET integrated circuits for applications in harsh environments. Compared with the conventional structure (lateral channel), the proposed structure is suitable for integration and inherently has a high transconductance owing to the double-gate configuration. The threshold voltage (Vth) can be controlled by mask design, while Vth in the conve

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Casady, Jeff B., David C. Sheridan, Robin L. Kelley, Volodymyr Bondarenko, and Andrew Ritenour. "A Comparison of 1200 V Normally-OFF & Normally-on Vertical Trench SiC Power JFET Devices." Materials Science Forum 679-680 (March 2011): 641–44. http://dx.doi.org/10.4028/www.scientific.net/msf.679-680.641.

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Equivalent sized (4.5 mm2 die area), 1200 V, 4H-SiC, vertical trench Junction Field Effect Transistors (JFETs) were characterized in terms of DC and switching performance. The 100 mΩ Enhancement-Mode (EM) JFET was found to have natural advantages in safe operation being normally-off, whereas the Depletion-Mode (DM) JFET was found to have advantages with ~ twice as high saturation current, less on-resistance (85 mΩ) and no gate current required in the on-state. The JFETs were found to both have radically less (five to ten times) switching energies than corresponding 1200 V Si transistors, with

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Dissertations / Theses on the topic "Junction Field-Effect Transistor(JFET)"

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Ding, Hao. "FOUR TERMINAL JUNCTION FIELD-EFFECT TRANSISTOR MODEL FOR COMPUTER-AIDED DESIGN." Doctoral diss., University of Central Florida, 2007. http://digital.library.ucf.edu/cdm/ref/collection/ETD/id/3129.

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A compact model for four-terminal (independent top and bottom gates) junction field-effect transistor (JFET) is presented in this dissertation. The model describes the steady-state characteristics with a unified equation for all bias conditions that provides a high degree of accuracy and continuity of conductance, which are important for predictive analog circuit simulations. It also includes capacitance and leakage equations. A special capacitance drop-off phenomenon at the pinch-off region is studies and modeled. The operations of the junction fieldeffect transistor (JFET) with an oxide top-

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Wake, D. "The development of an indium gallium arsenide junction field effect transistor for use in optical receivers." Thesis, University of Surrey, 1987. http://epubs.surrey.ac.uk/843424/.

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The objective of this work was to design and develop a high performance field effect transistor to be suitable for monolithic integration with a photodetector for use in long wavelength optical communication systems. It was decided that the most promising type of device for this application was a junction field effect transistor (JFET), fabricated using the alloy In.53Ga.47As grown epitaxially onto an InP substrate. The requirements for such a device were that it should have high transconductance, low input capacitance, and low gate leakage current (for high receiver sensitivity), and that it

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Song, Shiunn Luen Steven 1960. "Characterization and design of the complementary JFET LAMBDA-DIODE SRAM." Thesis, The University of Arizona, 1988. http://hdl.handle.net/10150/276882.

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The LAMBDA-DIODE was invented in integrated-circuit form in 1974. There was a proposal about this device's application in memory circuits at that time. This thesis is to evaluate the circuit performance of the COMPLEMENTARY JFET LAMBDA-DIODE SRAM. It investigates the speed, power consumption and chip area of this circuit compared with the JFET CROSS COUPLED SRAM by using SPICE and breadboard simulation techniques. The results show positive signs of the Λ-DIODE's feasibility for use in VLSI static memory circuits from the chip area aspect if the parasitic capacitance of the JFET device could be

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Hamieh, Youness. "Caractérisation et modélisation du transistor JFET en SiC à haute température." Phd thesis, INSA de Lyon, 2011. http://tel.archives-ouvertes.fr/tel-00665817.

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Dans le domaine de l'électronique de puissance, les dispositifs en carbure de silicium (SiC) sont bien adaptés pour fonctionner dans des environnements à haute température, haute puissance, haute tension et haute radiation. Le carbure de silicium (SiC) est un matériau semi-conducteur à large bande d'énergie interdite. Ce matériau possède des caractéristiques en température et une tenue aux champs électriques bien supérieure à celles de silicium. Ces caractéristiques permettent des améliorations significatives dans une grande variété d'applications et de systèmes. Parmi les interrupteurs exista

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Laariedh, Farah. "Technologie d’intégration monolithique des JFET latéraux." Thesis, Lyon, INSA, 2013. http://www.theses.fr/2013ISAL0031/document.

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Le carbure de silicium (SiC) est un semi-conducteur à large bande d’énergie interdite, remarquable par ses propriétés physiques situées à mi-chemin entre le silicium et le diamant. Ceci suscite actuellement un fort intérêt industriel pour son utilisation dans la fabrication de composants susceptibles de fonctionner dans des conditions extrêmes : forte puissance et haute température. Les travaux de thèse se sont focalisés sur la levée de verrous technologiques pour réaliser des composants latéraux de type JFET (Junction Field Effect Transistor) et les intégrer monolithiquement dans des substrat

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Granier, André. "Etude et réalisation d'un transistor JFET vertical silicium et son évaluation en hyperfréquence." Grenoble 1, 1993. http://www.theses.fr/1993GRE10146.

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Cette etude presente la realisation d'un transistor a effet de champ vertical a jonction (jfet) compatible avec la technologie cmos du centre national d'etudes des telecommunications de meylan. Dans un premier temps, la structure du composant est presentee: elle est derivee de celle du transistor pmos et utilise un caisson de phosphore implante a haute energie en tant que drain et un siliciure de titane autoaligne. Nous decrivons les procedures et les outils de caracterisation mis en jeu. La physique du dispositif est apprehendee. Nous analysons l'observation d'un courant de grille et de subst

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Guédon, Florent Dominique. "Power converters with normally-on SiC JFETs." Thesis, University of Cambridge, 2012. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.610394.

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Falahi, Khalil El. "Contribution à la conception de driver en technologie CMOS SOI pour la commande de transistors JFET SiC pour un environnement de haute température." Thesis, Lyon, INSA, 2012. http://www.theses.fr/2012ISAL0056/document.

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Dans le domaine aéronautique, les systèmes électriques remplacement progressivement les systèmes de contrôle mécaniques ou hydrauliques. Les bénéfices immédiats sont la réduction de la masse embarquée et des performances accrues à condition que l’électronique supporte l’absence de système de refroidissement. Si la haute température de fonctionnement n’empêche pas d’atteindre une fiabilité suffisante, il y aura réduction des coûts opérationnels. Des étapes clefs ont été franchies en introduisant des systèmes à commande électriques dans les aéronefs en lieu et place de systèmes conventionnels :

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Sadik, Diane-Perle. "On Reliability of SiC Power Devices in Power Electronics." Doctoral thesis, KTH, Elkraftteknik, 2017. http://urn.kb.se/resolve?urn=urn:nbn:se:kth:diva-207763.

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Silicon Carbide (SiC) is a wide-bandgap (WBG) semiconductor materialwhich has several advantages such as higher maximum electric field, lowerON-state resistance, higher switching speeds, and higher maximum allowablejunction operation temperature compared to Silicon (Si). In the 1.2 kV - 1.7kV voltage range, power devices in SiC are foreseen to replace Si Insulatedgatebipolar transistors (IGBTs) for applications targeting high efficiency,high operation temperatures and/or volume reductions. In particular, theSiC Metal-oxide semiconductor field-effect transistor (MOSFET) – which isvoltage contro

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Chevalier, Florian. "Conception, fabrication et caractérisation de transistors à effet de champ haute tension en carbure de silicium et de leur diode associée." Phd thesis, INSA de Lyon, 2012. http://tel.archives-ouvertes.fr/tel-01016687.

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Dans le contexte des transports plus électriques, les parties mécaniques tendent à être remplacées par leurs équivalents électriques plus petits. Ainsi, le composant lui-même doit supporter un environnement plus sévère et de lourdes contraintes (haute tension, haute température). Les composants silicium deviennent alors inappropriés. Depuis la commercialisation des premières diodes Schottky en 2001, le carbure de silicium est le matériau reconnu mondialement pour la fabrication de dispositifs haute tension avec une forte intégration. Sa large bande d'énergie interdite et son fort champ électri

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Books on the topic "Junction Field-Effect Transistor(JFET)"

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Soclof, Sidney. Junction field-effect transistors (JFETS): Principles and applications. ArtechHouse, 1996.

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Blaser, Markus. Monolithically integrated InGaAs/Inp photodiode-junction field-effect transistor receivers for fiber-optic telecommunication. Hartung-Gorre, 1997.

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Amara, Amara, and Rozeau Olivier, eds. Planar double-gate transistor: From technology to circuit. Springer, 2009.

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Solymar, L., D. Walsh, and R. R. A. Syms. Principles of semiconductor devices. Oxford University Press, 2018. http://dx.doi.org/10.1093/oso/9780198829942.003.0009.

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p–n junctions are examined initially and the potential distribution in the junction region is derived based on Poisson’s equation. Next the operation of the transistor is discussed, both in terms of the physics and of equivalent circuits. Potential distributions in metal–semiconductor junctions are derived and the concept of surface states is introduced. The physics of tunnel junctions is discussed in terms of their band structure. The properties of varactor diodes are described and the possibility of parametric amplification is touched upon. Further devices discussed are field effect transist

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Book chapters on the topic "Junction Field-Effect Transistor(JFET)"

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Prasad, R. "Transistor Bipolar Junction (BJT) and Field-Effect (FET) Transistor." In Undergraduate Lecture Notes in Physics. Springer International Publishing, 2021. http://dx.doi.org/10.1007/978-3-030-65129-9_6.

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Kelner, G., M. Shur, S. Binari, K. Sleger, and H. Kong. "A High Transconductance β-SiC Buried-Gate Junction Field Effect Transistor." In Springer Proceedings in Physics. Springer Berlin Heidelberg, 1989. http://dx.doi.org/10.1007/978-3-642-75048-9_38.

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Dubey, Avashesh, Rakhi Narang, Manoj Saxena, and Mridula Gupta. "Floating Gate Junction-Less Double Gate Radiation Sensitive Field Effect Transistor (RADFET) Dosimeter: A Simulation Study." In Springer Proceedings in Physics. Springer International Publishing, 2019. http://dx.doi.org/10.1007/978-3-319-97604-4_89.

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"Junction Field-Effect Transistor." In Complete Guide to Semiconductor Devices. John Wiley & Sons, Inc., 2010. http://dx.doi.org/10.1002/9781118014769.ch23.

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Wilmshurst, T. H. "Junction field effect transistor." In Analog Circuit Techniques with Digital Interfacing. Elsevier, 2001. http://dx.doi.org/10.1016/b978-075065094-6/50010-5.

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Conference papers on the topic "Junction Field-Effect Transistor(JFET)"

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Shili, K., M. Ben Karoui, R. Gharbi, and S. Ferrero. "Structural and electrical characterization of the 4H-SiC based junction field effect transistor (JFET)." In 2013 International Conference On Electrical Engineering and Software Applications (ICEESA). IEEE, 2013. http://dx.doi.org/10.1109/iceesa.2013.6578475.

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Ou, Tzu-Min, Tomoko Borsa, and Bart Van Zeghbroeck. "Graphene junction field-effect transistor." In 2015 73rd Annual Device Research Conference (DRC). IEEE, 2015. http://dx.doi.org/10.1109/drc.2015.7175594.

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Zeisse, C. R., R. Nguyen, T. T. Vu, L. J. Messick, and K. L. Moazed. "An indium phosphide diffused junction field effect transistor." In International Conference on Indium Phosphide and Related Materials. IEEE, 1990. http://dx.doi.org/10.1109/iciprm.1990.203037.

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Jahangir, Ifat, Shafat Jahangir, and Quazi Deen Mohd Khosru. "Transport characteristics of GaInAs nanowire junction field effect transistor." In 2012 IEEE International Conference on Electro/Information Technology (EIT 2012). IEEE, 2012. http://dx.doi.org/10.1109/eit.2012.6220771.

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Baca, A. G., J. C. Zolper, M. E. Sherwin, et al. "Complementary GaAs junction-gated heterostructure field effect transistor technology." In Proceedings of 1994 IEEE GaAs IC Symposium. IEEE, 1994. http://dx.doi.org/10.1109/gaas.1994.636920.

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Vardhan Reddy, Isukapalli Vishnu, and Suman Lata Tripathi. "Double Gate-Pocket-Junction-less Tunnel Field Effect Transistor." In 2021 Devices for Integrated Circuit (DevIC). IEEE, 2021. http://dx.doi.org/10.1109/devic50843.2021.9455895.

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Benner, O., A. Lysov, C. Gutsche, et al. "Junction field-effect transistor based on GaAs core-shell nanowires." In 2013 25th International Conference on Indium Phosphide and Related Materials (IPRM). IEEE, 2013. http://dx.doi.org/10.1109/iciprm.2013.6562589.

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Tomioka, K., M. Yoshimura, and T. Fukui. "First Demonstration of Tunnel Field-Effect Transistor Using InGaAs/Si Junction." In 2012 International Conference on Solid State Devices and Materials. The Japan Society of Applied Physics, 2012. http://dx.doi.org/10.7567/ssdm.2012.e-4-3.

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Jiang, Zhi, Yiqi Zhuang, Cong Li, and Wang Ping. "The hetero material gateand hetero-junction tunnel field-effect transistor with pocket." In 2014 IEEE 12th International Conference on Solid -State and Integrated Circuit Technology (ICSICT). IEEE, 2014. http://dx.doi.org/10.1109/icsict.2014.7021632.

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Tripathi, Ball Mukund Mani, and Shyama Prasad Das. "Vertical Channel GaN Field Effect Transistor Without Junction for High Power Application." In 2018 IEEE International Conference on Electronics, Computing and Communication Technologies (CONECCT). IEEE, 2018. http://dx.doi.org/10.1109/conecct.2018.8482384.

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