Relevant bibliographies by topics / Language vhdl

Contents

  1. Journal articles
  2. Dissertations / Theses
  3. Books
  4. Book chapters
  5. Conference papers
  6. Reports

Academic literature on the topic 'Language vhdl'

Author: Grafiati
Published: 4 June 2021
Last updated: 17 February 2022

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Journal articles on the topic "Language vhdl"

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Lipsett, Roger, Erich Marschner, and Moe Shahdad. "VHDL - The Language." IEEE Design & Test of Computers 3, no. 2 (1986): 28–41. http://dx.doi.org/10.1109/mdt.1986.294900.

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Varga, László, Gábor Hosszú, and Ferenc Kovács. "Design Procedure Based on VHDL Language Transformations." VLSI Design 14, no. 4 (2002): 349–54. http://dx.doi.org/10.1080/10655140290011159.

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One of the major problems within the VHDL based behavioral synthesis is to start the design on higher abstraction level than the register transfer level (RTL). VHDL semantics was designed strictly for simulation, therefore it was not considered as high-level synthesis language. A novel synthesis procedure was developed, which uses the methodology of high level synthesis. It starts from an abstract VHDL model and produces an RTL VHDL description through successive language transformations while preserving the VHDL standard simulation semantics. The steps of the synthesis do not use graph repres
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Brandejský, Tomáš, and Vít Fábera. "COMPARISON OF LANGUAGE SUBSET AND LANGUAGE EXTENSION BY SAFE RELATED INFORMATION APPROACH TO SAFE SYSTEM DEVELOPMENT." Acta Polytechnica CTU Proceedings 11 (August 28, 2017): 1. http://dx.doi.org/10.14311/app.2017.11.0001.

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Presented contribution is dedicated to discussion of two different approaches into increase of programming language safety. They are language subset and extension of original safety mechanisms. As examples we used MISRA C/C++ subset and SPARK language builded on the base of ADA language. In the last chapters we discuss novel approaches based on application of programmable hardware which is described in VHDL language, which is also modification of ADA language. Especially SPARK and VHDL languages represents novel approaches to safe system development which are now discussed in relation to new R
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Sciuto, D. "VHDL( VHSIC Hardware Description Language)." Journal of Systems Architecture 42, no. 2 (1996): 95–96. http://dx.doi.org/10.1016/1383-7621(96)00015-x.

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Dickinson, Brian. "VHDL '92: The new features of the VHDL hardware description language." Microprocessors and Microsystems 19, no. 2 (1995): 106–7. http://dx.doi.org/10.1016/0141-9331(95)90002-0.

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Baraona, Phillip, and Perry Alexander. "Abstract Architecture Representation Using VSPEC." VLSI Design 9, no. 2 (1999): 181–201. http://dx.doi.org/10.1155/1999/95465.

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Complex digital systems are often decomposed into architectures very early in the design process. Unfortunately, traditional simulation based languages such as VHDL do not allow the impact of these architectural decisions to be evaluated until a complete, simulatable design of the system is available. After a complete design is available, architectural errors are time-consuming and expensive to correct. However, there is an alternative to simulation based techniques: formal analysis of abstract architectures at the requirements level. This paper describes VSBEC'S approach for defining and anal
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Ashenden, Peter J., and Philip A. Wilsey. "Principles for Language Extensions to VHDL to Support High-Level Modeling." VLSI Design 10, no. 2 (1999): 217–35. http://dx.doi.org/10.1155/1999/20186.

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This paper reviews proposals for extensions to VHDL to support high-level modeling and places them within a taxonomy that describes the modeling requirements they address. Many of the proposals focus on object-oriented extensions, whereas this paper argues that extension of VHDL to support high-level modeling requires a broader review. The paper presents a detailed discussion of issues to be considered in adding high-level modeling extensions to VHDL, including concurrency and communication, abstraction using entity interfaces, object-oriented data modeling, encapsulation, signal assignment se
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Kalpana, S., and P. Samundiswary. "Design of Systolic FIR Filter Using VHDL Language." International Journal of Engineering Trends and Technology 10, no. 5 (2014): 255–59. http://dx.doi.org/10.14445/22315381/ijett-v10p248.

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Doligalski, Michał, and Marian Adamski. "Hierarchical Configurable Petri Net Modeling in VHDL." International Journal of Electronics and Telecommunications 58, no. 4 (2012): 397–402. http://dx.doi.org/10.2478/v10177-012-0054-y.

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Abstract The paper presents method for hierarchical configurable Petri nets description in VHDL language. Dual model is an alternative way for behavioral description of the discrete control process. Dual model consists of two correlated models: UML state machine diagram and hierarchical configurable Petri net (HCfgPN). HCfgPN are Petri nets variant with direct support of exceptions handling mechanism. Logical synthesis of dual model is realized by the description of HCfgPN model by means of hardware description language. The paper presents placesoriented method for HCfgPN description in VHDL l
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Memon, Farida, Aamir Hussain Memon, Shahnawaz Talpur, Fayaz Ahmed Memon, and Rafia Naz Memon. "Design and Co-Simulation of Depth Estimation Using Simulink HDL Coder and Modelsim." July 2016 35, no. 3 (2016): 473–82. http://dx.doi.org/10.22581/muet1982.1603.17.

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In this paper a novel VHDL design procedure of depth estimation algorithm using HDL (Hardware Description Language) Coder is presented. A framework is developed that takes depth estimation algorithm described in MATLAB as input and generates VHDL code, which dramatically decreases the time required to implement an application on FPGAs (Field Programmable Gate Arrays). In the first phase, design is carriedout in MATLAB. Using HDL Coder, MATLAB floating- point design is converted to an efficient fixed-point design and generated VHDL Code and test-bench from fixed point MATLAB code. Further, the
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Dissertations / Theses on the topic "Language vhdl"

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Manek, Meenakshi. "Natural language interface to a VHDL modeling tool." Thesis, This resource online, 1993. http://scholar.lib.vt.edu/theses/available/etd-06232009-063212/.

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Mecera, Martin. "Transformace jazyka C do VHDL." Master's thesis, Vysoké učení technické v Brně. Fakulta informačních technologií, 2010. http://www.nusl.cz/ntk/nusl-237149.

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The thesis describes the process of transformation of the behavior of processor described in C language into VHDL language. Individual steps of automatized transformation are compared to manual design of processor. The thesis highlights advantages of the internal representation of program in the form of graph. Optimizations based on various factors are introduced in this thesis. One of them are algebraic modifications of expressions. The time of computation or space requirements of the circuit can be lowered by proper aplication of properties of math operators - associativity, comutativity and
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Edwards, Carleen Marie. "Representation and simulation of a high level language using VHDL." Thesis, This resource online, 1994. http://scholar.lib.vt.edu/theses/available/etd-11242009-020306/.

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Shah, Sandeep R. "A framework for synthesis from VHDL." Thesis, This resource online, 1991. http://scholar.lib.vt.edu/theses/available/etd-03022010-020143/.

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Wright, Philip A. "Rapid development of VHDL behavioral models." Thesis, This resource online, 1992. http://scholar.lib.vt.edu/theses/available/etd-11102009-020056/.

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Wang, Xiao-Lin 1955. "A TRANSLATER OF CLOCK MODE VHDL HARDWARE DESCRIPTION LANGUAGE." Thesis, The University of Arizona, 1986. http://hdl.handle.net/10150/291295.

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Ardeishar, Raghu. "Automatic verification of VHDL models." Thesis, This resource online, 1990. http://scholar.lib.vt.edu/theses/available/etd-03032009-040338/.

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Sprunger, Steven J. "UML modeling for VHDL designs." Virtual Press, 2008. http://liblink.bsu.edu/uhtbin/catkey/1399192.

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Unified Modeling Language (UML) allows software engineers to use a standard way of expressing a design approach at a high level. The benefits of system modeling are well accepted in the software development community. Modeling of Very High Speed Integrated Circuit Hardware Description Language (VHDL) designs, for synthesizing into hardware, is a common practice also. The research herein looks at system modeling of a design using UML, in which there are both software and hardware components. The idea is to explore modeling of the system with the ability to abstract whether the implementation of
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Van, Tassel John Peter. "Femto-VHDL : the semantics of a subset of VHDL and its embedding in the HOL proof assistant." Thesis, University of Cambridge, 1993. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.308190.

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Sama, Anil. "Behavior modeling of RF systems with VHDL." Thesis, This resource online, 1991. http://scholar.lib.vt.edu/theses/available/etd-10102009-020211/.

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Books on the topic "Language vhdl"

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Computer Systems Laboratory (U.S.), ed. VHSIC hardware description language (VHDL). U.S. Dept. of Commerce, Technology Administration, National Institute of Standards and Technology, Computer Systems Laboratory, 1995.

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Perry, Douglas L. VHDL. McGraw-Hill, 1991.

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VHDL. 3rd ed. McGraw-Hill, 1998.

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Perry, Douglas L. VHDL. McGraw-Hill, 2007.

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Perry, Douglas L. VHDL. McGraw-Hill, 1991.

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VHDL. 2nd ed. McGraw-Hill, 1994.

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Perry, Douglas L. VHDL. 2nd ed. McGraw-Hill, 1995.

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A VHDL primer. Prentice Hall, 1992.

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A VHDL primer. 3rd ed. Prentice Hall PTR, 1999.

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A VHDL primer. Prentice Hall PTR, 1995.

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Book chapters on the topic "Language vhdl"

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Salcic, Zoran. "VHDL-Language Basic Elements." In VHDL and FPLDs in Digital Systems Design, Prototyping and Customization. Springer US, 2001. http://dx.doi.org/10.1007/978-1-4615-5827-9_2.

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Cohen, Ben. "Basic Language Elements." In VHDL Coding Styles and Methodologies. Springer US, 1995. http://dx.doi.org/10.1007/978-1-4615-2313-0_2.

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Cohen, Ben. "Language Elements." In VHDL Answers to Frequently Asked Questions. Springer US, 1998. http://dx.doi.org/10.1007/978-1-4615-5641-1_1.

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Cohen, Ben. "Language Elements." In VHDL Answers to Frequently Asked Questions. Springer US, 1997. http://dx.doi.org/10.1007/978-1-4757-2624-4_1.

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Christen, Ernst, and Kenneth Bakalar. "Library Development Using the VHDL-AMS Language." In Electronic Chips & Systems Design Languages. Springer US, 2001. http://dx.doi.org/10.1007/978-1-4757-3326-6_1.

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Windisch, A., D. Monjau, T. Schneider, J. Mades, M. Glesner, and W. Ecker. "A VHDL-Centric Mixed-Language Simulation Environment." In System-on-Chip Methodologies & Design Languages. Springer US, 2001. http://dx.doi.org/10.1007/978-1-4757-3281-8_4.

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Sáenz, F., W. Hans, J. J. Ruz, and S. Winkler. "Shared memory system for Babel: a VHDL specification." In Programming Language Implementation and Logic Programming. Springer Berlin Heidelberg, 1994. http://dx.doi.org/10.1007/3-540-58402-1_38.

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Baraona, Phillip, John Penix, and Perry Alexander. "VSPEC: A Declarative Requirements Specification Language for VHDL." In Current Issues in Electronic Modeling. Springer US, 1995. http://dx.doi.org/10.1007/978-1-4615-2303-1_3.

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Pierre, Laurence. "VHDL: A Hardware Description Language and its Simulation Semantics." In Software Specification Methods. Springer London, 2001. http://dx.doi.org/10.1007/978-1-4471-0701-9_7.

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Schumacher, Guido, and Wolfgang Nebel. "Abstract Hardware Modelling Using an Object-Oriented Language Extension to VHDL." In Current Issues in Electronic Modeling. Springer US, 1996. http://dx.doi.org/10.1007/978-1-4613-1349-6_6.

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Conference papers on the topic "Language vhdl"

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Shahdad, M. "An Overview of VHDL Language and Technology." In 23rd ACM/IEEE Design Automation Conference. IEEE, 1986. http://dx.doi.org/10.1109/dac.1986.1586107.

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Shahdad, Moe. "An overview of VHDL language and technology." In the 23rd ACM/IEEE conference. ACM Press, 1986. http://dx.doi.org/10.1145/318013.318063.

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Coyitangiye, Lyse-Aline, and Richard Grisel. "Compact Modeling of MOSFET with VHDL-AMS language." In IECON 2006 - 32nd Annual Conference on IEEE Industrial Electronics. IEEE, 2006. http://dx.doi.org/10.1109/iecon.2006.347230.

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Brzozowski, Maciej, and Vyacheslav N. Yarmolik. "Obfuscation as Intellectual Rights Protection in VHDL Language." In 6th International Conference on Computer Information Systems and Industrial Management Applications (CISIM'07). IEEE, 2007. http://dx.doi.org/10.1109/cisim.2007.51.

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Zrafi, Rached, Sami Ghedira, Yassin Dhahri, and Kamel Besbes. "Design of a photovoltaic system using VHDL-AMS language." In 2017 International Conference on Engineering & MIS (ICEMIS). IEEE, 2017. http://dx.doi.org/10.1109/icemis.2017.8273119.

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Misera, S., H. T. Vierhaus, L. Breitenfeld, and A. Sieber. "A Mixed Language Fault Simulation of VHDL and SystemC." In 9th EUROMICRO Conference on Digital System Design (DSD'06). IEEE, 2006. http://dx.doi.org/10.1109/dsd.2006.10.

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Martinolle, Françoise, Charles Dawson, Debra Corlette, and Mike Floyd. "Interoperability of Verilog/VHDL procedural language interfaces to build a mixed language GUI." In the conference. ACM Press, 1999. http://dx.doi.org/10.1145/307418.307521.

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Sakowski, Wojciech, Miroslaw Ossysek, and Benedykt Nowak. "VHDL as a specification language for high-level synthesis system." In International Conference on Microelectronics, edited by Andrzej Sowinski, Jan Grzybowski, Witold T. Kucharski, and Ryszard S. Romaniuk. SPIE, 1992. http://dx.doi.org/10.1117/12.141062.

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Binns, R. J. "High-level design of analogue circuitry using an analogue hardware description language." In IEE Colloquium on Mixed-Signal AHDL/VHDL Modelling and Synthesis. IEE, 1997. http://dx.doi.org/10.1049/ic:19971118.

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Gray, F., and James Armstrong. "Reutilization of VHDL testbench and library components (VHSIC Hardware Description Language)." In 10th Computing in Aerospace Conference. American Institute of Aeronautics and Astronautics, 1995. http://dx.doi.org/10.2514/6.1995-1035.

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Reports on the topic "Language vhdl"

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Aylor, James, Robert Klenke, Ron Waxman, Paul Menchini, Jack Stinson, and Bill Anderson. VHSIC Hardware Description Language (VHDL) 200X Requirements Report/Survey. Defense Technical Information Center, 1999. http://dx.doi.org/10.21236/ada406178.

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Chouikha, Mohamed F. Test Generation for Very High-Level Design Language (VHDL) Specifications Used in Avionics. Defense Technical Information Center, 2002. http://dx.doi.org/10.21236/ada416255.

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Chung, Moon Jung. Parallel Very High Speed Integrated Circuits (VHSIC) Hardware Description Language (VHDL) Simulation for Performance Modeling. Defense Technical Information Center, 1999. http://dx.doi.org/10.21236/ada372678.

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Mills, Michael T. Proposed Object Oriented Programming (OOP) Enhancements to the Very High Speed Integrated Circuits (VHSIC) Hardware Description Language (VHDL). Defense Technical Information Center, 1993. http://dx.doi.org/10.21236/ada274004.

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Mills, Michael T. A Key Element Toward Concurrent Engineering of Hardware and Software: Binding Very High Speed Integrated Circuits (VHSIC) Hardware Description Language (VHDL) with Ada 95. Defense Technical Information Center, 1994. http://dx.doi.org/10.21236/ada294469.

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Hartman, Don, Mike Konrad, and Terry Welch. VHLL (Very High Level Language) System Prototyping Tool. Defense Technical Information Center, 1989. http://dx.doi.org/10.21236/ada212587.

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Cechinel, Clovis, and Joao Alberto Martins Rodrigues. ASSOCIATION OF DELIRIUM AND FRAGILITY IN HOSPITALIZED ELDERLY: SYSTEMATIC REVIEW. INPLASY - International Platform of Registered Systematic Review and Meta-analysis Protocols, 2021. http://dx.doi.org/10.37766/inplasy2021.9.0022.

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Review question / Objective: What is the relationship between delirium and frailty in hospitalized elderly people? The objective of this research is to analyze the association between frailty and delirium in hospitalized elderly people, through a systematic literature review. Condition being studied: Frailty and delirium in hospitalized aged. Information sources: A specific search strategy for the language of each database was developed using, initially, the Medical Subject Headings (MEsH) descriptor and later translated to specific descriptors (Descriptors in Health Sciences (DeCS) and Embase
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Federal Information Processing Standards Publication: VHSIC hardware description language (VHDL). National Institute of Standards and Technology, 1995. http://dx.doi.org/10.6028/nist.fips.172-1-1995.

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Federal Information Processing Standards Publication: IEEE standard VHDL language reference manual. National Bureau of Standards, 1988. http://dx.doi.org/10.6028/nist.fips.172-1.

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