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Journal articles on the topic 'Linear integrated circuits Operational amplifiers'
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1
Jain, L. C. "Book Review: Operational Amplifiers and Linear Integrated Circuits:." International Journal of Electrical Engineering & Education 29, no. 2 (April 1992): 162. http://dx.doi.org/10.1177/002072099202900212.
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Jantos, P., D. Grzechca, and J. Rutkowski. "Evolutionary algorithms for global parametric fault diagnosis in analogue integrated circuits." Bulletin of the Polish Academy of Sciences: Technical Sciences 60, no. 1 (March 1, 2012): 133–42. http://dx.doi.org/10.2478/v10175-012-0019-4.
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Evolutionary algorithms for global parametric fault diagnosis in analogue integrated circuitsAn evolutionary method for analogue integrated circuits diagnosis is presented in this paper. The method allows for global parametric faults localization at the prototype stage of life of an analogue integrated circuit. The presented method is based on the circuit under test response base and the advanced features classification. A classifier is built with the use of evolutionary algorithms, such as differential evolution and gene expression programming. As the proposed diagnosis method might be applied at the production phase there is a method for shortening the diagnosis time suggested. An evolutionary approach has been verified with the use of several exemplary circuits - an oscillator, a band-pass filter and two operational amplifiers. A comparison of the presented algorithm and two classical methods - the linear classifier and the nearest neighborhood method - proves that the heuristic approach allows for acquiring significantly better results.
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Ma, Cai Hong, and Hai Bo Ge. "Design and Implementation of the Chaotic Circuit Based on Integrated Operational Amplifiers." Applied Mechanics and Materials 333-335 (July 2013): 729–33. http://dx.doi.org/10.4028/www.scientific.net/amm.333-335.729.
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The principles and methods of chaos generation are researched using piecewise linear circuit theory. The chaos generation circuit based on integrated operational amplifiers is designed to realize chaos. Simulation results of the circuit are got using Multisim software. It indicates that using this method, the relationships and laws between chaos and various circuit element parameters can be better found out.
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Zhang, Xiao Feng, Fo Chang Xie, Guo Wei Yang, and Wei Zhang. "The Transceiver Circuit Design of Digital Ultrasonic System." Advanced Materials Research 834-836 (October 2013): 968–73. http://dx.doi.org/10.4028/www.scientific.net/amr.834-836.968.
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This paper introduces the design process of the digital ultrasonic transmission circuit: echo receiving circuit and the echo signal regulate circuit. Among them, outside 500 V DC - DC module for high voltage power input, use non-tuned type circuit design ultrasonic transmission circuit ; Select high voltage fast recovery diode FR107 design echo receiving limiter circuit; Using ultra-high speed, low noise, low distortion of the integrated operational amplifier MAX4104ESA design preamplifier circuits and the band-pass filter circuits; Using linear decibels, low noise, wide bandwidth, high gain accuracy amplifier AD603 design echo amplifying circuit. The experimental results indicate that the basic realization of the ultrasonic transceiver circuit and echo signal conditioning functions.
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Cardoso, Guilherme S., Tiago R. Balen, Marcelo S. Lubaszewski, and Odair L. Gonçalez. "Reliability Analysis of 0.5μm CMOS Operational Amplifiers under TID Effects." Journal of Integrated Circuits and Systems 9, no. 1 (December 28, 2014): 70–79. http://dx.doi.org/10.29292/jics.v9i1.390.
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Analog integrated circuits operating in radiation environments. In previous irradiation experiments performed on a switched-capacitor filter, implemented in a programmable analog array, it was observed a sudden recovery of the device performance during the irradiation, while increasing the accumulated dose. In some cases the considered performance parameters (such as the total harmonic distortion) may even be enhanced if compared to the pre-irradiation measurements, in specific accumulated dose intervals. This behavior is associated to partial inactivity windows in the internal components of the device. Spice simulations considering two complementary architectures of a simple CMOS Operational Amplifier (OpAmp) are performed, aiming to understand the origins of this effect. Results indicate that shifts on the operating point of the amplifier building blocks are responsible for the degradation and recovery of the OpAmp performance. Results also show that specific architectures, as well as, application constraints (such as the external feedback and the input signal amplitude and frequency) may result in different robustness levels related to the linear applications of the OpAmps in radiation environments.
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Benko, Pedro Luiz, Milene Galeti, Cleiton Fidelix Pereira, Julio Cesar Lucchi, and Renato Camargo Giacomini. "Bio-Amplifier based on MOS bipolar Pseudo-Resistors: A New Approach using its non-linear characteristic." Journal of Integrated Circuits and Systems 11, no. 2 (December 28, 2016): 132–39. http://dx.doi.org/10.29292/jics.v11i2.437.
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This paper proposes a new and refined bio-amplifier design, which associates DC offset cancellation, adequate frequency response and buffered outputs to a significant reduction of the signal recovery time. A MOS-Bipolar pseudo-resistor integrated to the feedback network of a single-stage Operational Transconductance Amplifier and the source-follower buffers give to the new topology its main advantages. This architecture makes use of the high resistance values of these pseudo-resistors to eliminate the offset DC level input preserving the low cut-off frequency, without the need of high capacitances, thereby significantly reducing the active die area, which enables its use as a front-end pre-amplifier assembled directly on the acquisition probes. The recovery time after an input voltage transitory of high-amplitude is an important characteristic of the bio-potential amplifiers due to their very low cut-off frequency. The proposed bio-amplifier utilizes the non-linear characteristics of the pseudo-resistor in the recovery time reduction. This time was evaluated and the topology presented a significant contribution in this aspect, assuming values 90% lower when compared with the same topology using a constant resistance. The new amplifier allows voltage gain of 30dB from 0.6 Hz to 2 kHz, and Total Harmonic Distortion (THD) of 0.19% for an input signal of 10Hz. This work also provides a behavioral spice model for MOS-Bipolar pseudo-resistor, which allows an accurate simulation of the linear and nonlinear pseudo-resistor characteristics, obtained through an experimental method of indirect characterization. This method is based on the transitory response from a first order RC low pass filter. The experimental characterization method is of fundamental importance, due to the absence of appropriate SPICE models that describe with precision the pseudo-resistance behavior. The circuits were manufactured by MOSIS on 8HP SiGe BiCmos Global Foundries 0.13μm technology.
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Carbajal-Gomez, Victor, Esteban Tlelo-Cuautle, Carlos Sanchez-Lopez, and Francisco Fernandez-Fernandez. "PVT-Robust CMOS Programmable Chaotic Oscillator: Synchronization of Two 7-Scroll Attractors." Electronics 7, no. 10 (October 16, 2018): 252. http://dx.doi.org/10.3390/electronics7100252.
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Designing chaotic oscillators using complementary metal-oxide-semiconductor (CMOS) integrated circuit technology for generating multi-scroll attractors has been a challenge. That way, we introduce a current-mode piecewise-linear (PWL) function based on CMOS cells that allow programmable generation of 2–7-scroll chaotic attractors. The mathematical model of the chaotic oscillator designed herein has four coefficients and a PWL function, which can be varied to provide a high value of the maximum Lyapunov exponent. The coefficients are implemented electronically by designing operational transconductance amplifiers that allow programmability of their transconductances. Design simulations of the chaotic oscillator are provided for the 0.35 μ m CMOS technology. Post-layout and process–voltage–temperature (PVT) variation simulations demonstrate robustness of the multi-scroll chaotic attractors. Finally, we highlight the synchronization of two seven-scroll attractors in a master–slave topology by generalized Hamiltonian forms and observer approach. Simulation results show that the synchronized CMOS chaotic oscillators are robust to PVT variations and are suitable for chaotic secure communication applications.
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Briem, Jochen, Marco Mader, Daniel Reiter, Raul Amirpour, Markus Grözing, and Manfred Berroth. "Fully integrated high quality factor <i>G</i><sub>m</sub><i>C</i> bandpass filter stage with highly linear operational transconductance amplifier." Advances in Radio Science 15 (September 21, 2017): 149–55. http://dx.doi.org/10.5194/ars-15-149-2017.
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Abstract. This paper presents an electrical, fully integrated, high quality (Q) factor GmC bandpass filter (BPF) stage for a wireless 27 MHz direct conversion receiver for a bendable sensor system-in-foil (Briem et al., 2016). The core of the BPF with a Q factor of more than 200 is an operational transconductance amplifier (OTA) with a high linearity at an input range of up to 300 mVpp, diff. The OTA's signal-to-noise-and-distortion-ratio (SNDR) of more than 80 dB in the mentioned range is achieved by stabilizing its transconductance Gm with a respective feedback loop and a source degeneration resistors RDG. The filter stage can be tuned and is tolerant to global and local process variations due to offset and common-mode feedback (CMFB) control circuits. The results are determined by periodic steady state (PSS) simulations at more than 200 global and local process variation parameter and temperature points and corner simulations. It is expected, that the parasitic elements of the layout have no significant influence on the filter behaviour. The current consumption of the whole filter stage is less than 600 µA.
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Stum, Zachary, Vinayak Tilak, Peter A. Losee, Emad A. Andarawis, and Cheng Po Chen. "300°C Silicon Carbide Integrated Circuits." Materials Science Forum 679-680 (March 2011): 730–33. http://dx.doi.org/10.4028/www.scientific.net/msf.679-680.730.
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MOSFET-based integrated circuits were fabricated on silicon carbide (SiC) substrates. SiC devices can operate at much higher temperatures than current semiconductor devices. Simple circuit components including operational amplifiers and common source amplifiers were fabricated and tested at room temperature and at 300°C. The common source amplifier displayed gain of 7.6 at room temperature and 6.8 at 300°C. The operational amplifier was tested for small signal open loop gain at 1kHz, measuring 60 dB at room temperature and 57 dB at 300°C. Stability testing was also performed at 300°C, showing very little drift at over 100 hours for the individual MOSFETs and the common source amplifier.
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Shaw, Brian M. "Book Review: Operational Amplifiers — Integrated and Hybrid Circuits: GEORGE B. RUTKOWSKI." International Journal of Electrical Engineering & Education 32, no. 2 (April 1995): 191–92. http://dx.doi.org/10.1177/002072099503200221.
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Alexandrov, Peter, Xueqing Li, Matt O'Grady, and John Hostetler. "Analog and Logic High Temperature Integrated Circuits based on SiC JFETs." Additional Conferences (Device Packaging, HiTEC, HiTEN, and CICMT) 2014, HITEC (January 1, 2014): 000061–65. http://dx.doi.org/10.4071/hitec-tp12.
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Harsh environment applications such as electrical actuation on military and commercial aircraft, advanced engine controls, downhole energy exploration, propulsion systems of hybrid and all electric vehicles, and space exploration require sensor interfaces, control circuits, and power systems with electronics capable of operating at high temperatures. Wide band-gap materials such as SiC can be used to build devices with high operating temperatures due to their fundamental material properties. This paper presents initial results on developing basic analog and logic integrated circuits based on SiC JFET technology. Analog and logic integrated circuits were built using enhancement vertical channel lateral JFET transistors, metal film resistors and lateral p-n diodes. The analog circuits built include different types of operational amplifiers. The logic circuits include NOT, NAND, AND, NOR and OR gates. Transistors and integrated circuits were packaged in ceramic DIP packages and tested at temperatures up to 500 °C. The tested JFETs show proper operation up to the maximum tested temperature of 500 °C. The operational amplifiers remained functional at temperatures up to 430 °C. Basic logic circuits showed proper operation up to the maximum tested temperature of 500 °C.
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Pandey, Rajeshwari, Neeta Pandey, and Sajal K. Paul. "Electronically Tunable Transimpedance Instrumentation Amplifier Based on OTRA." Journal of Engineering 2013 (2013): 1–5. http://dx.doi.org/10.1155/2013/648540.
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Operational transresistance amplifier (OTRA) is the most suitable analog building block (ABB) for transimpedance type signal processing due to its very nature of current input and voltage output. In this paper, OTRA-based transimpedance instrumentation amplifier (TIA) is presented. It provides high differential gain and bandwidth, which is independent of gain. It also offers high common-mode rejection ratio (CMRR). The amplifier gain can be controlled electronically by implementing resistors using MOS transistors operating in linear region. The circuit can be made fully integrated. The proposed circuit is insensitive to parasitic input capacitances and input resistances due to the internally grounded input terminals of OTRA. Theoretical analysis is verified through PSPICE simulations and experimentation.
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Liu, Leisong, Yuantian Lu, Xin Zhuang, Qunying Zhang, and Guangyou Fang. "Noise Analysis in Pre-Amplifier Circuits Associated to Highly Sensitive Optically-Pumped Magnetometers for Geomagnetic Applications." Applied Sciences 10, no. 20 (October 15, 2020): 7172. http://dx.doi.org/10.3390/app10207172.
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This paper analyzes the noise sources in photoelectric detection circuits with several low-noise operational amplifiers cores. The fabricated circuits are low-noise pre-amplifiers that are used for optically pumped magnetometers. In the proposed circuits, the noise levels of equivalent output voltage are calculated, and the results are in accordance with measurements. With a cooperation of several operational amplifiers, we select LT1028 from linear technologies as the core for our detection circuit, which has an output signal-to-noise ratio of more than 2 × 105 up to the frequency of 100 kHz. By analyzing the individual noise sources in the detection circuit, the dominant noise source is confirmed as the photocurrent shot noise below 200 kHz. Beyond this frequency, the voltage noise source in the operational amplifier dominates. Besides, the lamp power, the radio frequency (RF) power, the temperature variations, and their influences on the sensitivity are studied and optimized. Finally, an optically pumped magnetometer with cesium head is established, showing an intrinsic sensitivity of 85 fT/√Hz. This sensitivity is realized under a geomagnetic magnetic field strength of 53 μT.
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Bakerenkov, A. S., V. S. Pershenkov, A. V. Solomatin, V. V. Belyakov, and V. V. Shurenkov. "Radiation Degradation Modeling of Bipolar Operational Amplifier Input Offset Voltage in LTSpice IV." Applied Mechanics and Materials 565 (June 2014): 138–41. http://dx.doi.org/10.4028/www.scientific.net/amm.565.138.
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Integrated circuits are used in electronic equipment of spaceships. Therefore, they are impacted by ionizing radiation during space mission. It leads to electronic equipment failures. At present operational amplifiers are base elements of analog electronic devices. Radiation impact leads to degradation of operational amplifiers input stages. Input bias current increasing and input offset voltage drifts are the results of ionizing radiation expose of operational amplifiers. Therefore, space application electronic equipment fails after accumulation of limit dose. It isn’t difficult to estimate radiation degradation of input bias currents of bipolar operational amplifiers, but estimation of dose dependence of input offset voltage drift is more complex issue. Schematic modeling technique based on Gummel–Poon transistor model for estimation of input offset voltage drift produced by space radiation impact was experimentally verified for LM324 operational amplifier and presented in this work. Radiation sensitive parameters of Gummel–Poon model were determined using 2N2907 bipolar pnp transistor.
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Thompson, R. F., D. T. Clark, A. E. Murphy, E. P. Ramsay, D. A. Smith, R. A. R. Young, J. D. Cormack, et al. "High Temperature Silicon Carbide CMOS Integrated Circuits." Additional Conferences (Device Packaging, HiTEC, HiTEN, and CICMT) 2011, HITEN (January 1, 2011): 000115–19. http://dx.doi.org/10.4071/hiten-paper5-dclark.
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The wide band-gap of Silicon Carbide makes it a material suitable for IC's [1] operating up to 450°C. The maximum operating temperature achieved will depend on the transistor technology selected, interconnect metallisation and device packaging. This paper describes transistor and circuit results achieved in SiC CMOS technology, where the major issue addressed is the gate dielectric performance. N and p-channel MOSFET structures have been demonstrated operating at temperatures up to 400°C Test circuits including simple logic cells, ring oscillators, operational amplifiers and gate drive circuits have been fabricated and the characteristics of ring oscillators are presented here. Floating capacitor structures have also been fabricated for use in future analogue and mixed signal circuits. This technology will be initially applied in applications including signal conditioning for sensors and control of SiC based power switching devices, where the high temperature capability will match that of the SiC power devices which are now becoming commercially available.
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Lebedev, A. A., I. I. Liakhchilina, and N. M. Klokov. "Formation of synergetic effects in integrated circuits operational amplifiers based on the current dynamic cascades." IOP Conference Series: Materials Science and Engineering 475 (February 18, 2019): 012003. http://dx.doi.org/10.1088/1757-899x/475/1/012003.
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Maralani, A., Michael S. Mazzola, David C. Sheridan, Igor Sankin, and Volodymyr Bondarenko. "Characterization and Modeling of SiC LTJFET for Analog Integrated Circuit Simulation and Design." Materials Science Forum 615-617 (March 2009): 915–18. http://dx.doi.org/10.4028/www.scientific.net/msf.615-617.915.
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The design of analog integrated circuits, for instance, the operational amplifiers, have been widely perfected with devices and processes available in silicon. However, analogous circuits have been the subject of research in Silicon Carbide (SiC). Among SiC devices, 4H-SiC Lateral-Trench JFET (LTJFET) transistor offers advantages and new opportunities to make affordable and reliable analog integrated circuits for harsh environment. In this paper: (1) SiC LTJFET is characterized for modeling and simulation, (2) effect of temperature variation on SiC LTJFET threshold voltage and small signal parameters are reported, (3) gain performance and small signal parameters of the basic analog circuit block, Common Source (CS) amplifier, based on the variation of the load transistors threshold voltage (Vth) are studied and analyzed, and (4) frequency and transient response of the cascoded CS amplifier (CS-Cas) are reported.
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Holyaka, R. L., T. A. Marusenkova, and D. V. Fedasyuk. "LOGARITHMIC AMPLIFIERS FOR SOFTWARE HARDWARE MAGNETIC TRACKING SYSTEMS." ELECTRICAL AND COMPUTER SYSTEMS 33, no. 109 (December 22, 2020): 33–45. http://dx.doi.org/10.15276/eltecs.33.109.2020.4.
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The work deals with the problem of signal conversion in magnetic tracking devices. Magnetic tracking technology is based on computing the spatial position of an object being tracked upon measuring reference magnetic fields in low-frequency electromagnetic radiation spectrum. Magnetic tracking devices are key components of navigation sensors for virtual and augmented reality. It has been shown that the main problem one faces when developing sensory devices for magnetic tracking is the fact that signals should be measured in a wide measurement range. We have analyzed possible ways to solve the stated problem by digital and combined methods. The latter have proven to be more efficient. They consist in signal amplification due to analog compression, which is performed by logarithmic amplifiers whose negative feedback circuits contain components with non-linear volt-ampere characteristics (typically, diodes or bipo- lar transistors are used). It has been shown that the parameters of logarithmic signal compression can be controlled by modified circuits with auxiliary resistance dividers. The resistance dividers scale the logarithmic volt-ampere characteristics of emitter p-n junctions of bipolar n-p-n and p-n-p transistors. A substantial advantage of circuits with resistance dividers is that they provide the possibility to expand the range of the output voltage of logarithmic amplifiers and optimize the transition between the linear and logarithmic amplification regions. The work presents the results of simulation and experimental investigations into a logarithmic amplifier for a magnetic tracking system. Simulation was carried out using SPICE (Simulation Program with Integrated Circuit Emphasis) models. We applied an integrated approach,which provides collections of transient characteristics of logarithmic amplifiers at different sets of the parameters of resistance dividers. The simulation results have been verified using our own software- firmware magnetic tracking tools – Magnetic Tracking System Integrated Development Environment. The signal converter was built upon a programmable system-on-chip PSoC 5LP by Cypress Semiconductor.
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Sun, Jun-Wei, Yu-Qi Tian, and Yan-Feng Wang. "Eight-Person Voter Implementation Based on Hewlett-Packard Memristor." Journal of Nanoelectronics and Optoelectronics 15, no. 3 (March 1, 2020): 404–14. http://dx.doi.org/10.1166/jno.2020.2728.
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The logic function based on memristor has been proved and can be applied to the future large scale integrated circuits. In this paper, we use logic circuit based on memristor to realize the function of eight-person voter. The basic logic circuit designed in this paper is consisted of two Hewlett-Packard memristors in series connection and an operational amplifier. Operational amplifiers are used to regulate the output voltages to meet the requirements of the input signals in the next stage circuits. The adder, binary comparator and multi-input logic gate are realized by using the designed logic circuit. Full adders, binary comparators and multi-input logic gates are combined into eight-person voter circuit. Theoretical analysis and spice simulation results verify the feasibility of the circuit under different cases. This method is expected to be applied to more complex voter logic circuits based on memristor.
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Zhang, Hui Min, Qing Ping Wu, Zheng Yuan Zhou, and Xun Wang. "Design and Application of a Low Frequency VCO." Applied Mechanics and Materials 668-669 (October 2014): 808–11. http://dx.doi.org/10.4028/www.scientific.net/amm.668-669.808.
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The low frequency voltage controlled oscillator (VCO) is designed using integrated operational amplifier. The frequency of the output signal of VCO changes with the magnitude of the input signal voltage, and show a linear relationship within a certain range through the experimental test. Experiments show that, under the input of certain amplitude and frequency range of the square wave, triangle wave, saw-tooth wave, the output waveform of VCO respectively is ambulance, fire siren and other kinds of ambulance siren Signal. This innovative design’ cost is low, realized by analog circuit. It can be used in the practice of teaching case, electronic production or development of sound panels.
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Pandiev, Ivailo Milanov. "Modeling and Simulation of Monolithic Single-Supply Power Operational Amplifiers." Energies 14, no. 15 (July 29, 2021): 4611. http://dx.doi.org/10.3390/en14154611.
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In this paper a simple PSpice (Personal Simulation Program with Integrated Circuit Emphasis) macro-model was developed, and verified for monolithic power operational amplifiers operated with a single-supply voltage. The proposed macro-model is developed using simplification and build-up techniques for macro-modeling of operational amplifiers and simulates the basic static and dynamic characteristics, including input impedance, small-signal frequency responses at various voltage gains, output power versus supply voltage, slew-rate-limiting, voltage limiting, output offset voltage versus supply voltage ripples, and output resistance. Furthermore, the macro-model also takes into account the ground reference voltage in the amplifier at a single power supply voltage. The model is implemented as a hierarchical structure suitable for the PSpice circuit simulation platform. The sub-circuit is built using standard PSpice components and analog behavioral modeling blocks. The accuracy of the model is verified by extracting the model parameters for single-supply power operational amplifier TDA2005 from ST Microelectronics as example. The effectiveness of the model is validated by comparing the simulation results of the electrical parameters with the corresponding measured values obtained by experimental testing of sample circuits. The comparative analysis shows that the relative error of the modeled large-signal parameters is less than 15%. Moreover, an error of 15% is quite acceptable, considering the technological tolerances of the electrical parameters for this type of analog ICs.
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Yan, Liangwen, Yue Yu, Sijung Hu, David Mulvaney, Panagiotis Blanos, Samah Alharbi, and Matthew Hayes. "Illumination Adaptation in a Multi-Wavelength Opto-Electronic Patch Sensor." Sensors 20, no. 17 (August 21, 2020): 4734. http://dx.doi.org/10.3390/s20174734.
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In capturing high-quality photoplethysmographic signals, it is crucial to ensure that appropriate illumination intensities are used. The purpose of the study was to deliver controlled illumination intensities for a multi-wavelength opto-electronic patch sensor that has four separate arrays each consisting of four light-emitting diodes (LEDs), the wavelength of the light generated by each array being different. The study achieved the following: (1) a linear constant current source LED driver incorporating series negative feedback using an integrated operational amplifier circuit; (2) the fitting of a linear regression equation to provide rapid determination of the LEDs driver voltage; and (3) an algorithm for the automatic adjustment of the output voltage to ensure suitable LED illumination. The data from a single centrally-located photo detector, which is capable of capturing all four channels of back-light in a time-multiplexed manner, were used to monitor heart rate and blood oxygen saturation. This paper provides circuitry for driving the LEDs and describes an adaptive algorithm implemented on a microcontroller unit that monitors the quality of the photo detector signals received in order to control each of the individual currents being supplied to the LED arrays. The study demonstrated that the operation of the new circuitry in its ability to adapt LED illumination to the strength of the signal received and the performance of the adaptive system was compared with that of a non-adaptive approach.
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Riad, Joseph, Sergio Soto-Aguilar, Johan J. Estrada-López, Oscar Moreira-Tamayo, and Edgar Sánchez-Sinencio. "Design Trade-Offs in Common-Mode Feedback Implementations for Highly Linear Three-Stage Operational Transconductance Amplifiers." Electronics 10, no. 9 (April 21, 2021): 991. http://dx.doi.org/10.3390/electronics10090991.
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Fully differential amplifiers require the use of common-mode feedback (CMFB) circuits to properly set the amplifier’s operating point. Due to scaling trends in CMOS technology, modern amplifiers increasingly rely on cascading more than two stages to achieve sufficient gain. With multiple gain stages, different topologies for implementing CMFB are possible, whether using a single CMFB loop or multiple ones. However, the impact on performance of each CMFB approach has seldom been studied in the literature. The aim of this work is to guide the choice of the CMFB implementation topology evaluating performance in terms of stability, linearity, noise and common-mode rejection. We present a detailed theoretical analysis, comparing the relative performance of two CMFB configurations for 3-stage OTA topologies in an implementation-agnostic manner. Our analysis is then corroborated through a case study with full simulation results comparing the two topologies at the transistor level and confirming the theoretical intuition. An active-RC filter is used as an example of a high-linearity OTA application, highlighting a 6 dB improvement in P1dB in the multi-loop implementation with respect to the single-loop case.
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YUCE, ERKAN. "VARIOUS CURRENT-MODE AND VOLTAGE-MODE INSTRUMENTATION AMPLIFIER TOPOLOGIES SUITABLE FOR INTEGRATION." Journal of Circuits, Systems and Computers 19, no. 03 (May 2010): 689–99. http://dx.doi.org/10.1142/s0218126610006372.
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In this paper, four instrumentation amplifier (IA) topologies, one of which is current-mode (CM) while the others are voltage-mode (VM), are presented. Three of the IAs use one to two current feedback operational amplifiers (CFOAs) while the other one employs only a single NMOS transistor. One of the IA circuits, given as an example, is simple while others are novel. The CM IA is composed of only grounded resistors which have some advantages in integrated circuit (IC) process. Non-ideality effects such as non-ideal gain and parasitic impedances on the performance of introduced IAs are discussed. In order to show the performance of the circuits, we perform experimental tests and simulations by using SPICE program.
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AMINZADEH, HAMED, and REZA LOTFI. "ON THE POWER EFFICIENCY OF CASCODE COMPENSATION OVER MILLER COMPENSATION IN TWO-STAGE OPERATIONAL AMPLIFIERS." Journal of Circuits, Systems and Computers 17, no. 01 (February 2008): 1–13. http://dx.doi.org/10.1142/s0218126608004113.
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Optimization of power consumption is one of the main design challenges in today's low-power high-speed analog integrated circuits. In this paper, two popular techniques to stabilize two-stage operational amplifiers, namely, Miller and cascode compensations are compared from power efficiency point of view. To accomplish this, cascode-compensated topologies are basically analyzed to derive the required equations for the comparison. In the analysis, a new method to take into account the effect of transfer function zeros is proposed. By assuming that the zeros' magnitudes are fairly nondominant, the method increases the accuracy of the analyses. The relationships show that for the same specifications, cascode compensation is more power-efficient than Miller compensation, especially for heavy capacitive loads. This has been confirmed by SPICE simulations.
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Petkovsek, Marko, and Peter Zajec. "Evaluating Common-Mode Voltage Based Trade-Offs in Differential-Ended and Single-Supplied Signal Conditioning Amplifiers." Electronics 10, no. 16 (August 17, 2021): 1982. http://dx.doi.org/10.3390/electronics10161982.
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This paper focuses on a differential voltage measurement in low-voltage automotive devices whose subunits are separated with a low-side safety switch. In contrast to conventional applications with high-side switches, a common-mode voltage (CMV) with negative polarity exists at the input of the signal conditioning circuitry. To overcome the shortage of dedicated integrated circuits capable of withstanding negative CMV, the paper investigates single- and two-stage differential circuits with single-supplied operational amplifiers to find a cost-optimized counterpart. In addition, the proposed procedure tunes the circuit parameters in such a manner to obtain the largest possible full-scale range at the output. Though, such optimization results in very uncommon values for gain and reference voltages. This issue is additionally evaluated for reference voltages that are either cost-effective or more easily accessible to increase the circuit feasibility. Since the impact of resistances on circuits’ behaviour could be diminished to a great extent using high-precision and matched pair resistors, the sensitivity analysis was investigated only for a reference voltage change. Furthermore, a reversed termination of measured voltages results in a simplified reference voltage selection without hindering circuits’ performance, proven by simulation and experimental results.
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Komanaplli, Gurumurthy, Neeta Pandey, and Rajeshwari Pandey. "New Realization of Quadrature Oscillator using OTRA." International Journal of Electrical and Computer Engineering (IJECE) 7, no. 4 (August 1, 2017): 1815. http://dx.doi.org/10.11591/ijece.v7i4.pp1815-1823.
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In this paper a new, operational transresistance amplifier (OTRA) based, third order quadrature oscillator (QO) is presented. The proposed structure forms a closed loop using a high pass filter and differentiator. All the resistors employed in the circuit can be implemented using matched transistors operating in linear region thereby making the proposed structure fully integrated and electronically tunable. The effect of non-idealities of OTRA has been analyzed which suggests that for high frequency applications self-compensation can be used. Workability of the proposed QO is verified through SPICE simulations using 0.18μm AGILENT CMOS process parameters. Total harmonic distortion (THD) for the proposed QO is found to be less than 2.5%.The sensitivity, phasenoise analysis is also discussed for the proposed structure.
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Dimitrov, Borislav, Gordana Collier, and Andrew Cruden. "Design and Experimental Verification of Voltage Measurement Circuits Based on Linear Optocouplers with Galvanic Isolation for Battery Management Systems." World Electric Vehicle Journal 10, no. 4 (September 23, 2019): 59. http://dx.doi.org/10.3390/wevj10040059.
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A battery management system (BMS) design, based on linear optocouplers for Lithium-ion battery cells for automotive and stationary applications is proposed. The critical parts of a BMS are the input voltages and currents measurement circuits. In this design, they include linear optocouplers for galvanic isolation between the battery pack and the BMS. Optocouplers based on AlGaAs light emitted diodes (LED) and PIN photodiode with external operational amplifiers are used. The design features linear characteristics, to ensure the accuracy of the measurements. The suggested approach is based on graphical data digitalizing, which gives the precise values for the most sensitive parameters: photocurrent, normalized and transferred servo gain and helps the calculation procedure to be automated with MATLAB scripts. Several mathematical methods in the analysis are used in order for the necessary equations to be derived. The results are experimentally verified with prototypes.
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Chang, Yi Tsun, Yu Da Shiau, Po Chun Wu, Ren Hao Xue, and Po Yu Cheng. "LDO of High Power Supply Rejection with Two-Stage Error Amplifiers and Buffer Compensation." Advanced Materials Research 989-994 (July 2014): 3236–39. http://dx.doi.org/10.4028/www.scientific.net/amr.989-994.3236.
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This study develops a low dropout regulator linear regulator, characterized by a high power supply rejection ratio using ultra-low output resistance buffer and two-stage error amplifiers. The high power supply rejection is based on a closed-loop LDO regulator. The ultra-low output resistance buffer achieves ultra-low output impedance with dual shunt feedback loops, subsequently improving load and line regulations, as well as the transient response for low voltage applications. The proposed LDO regulator linear regulator functions under an input voltage of 1.8~3V, and the output voltage can be maintained at around 1.27V. Moreover, its output voltage is independent of input voltage. The proposed regulator is applicable to light-emitting diode driver integrated circuits. The layout chip area of the LDO linear regulator is 21.5μm × 42.6μm.
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Makri, R., M. Gargalakos, and N. K. Uzunoglu. "Design and Development of Monolithic Microwave Integrated Amplifiers and Coupling Circuits for Telecommunication Systems Applications." Active and Passive Electronic Components 25, no. 1 (2002): 1–22. http://dx.doi.org/10.1080/08827510211275.
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Recent advances in printed circuit and packaging technology of microwave and millimeter wave circuits result to the increasing use of MMICs in telecommunication systems. At Microwave and Fiber Optics Lab of NTUA several designs of various MMICs were conducted using the HP Eesof CAD Tool and FET and HEMT models of F20 and H40 GaAs foundry process of GEC Marconi. The designed MMICs are constructed in Europractice Organization while on-wafer probe measurements are performed in the Lab. In that framework, MMIC technologies are employed in the design of power and low noise amplifiers and couplers to be used for mobile and wireless communications as well as remote sensing and radar applications. A medium power linear FET amplifier has been designed with combining techniques on a single chip. The circuit operates at 14.4–15.2 GHz with an input power of−15dB m, a 36 dB total gain, while the input and output VSWR is less than 1.6. Due to high cost of MMIC fabrication only the first subunit was manufactured and tests verified the simulation results. Additionally, novel techniques have been used for the design of two coupling networks at 10 GHz in order to minimize the area occupied. A meander-kind design as well as shunt capacitors were implemented for a90°quadrature coupler and a Wilkinson one in order to reduce size. Finally, a two stages low noise amplifier was designed with the use of H40 GaAs process in order the differences between the relevant designs to be explored. The key specifications for this MMIC LNA include operation at 10 GHz with a total gain of 17 dB while the noise figure is less than 1.5 dB.
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Borys, Andrzej. "On Definition of Operator o for Weakly Nonlinear Circuits." International Journal of Electronics and Telecommunications 62, no. 3 (September 1, 2016): 253–59. http://dx.doi.org/10.1515/eletel-2016-0034.
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Abstract For the first time, operator o appeared in the literature on weakly nonlinear circuits in a Narayanan’s paper on modelling transistor nonlinear distortion with the use of Volterra series. Its definition was restricted only to the linear part of a nonlinear circuit description. Obviously, as we show here, Narayanan’s operator o had meaning of a linear convolution integral. The extended version of this operator, which was applied to the whole nonlinear circuit representation by the Volterra series, was introduced by Meyer and Stephens in their paper on modelling nonlinear distortion in variable-capacitance diodes. We show here that its definition as well as another definition communicated to the author of this paper are faulty. We draw here attention to these facts because the faults made by Meyer and Stephens were afterwards replicated in publications of Palumbo and his coworkers on harmonic distortion calculation in integrated CMOS amplifiers, and recently in a paper about distortion analysis of parametric amplifier by H. Shrimali and S. Chatterjee. These faults are also present in some class notes for students, which are available on WWW-pages.
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Lee, Changyeop, Gyuseong Cho, Troy Unruh, Seop Hur, and Inyong Kwon. "Integrated Circuit Design for Radiation-Hardened Charge-Sensitive Amplifier Survived up to 2 Mrad." Sensors 20, no. 10 (May 12, 2020): 2765. http://dx.doi.org/10.3390/s20102765.
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According to the continuous development of metal-oxide semiconductor (MOS) fabrication technology, transistors have naturally become more radiation-tolerant through steadily decreasing gate-oxide thickness, increasing the tunneling probability between gate-oxide and channel. Unfortunately, despite this radiation-hardened property of developed transistors, the field of nuclear power plants (NPPs) requires even higher radiation hardness levels. Particularly, total ionizing dose (TID) of approximately 1 Mrad could be required for readout circuitry under severe accident conditions with 100 Mrad around a reactor in-core required. In harsh radiating environments such as NPPs, sensors such as micro-pocket-fission detectors (MPFD) would be a promising technology to be operated for detecting neutrons in reactor cores. For those sensors, readout circuits should be fundamentally placed close to sensing devices for minimizing signal interferences and white noise. Therefore, radiation hardening ability is necessary for the circuits under high radiation environments. This paper presents various integrated circuit designs for a radiation hardened charge-sensitive amplifier (CSA) by using SiGe 130 nm and Si 180 nm fabrication processes with different channel widths and transistor types of complementary metal-oxide-semiconductor (CMOS) and bipolar CMOS (BiCMOS). These circuits were tested under γ–ray environment with Cobalt-60 of high level activity: 490 kCi. The experiment results indicate amplitude degradation of 2.85%–34.3%, fall time increase of 201–1730 ns, as well as a signal-to-noise ratio (SNR) of 0.07–11.6 dB decrease with irradiation dose increase. These results can provide design guidelines for radiation hardening operational amplifiers in terms of transistor sizes and structures.
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Lahbib, Insaf, Sidina Wane, Aziz Doukkali, Dominique Lesénéchal, Thanh Vinh Dinh, Laurent Leyssenne, Rosine Coq Germanicus, et al. "Reliability analysis of BiCMOS SiGe:C technology under aggressive conditions for emerging RF and mm-wave applications: proposal of reliability-aware circuit design methodology." International Journal of Microwave and Wireless Technologies 10, no. 5-6 (June 2018): 690–99. http://dx.doi.org/10.1017/s1759078718000624.
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AbstractIn this contribution, the impact of extreme environmental conditions in terms of energy-level radiation of protons on silicon–germanium (SiGe)-integrated circuits is experimentally studied. Canonical representative structures including linear (passive interconnects/antennas) and non-linear (low-noise amplifiers) are used as carriers for assessing the impact of aggressive stress conditions on their performances. Perspectives for holistic modeling and characterization approaches accounting for various interaction mechanisms (substrate resistivity variations, couplings/interferences, drift in DC and radio frequency (RF) characteristics) for active samples are down to allow for optimal solutions in pushing SiGe technologies toward applications with harsh and radiation-intense environments (e.g. space, nuclear, military). Specific design prototypes are built for assessing mission-critical profiles for emerging RF and mm-wave applications.
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Schmidt, Alexander, Holger Kappert, Wolfgang Heiermann, and Rainer Kokozinski. "A Cyclic RSD Analog-Digital-Converter for Application Specific High Temperature Integrated Circuits up to 250°C." Additional Conferences (Device Packaging, HiTEC, HiTEN, and CICMT) 2012, HITEC (January 1, 2012): 000214–19. http://dx.doi.org/10.4071/hitec-2012-wp13.
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Silicon-on-Insulator (SOI) CMOS is the most commonly used technology for integrated circuits suitable for high temperatures and harsh environmental conditions. Data acquisition circuitry operating at these conditions has to consider the impact of wide temperature range operation. Therefore, the accurate operation of elementary building blocks is essential for proper system performance. To overcome the accuracy limitations set by channel leakage and performance degradation of NMOS and PMOS transistors, advanced circuit design methods are necessary. By introducing advanced leakage compensation, the overall performance of analog circuits at elevated temperatures is significantly improved. In this paper we present a cyclic analog-to-digital converter with a resolution of 12 bit, fabricated in a 1.0 μm SOI CMOS process. It utilizes the redundant signed digit (RSD) principle in a switched capacitor circuit and is thus insensitive to amplifier or comparator offset. In order to reduce the conversion error, leakage current compensated switches have been used. The ADC features two high gain operational amplifiers. Thereby a gain of more than 110 dB over the whole temperature range has been realized. The ADC's performance has been verified up to 250°C with an input voltage range from 0 V to 5 V. Preliminary results report an accuracy of more than 10 bits with a conversion rate of 1.25 kS/s. The supply voltage is 5 V with a maximum power consumption of 3.4 mW for the analog part of the circuit. The ADC is intended as an IP module to be used in customer specific mixed signal integrated circuits.
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Duan, Quanzhen, Weidong Li, Shengming Huang, Yuemin Ding, Zhen Meng, and Kai Shi. "A Two-Module Linear Regulator with 3.9–10 V Input, 2.5 V Output, and 500 mA Load." Electronics 8, no. 10 (October 10, 2019): 1143. http://dx.doi.org/10.3390/electronics8101143.
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A linear regulator with an input range of 3.9–10 V, 2.5 V output, and a maximal 500 mA load for use with battery systems was developed and presented here. The linear regulator featured two modules of a preregulator and a linear regulator core circuit, offering minimized power dissipation and high-level stability. The preregulator delivered an internal power voltage of 3 V and supplied internal circuits including the second module (the linear regulator core). The preregulator fitted with an active, low-pass filter provided a low-noise reference voltage to the linear regulator core circuit. To ensure operational stability for the linear regulator, error amplifiers incorporating the Miller compensation technique and featuring a large slewing rate were employed in the two modules. The circuit was successfully implemented in a 0.25 µm, 5 V complementary metal-oxide semiconductor (CMOS) process featuring 20 V drain-extended MOS (DMOS)/bipolar high-voltage devices. The total silicon area, including all pads, was approximately 1.67 mm2. To reduce chip area, bipolar rather than DMOS transistors served as the power transistors. Measured results demonstrated that the designed linear regulator was able to operate at an input voltage ranging from 3.9 to 10 V and offer a maximum 500 mA load current with fixed 2.5 V output voltage.
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Squartecchia, Michele, Tom K. Johansen, Jean-Yves Dupuy, Virginio Midili, Virginie Nodjiadjim, Muriel Riet, and Agnieszka Konczykowska. "Optimization of InP DHBT stacked-transistors for millimeter-wave power amplifiers." International Journal of Microwave and Wireless Technologies 10, no. 9 (August 7, 2018): 999–1010. http://dx.doi.org/10.1017/s1759078718001137.
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AbstractIn this paper, we report the analysis, design, and implementation of stacked transistors for power amplifiers realized on InP Double Heterojunction Bipolar Transistors (DHBTs) technology. A theoretical analysis based on the interstage matching between all the single transistors has been developed starting from the small-signal equivalent circuit. The analysis has been extended by including large-signal effects and layout-related limitations. An evaluation of the maximum number of transistors for positive incremental power and gain is also carried out. To validate the analysis, E-band three- and four-stacked InP DHBT matched power cells have been realized for the first time as monolithic microwave integrated circuits (MMICs). For the three-stacked transistor, a small-signal gain of 8.3 dB, a saturated output power of 15 dBm, and a peak power added efficiency (PAE) of 5.2% have been obtained at 81 GHz. At the same frequency, the four-stacked transistor achieves a small-signal gain of 11.5 dB, a saturated output power of 14.9 dBm and a peak PAE of 3.8%. A four-way combined three-stacked MMIC power amplifier has been implemented as well. It exhibits a linear gain of 8.1 dB, a saturated output power higher than 18 dBm, and a PAE higher than 3% at 84 GHz.
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Bertemes-Filho, Pedro, Volney C. Vincence, Marcio M. Santos, and Ilson X. Zanatta. "Low power current sources for bioimpedance measurements: a comparison between Howland and OTA-based CMOS circuits." Journal of Electrical Bioimpedance 3, no. 1 (July 23, 2019): 66–73. http://dx.doi.org/10.5617/jeb.380.
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Abstract Multifrequency Electrical Bioimpedance (MEB) has been widely used as a non-invasive technique for characterizing tissues. Most MEB systems use wideband current sources for injecting current and instrumentation amplifiers for measuring the resultant potential difference. To be viable current sources should have intrinsically high output impedance for a very wide frequency range. Most contemporary current sources in MEB systems are based on the Howland circuit. The objective of this work is to compare the Mirrored Modified Howland Current Source (MMHCS) with three Operational Transconductance Amplifier (OTA) based voltage controlled current sources (i.e., class-A, class-AB and current conveyor). The results show that both current conveyor and class-AB OTA-based current sources have a wider output current frequency response and an output impedance of 226% larger than the MMHCS circuit at 1 MHz. The presented class-AB OTA circuit has a power consumption of 4.6 mW whereas current conveyor consumed 1.6 mW. However, the MMHCS circuit had a maximum total harmonic distortion of 0.5% over the input voltage from -0.5 to +0.5 V. The OTA-based current sources are going to be integrated in a semiconductor process. The results might be useful for cell impedance measurements and for very low power bioimpedance applications.
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Cheremukhin, Dmitry. "Calculation of pulse voltage stabilizer." E3S Web of Conferences 178 (2020): 01055. http://dx.doi.org/10.1051/e3sconf/202017801055.
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This scientific article is devoted to one of the priority issues in electronics, namely the implementation of the engineering task of designing a power source. In my case, according to the terms of reference, which includes: the main parameters of the network, efficiency, a structural electrical circuit of a switching power supply was developed. In the process, the main functional units (blocks) were calculated and the choice of radio components from which they were built on the basis of: current values, reverse voltage, gain, operating frequency and other parameters of diodes, transistors, integrated circuits, Zener diodes, operational amplifiers was justified. In the “Methods” section, calculations will be made for the device blocks: a network rectifier, a push-pull transformer converter, a pre-amplifier circuit with a transformer input, an error signal comparison and amplification circuit, a sawtooth voltage generator, and a secondary power source. The information presented in the text is recommended to a narrow circle of specialists, priority in the field of power electronics, as well as in the field of communication systems.
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S. Sánchez, Allan G., Josué Soto-Vega, Esteban Tlelo-Cuautle, and Martín Antonio Rodríguez-Licea. "Fractional-Order Approximation of PID Controller for Buck–Boost Converters." Micromachines 12, no. 6 (May 21, 2021): 591. http://dx.doi.org/10.3390/mi12060591.
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Viability of a fractional-order proportional–integral–derivative (PID) approximation to regulate voltage in buck–boost converters is investigated. The converter applications range not only to high-power ones but also in micro/nano-scale systems from biomedicine for energy management/harvesting. Using a classic closed-loop control diagram the controller effectiveness is determined. Fractional calculus is considered due to its ability at modeling different types of systems accurately. The non-integer approach is integrated into the control strategy through a Laplacian operator biquadratic approximation to generate a flat phase curve in the system closed-loop frequency response. The controller synthesis considers both robustness and closed-loop performance to ensure a fast and stable regulation characteristic. A simple tuning method provides the appropriate gains to meet design requirements. The superiority of proposed approach, determined by comparing the obtained time constants with those from typical PID controllers, confirms it as alternative to controller non-minimum phases systems. Experimental realization of the resulting controller, implemented through resistor–capacitor (RC) circuits and operational amplifiers (OPAMPs) in adder configuration, confirms its effectiveness and viability.
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Wang, San-Fu, Hua-Pin Chen, Yitsen Ku, and Chia-Ling Lee. "Versatile Voltage-Mode Biquadratic Filter and Quadrature Oscillator Using Four OTAs and Two Grounded Capacitors." Electronics 9, no. 9 (September 11, 2020): 1493. http://dx.doi.org/10.3390/electronics9091493.
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This article presents a versatile voltage-mode (VM) biquad filter with independently electronic tunability. The proposed structure using one dual-output operational transconductance amplifier, three single-output operational transconductance amplifiers (OTAs) and two grounded capacitors was explored to derive a new VM quadrature oscillator with the independent control of the oscillation frequency and the oscillation condition. The proposed versatile VM biquad filter achieves nearly all of the main advantages: (i) simultaneous realizations of band-reject, band-pass, and low-pass from the same architecture, (ii) multiple-input and multiple-output functions, (iii) independent electronic adjustability of quality factor and resonant angular frequency, (iv) no resistor needed, (v) all input terminals with cascade functions, (vi) no additional inverting amplifier for input signals, (vii) using only grounded capacitors, and (viii) easy to implement a VM quadrature oscillator with independent electronically controlled oscillation frequency and oscillation condition. The proposed versatile VM biquad filter employs only four OTAs and two grounded capacitors. The active components of the proposed VM biquad filter are one less than that of recent reports. The proposed circuit also brings versatility and simplicity to the design of VM biquad filters and VM quadrature oscillators. Filters and oscillators with less active and passive components have the advantages of low cost, low power dissipation, low circuit complexity, and low noise. Commercially available integrated circuit LT1228 and discrete components can be used to implement the proposed OTA-based circuits. The simulation and experiment results validated the theoretical analysis.
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Al Rabea, Adnan I., Mahmud S. Alkoffash, Feras Almatarneh, and Basim Alhadidi. "The Methods of Synthesis of Multilevel Circuits of Compositional Micro Program Control Units." Applied Mechanics and Materials 110-116 (October 2011): 5429–36. http://dx.doi.org/10.4028/www.scientific.net/amm.110-116.5429.
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On the basis of theoretical and experimental researches the new structures and formal methods of compositional micro program control units design are proposed. It is shown that optimization of hardware in the unit of microinstructions’ addressing can be achieved by application of the methods of multilevel implementation of automata with “hardware” logic, that need adaptation to the peculiarities of compositional micro program control units. It is proposed to use the methods of the logic conditions’ encoding, the codes of the states, the codes of the operational linear chains and their classes, and also the addresses of microinstructions. The new structures and methods of design were developed for all known structures of compositional micro program control units. The proposed methods permit to decrease the amount of programmable logic devices in the automaton of addressing’s circuit from 12% to 42% in comparison with known methods of design. The analytical estimations of hardware amount as the function of characteristics of initial flow-chart have been made up. These methods permit to expand the class of synthesizable control units. The conducted researches permit to find an area of the effective application of proposed methods of design. The purpose of work is minimization of number of the large-scale integrated circuit in circuit of automatons of addressing of CMCU due to application of methods of a structural reduction. The analysis of methods of realization of algorithms of control, element basis, methods of a structural reduction, methods of synthesis and optimization of compositional micro program control units are executed, the primary goals of researches are formulated.. (Abstract)
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Wang, Songlin, Shuang Feng, Hui Wang, Yu Yao, Jinhua Mao, and Xinquan Lai. "A novel high accuracy bandgap reference voltage source." Circuit World 43, no. 4 (November 6, 2017): 141–44. http://dx.doi.org/10.1108/cw-04-2017-0019.
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Purpose This paper aims to design a new bandgap reference circuit with complementary metal–oxide–semiconductor (CMOS) technology. Design/methodology/approach Different from the conventional bandgap reference circuit with operational amplifiers, this design directly connects the two bases of the transistors with both the ends of the resistor. The transistor acts as an amplifier to amplify the change of voltage, which is convenient for the feedback regulation of low dropout regulator (LDO) regulator circuit, at last to realize the temperature control. In addition, introducing the depletion-type metal–oxide–semiconductor transistor and the transistor operating in the saturation region through the connection of the novel circuit structure makes a further improvement on the performance of the whole circuit. Findings This design is base on the 0.18?m process of BCD, and the new bandgap reference circuit is verified. The results show that the circuit design not only is simple and novel but also can effectively improve the performance of the circuit. Bandgap voltage reference is an important module in integrated circuits and electronic systems. To improve the stability and performance of the whole circuit, simple structure of the bandgap reference voltage source is essential for a chip. Originality/value This paper adopts a new circuit structure, which directly connects the two base voltages of the transistors with the resistor. And the transistor acts as an amplifier to amplify the change of voltage, which is convenient for the feedback regulation of LDO regulator circuit, at last to realize the temperature control.
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Fedyanin, Dmitry Yu, Alexey V. Krasavin, Aleksey V. Arsenin, and Anatoly V. Zayats. "Lasing at the nanoscale: coherent emission of surface plasmons by an electrically driven nanolaser." Nanophotonics 9, no. 12 (July 20, 2020): 3965–75. http://dx.doi.org/10.1515/nanoph-2020-0157.
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AbstractPlasmonics offers a unique opportunity to break the diffraction limit of light and bring photonic devices to the nanoscale. As the most prominent example, an integrated nanolaser is a key to truly nanoscale photonic circuits required for optical communication, sensing applications and high-density data storage. Here, we develop a concept of an electrically driven subwavelength surface-plasmon-polariton nanolaser, which is based on a novel amplification scheme, with all linear dimensions smaller than the operational free-space wavelength λ and a mode volume of under λ3/30. The proposed pumping approach is based on a double-heterostructure tunneling Schottky barrier diode and gives the possibility to reduce the physical size of the device and ensure in-plane emission so that the nanolaser output can be naturally coupled to a plasmonic or nanophotonic waveguide circuitry. With the high energy efficiency (8% at 300 K and 37% at 150 K), the output power of up to 100 μW and the ability to operate at room temperature, the proposed surface plasmon polariton nanolaser opens up new avenues in diverse application areas, ranging from ultrawideband optical communication on a chip to low-power nonlinear photonics, coherent nanospectroscopy, and single-molecule biosensing.
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Mansurov, Tofig M., and Chingiz P. Aliyev. "THREE-DIMENSIONAL PIEZOELECTRIC ACCELEROMETER FOR MEASURING DYNAMIC PARAMETERS OF MOVING OBJECTS." SYNCHROINFO JOURNAL 6, no. 6 (2020): 10–16. http://dx.doi.org/10.36724/2664-066x-2020-6-6-10-16.
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Analysis of structural construction of existing three-dimensional accelerometers is carried out, in which due to the opposite direction of sensitivity vectors and direction of measured inertial force, they allow to measure only linear inertia and accelerations varying in relatively small limits. On the other hand, due to the presence of elements in them that create electromagnetic fields, their construction is somewhat complicated. In addition, in known accel-erometers, due to the absence of a measurement object position sensor and an electronic control circuit, the func-tionality of the accelerometer is limited, Due to lack of integrator for acceleration integration, speed measurement is not provided, Due to rigid attachment of piezoelectric sensing elements through their bases, during measurement they generate interference signals, The amplitude of which exceeds the amplitude of the useful signal, which does not ensure reliability of the measured acceleration or speed and due to the presence of sensitive piezoelectric ele-ments, Having higher rigidity and requiring relatively large mechanical forces for generation of signals during mo-tion of acceleration and speed measurement object in automatic mode, which reduces sensitivity of accelerometer. Invention proposes new design and control scheme of three-dimensional piezoelectric accelerometer for measure-ment of dynamic parameters of moving objects in automatic mode. Wherein providing the position sensor of the moving measurement object with a three-axis signal detection unit to determine a direction of motion with meas-urement of acceleration or linear velocity when the measurement object moves along the coordinate axis; With the help of differential operational amplifiers through pulse generators and integrators, Speed measurement is provided by damping piezoelectric elements when the measurement object moves along one of the coordinate axes; Across the other two axes, the generated interference signals by amplitude are significantly reduced by their redemption; Having a piezoelectric element in the structure in the form of two-layer flat plates with an excitation section and a sensor section; Which generates signals at fast-changing acceleration and speed of moving object, amplitude of signal and sensitivity increases in 4-5 due to generation of signal by sensitive elements in vibration excitation mode created in accelerometer. Mathematical basis for accelerometer control circuits, mathematical model of its functioning is developed, applica-tion of which increases sensitivity of measurement of linear accelerations and speeds of moving objects and expands functional capabilities.
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Kondratiev, A. V. "A concept of optimization of structural and technological parameters of polymer composite rocket units considering the character of their production." Kosmìčna nauka ì tehnologìâ 26, no. 6 (2020): 5–22. http://dx.doi.org/10.15407/knit2020.06.005.
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We present a concept of optimization of structural and technological parameters of rocket and space technology units from polymer composite materials under heterogeneous loading and a project complex for their rational selection, taking into account the current level of production. The concept includes five interconnected components: design, production technologies, operation, ecology, and safety of industrial life. The analysis of possible criteria-based optimization estimates is carried out on the example of the technological component of the problem. Decompositions of the general task of parameters’ optimization were carried out into a number of types that correspond to the main types of structures of the considered class of technology: load-bearing compartments of launch vehicles and precision structures of spacecraft. An integrated approach to the optimal design of the bearing compartments of the head block of launch vehicles of various structural and power schemes is proposed. A distinctive feature of the approach is the possibility of multifactor optimization of the parameters for units of the class under consideration while providing regulated load-bearing capacity with simultaneous power and heat loading, taking into account technological, operational, economic, and environmental restrictions that correspond to the existing level of their production. A conceptual approach to the synthesis of rational parameters of composite frames of solar panels of various structural and power circuits is proposed, based on the integrated realization of well-known principles implemented by relevant units that are integrated by computer technology into a single optimization complex. An integrated approach has been synthesized to create precision space structures from polymer composite materials, which makes it possible to obtain rational thermo-dimensionally stable composite structures. An algorithm for determining the rational structure of a composite package has been developed and implemented, which provides a compromise combination for the absolute values of the coefficient of linear thermal expansion keeping maximum precision of the product in accordance with the proposed criteria. The results obtained made it possible to provide an increase by more than 20% in the mass efficiency of the composite aggregates of rocket and space technology produced at the leading enterprises of the industry.
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Kitchen, Jennifer, Soroush Moallemi, and Sumit Bhardwaj. "Multi-chip module integration of Hybrid Silicon CMOS and GaN Technologies for RF Transceivers." Additional Conferences (Device Packaging, HiTEC, HiTEN, and CICMT) 2019, DPC (January 1, 2019): 000339–82. http://dx.doi.org/10.4071/2380-4491-2019-dpc-presentation_tp1_010.
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Digital transceiver architectures offer the potential for achieving wireless hardware flexibility to frequency and modulation scheme for future-generation communications systems. Additionally, digital transmitters lend themselves to the use of switch-mode power amplifiers, which can have significantly higher efficiency than their linear counterparts. Two proposed architectures for realizing digital transmitters will be described in this work, both of which employ a hybrid combination of silicon integrated circuits (IC) and a power technology (e.g. GaN). This hybrid architecture takes advantage of the silicon to implement the high-complexity signal processing required for wireless communications, and uses power devices with high power density and low parasitic capacitance to sufficiently amplify the RF signals for transmission. Unfortunately, interfacing the low-power RF switching signals with off-chip high-power devices poses numerous design challenges, including: generation of integrated silicon power drivers with sufficient voltage swing for controlling power devices such as GaN, mitigation of on-chip current transients, wideband assembly interface from the silicon IC to the power device, and full system design verification using multiple process technologies. This work presents two CMOS driver architectures that can be used to interface low-power CMOS processing circuits with off-chip high-power devices. This work also details the performance limitations when assembling and interfacing multiple process technologies that are not co-located on the same IC. The main function of the driver circuitry within the digital transceiver system is to interface the low-power digital modulator to a large, high capacitance, off-chip power device. The driver must provide adequate transient current to charge/discharge the off-chip power devices' input capacitance through parasitic routing. Furthermore, the driver is designed to exhibit rise/fall times of less than 5% of the switching period and low jitter to meet RF signal quality requirements. Since silicon process technologies typically have much lower voltage breakdowns than those required to drive a power devie (e.g. GaN device), special driver architectures must be implemented to ensure the CMOS devices never exceed their breakdown voltages. Two architectures were implemented within this work to simultaneously achieve RF switching speeds and 5V signal swing from a 0.9V silicon CMOS process technology. The two architectures are: 1) a House-of-Cards configuration, and 2) a Cascode topology. These architectures will be detailed and compared with respect to performance in this presentation. Two of the most common techniques to assemble and connect a silicon IC, which includes the driver circuitry, and a (GaN) power device are: 1) direct wire bonding or flip-chip connection from the IC to the GaN, and 2) connection through a board or package interface circuit. Since most high-performance RF power devices such as GaN have negative threshold voltage, the driver (CMOS) IC must either: 1) have a supply and ground that are shifted to negative voltage values, or 2) decouple the IC's output from the GaN device's input in order to properly control the GaN. Off-chip decoupling is more easily implemented, but may limit maximum operating frequencies due to the added interface network and board/module parasitics. This work shall detail the interface models and compare the assembly procedures and potential performance limits when using both of these most common assembly techniques.
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Da Silva, Josivaldo Godoy, Desirée Ferro Scapinelli, Josivaldo Godoy Da Silva, Lailson Moura Fé, and Iandara Schettert Silva. "Biomedical Mechatronic Dynamometer to Support the Evaluation of the Effects of Leprosy Through the Palmar Holding Strenght and the Tweezer Holding Strenght." International Journal for Innovation Education and Research 8, no. 1 (January 31, 2020): 109–18. http://dx.doi.org/10.31686/ijier.vol8.iss1.2125.
Full textAbstract:
The hand can suffer the effects of several diseases among the most serious, leprosy stands out, which is considered infectious and can generate loss of muscle strength, atrophy, deformity and physical, mental and social disability. For the World Health Organization (WHO) and also doctors and physiotherapists, it is necessary to evaluate the diseases in an objective, reliable and early manner in order to propose appropriate treatment and follow their evolution. This research proposed a biomedical mechatronic dynamometer in order to support the evaluation of the effects of leprosy by means of palmar grip strength and grip strength of tweezers performed by hand. The experimental research was developed at the Federal University of Mato Grosso do Sul and consisted first of all in the survey of the demands of the health area in relation to the biomedical dynamometer being consulted the following databases: Medical Literature Analysis and Retrieval System Online (Medline); US National Library of Medicine National Institutes of Health (PUBMED) e Institute of Electrical and Electronic Engineers (IEEE). The mechatronic biomedical dynamometer consisted of three fundamental parts: mechanical structure, electronic signal conditioning circuitry and digital information processing. The mechanical structure was designed to withstand a strenght of up to 700 N, developed in brass because this metal has low cost, has less mass and also because it is easier to machine than steel. The oval shape of the structure contains two lateral and thin regions that measure 2 cm thick, 3 cm wide each and aim to concentrate mechanical stresses in order to sensitize the strain sensor consisting of the four linear strain gages, model N2A-XX-S5262P-350/E4 and nominal resistance of 350 Ω, from the company Micro-Measurements, which showed accuracy of 98%. The mechanical structure also has a stainless-steel support that measures 1 cm thick and 3 cm wide located at the bottom and on which was glued a cushion to support the palm of the hand. This support can be replaced by other models that also contain a cushion that considers the presence of injuries or deformities in the hand. The mechanical structure also has a upper support that also measures 1 cm thick and 3 cm wide, to which four pressure sensors developed with rosette strain gages model N2K-XX-S5294R-350/DP/E4 with a nominal resistance of 350 Ω, from the company Micro-Measurements, were fixed and which showed an accuracy of 99.5%. The deformation sensor is stimulated by the application of palmar grip strenght while the pressure sensors are stimulated by the realization of index, middle, annular and minimum finger gripping strenght. In addition, these sensors are connected to Wheatstone Bridges whose feeds and also the responses are processed by five signal conditioning circuits developed with operational amplifiers LF 356, OPA 27 and OP27 GP of the company Burr-Brown, whose structure consists of voltage oscillator, amplifier, band pass filter, buffer and peak detector that generates DC voltage that feeds the data acquisition board. The answers on this board are sent to the Inspiron 15 3000 microcomputer from Dell, which has installed Labview software from National Instruments, which processes the information, stores, plotts the palmar grip strenght and pinch grip strenght graphs and can also send the information over the Internet. This research has the potential to obtain accurate information on the effects of leprosy in the hand that can support the evaluation, diagnosis of health professionals, follow up the evolution of the disease and the treatment adopted.
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SILVA-JUÁREZ, Alejandro, Jaime ESTEVEZ-CARREÓN, Juan Jorge PONCE-MELLADO, and Gustavo HERRERA-SÁNCHEZ. "Implementación electrónica basada en FPAA del oscilador caótico de Lorenz." Revista de Aplicaciones de la Ingeniería, March 30, 2020, 14–22. http://dx.doi.org/10.35429/jea.2020.22.7.14.22.
Full textAbstract:
Nowadays, chaotic systems are very interesting topics for engineers, physicists and mathematicians because most real physical systems are inherently non-linear in nature. The first electronic implementations of autonomous chaotic oscillators were developed using operational amplifiers and diodes, different references detail implementations of chaotic circuits and systems using analog integrated circuit technology, discrete devices such as FPGA (Field programmable gate arrays), microcontrollers, etc. However, analog implementations suffer the problem of sensitivity of analog component values and digital implementations suffer the problem of degradation due to the reduced number of bits to perform computer arithmetic operations. The systems of differential equations that model the chaotic oscillators require integrators that can be implemented with FPAA's (Field programmable analogue array), in this work electronic implementations are developed that are measured in laboratory conditions to observe experimental chaotic attractors, which will be used in the implementation of random number generators and secure communication systems for image encryption.
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"Operational amplifiers: integrated and hybrid circuits." Choice Reviews Online 31, no. 01 (September 1, 1993): 31–0333. http://dx.doi.org/10.5860/choice.31-0333.
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Di Marco, Mauro, Giacomo Innocenti, Alberto Tesi, and Mauro Forti. "Circuits with a mem-element: invariant manifolds control via pulse programmed sources." Nonlinear Dynamics, September 16, 2021. http://dx.doi.org/10.1007/s11071-021-06861-x.
Full textAbstract:
AbstractThe paper considers the problem of controlling multistability in a general class of circuits composed of a linear time-invariant two-terminal (one port) element, containing linear R, L, C components and ideal operational amplifiers, coupled with one of the mem-elements (memory elements) introduced by Prof. L.O. Chua, i.e., memristors, memcapacitors, and meminductors. First, explicit expressions of the invariant manifolds of the circuit are directly given in terms of the state variables of the two-terminal element and the mem-element. Then, the problem of steering the circuit dynamics from an initial invariant manifold to a final one, and hence to potentially switch among different attractors of the circuit, is addressed by designing pulse shaped control inputs. The control inputs ensure that the transition between the initial and final manifolds is accomplished within a given finite time interval. Moreover, it is shown how the designed control inputs can be implemented by introducing independent voltage and current sources in the two-terminal element. Notably, it turns out that it is always possible to solve the considered control problem by using a unique independent source. Several examples are provided to illustrate how the proposed approach can be applied to different circuits with mem-elements and to highlight the influence of the features of the designed sources on the behavior of the controlled dynamics.