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1

Wang, San-Fu. "A 5 V-to-3.3 V CMOS Linear Regulator with Three-Output Temperature-Independent Reference Voltages." Journal of Sensors 2016 (2016): 1–7. http://dx.doi.org/10.1155/2016/1436371.

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This paper presents a 5 V-to-3.3 V linear regulator circuit, which uses 3.3 V CMOS transistors to replace the 5 V CMOS transistors. Thus, the complexity of the manufacturing semiconductor process can be improved. The proposed linear regulator is implemented by cascode architecture, which requires three different reference voltages as the bias voltages of its circuit. Thus, the three-output temperature-independent reference voltage circuit is proposed, which provides three accurate reference voltages simultaneously. The three-output temperature-independent reference voltages also can be used in other circuits of the chip. By using the proposed temperature-independent reference voltages, the proposed linear regulator can provide an accurate output voltage, and it is suitable for low cost, small size, and highly integrated system-on-chip (SoC) applications. Moreover, the proposed linear regulator uses the cascode technique, which improves both the gain performance and the isolation performance. Therefore, the proposed linear regulator has a good performance in reference voltage to output voltage isolation. The voltage variation of the linear regulator is less than 2.153% in the temperature range of −40°C–120°C, and the power supply rejection ratio (PSRR) is less than −42.8 dB at 60 Hz. The regulator can support 0~200 mA output current. The core area is less than 0.16 mm2.
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2

Kargarrazi, Saleh, Luigia Lanni, Stefano Saggini, Ana Rusu, and Carl-Mikael Zetterling. "500 °C Bipolar SiC Linear Voltage Regulator." IEEE Transactions on Electron Devices 62, no. 6 (June 2015): 1953–57. http://dx.doi.org/10.1109/ted.2015.2417097.

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3

Su, Chiahung, Syed K. Islam, Kai Zhu, and Liang Zuo. "A high-temperature, high-voltage, fast response linear voltage regulator." Analog Integrated Circuits and Signal Processing 72, no. 2 (June 8, 2012): 405–17. http://dx.doi.org/10.1007/s10470-012-9877-9.

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4

Murphree, R. C., S. Ahmed, M. Barlow, A. Rahman, H. A. Mantooth, and A. M. Francis. "A CMOS SiC Linear Voltage Regulator for High Temperature Applications." Additional Conferences (Device Packaging, HiTEC, HiTEN, and CICMT) 2016, HiTEC (January 1, 2016): 000106–11. http://dx.doi.org/10.4071/2016-hitec-106.

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Abstract This paper establishes the first linear regulator in a 1.2 μm CMOS silicon carbide (SiC) process. The linear regulator presented consists of a SiC error amplifier and a pass transistor which has a W/L = 70,000 μm / 1.2 μm. The feedback loop is internal and the frequency compensation network is a combination of internal and external components. As a result of potential process variation in this emerging technology, the voltage reference used at the negative input terminal of the error amplifier has been made external. With an input voltage of 20 V to 30 V, the voltage regulator is able to provide a 15 V output and a continuous load current of 100 mA at temperatures ranging from 25 °C to over 400 °C. At a temperature of 400 °C, testing of the fabricated circuit has shown line regulation of less than 4 mV/V. Under the same test conditions, a load regulation of less than 420 mV/A is achieved.
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5

Adell, P. C., R. D. Schrimpf, W. T. Holman, J. L. Todd, S. Caveriviere, R. R. Cizmarik, and K. F. Galloway. "Total dose effects in a linear Voltage regulator." IEEE Transactions on Nuclear Science 51, no. 6 (December 2004): 3816–21. http://dx.doi.org/10.1109/tns.2004.839194.

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6

Crovetti, Paolo S., and Franco L. Fiori. "A Linear Voltage Regulator Model for EMC Analysis." IEEE Transactions on Power Electronics 22, no. 6 (November 2007): 2282–92. http://dx.doi.org/10.1109/tpel.2007.909295.

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7

Martínez-García, Herminio, and Alireza Saberkari. "Four-quadrant linear-assisted DC/DC voltage regulator." Analog Integrated Circuits and Signal Processing 88, no. 1 (April 23, 2016): 151–60. http://dx.doi.org/10.1007/s10470-016-0747-8.

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8

Chang, Yi Tsun, Yu Da Shiau, Po Chun Wu, Ren Hao Xue, and Po Yu Cheng. "LDO of High Power Supply Rejection with Two-Stage Error Amplifiers and Buffer Compensation." Advanced Materials Research 989-994 (July 2014): 3236–39. http://dx.doi.org/10.4028/www.scientific.net/amr.989-994.3236.

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This study develops a low dropout regulator linear regulator, characterized by a high power supply rejection ratio using ultra-low output resistance buffer and two-stage error amplifiers. The high power supply rejection is based on a closed-loop LDO regulator. The ultra-low output resistance buffer achieves ultra-low output impedance with dual shunt feedback loops, subsequently improving load and line regulations, as well as the transient response for low voltage applications. The proposed LDO regulator linear regulator functions under an input voltage of 1.8~3V, and the output voltage can be maintained at around 1.27V. Moreover, its output voltage is independent of input voltage. The proposed regulator is applicable to light-emitting diode driver integrated circuits. The layout chip area of the LDO linear regulator is 21.5μm × 42.6μm.
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9

Ho, Tay Quang, and Hoang Duc Ngo. "A LOW DROPOUT LINEAR VOLTAGE REGULATOR CHIP, THE TH7150." Science and Technology Development Journal 12, no. 16 (October 15, 2009): 51–62. http://dx.doi.org/10.32508/stdj.v12i16.2355.

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A low dropout (LDO) linear voltage regulator, dubbed TH7150, is designed and reported. TH7150 is a power management device for analog chips, operating at low quiescent current (100uA), low voltage supply (1.6-3.6V), with low dropout voltage (200mV), and capable of driving 150mA output current. Its output voltage is programmable by logic control and also manually adjustable. It features protection measures for overheating and overloading and monitoring for the output voltage to prevent a dropout greater than 10% of current value. The chip is designed to be fabricated using 0.35 um process. It can be used as a standalone chip or integrated in a power supply chip for portable devices such as Smart phone, cell phone, Ipod, digital camera etc.
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10

Duan, Quanzhen, Weidong Li, Shengming Huang, Yuemin Ding, Zhen Meng, and Kai Shi. "A Two-Module Linear Regulator with 3.9–10 V Input, 2.5 V Output, and 500 mA Load." Electronics 8, no. 10 (October 10, 2019): 1143. http://dx.doi.org/10.3390/electronics8101143.

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A linear regulator with an input range of 3.9–10 V, 2.5 V output, and a maximal 500 mA load for use with battery systems was developed and presented here. The linear regulator featured two modules of a preregulator and a linear regulator core circuit, offering minimized power dissipation and high-level stability. The preregulator delivered an internal power voltage of 3 V and supplied internal circuits including the second module (the linear regulator core). The preregulator fitted with an active, low-pass filter provided a low-noise reference voltage to the linear regulator core circuit. To ensure operational stability for the linear regulator, error amplifiers incorporating the Miller compensation technique and featuring a large slewing rate were employed in the two modules. The circuit was successfully implemented in a 0.25 µm, 5 V complementary metal-oxide semiconductor (CMOS) process featuring 20 V drain-extended MOS (DMOS)/bipolar high-voltage devices. The total silicon area, including all pads, was approximately 1.67 mm2. To reduce chip area, bipolar rather than DMOS transistors served as the power transistors. Measured results demonstrated that the designed linear regulator was able to operate at an input voltage ranging from 3.9 to 10 V and offer a maximum 500 mA load current with fixed 2.5 V output voltage.
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11

Slamti, Anass, Youness Mehdaoui, Driss Chenouni, and Zakia Lakhliai. "A Dual Frequency Compensation Technique to Improve Stability and Transient Response for a Three Stage Low-Drop-Out Linear Regulator." Mathematical Modelling of Engineering Problems 8, no. 2 (April 28, 2021): 219–29. http://dx.doi.org/10.18280/mmep.080208.

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A novel internal compensation technique named dual frequency compensation is proposed to improve the stability and the transient response of the on-chip output capacitor three stage low-drop-out linear voltage regulator (LDO). It exploits a combination of amplification and differentiation to sufficiently separate the dominant pole from the first non-dominant pole so that the latter is located after the unity gain frequency regardless of the load current value. The proposed LDO regulator is analyzed, designed, and simulated in standard 0.18 µm low voltage CMOS technology. The presented LDO regulator delivers a stable voltage of 1.2 V for an input supply voltage range of 1.35-1.85 V with a maximum line deviation of 4.68mV/V and can supply up to 150mA of the load current. The maximum transient variation of the output voltage is 54.5 mV when the load current pulses from 150mA to 0mA during a fall time of 1µs. The proposed LDO regulator has a low figure of merit compared with recent LDO regulators.
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12

Chaudhary, Rekha, and Arun Kumar Singh. "Analysis and design of different controllers for non-linear power systems." International Journal of Engineering & Technology 2, no. 3 (July 25, 2013): 216. http://dx.doi.org/10.14419/ijet.v2i3.1050.

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The objective of this paper is to design controller for non-linear power system using Direct Feedback Linearization technique to improve the transient stability and to achieve better voltage regulation. In case of fault in the power system, power angle and the terminal voltage are the parameters which are to be monitored. The simulation has been carried out taking different values of initial power angles and results were obtained for power angle and terminal voltage. To overcome the demerits of DFL-LQ optimal controller and DFL voltage regulator, co-ordinated controller is proposed. Simulation results show that transient stability of a power system under a large sudden fault has been improved by using co-ordinated controller.
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13

Dusé, Yoann, Fabien Laplace, Nicolas Joubert, Xavier Montmayeur, Noureddine Zitouni, Sebastien Vieusses, Gregory Thepaut, Arnaud Anota, and Gonzalo Picun. "Robust True LDO Linear Voltage Regulator and Digitally Trimmable Buffered Precision Voltage Reference for High-Temperature, Low-Voltage Applications." Additional Conferences (Device Packaging, HiTEC, HiTEN, and CICMT) 2013, HITEN (January 1, 2013): 000096–103. http://dx.doi.org/10.4071/hiten-mp17.

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We present in this paper two new products for high-temperature, low-voltage (2.8V to 5.5V) power management applications. The first product is an original implementation of a monolithic low dropout regulator (XTR70010), able to deliver up to 1A at 230°C with less than 1V of dropout. This new voltage regulator can source an output current level up to 1.5A. The regulated output voltage can be selected among 32 preset values from 0.5V to 3.6V in steps of 100mV, or it can be obtained with a pair of external resistors. The circuit integrates complex analog and digital control blocks providing state of the art features such as UVLO protection, chip enable control, soft start-up and soft shut-down, hiccup short-circuit protection, customer selectable thermal shut-down, input power supply protection, output overshoot remover and stability over an extremely wide range of load capacitances. The circuit offers a fair ±2% absolute accuracy and is guaranteed latch-up free. The second product is an advanced high-temperature, low-power, digitally trimmable voltage reference (XTR75020). Thanks to a custom, 1-wire serial interface, the absolute precision and the temperature coefficient can be adjusted in order to obtain an accuracy better than 0.5% with a temperature coefficient bellow ±20ppm/°C. On-chip OTP memory for trimming of absolute value and temperature coefficient makes the circuit extremely accurate and almost insensitive to drifts over time and temperature. The circuit features a class AB output buffer able to source or sink up to 5mA and remains stable with any load capacitance up to 50μF. The XTR75020 has nine preset possible output voltages. The source and sink short circuit current always remains bellow 25mA. The quiescent current consumption is 300μA typical at 230°C while the standby current is, in all cases, under 20μA. Both devices are designed on a latch-up free silicon-on-insulator process.
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14

Crepaldi, Paulo Cesar, Tales C. Pimenta, Robson L. Moreno, and Edgard Charry Rodriguez. "A linear voltage regulator for an implantable device monitoring system." Analog Integrated Circuits and Signal Processing 65, no. 1 (March 7, 2010): 131–40. http://dx.doi.org/10.1007/s10470-010-9463-y.

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15

Zhao, Qifeng, Yiqi Zhuang, Junlin Bao, and Wei Hu. "Radiation-induced 1/fnoise degradation of bipolar linear voltage regulator." Journal of Semiconductors 37, no. 3 (March 2016): 034004. http://dx.doi.org/10.1088/1674-4926/37/3/034004.

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16

Valle-Mayorga, Javier A., Ashfaqur Rahman, and Homer Alan Mantooth. "A SiC NMOS Linear Voltage Regulator for High-Temperature Applications." IEEE Transactions on Power Electronics 29, no. 5 (May 2014): 2321–28. http://dx.doi.org/10.1109/tpel.2013.2279251.

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17

Murphree, Robert C., Sajib Roy, Shamim Ahmed, Matthew Barlow, Ashfaqur Rahman, Anthony Matthew Francis, James Holmes, Homer Alan Mantooth, and Jia Di. "A SiC CMOS Linear Voltage Regulator for High-Temperature Applications." IEEE Transactions on Power Electronics 35, no. 1 (January 2020): 913–23. http://dx.doi.org/10.1109/tpel.2019.2914169.

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18

Yavuz, Kutluhan Kürşad, Ertuğrul Karakulak, and Reşat Mutlu. "Memristor-based series voltage regulators." Journal of Electrical Engineering 70, no. 6 (December 1, 2019): 465–72. http://dx.doi.org/10.2478/jee-2019-0079.

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Abstract Series linear voltage regulators are integrated circuits commonly used to make adjustable voltage sources. When used with potentiometers, these regulators are able to give adjustable voltage at the output. Memristor is a new nonlinear circuit element which came out in the last decade. It is able to provide electronically adjustable resistance. If a memristor is fed with a voltage over the threshold and it is not under saturation, its resistance also called memristance is dependent on the integration of its current, also called memristor charge. Memristor shows promise for different types and lots of digital and analog applications. In this paper, memristor-based series voltage regulator topologies are suggested and they are examined using parameters and simulations. Some design criteria have been given for the memristor-based series voltage regulators.
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19

Patil, Soumya, R. S. Geetha, B. L. Santosh, Bhoopendra Kumar Singh, and Vinod Chippalkatti. "Design and implementation of multiple output forward converter with Mag-amp and LDO as post regulators for space application." International Journal of Engineering, Science and Technology 12, no. 3 (September 15, 2020): 43–56. http://dx.doi.org/10.4314/ijest.v12i3.5.

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Linear power supplies are commonly used power supplies for many applications. They have some drawbacks such as low efficiency, difficulty in thermal management and also in regulation of the output voltage. Some of these drawbacks can be overcome by Switch Mode Power Supplies (SMPS). One of the best-suited applications of SMPS is for space applications that require power supplies which are lighter, smaller, more efficient and highly reliable. Multiple-output DC-DC converters are an important topology of SMPS that can be used for space applications. But, in multiple output converters usually, only the master output is regulated and the other outputs are left unregulated and this can result in cross-regulation. In this paper, post regulators such as Magnetic amplifiers (Mag-amp) and Low DropOut regulator (LDO) are proposed to regulate each output and also to improve load regulation. In addition to this, the input voltage feed-forward control technique is proposed to control the duty cycle of the switch, which is dynamically faster and provides better line regulation when compared to the voltage feedback controller. Besides, over current protection circuit for the converter is discussed in detail. Keywords: Cross regulation effect, Mag-amp and LDO, multiple output forward converter, output over current protection, voltage feed forward control.
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20

SAPONARA, SERGIO, LUCA FANUCCI, TOMMASO BALDETTI, and ENRICO PARDI. "BANDGAP VOLTAGE REFERENCE IC FOR HV AUTOMOTIVE APPLICATIONS WITH PSEUDO-REGULATED BIAS AND SERVICE REGULATOR." Journal of Circuits, Systems and Computers 22, no. 01 (January 2013): 1250069. http://dx.doi.org/10.1142/s0218126612500697.

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The paper presents a bandgap voltage reference (BGR) implemented in TSMC 0.25 μm BCD technology for an automotive application. To withstand a car's battery large voltage variations, from 5 V to 40 V, the circuit features an embedded pseudo-regulator providing a stable bias current for the bandgap core. High-voltage (HV) MOS count has been kept low thus allowing the design of a compact BGR with an area of 0.118 mm2. The BGR has been designed to operate in automotive extended temperature range (-40°C to 150°C) and it provides a stable voltage of 1.21 V, which is also used as reference for a cascade 3.7 V linear regulator. Measurements carried on fabricated IC samples prove the effectiveness of the BGR design in terms of supported input voltage variations and operating temperature range, temperature drift, line regulation and PSRR performance.
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21

Cai, Zhiwei, Toby S. Scott-Ward, and David N. Sheppard. "Voltage-dependent Gating of the Cystic Fibrosis Transmembrane Conductance Regulator Cl− Channel." Journal of General Physiology 122, no. 5 (October 27, 2003): 605–20. http://dx.doi.org/10.1085/jgp.200308921.

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When excised inside-out membrane patches are bathed in symmetrical Cl−-rich solutions, the current-voltage (I-V) relationship of macroscopic cystic fibrosis transmembrane conductance regulator (CFTR) Cl− currents inwardly rectifies at large positive voltages. To investigate the mechanism of inward rectification, we studied CFTR Cl− channels in excised inside-out membrane patches from cells expressing wild-type human and murine CFTR using voltage-ramp and -step protocols. Using a voltage-ramp protocol, the magnitude of human CFTR Cl− current at +100 mV was 74 ± 2% (n = 10) of that at −100 mV. This rectification of macroscopic CFTR Cl− current was reproduced in full by ensemble currents generated by averaging single-channel currents elicited by an identical voltage-ramp protocol. However, using a voltage-step protocol the single-channel current amplitude (i) of human CFTR at +100 mV was 88 ± 2% (n = 10) of that at −100 mV. Based on these data, we hypothesized that voltage might alter the gating behavior of human CFTR. Using linear three-state kinetic schemes, we demonstrated that voltage has marked effects on channel gating. Membrane depolarization decreased both the duration of bursts and the interburst interval, but increased the duration of gaps within bursts. However, because the voltage dependencies of the different rate constants were in opposite directions, voltage was without large effect on the open probability (Po) of human CFTR. In contrast, the Po of murine CFTR was decreased markedly at positive voltages, suggesting that the rectification of murine CFTR is stronger than that of human CFTR. We conclude that inward rectification of CFTR is caused by a reduction in i and changes in gating kinetics. We suggest that inward rectification is an intrinsic property of the CFTR Cl− channel and not the result of pore block.
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22

Hsieh, Wei-Chih, and Wei Hwang. "All Digital Linear Voltage Regulator for Super- to Near-Threshold Operation." IEEE Transactions on Very Large Scale Integration (VLSI) Systems 20, no. 6 (June 2012): 989–1001. http://dx.doi.org/10.1109/tvlsi.2011.2143438.

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23

Tiwari, Sachin, Sushma Gupta, Shailendra Jain, and Bhim Singh. "Soft Computing Techniques for Static Series Voltage Regulator of Self Excited Induction Generator." Journal of Circuits, Systems and Computers 24, no. 02 (November 27, 2014): 1550025. http://dx.doi.org/10.1142/s0218126615500255.

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This paper deal with soft computing techniques such as artificial neural network (ANN), fuzzy logic controller (FLC) and proportional-integral (PI)-based static series voltage regulator (SSVR) for constant speed prime mover driven self excited induction generator (SEIG) feeding three phases linear and nonlinear loads. The constant speed prime mover such as biogas, biomass and gas-turbine driven standalone generating system has problem of poor voltage regulation. The SSVR is injects series voltage in to system to maintain constant source and load voltage with power quality improvement of source and load current. The SSVR is modeled using insulated gate bipolar junction transistor (IGBT)-based voltage controlled-voltage source converter (VC-VSC) with self supported DC bus. The A 7.5 kW, 415 V, 50 Hz asynchronous machine with voltage regulator and loads are designed, modeled and simulated in MATLAB environment. Simulated results are presented capability of an SEIG system with ANN, fuzzy and PI-based SSVR and their comparison.
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24

Lee, Min Chin, Ming Chia Hsieh, and Chi Jing Hu. "Implementation and Design of High PSRR Low Dropout Regulator." Advanced Materials Research 614-615 (December 2012): 1553–57. http://dx.doi.org/10.4028/www.scientific.net/amr.614-615.1553.

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As the progress with all kinds of mixed-mode signal circuits, the requirements of power management become increasingly stringent. Therefore it takes all kinds of high-performance linear regulator to produce a very clean and stable voltage. Here cascading technique is used to increase the output impedance in this architecture. The output voltage is less susceptible to variation of input voltage, resulting in a clean and stable voltage which is used the operating voltage of internal circuits in a mixed-mode signal integrated circuit chip. This paper using the TSMC 0.35μm CMOS 2P4M process to implement the design of high PSRR LDO regulator, having chip area, 1.34 mW consumption power. The chip supply voltage can from 2.9V to 3.3V with -106dB and -65dB PSRR at 1KHz and 100KHz, and its output voltage can stable at 1.2V and less than 2.4mV ripple voltage at maximum loading current 20 mA.
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25

Abouelmahjoub, Younes, and Mohamed Moutchou. "Nonlinear control strategy of single-phase unified power flow controller." International Journal of Electrical and Computer Engineering (IJECE) 11, no. 4 (August 1, 2021): 2864. http://dx.doi.org/10.11591/ijece.v11i4.pp2864-2875.

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In this work we propose a nonlinear control strategy of single-phase unified power flow controller (UPFC), using in order to enhance energy quality parameters of a perturbed single-phase power grid supplying nonlinear loads. The control objectives are: i) The current harmonics and the reactive power compensation, that ensure a satisfactory power factor correction (PFC) at the point of common coupling (PCC); ii) compensation of the voltage perturbations (harmonics and sags of voltage) in order to ensure the desired level, of load voltage, without distortion; iii) DC bus voltage regulation. The considered control problem entails several difficulties including the high system dimension and the strong system nonlinearity. The problem is dealt with by designing a nonlinear controller with structure including three control loops. The inner-loop regulator is designed using the Lyapunov technique to compensate the current harmonics and reactive power. The intermediary-loop regulator is designed using the Backstepping technique to compensate the voltage perturbations. The outer-loop regulator is designed using a linear PI to regulate the DC bus voltage. The control stability is proved theoretically and through simulations, these latter show the effectiveness and strong robustness of the proposed control, and prove that the above-mentioned objectives are achieved.
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26

Zamri, Syukri. "Noninvasive Stability Measurement of Linear Voltage Regulator in the Closed-loop Condition." International Journal of Advanced Trends in Computer Science and Engineering 8, no. 1.6 (December 15, 2019): 167–72. http://dx.doi.org/10.30534/ijatcse/2019/2681.62019.

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27

Palomar, C., F. J. Franco, J. G. Izquierdo, I. López, and J. A. Agapito. "Characteristics of the long duration pulses in a shunt linear voltage regulator." Nuclear Instruments and Methods in Physics Research Section A: Accelerators, Spectrometers, Detectors and Associated Equipment 737 (February 2014): 273–80. http://dx.doi.org/10.1016/j.nima.2013.11.083.

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28

Jovicic, Nenad S., and Vladimir M. Rajovic. "A Floating Linear Voltage Regulator for Powering Large-Scale Differential Communication Networks." IEEE Access 6 (2018): 24669–79. http://dx.doi.org/10.1109/access.2018.2832123.

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29

Kargarrazi, Saleh, Hossein Elahipanah, Saul Rodriguez, and Carl-Mikael Zetterling. "500 °C, High Current Linear Voltage Regulator in 4H-SiC BJT Technology." IEEE Electron Device Letters 39, no. 4 (April 2018): 548–51. http://dx.doi.org/10.1109/led.2018.2805229.

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30

Wijesooriya, Priyanwada Nimesha, Nihal Kularatna, and D. Alistair Steyn-Ross. "Efficiency Enhancements to a Linear AC Voltage Regulator: Multiwinding Versus Multitransformer Design." IEEE Journal of Emerging and Selected Topics in Industrial Electronics 1, no. 2 (October 2020): 192–99. http://dx.doi.org/10.1109/jestie.2020.3003350.

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31

Yosef-Hay, Yoni, Dennis Øland Larsen, Pere Llimós Muntal, and Ivan H. H. Jørgensen. "Fully integrated, low drop-out linear voltage regulator in 180 nm CMOS." Analog Integrated Circuits and Signal Processing 92, no. 3 (July 1, 2017): 427–36. http://dx.doi.org/10.1007/s10470-017-1012-5.

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32

Yau, Yeu-Torng, Kuo-Ing Hwu, and Kun-Jie Liu. "AC–DC Flyback Dimmable LED Driver with Low-Frequency Current Ripple Reduced and Power Dissipation in BJT Linearly Proportional to LED Current." Energies 13, no. 16 (August 18, 2020): 4270. http://dx.doi.org/10.3390/en13164270.

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In this paper, a dimmable light-emitting diode (LED) driver, along with the low-frequency current ripple decreased and the bipolar junction transistor (BJT) power dissipation reduced, is developed. This driver is designed based on a single-stage flyback converter. On the one hand, the low-frequency output current ripple reduction is based on the physical behavior of the linear current regulator. On the other hand, when the voltage across the LED string is decreased/increased due to dimming or temperature, the output voltage of the flyback converter will be automatically regulated down/up, thereby making the power dissipation in the BJT linearly proportional to the LED current. By doing so, not only the power loss in the linear current regulator will be decreased as the LED current is decreased or the LED temperature rises, but also the output current ripple can be reduced. Furthermore, the corresponding power factor (PF) is almost not changed, and the total harmonic distortion (THD) is improved slightly. In addition, the LED dimming is based on voltage division. Eventually, a 30 W LED driver, with an input voltage range from 85 to 295 Vrms and with 24 LEDs in series used as a load, is developed, and accordingly, the feasibility of the proposed LED driver is validated by experimental results.
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33

Yang, Ying, Jing Yuan, and Hu Zhang. "Regulator Design of Vector Control System." Advanced Materials Research 383-390 (November 2011): 7082–89. http://dx.doi.org/10.4028/www.scientific.net/amr.383-390.7082.

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A Decoupling method based on feedforward voltage compensation is adopted to eliminate completely the coupling between exciting current and torque current. Based on conventional design methods of single-variable linear system , the paper analyses and designs detailedly the flux loop, speed loop and current loop. A design method based on double closed-loop PI regulator for speed sensorless vector control system is proposed. Through experimental results, we demonstrate its good performance.
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34

Mansano, André L. R., Jader A. De Lima, and Jacobus W. Swart. "A Fast-Response Charge-Pump Gate Driver Applied to Linear Regulation." Journal of Integrated Circuits and Systems 5, no. 1 (November 21, 2010): 16–22. http://dx.doi.org/10.29292/jics.v5i1.306.

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This paper presents a compact charge-pump gate driver (CPGD) that dynamically adjusts the driving voltage VGS_SW of power switches, following stringent load transients in amplitude and duration. Owing to its simple topology, the CPGD responsively sustains regulation of the charge-pump (CP) output voltage VOUT within the range [2.4V, 3.0V] during transient load, while consuming only tens of μA. Contrary to driving techniques that depend on the settling of VOUT before adjusting VGS_SW, the CPGD instantaneously compares VOUT to a reference VREF and optimally sets VGS_SW. The circuit shows low sensitivity with switching frequency fsw across a broad range [50KHz fsw 1MHz]. Simulations with PSPICE and Bsim3v3 models attest the CPGD performance at extreme scenarios of a light and heavy load current ILOAD. For a 20μs-step of ILOAD from 0 to 20mA, the CPGD takes only 20μs to raise VGS_SW from 1.0V to 4.75V. The entire CP regulator was prototyped on a standard 0.35μm CMOS fabrication process, with the CPGD occupying an area of 0.014μm2. Experimental results match closely both DC and transient the expectations for CPGD. The driver features consumption below 475μW and complies with a low-voltage supply, such as1.5V-batteries.
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35

Su, C., B. J. Blalock, S. K. Islam, L. Zuo, and L. M. Tolbert. "A High-Temperature Folded-Cascode Operational Transconductance Amplifier in 0.8-μm BCD-on-SOI." Additional Conferences (Device Packaging, HiTEC, HiTEN, and CICMT) 2010, HITEC (January 1, 2010): 000083–88. http://dx.doi.org/10.4071/hitec-csu-ta26.

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The rapid growth of the hybrid electric vehicles (HEVs) has been driving the demand of high temperature automotive electronics target for the engine compartment, power train, and brakes where the ambient temperature normally exceeds 150°C. An operational transconductance amplifier (OTA) is an essential building block of various analog circuits such as data converters, instrumentation systems, linear regulators, etc. This work presents a high temperature folded cascode operational transconductance amplifier designed and fabricated in a commercially available 0.8-μm BCD-on-SOI process. SOI processes offer several orders of magnitude smaller junction leakage current than bulk-CMOS processes at temperatures beyond 150°C. This amplifier is designed for a high temperature linear voltage regulator; the higher open-loop gain of this amplifier will enhance the overall performance of a linear regulator. In addition, the lower current consumption of the OTA is critical for improving the current efficiency of the linear regulator and reducing the power dissipation at elevated temperature. A PMOS input pair folded cascode OTA topology had been selected in this work, PMOS input pair offers wider ICMR (input common-mode range) and empirically lower flicker noise compared to its NMOS counterpart. By cascoding current mirror load at the output node, the folded cascode OTA obtains higher voltage gain than the symmetrical OTA topology. The PSRR (power supply rejection ratio) is also improved. A on-chip temperature stable current reference is employed to bias the amplifier. The amplifier consumes less than 65μA bias current at 175°C. The core layout area of the amplifier is 0.16mm2 (400 μm × 400 μm).
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36

Palaveashem, Mangaiyarkarasi, and Kavitha Anbukumar. "Reduced order linear quadratic regulator controller for voltage multiplier cells integrated boost converter." IET Circuits, Devices & Systems 10, no. 6 (November 2016): 536–48. http://dx.doi.org/10.1049/iet-cds.2016.0228.

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37

Murad, S. A. Z., A. Harun, M. N. M. Isa, A. Marzuki, and R. Sapawi. "A Linear 0.98 mV Low-Dropout Voltage Regulator in 0.18-μm CMOS Technology." Journal of Physics: Conference Series 1755, no. 1 (February 1, 2021): 012049. http://dx.doi.org/10.1088/1742-6596/1755/1/012049.

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38

Dobrucky, Branislav, Jozef Sedo, and Roman Konarik. "Combining DVR and UPS Techniques for an Uninterruptable Supply of Ultra-Sensitive Non-Linear Appliances." Elektronika ir Elektrotechnika 26, no. 3 (June 26, 2020): 28–35. http://dx.doi.org/10.5755/j01.eie.26.3.25769.

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The paper deals with an application of combined techniques of dynamical voltage restorer (DVR) and uninterruptible power supply (UPS) that make possible both the short voltage sags compensation, as well as longer power supply interruptions, under the simultaneous operation of equipment and network. This is enabled mainly by an instantaneous voltage sag detection, quick bidirectional over-switches, and an instantaneous control method of the output voltage. This needs a fast control method, which can provide a voltage recovery for phase-sensitive loads during several calculation steps, so the dead-beat regulator is used. Such a system even compensates for the influence of non-linear loads on the power supply network without a change of a phase and amplitude of the supply voltage. The simulation results in Matlab/Simulink, as well as real experiments and their comparison results, are given in the paper.
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39

Hasanzadeh, A., C. S. Edrington, H. Mokhtari, B. Maghsoudlou, and F. Fleming. "Multi-loop linear resonant voltage source inverter controller design for distorted loads using the linear quadratic regulator method." IET Power Electronics 5, no. 6 (July 1, 2012): 841–51. http://dx.doi.org/10.1049/iet-pel.2011.0400.

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40

Kadete, H. "Fitting a Simple Linear Automatic Voltage Regulator Model to a Complex Exciter System Representation." Electric Machines & Power Systems 13, no. 3 (January 1987): 163–72. http://dx.doi.org/10.1080/07313568708909232.

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41

Sakolski, Oleg, Prajith Kumar Poongodan, Frank Vanselow, and Linus Maurer. "A Feedforward Compensated High-Voltage Linear Regulator With Fast Response, High-Current Sinking Capability." IEEE Solid-State Circuits Letters 3 (2020): 114–17. http://dx.doi.org/10.1109/lssc.2020.3005787.

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42

Wang, Yiyuan, Wu Lu, Diyuan Ren, Qi Guo, Xuefeng Yu, and Bo Gao. "The enhanced low dose rate sensitivity of a linear voltage regulator with different biases." Journal of Semiconductors 32, no. 3 (March 2011): 034007. http://dx.doi.org/10.1088/1674-4926/32/3/034007.

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43

Kumar, Rajiv, S. P. Singh, and H. N. Chandrawat. "Optimized Near Minimum Time Control of Flexible Structures Using Variable Gain (LQG) Control Strategies." Journal of Vibration and Acoustics 128, no. 3 (August 30, 2005): 402–7. http://dx.doi.org/10.1115/1.2166856.

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A neural network based time optimal control of flexible structures is presented. The implementation is done on a flexible inverted L structure with surface-bonded piezoceramic sensors/actuators. The state-space presentation, from control input voltages to sensor output voltages is established in multivariable form. A variable gain multi-input multi-output linear quadratic regulator controller is designed and implemented. The controller gains are varied as the modal energy of the system decreases. The gains are varied in such a manner that the system utilizes maximum control energy from fixed amplitude of control voltage. The gains are calculated by solving the Riccatti equation with weightage in performance index that varies according to the states of the system. Thus at periodic intervals, the gains are updated to fully utilize the available control voltage. Comparison of the present technique is done with the classical bang-bang controller.
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44

Gabriel, S. E., E. M. Price, R. C. Boucher, and M. J. Stutts. "Small linear chloride channels are endogenous to nonepithelial cells." American Journal of Physiology-Cell Physiology 263, no. 3 (September 1, 1992): C708—C713. http://dx.doi.org/10.1152/ajpcell.1992.263.3.c708.

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We used both single-channel and whole cell patch-clamp techniques to characterize chloride channels and currents endogenous to Sf9 cells, 3T3 fibroblasts, and Chinese hamster ovary cells. In cell-attached patches from these cell types, anion channels were observed with low ohmic conductance (4-11 ps), linear current-voltage relationships, and little time- or voltage-dependent behavior. These channels are very similar to the Cl- channels reported to appear concomitant with the expression of cystic fibrosis transmembrane conductance regulator (CFTR) in these cell lines. The presence of such endogenous channels suggests either that low levels of CFTR are present in all of these cell lines prior to transfection or that an endogenous non-CFTR channel is present in these cell types. Our results suggest that at least some of the channel behaviors attributed to expressed, recombinant CFTR in previous studies may have been due to these endogenous Cl- channels.
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45

Mohd Zaman, Mohd Hairi. "Failure Region Determination of Linear Voltage Regulator Using Data-driven and Model-based Virtual Sensing." International Journal of Advanced Trends in Computer Science and Engineering 8, no. 1.6 (December 15, 2019): 173–81. http://dx.doi.org/10.30534/ijatcse/2019/2781.62019.

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46

Chen, Yan-Peng, and Kea-Tiong Tang. "A Fully Integrated High-Power-Supply-Rejection Linear Regulator With an Output-Supplied Voltage Reference." IEEE Transactions on Circuits and Systems I: Regular Papers 67, no. 11 (November 2020): 3828–38. http://dx.doi.org/10.1109/tcsi.2020.3008031.

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47

A. Okou, Francis, Ouassima Akhrif, Louis A. Dessaint, and Derrick Bouchard. "A Decentralized Multivariable Robust Adaptive Voltage and Speed Regulator for Large-Scale Power Systems." International Journal of Emerging Electric Power Systems 14, no. 1 (May 30, 2013): 41–56. http://dx.doi.org/10.1515/ijeeps-2012-0042.

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Abstract This papter introduces a decentralized multivariable robust adaptive voltage and frequency regulator to ensure the stability of large-scale interconnnected generators. Interconnection parameters (i.e. load, line and transormer parameters) are assumed to be unknown. The proposed design approach requires the reformulation of conventiaonal power system models into a multivariable model with generator terminal voltages as state variables, and excitation and turbine valve inputs as control signals. This model, while suitable for the application of modern control methods, introduces problems with regards to current design techniques for large-scale systems. Interconnection terms, which are treated as perturbations, do not meet the common matching condition assumption. A new adaptive method for a certain class of large-scale systems is therefore introduces that does not require the matching condition. The proposed controller consists of nonlinear inputs that cancel some nonlinearities of the model. Auxiliary controls with linear and nonlinear components are used to stabilize the system. They compensate unknown parametes of the model by updating both the nonlinear component gains and excitation parameters. The adaptation algorithms involve the sigma-modification approach for auxiliary control gains, and the projection approach for excitation parameters to prevent estimation drift. The computation of the matrix-gain of the controller linear component requires the resolution of an algebraic Riccati equation and helps to solve the perturbation-mismatching problem. A realistic power system is used to assess the proposed controller performance. The results show that both stability and transient performance are considerably improved following a severe contingency.
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48

Bahramali, Asghar, and Marisa Lopez-Vallejo. "An RFID-Based Self-Biased 40 nm Low Power LDO Regulator for IoT Applications." Micromachines 12, no. 4 (April 3, 2021): 396. http://dx.doi.org/10.3390/mi12040396.

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There are emerging applications, like bridge structural health monitoring, continuous patient condition and outdoor aiding of the elderly and the disabled, where Internet of things (IoT) nodes are used with very limited accessibility and no connection to the main supply network. They may also be exposed to harsh environmental conditions. These are applications where power and available area constraints are of great concern. In this paper, we design a 1.1 V low dropout (LDO) linear regulator in 40 nm technology to be embedded in IoT nodes. To address these constraints, we used state-of-the-art, variability-aware resistor-less sub-threshold biased CMOS-only ultra low power consumption configurations having low active area. The proposed LDO is internally compensated with embedded 18 pF Miller and 10 pF load capacitances. It can supply 1 mA maximum load current with 0.8 uA quiescent current. The dropout voltage of the regulator is 200 mV with minimum input voltage of 1.3 V. The efficiency of the regulator is 84%, which is about 99% of the maximum achievable efficiency for a 200 mV dropout voltage. The whole circuit, consisting of the embedded voltage reference and the Miller and load capacitances, takes less than 0.007 mm2 of the die size with 1 μW power consumption.
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49

UMAMAHESWARI, M. G., G. UMA, and S. REDLINE VIJITHA. "COMPARISON OF HYSTERESIS CONTROL AND REDUCED ORDER LINEAR QUADRATIC REGULATOR CONTROL FOR POWER FACTOR CORRECTION USING DC–DC CUK CONVERTERS." Journal of Circuits, Systems and Computers 21, no. 01 (February 2012): 1250002. http://dx.doi.org/10.1142/s0218126612500028.

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This paper focuses on a comparative study of a reduced order linear quadratic regulator control (ROLQR) and conventional variable frequency hysteresis controller (HC) for power factor correction, and their performances are compared. A prototype of front-end AC–DC converter followed by DC–DC Cuk converter controlled by a dSPACE signal processor was set up for 60 watts. Experimental results are presented to validate the simulation results. Simulation and experimental results reveal that ROLQR control can achieve good output voltage regulation and also provide improved robustness in shaping the input current in the presence of load variations when compared to conventional HC.
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50

Tan, Xiao Long, Jia Zhou, and Wen Bin Wang. "Research of PFC Based on Boost Converter." Applied Mechanics and Materials 556-562 (May 2014): 2063–66. http://dx.doi.org/10.4028/www.scientific.net/amm.556-562.2063.

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Principles of traditional Boost PFC circuit are introduced. Based on average current control, a large signal model is obtained and turned into small signal model carrying constant load. And current regulator and voltage regulator are designed accordingly. Directing at strong non-linear characteristics of the circuit, this paper adopts double average method to analyze its low frequency stability. This converter can achieve high power factor in wide range of input and load power and simulation result shows that power factor is above 0.99.
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