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Dissertations / Theses on the topic 'Logic design'

Author: Grafiati

Published: 4 June 2021

Last updated: 25 July 2025

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1

Nguyen, Loc Bao. "Logic design using programmable logic devices." PDXScholar, 1988. https://pdxscholar.library.pdx.edu/open_access_etds/4103.

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The Programmable Logic Devices, PLO, have caused a major impact in logic design of digital systems in this decade. For instance, a twenty pin PLO device can replace from three hundreds to six hundreds Transistor Transistor Logic gates, which people have designed with since the 60s. Therefore, by using PLD devices, designers can squeeze more features, reduce chip counts, reduce power consumption, and enhance the reliability of the digital systems. This thesis covers the most important aspects of logic design using PLD devices. They are Logic Minimization and State Assignment. In addition, the t

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2

Tarnoff, David. "Episode 4.03 – Combinational Logic." Digital Commons @ East Tennessee State University, 2020. https://dc.etsu.edu/computer-organization-design-oer/31.

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Individual logic gates are not very practical. Their power comes when you combine them to create combinational logic. This episode takes a look at combinational logic by working through an example in order to generate its truth table.

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3

Tarnoff, David. "Episode 5.02 – NAND Logic." Digital Commons @ East Tennessee State University, 2020. https://dc.etsu.edu/computer-organization-design-oer/39.

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4

Tarnoff, David. "Episode 4.01 – Intro to Logic Gates." Digital Commons @ East Tennessee State University, 2020. https://dc.etsu.edu/computer-organization-design-oer/29.

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Logic gates are the fundamental building blocks of digital circuits. In this episode, we take a look at the four most basic gates: AND, OR, exclusive-OR, and the inverter, and show how an XOR gate can be used to compare two digital values. Click here to read the show transcript.

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5

Chen, Kailiang. "Circuit design for logic automata." Thesis, Massachusetts Institute of Technology, 2009. http://hdl.handle.net/1721.1/52781.

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Thesis (S.M.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2009.<br>This electronic version was submitted by the student author. The certified thesis is available in the Institute Archives and Special Collections.<br>Cataloged from student-submitted PDF version of thesis.<br>Includes bibliographical references (p. 143-148).<br>The Logic Automata model is a universal distributed computing structure which pushes parallelism to the bit-level extreme. This new model drastically differs from conventional computer architectures in that it exposes, ra

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6

Willingham, David John. "Asynchrobatic logic for low-power VLSI design." Thesis, University of Westminster, 2010. https://westminsterresearch.westminster.ac.uk/item/9087w/asynchrobatic-logic-for-low-power-vlsi-design.

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In this work, Asynchrobatic Logic is presented. It is a novel low-power design style that combines the energy saving benefits of asynchronous logic and adiabatic logic to produce systems whose power dissipation is reduced in several different ways. The term “Asynchrobatic” is a new word that can be used to describe these types of systems, and is derived from the concatenation and shortening of Asynchronous, Adiabatic Logic. This thesis introduces the concept and theory behind Asynchrobatic Logic. It first provides an introductory background to both underlying parent technologies (asynchronous

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7

Graf, Jonathan Peter. "Optimizing Programmable Logic Design Security Strategies." Diss., Virginia Tech, 2019. http://hdl.handle.net/10919/89920.

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A wide variety of design security strategies have been developed for programmable logic devices, but less work has been done to determine which are optimal for any given design and any given security goal. To address this, we consider not only metrics related to the performance of the design security practice, but also the likely action of an adversary given their goals. We concern ourselves principally with adversaries attempting to make use of hardware Trojans, although we also show that our work can be generalized to adversaries and defenders using any of a variety of microelectronics exp

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8

Tarnoff, David. "Episode 4.04 – NAND, NOR, and Exclusive-NOR Logic." Digital Commons @ East Tennessee State University, 2020. https://dc.etsu.edu/computer-organization-design-oer/32.

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The simplest combinational logic circuits are made by inverting the output of a fundamental logic gate. Despite this simplicity, these gates are vital. In fact, we can realize any truth table using a circuit made only from AND gates with inverted outputs.

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9

Marriott, Jack. "Adaptive robust fuzzy logic control design." Thesis, Georgia Institute of Technology, 1996. http://hdl.handle.net/1853/15819.

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10

Mukolera, J. "Logic programming in electrical machine design." Thesis, Imperial College London, 1987. http://hdl.handle.net/10044/1/47359.

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11

Dadone, Paolo. "Design Optimization of Fuzzy Logic Systems." Diss., Virginia Tech, 2001. http://hdl.handle.net/10919/27893.

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Fuzzy logic systems are widely used for control, system identification, and pattern recognition problems. In order to maximize their performance, it is often necessary to undertake a design optimization process in which the adjustable parameters defining a particular fuzzy system are tuned to maximize a given performance criterion. Some data to approximate are commonly available and yield what is called the supervised learning problem. In this problem we typically wish to minimize the sum of the squares of errors in approximating the data. We first introduce fuzzy logic systems and the superv

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12

Chua, Shin Cheng. "Design and synthesis of reversible logic." Thesis, Curtin University, 2016. http://hdl.handle.net/20.500.11937/1504.

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Energy lost during computation is an important issue for digital design. Today, all electronics devices suffer from energy lost due to the conventional logic system used. The amount of energy loss in the form of heat leads to immense challenges in nowadays circuit design. To overcome that, reversible logic has been invented. Since properties of reversible logic differ greatly than conventional logic, synthesis methods used for conventional logic cannot be used in reversible logic. In this dissertation, we proposed new synthesis algorithms and several circuit designs using reversible logic.

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13

Ramakrishnan, Lakshmi Narasimhan. "SDMLp - Secure Differential Multiplexer Logic : Logic Design for DPA-Resistant Cryptographic Circuits." University of Cincinnati / OhioLINK, 2011. http://rave.ohiolink.edu/etdc/view?acc_num=ucin1311691925.

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14

Hadjinicolaou, M. G. "Synthesis of programmable logic arrays." Thesis, Brunel University, 1986. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.371168.

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15

Khan, Shoab Ahmad. "Logic and algorithm partitioning." Diss., Georgia Institute of Technology, 1995. http://hdl.handle.net/1853/13738.

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16

Vasilko, Milan. "Design synthesis for dynamically reconfigurable logic systems." Thesis, Bournemouth University, 2000. http://eprints.bournemouth.ac.uk/291/.

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Dynamic reconfiguration of logic circuits has been a research problem for over four decades. While applications using logic reconfiguration in practical scenarios have been demonstrated, the design of these systems has proved to be a difficult process demanding the skills of an experienced reconfigurable logic design expert. This thesis proposes an automatic synthesis method which relieves designers of some of the difficulties associated with designing partially dynamically reconfigurable systems. A new design abstraction model for reconfigurable systems is proposed in order to support design

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17

Lin, Yu-Jen. "Design of fuzzy logic controllers for FACTS." Thesis, University of Strathclyde, 1999. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.366675.

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18

Brereton, Margot Felicity. "A logic based approach to factory design." Thesis, Massachusetts Institute of Technology, 1988. http://hdl.handle.net/1721.1/14555.

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19

Sampson, Michael. "The strategic logic of international agreement design." Thesis, University of Oxford, 2016. https://ora.ox.ac.uk/objects/uuid:5688f2b9-fc86-47c6-9a13-e38fdb181773.

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Conventional wisdom suggests that weak international actors should avoid concluding ambiguous agreements with much stronger partners because this increases their vulnerability to subsequent exploitation. Why then do we observe so many instances of just such agreements signed under conditions of extreme power asymmetry? I answer this question by emphasising an underappreciated factor shaping the agreement design strategies of actors: Power trajectory. Focusing on international trade, I develop a three-part framework which demonstrates first, that powerful but rising states gain from securing na

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20

Kalganova, Tatiana. "Evolvable hardware design of combinational logic circuits." Thesis, Edinburgh Napier University, 2000. http://researchrepository.napier.ac.uk/Output/4341.

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Evolvable Hardware (EHW), as an alternative method for logic design, became more attractive recently, because of its algebra-independent techniques for generating selfadaptive self-reconfigurable hardware. This thesis investigates and relates both evaluation and evolutionary processes, emphasizing the need to address problems arising from data complexity. Evaluation processes, capable of evolving cost-optimised fully functional circuits are investigated. The need for an extrinsic EHW approach (software models) independent of the concerns of any implementation technologies is emphasized. It is

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21

Dara, Chandra Babu. "Design of High Performance Threshold Logic Gates." OpenSIUC, 2015. https://opensiuc.lib.siu.edu/dissertations/1188.

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Threshold logic gates are gaining more importance in recent years due to significant development in switching devices. This renewed the interest in high performance and low power circuits with threshold logic gates. Threshold Logic Gates can be implemented using both the traditional CMOS technologies and the emerging nanoelectronic technologies. In this dissertation, we have performed performance analysis on Monostable-Bistable Threshold Logic Element based, current mode, and memristor based threshold logic implementations. Existing analytical approaches that model the delay of a Monostable-Bi

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22

CAIRO, FABRIZIO. "Magnetic Logic Devices: Design, Simulation and Measurement." Doctoral thesis, Politecnico di Torino, 2017. http://hdl.handle.net/11583/2679889.

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The constant scaling of transistor sizes that has driven the extraordinary develo- pment of CMOS technology in the last decades. The reduction of transistor sizes has many advantages: the circuit area and power consumption decrease and the clock frequency increases. However the scaling of transistor sizes is rapidly moving to- wards its physical limits. The two major factors limiting the development of CMOS technology are the difficulties in the fabrication process and the unavoidable impact of leakage losses, mainly due to the gate tunnel current. To overcome the limitations of CMOS tr

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23

Chong, Kian Haur. "Self-calibrating differential output prediction logic /." Thesis, Connect to this title online; UW restricted, 2006. http://hdl.handle.net/1773/5985.

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24

Parameswaran, Nair Ravi Sankar. "Delay-insensitive ternary logic (DITL)." Diss., Rolla, Mo. : University of Missouri-Rolla, 2007. http://scholarsmine.umr.edu/thesis/pdf/Parameswaran_Nair_09007dcc803bc548.pdf.

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Thesis (M.S.)--University of Missouri--Rolla, 2007.<br>Vita. The entire thesis text is included in file. Title from title screen of thesis/dissertation PDF file (viewed November 27, 2007) Includes bibliographical references (p. 55-56).

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25

Midde, Bharath Reddy. "Design, analysis, and synthesis of 16 bit arithmetic logic unit using reversible logic gate." Thesis, California State University, Long Beach, 2016. http://pqdtopen.proquest.com/#viewpdf?dispub=10099864.

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<p> In the modern world, an Arithmetic Logic Unit (ALU) is one of the most crucial component of an embedded system and is used in many devices like calculators, cell phones, computers, and so on. An ALU is a multi-functional circuit that conditionally performs one of several possible functions on two operands A and B depending on control inputs. It is nevertheless the main performer of any computing device. This project proposes the design of programmable reversible logic gate structures, targeted for the ALU implementation and their use in the realization of an efficient reversible ALU. This

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26

Wang, Xiaojun. "An interactive, high-level logic synthesis system." Thesis, Staffordshire University, 1994. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.387386.

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27

Padua, C. I. P. S. "A logic synthesis approach to silicon compilation." Thesis, University of Southampton, 1988. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.381234.

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28

Dayantis, George. "Types, modularisation and abstraction in logic programming." Thesis, University of Sussex, 1988. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.255977.

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29

Walder, Herbert H. "Operating system design for partially reconfigurable logic devices /." Zürich : Institut für Technische Informatik und Kommunikationsnetze TIK, Eidgenössische Technische Hochschule ETH Zürich, 2005. http://e-collection.ethbib.ethz.ch/show?type=diss&nr=15955.

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30

Vural, Ozgur Ahmet. "Fuzzy Logic Guidance System Design For Guided Missiles." Master's thesis, METU, 2003. http://etd.lib.metu.edu.tr/upload/1026715/index.pdf.

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This thesis involves modeling, guidance, control, and flight simulations of a canard controlled guided missile. The autopilot is designed by a pole placement technique. Designed autopilot is used with the guidance systems considered in the thesis. Five different guidance methods are applied in the thesis, one of which is the famous proportional navigation guidance. The other four guidance methods are different fuzzy logic guidance systems designed considering different types of guidance inputs. Simulations are done against five different target types and the performances of the five guidance m

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31

Henninen, Svein Rypdal. "Application of asynchronous design to microcontroller startup logic." Thesis, Norges teknisk-naturvitenskapelige universitet, Institutt for elektronikk og telekommunikasjon, 2011. http://urn.kb.se/resolve?urn=urn:nbn:no:ntnu:diva-16349.

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Digital circuits designed today are almost exclusively clocked. As designs grow in size it becomes harder to effectively distribute the various clock signals over the circuit. The clock is also a big contribution to the power consumption of a circuit. Some work is being done to provide alternatives to standard synchronous design. One of these alternatives is the Balsa system.Several versions of an asynchronous module for controlling the startup process of a microcontroller was made in Balsa and compared to a standard synchronous implementation. Area estimates for the best asynchronous implemen

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32

Tomczuk, Randal Wade. "Autocorrelation and decomposition methods in combinational logic design." Thesis, National Library of Canada = Bibliothèque nationale du Canada, 1996. http://www.collectionscanada.ca/obj/s4/f2/dsk3/ftp04/nq21952.pdf.

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33

Valdés, Francisco. "Design of a fuzzy logic software estimation process." Mémoire, École de technologie supérieure, 2011. http://espace.etsmtl.ca/983/1/VALD%C3%89S_Francisco.pdf.

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Cette recherche décrit la conception d'un processus avec logique floue pour l'estimation des projets de logiciels. Il y a des études qui montrent que la plupart des projets de logiciels excèdent leur budget ou dépassent leur calendrier prévu, et ce même si depuis des années les organisations font des efforts pour augmenter le taux de réussite des projets de logiciels en rendant le processus plus facile à gérer et, par conséquent, plus prévisible. L'estimation du projet est un enjeu important, car c'est la base pour quantifier, allouer et gérer les ressources nécessaires à un projet. Lor

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34

Kotiyal, Saurabh. "Design Methodologies for Reversible Logic Based Barrel Shifters." Scholar Commons, 2012. http://scholarcommons.usf.edu/etd/4106.

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The reversible logic has the promising applications in emerging computing paradigm such as quantum computing, quantum dot cellular automata, optical computing, etc. In reversible logic gates there is a unique one-to-one mapping between the inputs and outputs. To generate an useful gate function the reversible gates require some constant ancillary inputs called ancilla inputs. Also to maintain the reversibility of the circuits some additional unused outputs are required that are referred as the garbage outputs. The number of ancilla inputs, number of garbage outputs and quantum cost plays an im

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35

Karaboga, Dervis. "Design of fuzzy logic controllers using genetic algorithms." Thesis, Cardiff University, 1994. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.296639.

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36

Rosenband, Daniel L. 1977. "Design of the control logic for StarT-Voyager." Thesis, Massachusetts Institute of Technology, 1998. http://hdl.handle.net/1721.1/47612.

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Thesis (M.Eng.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 1998.<br>Includes bibliographical references (p. 61).<br>by Daniel L. Rosenband.<br>M.Eng.

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37

Das, Shamik 1977. "Design and implementation of three-dimensional logic structures." Thesis, Massachusetts Institute of Technology, 2000. http://hdl.handle.net/1721.1/9078.

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Thesis (S.B. and M.Eng.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2000.<br>Includes bibliographical references (leaves 89-91).<br>In this thesis, a computer-aided-design (CAD) system is developed that assists in the design of novel three-dimensional integrated circuits. The software tools allow for the specification of a multilayer transistor circuit by means that are readily accessible to those familiar with two-dimensional CMOS VLSI design. This software system provides desirable features such as SPICE circuit extraction and the ability to

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38

Gonzalez, Cid Agustina. "Food network : design for a new territorial logic." Thesis, Massachusetts Institute of Technology, 2015. http://hdl.handle.net/1721.1/99276.

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Thesis: S.M., Massachusetts Institute of Technology, Department of Architecture, 2015.<br>Cataloged from PDF version of thesis. Vita.<br>Includes bibliographical references (pages 266-267).<br>Food shapes territory. While only 3% of the world's surface is occupied by cities, 38 % is used for agriculture. Most of this land is used to harvest the 7,605 tons of food that are produced per minute worldwide. Of this, almost one third will be wasted, while only two thirds will be consumed, most probably, miles away from its origin. Although humans have historically eaten food coming from lands far aw

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39

Niemelä, J. (Jari). "Design and verification of a logic input buffer." Master's thesis, University of Oulu, 2014. http://urn.fi/URN:NBN:fi:oulu-201402121090.

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Two low-power logic input buffer topologies are designed, simulated and compared. The most important parameters of the buffers are input threshold voltage level stability and minimal current consumption. Topologies have been implemented earlier for a wider line width process, and now the intention is to move them to a narrower line width process without losing performance. Based on the simulations, a topology with the better performance and smaller area is chosen and layout for particular topology is designed. Layout parasitics effect to the performance is also verified by simulations. In this

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40

Sah, Puja. "Implementing Digital Logic Design Concepts Using Paper Electronics." Thesis, University of North Texas, 2018. https://digital.library.unt.edu/ark:/67531/metadc1157633/.

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This thesis presents the implementation of some of the basic concepts of digital logic design in a fun and creative way with the help of paper electronics. This involves circuit building on paper using conductive tape or conductive ink and circuit components as electronics craft materials. Paper electronics toolkit called circuit sticker microcontroller which is deployed by a company named Chibitronics and AT89C51 microcontroller were used for the computational functioning of the circuits built on paper. This can be used to teach the fundamentals of digital logic design to the students in thei

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41

Zheng, Yexin. "Novel RTD-Based Threshold Logic Design and Verification." Thesis, Virginia Tech, 2008. http://hdl.handle.net/10919/32011.

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Innovative nano-scale devices have been developed to enhance future circuit design to overcome physical barriers hindering complementary metal-oxide semiconductor (CMOS) technology. Among the emerging nanodevices, resonant tunneling diodes (RTDs) have demonstrated promising electronic features due to their high speed switching capability and functional versatility. Great circuit functionality can be achieved through integrating heterostructure field-effect transistors (HFETs) in conjunction with RTDs to modulate effective negative differential resistance (NDR). However, RTDs are intrinsically

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42

Xia, Yinshui. "Low power design techniques for digital logic circuits." Thesis, Edinburgh Napier University, 2003. http://researchrepository.napier.ac.uk/Output/6887.

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With the rapid increase in the density and the size of chips and systems, area and power dissipation become critical concern in Very Large Scale Integrated (VLSI) circuit design. Low power design techniques are essential for today's VLSI industry. The history of symbolic logic and some typical techniques for finite state machine (FSM) logic synthesis are reviewed. The state assignment is used to optimize area and power dissipation for FSMs. Two cost functions, targeting area and power, are presented. The Genetic Algorithm (GA) is used to search for a good state assignment to minimize the cost

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43

Roumeliotis, Emmanuel. "Multi-processor logic simulation at the chip level." Diss., Virginia Polytechnic Institute and State University, 1986. http://hdl.handle.net/10919/71180.

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This dissertation presents the design and development of a multi-processor logic simulator. After an introduction to parallel processing, the concept of distributed simulation is described as well as the possibility of deadlock in a distributed system. It is proven that the proposed system does not deadlock. Next, the modeling techniques are discussed along with the timing mechanisms used for logic simulation. A new approach, namely process oriented simulation is studied in depth. It is shown that modeling for this kind of simulation is more efficient regarding modeling ease, computer memory a

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44

Sun, Sheng. "High performance and energy efficient adder design /." Thesis, Connect to this title online; UW restricted, 2006. http://hdl.handle.net/1773/5865.

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45

Wunderlich, Richard Bryan. "CMOS gate delay, power measurements and characterization with logical effort and logical power." Thesis, Atlanta, Ga. : Georgia Institute of Technology, 2009. http://hdl.handle.net/1853/31652.

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Thesis (M. S.)--Electrical and Computer Engineering, Georgia Institute of Technology, 2010.<br>Committee Chair: Paul Hasler; Committee Member: David V Anderson; Committee Member: Saibal Mukhopadhyay. Part of the SMARTech Electronic Thesis and Dissertation Collection.

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46

Gani, Sohail M. "A gate matrix approach to VLSI logic layout." Thesis, University of Essex, 1990. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.238380.

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Clarke, Christopher T. "The implementation and applications of multiple-valued logic." Thesis, University of Warwick, 1993. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.386944.

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48

Inampudi, Sivateja. "Teaching Fundamentals of Digital Logic Design and VLSI Design Using Computational Textiles." Thesis, University of North Texas, 2014. https://digital.library.unt.edu/ark:/67531/metadc699874/.

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This thesis presents teaching fundamentals of digital logic design and VLSI design for freshmen and even for high school students using e-textiles. This easily grabs attention of students as it is creative and interesting. Using e-textiles to project these concepts would be easily understood by students at young age. This involves stitching electronic circuits on a fabric using basic components like LEDs, push buttons and so on. The functioning of these circuits is programmed in Lilypad Arduino. By using this method, students get exposed to basic electronic concepts at early stage which eventu

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49

Liao, Chun-Hao, and 廖君豪. "Digital Logic Analyzer Design." Thesis, 2006. http://ndltd.ncl.edu.tw/handle/57037470770308710451.

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碩士<br>國立臺灣大學<br>電機工程學研究所<br>94<br>As the development of digital system progresses day by day, engineers must rely on logic analyzer to analyze and understand a lot of signals and program codes. Moreover, engineers do not always work in the company. It is necessary to take the logic analyzer to customers for debug service such PC-based logic analyzer with good performance is required. Instrument type of logic analyzer has good performance with high frequency bandwidth, high sample rate, high operation speed, high speed of trigger latch function, width memory depth…etc. However, it is so expensi

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50

Correia, João Vidal. "Logic design with Memristors." Master's thesis, 2019. http://hdl.handle.net/10773/29910.

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In 1971, Leon Chua noticed that some relationship between electric charge and magnetic flux was missing and, so, he theoretically proposed a circuit element that established said relationship, to which he called a memristor, because this device is essentially a ”resistor with memory”. Later, in 1976, a generalization to memristive devices was produced, defining a memristive device as a device whose behavior is defined by a state-dependant Ohm’s law controlled by some state variable. This allowed for the creation of synthetic memristors, the first of which was announced in 2008 by Stanle

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