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Journal articles on the topic 'Loop parallelization'

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Published: 4 June 2021

Last updated: 3 February 2022

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1

Aiken, A., and A. Nicolau. "Optimal loop parallelization." ACM SIGPLAN Notices 23, no. 7 (1988): 308–17. http://dx.doi.org/10.1145/960116.54021.

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2

Kumar, M. "Automatic Loop Parallelization." Computer Journal 40, no. 6 (1997): 301. http://dx.doi.org/10.1093/comjnl/40.6.301.

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3

GRIEBL, MARTIN, and CHRISTIAN LENGAUER. "ON THE SPACE-TIME MAPPING OF WHILE-LOOPS." Parallel Processing Letters 04, no. 03 (1994): 221–32. http://dx.doi.org/10.1142/s0129626494000223.

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A WHILE-loop can be viewed as a FOR-loop with a dynamic upper bound. The computational model of polytopes is useful for the automatic parallelization of FOR-loops. We investigate its potential for the parallelization of WHILE-loops.

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4

Gasperoni, F., U. Schwiegelshohn, and K. Ebcioğlu. "On optimal loop parallelization." ACM SIGMICRO Newsletter 20, no. 3 (1989): 141–47. http://dx.doi.org/10.1145/75395.75411.

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5

ANDERSON, RICHARD J., and BARBARA B. SIMONS. "A FAST HEURISTIC FOR LOOP PARALLELIZATION." Parallel Processing Letters 04, no. 03 (1994): 281–99. http://dx.doi.org/10.1142/s0129626494000272.

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We present a fast loop parallelization heuristic that assigns separate invocations of a loop to different processors. If the loop contains data dependences between iterations, later iterations can be delayed while awaiting a result computed in an earlier iteration. In this paper we study a scheduling problem, called the Delay Problem, that approximates the problem of minimizing the delay in the start time of loops with loop-carried dependences. Our major result is a fast (O(n log 2 n)) time algorithm for the case where the precedence constraints are a forest of in-trees or a forest of out-tree

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6

Ciaca, Monica-Iuliana, Loredana Mocean, Alexandru Vancea, and Mihai Avornicului. "Optimal Parallelization Of Loop Structures." INTERNATIONAL JOURNAL OF COMPUTERS & TECHNOLOGY 15, no. 7 (2016): 6907–13. http://dx.doi.org/10.24297/ijct.v15i7.3974.

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This paper is intended to be a follow up of the work done by the authors in previous articles. On one hand it is concluded with a theorem that proves to be a definite answer to one very important research direction and on the other hand it is an opening of new research directions in the field of loop structures automatic parallelization.

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7

BARNETT, MICHAEL, and CHRISTIAN LENGAUER. "UNIMODULARITY AND THE PARALLELIZATION OF LOOPS." Parallel Processing Letters 02, no. 02n03 (1992): 273–81. http://dx.doi.org/10.1142/s0129626492000416.

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The parallelization of loops can be made formal by basing it on an algebraic theory of loop transformations. In this theory, the concept of unimodularity arises. We discuss the pros and cons of insisting on unimodularity.

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8

Darte, Alain, Georges-André Silber, and Frédéric Vivien. "Combining Retiming and Scheduling Techniques for Loop Parallelization and Loop Tiling." Parallel Processing Letters 07, no. 04 (1997): 379–92. http://dx.doi.org/10.1142/s0129626497000383.

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Tiling is a technique used for exploiting medium-grain parallelism in nested loops. It relies on a first step that detects sets of permutable nested loops. All algorithms developed so far consider the statements of the loop body as a single block, in other words, they are not able to take advantage of the structure of dependences between different statements. In this paper, we overcame this limitation by showing how the structure of the reduced dependence graph can be taken into account for detecting more permutable loops. Our method combines graph retiming techniques and graph scheduling tech

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9

Oancea, Cosmin E., and Lawrence Rauchwerger. "Logical inference techniques for loop parallelization." ACM SIGPLAN Notices 47, no. 6 (2012): 509–20. http://dx.doi.org/10.1145/2345156.2254124.

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10

Größlinger, Armin, Martin Griebl, and Christian Lengauer. "Quantifier elimination in automatic loop parallelization." Journal of Symbolic Computation 41, no. 11 (2006): 1206–21. http://dx.doi.org/10.1016/j.jsc.2005.09.012.

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11

Tzen, T. H., and L. M. Ni. "Dependence uniformization: a loop parallelization technique." IEEE Transactions on Parallel and Distributed Systems 4, no. 5 (1993): 547–58. http://dx.doi.org/10.1109/71.224217.

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12

ARTIGAS, PEDRO V., MANISH GUPTA, SAMUEL P. MIKIFF, and JOSÉ E. MOREIRA. "AUTOMATIC LOOP TRANSFORMATIONS AND PARALLELIZATION FOR JAVA." Parallel Processing Letters 10, no. 02n03 (2000): 153–64. http://dx.doi.org/10.1142/s0129626400000160.

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This paper describes a prototype Java compiler that achieves performance levels approaching those of current state-of-the-art Fortran compilers on numerical codes. We present a new transformation called alias versioning that takes advantage of the simplicity of pointers in Java. This transformation, combined with other techniques that we have developed, enables the compiler to perform high order loop transformations and parallelization completely automatically. We believe that our compiler is the first to have such capabilities of optimizing numerical Java codes. By exploiting synergies betwee

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13

Reiche, Oliver, M. Akif Özkan, Frank Hannig, Jürgen Teich, and Moritz Schmid. "Loop Parallelization Techniques for FPGA Accelerator Synthesis." Journal of Signal Processing Systems 90, no. 1 (2017): 3–27. http://dx.doi.org/10.1007/s11265-017-1229-7.

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14

Wang, Biao, Diego F. de Souza, Mauricio Alvarez-Mesa, et al. "GPU Parallelization of HEVC In-Loop Filters." International Journal of Parallel Programming 45, no. 6 (2017): 1515–35. http://dx.doi.org/10.1007/s10766-017-0488-z.

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15

COLLARD, JEAN-FRANÇOIS, TANGUY RISSET, and PAUL FEAUTRIER. "CONSTRUCTION OF DO LOOPS FROM SYSTEMS OF AFFINE CONSTRAINTS." Parallel Processing Letters 05, no. 03 (1995): 421–36. http://dx.doi.org/10.1142/s0129626495000394.

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Most parallelization techniques for [Formula: see text] loop nests are based on reindexation. Reindexation yields a new iteration space, which is a convex integer polyhedron defined by a set of affine constraints. Parallel code generation thus needs to scan all the integer points of this convex, thereby requiring the construction of a new [Formula: see text] loop nest. We detail an algorithm to this purpose, which relies on a parametrized version of the Dual Simplex. We show how the resulting loop nest and especially the loop bounds can be kept simple, thus reducing the control overhead of par

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16

Xiang, Li Yun, Zhi Yi Fang, Ying Wang, Guan Nan Qu, and Zhong Chen. "Overhead Analysis of Loop Parallelization with OpenMP Directives." Applied Mechanics and Materials 644-650 (September 2014): 3394–97. http://dx.doi.org/10.4028/www.scientific.net/amm.644-650.3394.

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OpenMP is one of the most popular parallel programming technique nowadays. Using openMP, programmers parallelized their serial programs by inserting directives. However, in addition to parallel algorithm related overhead which depends on how to design the parallel program, performing openMP also leads to overhead. In this paper, we give a model to evaluate the overhead, and design 5 groups of experiment to evaluate the overhead caused by starting openMP, scheduling and synchronizations. We also analyze the changes of the overhead with different scale of the problems and the number of parallel

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17

Karkowski, Ireneusz, and Henk Corporaal. "Overcoming the limitations of the traditional loop parallelization." Future Generation Computer Systems 13, no. 4-5 (1998): 407–16. http://dx.doi.org/10.1016/s0167-739x(97)00041-1.

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18

Rauchwerger, Lawrence, Nancy M. Amato, and David A. Padua. "A scalable method for run-time loop parallelization." International Journal of Parallel Programming 23, no. 6 (1995): 537–76. http://dx.doi.org/10.1007/bf02577866.

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19

YU, YIJUN, and ERIK H. D'HOLLANDER. "Loop Parallelization using the 3D Iteration Space Visualizer." Journal of Visual Languages & Computing 12, no. 2 (2001): 163–81. http://dx.doi.org/10.1006/jvlc.2000.0191.

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20

Doroshenko, А. Yu, O. G. Beketov, M. M. Bondarenko, and О. А. Yatsenko. "Automated design and parallelization of programs for heterogeneous platforms using algebra-algorithmic tools." PROBLEMS IN PROGRAMMING, no. 2-3 (September 2020): 103–14. http://dx.doi.org/10.15407/pp2020.02-03.103.

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Methods and software tools for automated design and generation of OpenCL programs based on the algebra of algorithms are proposed. OpenCL is a framework for developing parallel software that executes across heterogeneous platforms consisting of general-purpose processors and/or hardware accelerators. The proposed approach consists in using high-level algebra-algorithmic specifications of programs represented in natural linguistic form and rewriting rules. The developed software tools provide the automated design of algorithm schemes based on a superposition of Glushkov algebra constructs that

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21

Lv, Peng Wei, and Jian Qing Xiao. "Parallelization and Locality Optimization Based the Polyhedral Model." Applied Mechanics and Materials 713-715 (January 2015): 2045–48. http://dx.doi.org/10.4028/www.scientific.net/amm.713-715.2045.

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Current trends in micro-architecture are towards larger number of processing elements on a single chip. It is challenging to tap the peak performance of those processors. In order to address this issue, the most promising solution is automatic parallelization. This approach does not require programmer too much effort in the process of parallelizing programs. Polyhedral model is a mathematical framework based on the powerful linear integer programming, which provides an abstraction concept to represent the nested loops computing and dependence of data access using integer points in the polyhedr

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22

Boulet, Pierre, Alain Darte, Georges-André Silber, and Frédéric Vivien. "Loop parallelization algorithms: From parallelism extraction to code generation." Parallel Computing 24, no. 3-4 (1998): 421–44. http://dx.doi.org/10.1016/s0167-8191(98)00020-9.

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23

Doroshenko, А. Yu, O. A. Yatsenko, and O. G. Beketov. "Algorithm for automatic loop parallelization for graphics processing units." PROBLEMS IN PROGRAMMING, no. 4 (December 2017): 028–36. http://dx.doi.org/10.15407/pp2017.04.028.

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24

Doroshenko, A. Yu, and I. Z. Achour. "Algorithm for automatic loop parallelization for graphics processing units." PROBLEMS IN PROGRAMMING, no. 1 (January 2018): 036–45. http://dx.doi.org/10.15407/pp2018.01.036.

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25

Hui, Liu, Xu Jinlong, and Ding Lili. "Coarse-Grained Automatic Parallelization Approach for Branch Nested Loop." International Journal of Performability Engineering 15, no. 11 (2019): 2871. http://dx.doi.org/10.23940/ijpe.19.11.p5.28712881.

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26

Jarzebski, P., K. Wisniewski, and R. L. Taylor. "On parallelization of the loop over elements in FEAP." Computational Mechanics 56, no. 1 (2015): 77–86. http://dx.doi.org/10.1007/s00466-015-1156-z.

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27

SUDA, Akihiro, Hideki TAKASE, Kazuyoshi TAKAGI, and Naofumi TAKAGI. "Nested Loop Parallelization Using Polyhedral Optimization in High-Level Synthesis." IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences E97.A, no. 12 (2014): 2498–506. http://dx.doi.org/10.1587/transfun.e97.a.2498.

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28

Beletska, Anna, Wlodzimierz Bielecki, Albert Cohen, Marek Palkowski, and Krzysztof Siedlecki. "Coarse-grained loop parallelization: Iteration Space Slicing vs affine transformations." Parallel Computing 37, no. 8 (2011): 479–97. http://dx.doi.org/10.1016/j.parco.2010.12.005.

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29

Yang, Chao-Tung, Shian-Shyong Tseng, Cheng-Der Chuang, and Wen-Chung Shih. "Using knowledge-based techniques on loop parallelization for parallelizing compilers." Parallel Computing 23, no. 3 (1997): 291–309. http://dx.doi.org/10.1016/s0167-8191(96)00090-7.

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30

Liu, Jian, Xiaomei Zhu, Wei Xie, and Guoqiang Peng. "A parallelization method for DO-loop based on equivalence classification." Wuhan University Journal of Natural Sciences 1, no. 3-4 (1996): 397–402. http://dx.doi.org/10.1007/bf02900860.

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31

Yao, Hong, Huifang Deng, and Caifeng Zou. "A Survey of Loop Parallelization: Models, Approaches, and Recent Developments." International Journal of Grid and Distributed Computing 9, no. 11 (2016): 143–56. http://dx.doi.org/10.14257/ijgdc.2016.9.11.12.

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32

PEAN, DER-LIN, and CHENG CHEN. "EFFECTIVE PARALLELIZATION TECHNIQUES FOR LOOP NESTS WITH NON-UNIFORM DEPENDENCES." Parallel Algorithms and Applications 16, no. 1 (2001): 37–64. http://dx.doi.org/10.1080/01495730108935265.

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33

Kataev, Nikita Andreevich, and Vladislav Nikolaevich Vasilkin. "Reconstruction of Multi-Dimensional Form of Linearized Accesses to Arrays in SAPFOR." Russian Digital Libraries Journal 23, no. 4 (2020): 770–87. http://dx.doi.org/10.26907/1562-5419-2020-23-4-770-787.

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The system for automated parallelization SAPFOR (System FOR Automated Parallelization) includes tools for program analysis and transformation. The main goal of the system is to reduce the complexity of program parallelization. SAPFOR system is focused on the investigation of multilingual applications in Fortran and C programming languages. The low-level LLVM IR representation is used in SAPFOR for program analysis. This representation allows us to perform various IR-level optimizations to improve the quality of program analysis. At the same time, it loses some features of the program, which ar

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34

Doroshenko, А. Yu, and O. G. Beketov. "Method of parallelization of loops for grid calculation problems on GPU accelerators." PROBLEMS IN PROGRAMMING, no. 1 (2017): 059–66. http://dx.doi.org/10.15407/pp2017.01.059.

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The formal parallelizing transformation of a nest of calculation loop for SIMD architecture devices, particularly for graphics processing units applying CUDA technology and heterogeneous clusters is developed. Procedure of transition from sequential to parallel algorithm is described and illustrated. Serialization of data is applied to optimize processing of large volumes of data. The advantage of the suggested method is its applicability for transformation of data which volumes exceed the memory of operating device. The experiment is conducted to demonstrate feasibility of the proposed approa

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35

Calland, Pierre-Yves, Alain Darte, Yves Robert, and Frédéric Vivien. "Plugging anti and output dependence removal techniques into loop parallelization algorithm." Parallel Computing 23, no. 1-2 (1997): 251–66. http://dx.doi.org/10.1016/s0167-8191(96)00108-1.

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36

Stein, Josef, and Geoffrey C. Fox. "Dependence analysis for outer loop parallelization of existing Fortran-77 programs." Concurrency: Practice and Experience 5, no. 8 (1993): 659–74. http://dx.doi.org/10.1002/cpe.4330050804.

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37

Das, S. K., S. Utku, and M. Salama. "Parallelization of the Volterra algorithm for linear optimal open loop control." Computational Mechanics 5, no. 4 (1989): 305–20. http://dx.doi.org/10.1007/bf01046948.

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38

Yusuf, Marwa, Ahmed El-Mahdy, and Erven Rohou. "Towards automatic binary runtime loop de-parallelization using on-stack replacement." Information Processing Letters 145 (May 2019): 53–57. http://dx.doi.org/10.1016/j.ipl.2019.01.009.

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39

EVERTZ, HANS GERD, and MIHAI MARCU. "A NONLOCAL APPROACH TO VERTEX MODELS AND QUANTUM SPIN SYSTEMS." International Journal of Modern Physics C 04, no. 06 (1993): 1147–59. http://dx.doi.org/10.1142/s0129183193000902.

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We discuss the loop-algorithm, a new type of cluster algorithm that reduces critical slowing down in vertex models and in quantum spin systems. We cover the example of the 6-vertex model in detail. For the F-model, we present numerical results that demonstrate the effectiveness of the loop algorithm. We show how to modify the original algorithm for some more complicated situations, especially for quantum spin systems in one and two dimensions, and we discuss parallelization.

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40

Shrawankar, Urmila, and Krutika Jayant Sapkal. "Complexity Analysis of Vedic Mathematics Algorithms for Multicore Environment." International Journal of Rough Sets and Data Analysis 4, no. 4 (2017): 31–47. http://dx.doi.org/10.4018/ijrsda.2017100103.

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The huge computations performed sequentially requires a lot of time for execution as on contrary to the concurrent implementation. Many problems are involved in the dense linear algebra operations the main focus for this work is for solving linear equations. The problem of solving linear equations when approached using parallel implementation will yield better results. The Vedic mathematical method of Paravartya Yojayet is having less complexity as compared to the conventional methods. This work mainly focuses on the parallel implementation of the Paravartya Yojayet and its comparison to the b

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41

HADJIDOUKAS, PANAGIOTIS E., and LAURENT AMSALEG. "NESTED OPENMP PARALLELIZATION OF A HIERARCHICAL DATA CLUSTERING ALGORITHM." Parallel Processing Letters 20, no. 02 (2010): 187–208. http://dx.doi.org/10.1142/s0129626410000144.

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This paper presents a high performance parallel implementation of a hierarchical data clustering algorithm. The OpenMP programming model, either enhanced with our lightweight runtime support or through its tasking model, deals with the high irregularity of the algorithm and allows for efficient exploitation of the inherent loop-level nested parallelism. Thorough experimental evaluation demonstrates the performance scalability of our parallelization and the effective utilization of computational resources, which results in a clustering approach able to provide high quality clustering of very la

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42

Lin, Yuan, and David Padua. "On the Automatic Parallelization of Sparse and Irregular Fortran Programs." Scientific Programming 7, no. 3-4 (1999): 231–46. http://dx.doi.org/10.1155/1999/108763.

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Automatic parallelization is usually believed to be less effective at exploiting implicit parallelism in sparse/irregular programs than in their dense/regular counterparts. However, not much is really known because there have been few research reports on this topic. In this work, we have studied the possibility of using an automatic parallelizing compiler to detect the parallelism in sparse/irregular programs. The study with a collection of sparse/irregular programs led us to some common loop patterns. Based on these patterns new techniques were derived that produced good speedups when manuall

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43

Chemeris, Alexander, and Sergii Sushko. "Analysis and Optimization of the Sizes of the Iteration Space Tiles During the Parallelization of Program Loop Operators." Advances in Cyber-Physical Systems 3, no. 1 (2018): 1–6. http://dx.doi.org/10.23939/acps2018.01.001.

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44

Singh Anjanaa, Parwat, N. Naga Maruthia, Sagar Gujjunooria, and Madhu Orugantib. "Runtime Parallelization of Static and Dynamic Irregular Array of Array References." International Journal of Engineering & Technology 7, no. 4.6 (2018): 150. http://dx.doi.org/10.14419/ijet.v7i4.6.20452.

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The advancement of computer systems such as multi-core and multiprocessor systems resulted in much faster computing than earlier. However, the efficient utilization of these rich computing resources is still an emerging area. For efficient utilization of computing resources, many optimization techniques have been developed, some techniques at compile time and some at runtime. When all the information required for parallel execution is known at compile time, then optimization compilers can reasonably parallelize a sequential program. However, optimization compiler fails when it encounters compi

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45

Jimborean, Alexandra, Philippe Clauss, Jean-François Dollinger, Vincent Loechner, and Juan Manuel Martinez Caamaño. "Dynamic and Speculative Polyhedral Parallelization of Loop Nests Using Binary Code Patterns." Procedia Computer Science 18 (2013): 2575–78. http://dx.doi.org/10.1016/j.procs.2013.05.443.

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46

Rabbath, C. A., A. Ait El Cadi, M. Abdonne, N. Lechevin, S. Lapierre, and T. Crainic. "AUTOMATIC PARALLELIZATION OF ELECTRO-MECHANICAL SYSTEMS GOVERNED BY ODEs." Transactions of the Canadian Society for Mechanical Engineering 26, no. 3 (2002): 347–65. http://dx.doi.org/10.1139/tcsme-2002-0020.

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The paper proposes an effective approach for the automatic parallelization of models of electro-mechanical systems governed by ordinary differential equations. The novel method takes a nominal mathematical model, expressed in block diagram language, and portions in parallel the code to be executed on a set of standard microprocessors. The integrity of the simulations is preserved, the computing resources available are efficiently used, and the simulations are compliant with real-time constraints; that is, the time integration of the ordinary differential equations is performed within restricte

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47

XU, Bing, Shouyi YIN, Leibo LIU, and Shaojun WEI. "Low-Power Loop Parallelization onto CGRA Utilizing Variable Dual V_DD." IEICE Transactions on Information and Systems E98.D, no. 2 (2015): 243–51. http://dx.doi.org/10.1587/transinf.2014rcp0004.

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48

Baskaran, Muthu Manikandan, Nagavijayalakshmi Vydyanathan, Uday Kumar Reddy Bondhugula, J. Ramanujam, Atanas Rountev, and P. Sadayappan. "Compiler-assisted dynamic scheduling for effective parallelization of loop nests on multicore processors." ACM SIGPLAN Notices 44, no. 4 (2009): 219–28. http://dx.doi.org/10.1145/1594835.1504209.

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49

Mohd-Saman, M. Y., and D. J. Evans. "Investigation of a set of Bernstein tests for the detection of loop parallelization." Parallel Computing 19, no. 2 (1993): 197–207. http://dx.doi.org/10.1016/0167-8191(93)90049-q.

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50

GROSSER, TOBIAS, ARMIN GROESSLINGER, and CHRISTIAN LENGAUER. "POLLY — PERFORMING POLYHEDRAL OPTIMIZATIONS ON A LOW-LEVEL INTERMEDIATE REPRESENTATION." Parallel Processing Letters 22, no. 04 (2012): 1250010. http://dx.doi.org/10.1142/s0129626412500107.

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The polyhedral model for loop parallelization has proved to be an effective tool for advanced optimization and automatic parallelization of programs in higher-level languages. Yet, to integrate such optimizations seamlessly into production compilers, they must be performed on the compiler's internal, low-level, intermediate representation (IR). With Polly, we present an infrastructure for polyhedral optimizations on such an IR. We describe the detection of program parts amenable to a polyhedral optimization (so-called static control parts), their translation to a Z-polyhedral representation, o

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