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Relevant bibliographies by topics / Low-density parity-check convolutional codes

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Academic literature on the topic 'Low-density parity-check convolutional codes'

Author: Grafiati

Published: 7 June 2025

Last updated: 9 July 2025

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Journal articles on the topic "Low-density parity-check convolutional codes"

1

Baldi, Marco, Giovanni Cancellieri, and Franco Chiaraluce. "Array Convolutional Low-Density Parity-Check Codes." IEEE Communications Letters 18, no. 2 (2014): 336–39. http://dx.doi.org/10.1109/lcomm.2013.120713.132177.

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Baldi, Marco, Marco Bianchi, Giovanni Cancellieri, and Franco Chiaraluce. "Progressive Differences Convolutional Low-Density Parity-Check Codes." IEEE Communications Letters 16, no. 11 (2012): 1848–51. http://dx.doi.org/10.1109/lcomm.2012.091212.121230.

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Jimenez Felstrom, A., and K. S. Zigangirov. "Time-varying periodic convolutional codes with low-density parity-check matrix." IEEE Transactions on Information Theory 45, no. 6 (1999): 2181–91. http://dx.doi.org/10.1109/18.782171.

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Bates, S., D. G. Elliott, and R. Swamy. "Termination Sequence Generation Circuits for Low-Density Parity-Check Convolutional Codes." IEEE Transactions on Circuits and Systems I: Regular Papers 53, no. 9 (2006): 1909–17. http://dx.doi.org/10.1109/tcsi.2006.880313.

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Bates, S., Zhengang Chen, L. Gunthorpe, A. E. Pusane, K. Sh Zigangirov, and Daniel J. Costello. "A low-cost serial decoder architecture for low-density parity-check convolutional codes." IEEE Transactions on Circuits and Systems I: Regular Papers 55, no. 7 (2008): 1967–76. http://dx.doi.org/10.1109/tcsi.2008.918002.

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Zhengang Chen and S. Bates. "Construction of low-density parity-check convolutional codes through progressive edge-growth." IEEE Communications Letters 9, no. 12 (2005): 1058–60. http://dx.doi.org/10.1109/lcomm.2005.1576587.

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Mu, Liwei, Zhiyong Liu, and Yi Fang. "Construction of time-invariant rate-compatible-low-density parity-check convolutional codes." IET Communications 10, no. 9 (2016): 1021–26. http://dx.doi.org/10.1049/iet-com.2015.0867.

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Farkaš, Peter, and Frank Schindler. "Construction for obtaining trellis run length limited error control codes from convolutional codes." Journal of Electrical Engineering 68, no. 5 (2017): 401–4. http://dx.doi.org/10.1515/jee-2017-0074.

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Abstract Recently a new construction of run length limited block error control codes based on control matrices of linear block codes was proposed. In this paper a similar construction for obtaining trellis run length limited error control codes from convolutional codes is described. The main advantage of it, beyond its simplicity is that it does not require any additional redundancy except the one which is already contained in the original convolutional error control code. One example is presented how to get such a code from a convolutional low density parity check code.

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Lo, Ka Leong, Zhuo Chen, Slavica Marinkovic, and Branka Vucetic. "Layered space-time structures with low-density parity-check and convolutional codes as constituent codes." European Transactions on Telecommunications 16, no. 2 (2005): 121–35. http://dx.doi.org/10.1002/ett.1036.

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Laouar, Oulfa, Imed Amamra, and Nadir Derouiche. "EXIT chart analysis of regular and irregular LDPC convolutional codes on AWGN channel." Bulletin of Electrical Engineering and Informatics 14, no. 1 (2025): 338–56. http://dx.doi.org/10.11591/eei.v14i1.8260.

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Low-density parity-check (LDPC) codes are widely recognized for their excellent forward error correction, near-Shannon-limit performance, and support for high data rates with effective hardware parallelization. Their convolutional counterpart, LDPC convolutional codes (LDPC-CCs), offer additional advantages such as variable codeword lengths, unlimited parity-check matrices, and simpler encoding and decoding. These features make LDPC-CCs particularly suitable for practical implementations with varying channel conditions and data frame sizes. This paper investigates the performance of LDPC-CCs using the extrinsic information transfer (EXIT) chart, a graphical tool for analyzing iterative decoding. EXIT charts visualize mutual information exchange and help predict convergence behavior, estimate performance thresholds, and optimize code design. Starting with the EXIT chart principles for LDPC codes, we derived the mutual information functions for variable and check nodes in regular and irregular LDPC-CC tanner graphs. This involved adapting existing EXIT functions to the periodic parity-check matrix of LDPC-CCs. We compare regular and irregular LDPC-CC constructions, examining the impact of degree distributions and the number of periods in the parity-check matrix on convergence behavior. Our simulations show that irregular LDPC-CCs consistently outperform regular ones, and the EXIT chart analysis confirms that LDPC-CCs demonstrate superior bit error rate (BER) performance compared to equivalent LDPC block codes.

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Dissertations / Theses on the topic "Low-density parity-check convolutional codes"

1

Hussein, Ahmed Refaey Ahmed. "Universal Decoder for Low Density Parity Check, Turbo and Convolutional Codes." Thesis, Université Laval, 2011. http://www.theses.ulaval.ca/2011/28154/28154.pdf.

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Meidan, Amir. "Linear-time encodable low-density parity-check codes." Thesis, National Library of Canada = Bibliothèque nationale du Canada, 1998. http://www.collectionscanada.ca/obj/s4/f2/dsk1/tape11/PQDD_0006/MQ40942.pdf.

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Sharifi, Tehrani Saeed. "Stochastic decoding of low-density parity-check codes." Thesis, McGill University, 2011. http://digitool.Library.McGill.CA:80/R/?func=dbin-jump-full&object_id=97010.

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Low-Density Parity-Check (LDPC) codes are one of the most powerful classes of error-control codes known to date. These codes have been considered for many recent digital communication applications. In this dissertation, we propose stochastic decoding of state-of-the-art LDPC codes and demonstrate it as a competitive approach to practical LDPC decoding algorithms.In stochastic decoding, probabilities are represented as streams of random bits using Bernoulli sequences in which the information is contained in the statistics of the bit stream. This representation results in low hardware-complexity processing nodes that perform computationally-intensive operations. However, stochastic decoding is prone to the acute problem of latching. This problem is caused by correlated bit streams within cycles in the code's factor graph, and significantly deteriorates the performance of stochastic LDPC decoders.We propose edge memories, tracking forecast memories, and majority-based tracking forecast memories to address the latching problem. These units efficiently extract the evolving statistics of stochastic bit streams and rerandomize them to disrupt latching. To the best of our knowledge, these methods are the first successful methods for stochastic decoding of state-of-the-art LDPC codes.We present novel decoder architectures and report on several hardware implementations. The most advanced reported implementation is a stochastic decoder that decodes the (2048,1723) LDPC code from the IEEE 802.3an standard. To the best of our knowledge, this decoder is the most silicon area-efficient and, with a maximum core throughput of 61.3 Gb/s, is one of the fastest fully parallel soft-decision LDPC decoders reported in the literature. We demonstrate the performance of this decoder in low bit-error-rate regimes.In addition to stochastic LDPC decoding, we propose the novel application of the stochastic approach for joint decoding of LDPC codes and partial-response channels that are considered in practical magnetic recording applications. Finally, we investigate the application of the stochastic approach for decoding linear block codes with high-density parity-check matrices on factor graphs. We consider Reed-Solomon, Bose-Chaudhuri-Hocquenghem, and block turbo codes.<br>À ce jour, les codes Low-Density Parity-Check (LDPC) font partie des codes correcteurs d'erreurs les plus performants. Ces codes sont inclus dans différents standards de communications numériques. Dans ce manuscrit, nous proposons d'utiliser le décodage stochastique pour les codes LDPC. D'autre part, nous démontrons que pour les codes LDPC, le décodage stochastique représente une alternative réaliste aux algorithmes de décodage existants.Dans le processus de décodage stochastique, les probabilités sont représentées sous forme de séquences de Bernoulli. L'information est contenue dans la statistique de ces flux binaires aléatoires. Cette représentation particulière permet d'exécuter des calculs intensifs avec une faible complexité matérielle. Cependant le décodage stochastique est enclin au problème du verrouillage ("latching"). La corrélation entre les bits des différents flux au sein des cycles du graphe biparti dégrade les performances du décodage stochastique des codes LDPC. Pour résoudre le problème du verrouillage, nous proposons trois solutions: les mémoires de branche, les mémoires de suivi, et les mémoires de suivi à majorité. Ces différents composants permettent de suivre l'évolution de la statistique des flux binaires et de réintroduire des éléments aléatoires au sein des séquences observées, minimisant ainsi le phénomène de verrouillage. À notre connaissance, il s'agit là des premiers résultats probants permettant un décodage stochastique efficace des codes LDPC. Nous proposons de nouvelles architectures de décodeurs associées à leurs implantations matérielles respectives. La plus perfectionnée des architectures présentée ici est celle d'un décodeur stochastique pour le code LDPC (2048,1723) associé au standard IEEE 802.3an. À notre connaissance, en comparaison avec l'état de l'art actuel, ce décodeur dispose du meilleur rapport vitesse/complexité. Le débit maximum (au niveau du coeur), est de 61.3 Gb/s, il s'agit là du plus rapide des décodeurs de codes LDPC à décisions souples connu à ce jour. Nous présentons par ailleurs les performances de ce décodeur à très faible taux d'erreurs binaire. De plus, nous proposons d'appliquer le calcul stochastique au décodage conjoint des codes LDPC et des canaux à réponse partielle qui est utilisé dans les applications d'enregistrement magnétique. Enfin, nous étudions l'extension du décodage stochastique au décodage des codes en blocs ayant une matrice de parité à forte densité. Nous appliquons le décodage stochastique sur des graphes biparti aux codes Reed-Solomon, Bose-Chaudhuri-Hocquenghem, et aux turbocodes en blocs.

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Davey, M. C. "Error-correction using low-density parity-check codes." Thesis, University of Cambridge, 2000. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.598305.

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Gallager's low-density parity-check codes are defined by sparse parity-check matrices, usually with a random contruction. Such codes have near Shannon limit performance when decoded using an iterative probabilistic decoding algorithm. We report two advances that improve the error-correction performance of these codes. First, defining the codes over non-binary fields we can obtain a 0.6 dB improvement in signal to noise ratio for a given bit error rate. Second, using irregular parity-check matrices with non-uniform row and column weights we obtain gains of up to 0.5 dB. The empirical error-correction performance of irregular low-density parity-check codes is unbeaten for the additive white Gaussian noise channel. Low-density parity-check codes are also shown to be useful for communicating over channels which make insertions and deletions as well as additive (substitution) errors. Error-correction for such channels has not been widely studied, but is of importance whenever synchronisation of sender and receiver is imperfect. We introduce concatenated codes using novel non-linear inner codes which we call 'watermark' codes, and low-density parity-check codes over non-binary fields as outer codes. The inner code allows resynchronisation using a probabilistic decoder, providing soft outputs for the outer low-density parity-check decoder. Error-correction performance using watermark codes is several orders of magnitude better than any comparable results in the literature.

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5

Hayes, Bob. "LOW DENSITY PARITY CHECK CODES FOR TELEMETRY APPLICATIONS." International Foundation for Telemetering, 2007. http://hdl.handle.net/10150/604497.

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ITC/USA 2007 Conference Proceedings / The Forty-Third Annual International Telemetering Conference and Technical Exhibition / October 22-25, 2007 / Riviera Hotel & Convention Center, Las Vegas, Nevada<br>Next generation satellite communication systems require efficient coding schemes that enable high data rates, require low overhead, and have excellent bit error rate performance. A newly rediscovered class of block codes called Low Density Parity Check (LDPC) codes has the potential to revolutionize forward error correction (FEC) because of the very high coding rates. This paper presents a brief overview of LDPC coding and decoding. An LDPC algorithm developed by Goddard Space Flight Center is discussed, and an overview of an accompanying VHDL development by L-3 Communications Cincinnati Electronics is presented.

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Moon, Todd K., and Jacob H. Gunther. "AN INTRODUCTION TO LOW-DENSITY PARITY-CHECK CODES." International Foundation for Telemetering, 2003. http://hdl.handle.net/10150/607470.

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International Telemetering Conference Proceedings / October 20-23, 2003 / Riviera Hotel and Convention Center, Las Vegas, Nevada<br>Low-Density Parity-Check (LDPC) codes are powerful codes capable of nearly achieving the Shannon channel capacity. This paper presents a tutorial introduction to LDPC codes, with a detailed description of the decoding algorithm. The algorithm propagates information about bit and check probabilities through a tree obtained from the Tanner graph for the code. This paper may be useful as a supplement in a course on error-control coding or digital communication.

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Anitei, Irina. "Circular Trellis based Low Density Parity Check Codes." Ohio University / OhioLINK, 2008. http://rave.ohiolink.edu/etdc/view?acc_num=ohiou1226513009.

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Price, Aiden K. "Improved constructions of low-density parity-check codes." Thesis, Queensland University of Technology, 2019. https://eprints.qut.edu.au/128373/1/Aiden_Price_Thesis.pdf.

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There is an ongoing need to improve the efficiency and error-correcting performance of error correcting codes, which are widely used to enhance accuracy when retrieving or communicating information. This research investigates several potential improvements to a high-performing class of error correcting codes known as low-density parity-check (LDPC) codes. The results presented here further the known literature surrounding a specific class of functions (Alltop functions). Additionally, this work demonstrates ways of manipulating existing LDPC code constructions using relaxed difference sets to provide constructions with far more flexible code parameters. These constructions have competitive performance when compared to relevant modern codes.

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Adhikari, Dikshya. "The Role of Eigenvalues of Parity Check Matrix in Low-Density Parity Check Codes." Thesis, University of North Texas, 2020. https://digital.library.unt.edu/ark:/67531/metadc1707297/.

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The new developments in coding theory research have revolutionized the application of coding to practical systems. Low-Density Parity Check (LDPC) codes form a class of Shannon limit approaching codes opted for digital communication systems that require high reliability. This thesis investigates the underlying relationship between the spectral properties of the parity check matrix and LDPC decoding convergence. The bit error rate of an LDPC code is plotted for the parity check matrix that has different Second Smallest Eigenvalue Modulus (SSEM) of its corresponding Laplacian matrix. It is found that for a given (n,k) LDPC code, large SSEM has better error floor performance than low SSEM. The value of SSEM decreases as the sparseness in a parity-check matrix is increased. It was also found from the simulation that long LDPC codes have better error floor performance than short codes. This thesis outlines an approach to analyze LDPC decoding based on the eigenvalue analysis of the corresponding parity check matrix.

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Blad, Anton. "Efficient Decoding Algorithms for Low-Density Parity-Check Codes." Thesis, Linköping University, Department of Electrical Engineering, 2005. http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-2794.

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<p>Low-density parity-check codes have recently received much attention because of their excellent performance and the availability of a simple iterative decoder. The decoder, however, requires large amounts of memory, which causes problems with memory consumption. </p><p>We investigate a new decoding scheme for low density parity check codes to address this problem. The basic idea is to define a reliability measure and a threshold, and stop updating the messages for a bit whenever its reliability is higher than the threshold. We also consider some modifications to this scheme, including a dynamic threshold more suitable for codes with cycles, and a scheme with soft thresholds which allow the possibility of removing a decision which have proved wrong. </p><p>By exploiting the bits different rates of convergence we are able to achieve an efficiency of up to 50% at a bit error rate of less than 10^-5. The efficiency should roughly correspond to the power consumption of a hardware implementation of the algorithm.</p>

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Books on the topic "Low-density parity-check convolutional codes"

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Gallagher, Robert G. Low-density parity-check codes. MIT-Press, 2003.

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Gallager, Robert G. Low-density parity-check codes. M.I.T. Press, 2005.

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Rovini, Massimo. Low-density parity-check codes: A tutorial. ESA Publications Division, 2004.

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Meidan, Amir. Linear-time encodable low-density parity-check codes. National Library of Canada, 1998.

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Park, Eun-Young Christina. New decoding algorithms for regular low-density parity-check codes. National Library of Canada, 2002.

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Mantha, Ramesh. Hybrid automatic repeat request schemes using turbo codes and low density parity check codes. National Library of Canada, 1999.

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Johnson, Sarah J. Iterative error correction: Turbo, low-density parity-check and repeat-accumulate codes. Cambridge University Press, 2009.

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Gallagher, Robert G. Low-Density Parity-Check Codes. MIT Press, 2003.

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Benjamin, Smith. Low-density parity-check codes with reduced decoding complexity. 2007.

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Ardakani, Masoud. Efficient analysis, design and decoding of low-density parity-check codes. 2004.

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Book chapters on the topic "Low-density parity-check convolutional codes"

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Costello, Daniel J., Arvind Sridharan, Deepak Sridhara, and R. Michael Tanner. "Low Density Parity Check Convolutional Codes Derived from Quasi-Cyclic Block Codes." In Communications, Information and Network Security. Springer US, 2003. http://dx.doi.org/10.1007/978-1-4757-3789-9_4.

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Rao, K. Deergha. "Low Density Parity Check Codes." In Channel Coding Techniques for Wireless Communications. Springer Singapore, 2019. http://dx.doi.org/10.1007/978-981-15-0561-4_8.

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Ivaniš, Predrag, and Dušan Drajić. "Low Density Parity Check Codes." In Information Theory and Coding - Solved Problems. Springer International Publishing, 2016. http://dx.doi.org/10.1007/978-3-319-49370-1_9.

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Wu, Zining. "Low-Density Parity-Check Codes." In Coding and Iterative Detection for Magnetic Recording Channels. Springer US, 2000. http://dx.doi.org/10.1007/978-1-4615-4565-1_3.

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Kienle, Frank. "Low-Density Parity-Check Codes." In Architectures for Baseband Signal Processing. Springer New York, 2013. http://dx.doi.org/10.1007/978-1-4614-8030-3_7.

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Ball, Simeon. "Low Density Parity Check Codes." In A Course in Algebraic Error-Correcting Codes. Springer International Publishing, 2020. http://dx.doi.org/10.1007/978-3-030-41153-4_8.

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Baldi, Marco. "Low-Density Parity-Check Codes." In SpringerBriefs in Electrical and Computer Engineering. Springer International Publishing, 2014. http://dx.doi.org/10.1007/978-3-319-02556-8_2.

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Cancellieri, Giovanni. "Low Density Parity Check Codes." In Polynomial Theory of Error Correcting Codes. Springer International Publishing, 2014. http://dx.doi.org/10.1007/978-3-319-01727-3_10.

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Deergha Rao, K. "Low Density Parity Check Codes." In Channel Coding Techniques for Wireless Communications. Springer India, 2015. http://dx.doi.org/10.1007/978-81-322-2292-7_8.

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Paolini, E. "Low-Density Parity-Check (LDPC) Codes." In Inside Solid State Drives (SSDs). Springer Singapore, 2018. http://dx.doi.org/10.1007/978-981-13-0599-3_12.

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Conference papers on the topic "Low-density parity-check convolutional codes"

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Arvind Sridharan, Deepak Sridhara, D. J. Costello, and T. E. Fuja. "A construction for irregular low density parity check convolutional codes." In IEEE International Symposium on Information Theory, 2003. Proceedings. IEEE, 2003. http://dx.doi.org/10.1109/isit.2003.1228018.

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Richter, G., M. Kaupper, and K. Zigangirov. "Irregular Low-Density Parity-Check Convolutional Codes Based on Protographs." In 2006 IEEE International Symposium on Information Theory. IEEE, 2006. http://dx.doi.org/10.1109/isit.2006.261553.

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Zhengang Chen, Ramkrishna Swamy, and Stephen Bates. "A new encoder implementation for low-density parity-check convolutional codes." In 2007 IEEE North-East Workshop on Circuits and Systems (NEWCAS 2007). IEEE, 2007. http://dx.doi.org/10.1109/newcas.2007.4487987.

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Zhengang Chen, S. Bates, and Xiaodai Dong. "Low-density parity-check convolutional codes applied to packet based communication systems." In GLOBECOM '05. IEEE Global Telecommunications Conference, 2005. IEEE, 2005. http://dx.doi.org/10.1109/glocom.2005.1577852.

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Sridharan, Arvind, Daniel J. Costello, and R. Michael Tanner. "A construction for low density parity check convolutional codes based on quasi-cyclic block codes." In Proceedings of IEEE International Symposium on Information Theory. IEEE, 2002. http://dx.doi.org/10.1109/isit.2002.1023753.

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He, Y. C., C. Cardinal, and D. Haccoun. "A Class of Low-Density Parity-Check Convolutional Codes Based on Difference Families." In 2008 IEEE International Conference on Communications. IEEE, 2008. http://dx.doi.org/10.1109/icc.2008.228.

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Zhengang Chen, S. Bates, D. Elliott, and T. Brandon. "CTH08-5: Efficient Encoding and Termination of Low-Density Parity-Check Convolutional Codes." In IEEE Globecom 2006. IEEE, 2006. http://dx.doi.org/10.1109/glocom.2006.79.

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Brandon, Tyler, John C. Koob, Leendert van den Berg, et al. "A 600-Mb/s encoder and decoder for low-density parity-check convolutional codes." In 2008 IEEE International Symposium on Circuits and Systems - ISCAS 2008. IEEE, 2008. http://dx.doi.org/10.1109/iscas.2008.4542111.

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Wang, Chung-Li, and Shu Lin. "Low-density parity-check accumulate codes." In Its Applications (Isita2010). IEEE, 2010. http://dx.doi.org/10.1109/isita.2010.5650090.

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Fossorier, M. "Quasicyclic low density parity check codes." In IEEE International Symposium on Information Theory, 2003. Proceedings. IEEE, 2003. http://dx.doi.org/10.1109/isit.2003.1228164.

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