Journal articles: 'Low Noise figure LNA'

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Radic, Jelena, Alena Djugova, and Mirjana Videnovic-Misic. "Influence of current reuse LNA circuit parameters on its noise figure." Serbian Journal of Electrical Engineering 6, no. 3 (2009): 439–49. http://dx.doi.org/10.2298/sjee0903439r.

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A 2.4 GHz low noise amplifier (LNA) with a bias current reuse technique is proposed in this work. To obtain the optimum noise figure (NF) value, dependence of NF on its most influential LNA parameters has been analyzed. Taking into account the LNA design requirements for other figures of merit, values of the circuit parameters are given for the optimum noise figure.

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Manjula, S., R. Karthikeyan, S. Karthick, N. Logesh, and M. Logeshkumar. "Optimized Design of Low Power Complementary Metal Oxide Semiconductor Low Noise Amplifier for Zigbee Application." Journal of Computational and Theoretical Nanoscience 18, no. 4 (April 1, 2021): 1327–30. http://dx.doi.org/10.1166/jctn.2021.9387.

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An optimized high gain low power low noise amplifier (LNA) is presented using 90 nm CMOS process at 2.4 GHz frequency for Zigbee applications. For achieving desired design specifications, the LNA is optimized by particle swarm optimization (PSO). The PSO is successfully implemented for optimizing noise figure (NF) when satisfying all the design specifications such as gain, power dissipation, linearity and stability. PSO algorithm is developed in MATLAB to optimize the LNA parameters. The LNA with optimized parameters is simulated using Advanced Design System (ADS) Simulator. The LNA with optimized parameters produces 21.470 dB of voltage gain, 1.031 dB of noise figure at 1.02 mW power consumption with 1.2 V supply voltage. The comparison of designed LNA with and without PSO proves that the optimization improves the LNA results while satisfying all the design constraints.

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Shrestha, Bijaya. "Design of Low Noise Amplifier for 1.5 GHz." SCITECH Nepal 13, no. 1 (September 30, 2018): 40–47. http://dx.doi.org/10.3126/scitech.v13i1.23500.

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Low Noise Amplifier (LNA) is a front-end device of a radio frequency (RF) receiver used to increase the amplitude of an RF signal without much additional noise, thereby increasing the noise figure of the system. This paper presents design, simulation, and prototype of an LNA operating at 1.5 GHz for the bandwidth of 100 MHz. The circuit was simulated using Advanced Design System (ADS). The components used are Surface Mount Devices (SMDs); with transistor "Infineon BFP420" as a major component. Other components are resistors, capacitors, and inductors; inductors being superseded by microstrip lines. The circuit was fabricated on FR4 board. The measurements of several parameters of LNA were made using Vector Network Analyzer (VNA), Noise Figure Meter; and Spectrum Analyzer. The LNA has minimum gain of 15.4 dB and maximum noise figure of 1.33 dB. It is unconditionally stable from 50 MHz to 10 GHz. DC supply is 5V and the current consumption is 10 mA. This LNA offers Output-ThirdOrder-Intercept-Point (OJP3) of about 1 4 dBm.

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Uzzal, Mohammad Mohiuddin. "Design, simulation and optimization of a single stage Low Noise Amplifier (LNA) for very low power L- Band satellite handheld applications." AIUB Journal of Science and Engineering (AJSE) 17, no. 2 (July 31, 2018): 37–42. http://dx.doi.org/10.53799/ajse.v17i2.7.

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In first stage of each microwave receiver, there is a Low Noise Amplifier (LNA) stage, and this LNA plays an important role to determine the quality factor of the receiver. The design of a LNA requires the trade-off of many important parameters including gain, Noise Figure (NF), stability, power consumption, cost and design complexity. In this paper, we have designed and simulate a single stage stable LNA circuit having gain 11.78 dB and noise figure 1.86 dB using microwave BJT AT3103 with Agilent package Advance Design Systems (ADS). This LNA operates at center frequency of 2 GHZ and it can be used in L-Band satellite modem for tracking applications.

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Xiang, Yong, Yan Bin Luo, Ren Jie Zhou, and Cheng Yan Ma. "A Low Noise Amplifier with 1.1dB Noise Figure and +17dBm OIP3 for GPS RF Receivers." Applied Mechanics and Materials 336-338 (July 2013): 1490–95. http://dx.doi.org/10.4028/www.scientific.net/amm.336-338.1490.

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A 1.575GHz SiGe HBT(heterojunction bipolar transistor) low-noise-amplifier(LNA) optimized for Global Positioning System(GPS) L1-band applications was presented. The designed LNA employed a common-emitter topology with inductive emitter degeneration to simultaneously achieve low noise figure and input impedance matching. A resistor-bias-feed circuit with a feedback resistor was designed for the LNA input transistor to improve the gain compression and linearity performance. The LNA was fabricated in a commercial 0.18µm SiGe BiCMOS process. The LNA achieves a noise figure of 1.1dB, a power gain of 19dB, a input 1dB compression point(P1dB) of -13dBm and a output third-order intercept point(OIP3) of +17dBm at a current consumption of 3.6mA from a 2.8V supply.

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Manjula, S., M. Malleshwari, and M. Suganthy. "Design of Low Power UWB CMOS Low Noise Amplifier using Active Inductor for WLAN Receiver." International Journal of Engineering & Technology 7, no. 2.24 (April 25, 2018): 448. http://dx.doi.org/10.14419/ijet.v7i2.24.12132.

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This paper presents a low power Low Noise Amplifier (LNA) using 0.18µm CMOS technology for ultra wide band (UWB) applications. gm boosting common gate (CG) LNA is designed to improve the noise performance. For the reduction of on chip area, active inductor is employed at the input side of the designed LNA for input impedance matching. The proposed UWB LNA is designed using Advanced Design System (ADS) at UWB frequency of 3.1-10.6 GHz. Simulation results show that the gain of 10.74+ 0.01 dB, noise figure is 4.855 dB, input return loss <-13 dB and 12.5 mW power consumption.

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Muhamad, Maizan, Norhayati Soin, and Harikrishnan Ramiah. "Linearity improvement of differential CMOS low noise amplifier." Indonesian Journal of Electrical Engineering and Computer Science 14, no. 1 (April 1, 2019): 407. http://dx.doi.org/10.11591/ijeecs.v14.i1.pp407-412.

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This paper presents the linearity improvement of differential CMOS low noise amplifier integrated circuit using 0.13um CMOS technology. In this study, inductively degenerated common source topology is adopted for wireless LAN application. The linearity of the single-ended LNA was improved by using differential structures with optimum biasing technique. This technique achieved better LNA and linearity performance compare with single-ended structure. Simulation was made by using the cadence spectre RF tool. Consuming 5.8mA current at 1.2V supply voltage, the designed LNA exhibits S21 gain of 18.56 dB, noise figure (NF) of 1.85 dB, S11 of −27.63 dB, S22 of -34.33 dB, S12 of −37.09 dB and IIP3 of -7.79 dBm.

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Thirunavukkarasu, G., and G. Murugesan. "Design of Low Noise Amplifier for WLAN using pHEMT." International Journal of Engineering & Technology 9, no. 2 (March 6, 2020): 272. http://dx.doi.org/10.14419/ijet.v9i2.30051.

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The low power consumption devices are frequently focused in design and manufacturing wireless communication system. This paper gives a systematic design of a low noise amplifier for WLAN application aimed to obtain minimum noise figure. The simulation result shows that the noise figure is in the appreciable level (1.67 dB). The maximum gain is greater than 10 dB. These are the predominant requirements of an LNA. Also it posses good stability and the LNA design uses pHEMT for its appreciable noise performance.

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Malika Begum, N., and W. Yasmeen. "A 0.18um CMOS Low Noise Amplifier for 3-5ghz UWB Receivers." International Journal of Engineering & Technology 7, no. 3.6 (July 4, 2018): 84. http://dx.doi.org/10.14419/ijet.v7i3.6.14944.

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This paper presents an Ultra-Wideband (UWB) 3-5 GHz Low Noise Amplifier (LNA) employing Chebyshev filter. The LNA has been designed using Cadence 0.18um CMOS technology. Proposed LNA achieves a minimum noise figure of 2.2dB, power gain of 9dB.The power consumption is 6.3mW from 1.8V power supply.

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Garbaya, Amel, Mouna Kotti, Mourad Fakhfakh, and Esteban Tlelo-Cuautle. "Metamodelling Techniques for the Optimal Design of Low-Noise Amplifiers." Electronics 9, no. 5 (May 11, 2020): 787. http://dx.doi.org/10.3390/electronics9050787.

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In this article we deal with the optimal sizing of low-noise amplifiers (LNAs) using newly proposed metamodeling techniques. The main objective is to construct metamodels of main performances of the LNAs (namely, the third intercept point (IIP3), the scattering parameters (Sij), and the noise figure (NF)) and use them inside an optimization kernel for maximizing the circuits’ performances. The kriging surrogate modelling technique is used for constructing these models. The particle swarm optimization (PSO) technique is considered as the optimization metaheuristic. Two CMOS amplifiers are considered: a UMTS LNA and a multistandard LNA. Obtained results show that, at the considered working frequencies, the first LNA exhibits at 2.14 GHz a noise figure of 1.30 dB, an S21 of 16.01 dB, an S11 of −12.60 dB, and an IIP3 of 8.30 dBm. At 2 GHz, the second LNA has a noise figure of 1.24 dB, an S21 of 17.16 dB, an S11 of −13.74 dB, and an IIP3 of 4.30 dBm. Comparisons between results obtained using the constructed models and those of the simulation are presented to show the perfect agreement between them.

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Yu, Bing Liang, Jin Li, and Wen Yuan Li. "A Low Power SiGe-BiCMOS LNA for COMPASS Applications." Applied Mechanics and Materials 513-517 (February 2014): 4580–84. http://dx.doi.org/10.4028/www.scientific.net/amm.513-517.4580.

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A novel low-noise amplifier (LNA) suitable for COMPASS receiver applications is designed in SiGe-BiCMOS technology. Inductively degenerated technique and resistive feedback technique are employed to reduce the noise figure. With 1.8V power supply, the measured results achieve 17.23dB power gain and 2.58dB noise figure at 1.561GHz.

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Zhang, Yu, Shu Hui Yang, and Yin Chao Chen. "Design and Simulation of a 5.8GHz Low Noise Amplifier Used in RFID." Applied Mechanics and Materials 441 (December 2013): 133–36. http://dx.doi.org/10.4028/www.scientific.net/amm.441.133.

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A 5.8GHz single-stage low noise amplifier (LNA) for radio frequency identification devices (RFID) applications was proposed according to the theory of LNA. It has been realized by ATF-541M4 transistor and its peripheral circuit, such as bias circuit, input and output matching network. The proposed LNA provides a gain of 12.696dB from the analysis of ADS. The LNA achieves 0.951dB noise figure (NF) at the frequency of 5.8GHz. The simulation results show that this LNA has good noise characteristic, the NF is less than other published paper.

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Triapthi, Shivesh, B. Mohapatra, Prabhakar Tiwari, Nagendra Prasad Pathak, and Manoranjan Parida. "Design of RF Receiver Front end Subsystems with Low Noise Amplifier and Active Mixer for Intelligent Transportation Systems Application." Defence Science Journal 70, no. 6 (October 12, 2020): 633–41. http://dx.doi.org/10.14429/dsj.70.13917.

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This paper presents the design, simulation, and characterization of a novel low-noise amplifier (LNA) and active mixer for intelligent transportation system applications. A low noise amplifier is the key component of RF receiver systems. Design, simulation, and characterization of LNA have been performed to obtain the optimum value of noise figure, gain and reflection coefficient. Proposed LNA achieves measured voltage gains of ~18 dB, reflection coefficients of -20 dB, and noise figures of ~2 dB at 5.9 GHz, respectively. The active mixer is a better choice for a modern receiver system over a passive mixer. Key sight advanced design system in conjunction with the electromagnetic simulation tool, has been to obtain the optimal conversion gain and noise figure of the active mixer. The lower and upper resonant frequencies of mixer have been obtained at 2.45 GHz and 5.25 GHz, respectively. The measured conversion gains at lower and upper frequencies are 12 dB and 10.2 dB, respectively. The measured noise figures at lower and upper frequencies are 5.8 dB and 6.5 dB, respectively. The measured mixer interception point at lower and upper frequencies are 3.9 dBm and 4.2 dBm.

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Singh, Rashmi, and Rajesh Mehra. "Low Noise Amplifier using Darlington Pair At 90nm Technology." International Journal of Electrical and Computer Engineering (IJECE) 8, no. 4 (August 1, 2018): 2054. http://dx.doi.org/10.11591/ijece.v8i4.pp2054-2062.

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The demand of low noise amplifier (LNA) has been rising in today’s communication system. LNA is the basic building circuit of the receiver section satellite. The design concept demonstrates the design trade off with NF, gain, power consumption. This paper reports on with analysis of wideband LNA. This paper shows the schematic of LNA by using Darlington pair amplifier. This LNA has been fabricated on 90nm CMOS process. This paper is focused on to make comparison of three stage and single stage LNA. Here, the phase mismatch between these patameters is quantitavely analyzed to study the effect on gain and noise figure (NF). In this paper, single stage LNA has shown the 23 dB measured gain, while the three stages LNA has demonstrated 29 dB measured gain. Here, LNA designed using darlington pair shows low NF of 3.3-4.8 dB, which comparable to other reported single stage LNA designs and appreciably low compared to the three stages LNA. Hence, findings from this paper suggest the use of single stage LNA designed using Darlington pair in transceiver satellite applications.

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Reddy, M. Ramana. "Low Noise and high linearity Wide-band Low Noise Amplifier for 5G Receiver Front End System." International Journal of Innovative Technology and Exploring Engineering 10, no. 6 (April 30, 2021): 18–21. http://dx.doi.org/10.35940/ijitee.f8718.0410621.

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This work Demonstrates a wideband LNA for 5G receiver front end modules with high linearity, Low noise reused topology has an inter stage wideband inductor based two common source cascade stages. The configuration provides the bias current; better Noise figure increases the forward gain. By providing RC Series network at gate terminal of second stage the return losses are reduced and stability will be increased. After pre and post simulation all parameters are better than the existing LNAS. After post simulation results, the Noise figure is achieved less than 1dB and forward gain as flat 16dB for wide band width of 1.5 – 5.5 GHz. At the 1dB compression point the output is 20dbm achieved and OIP3 IS +40dbm is achieved. The chip size of an LNA along with pad is 0.64mm2. The design is GaAsp HEMT process at 50nm technology.

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Yin, Xin, Yi Yao, and Jin Ling Jia. "The Special Research on a Low Noise Amplifier." Advanced Materials Research 605-607 (December 2012): 2057–61. http://dx.doi.org/10.4028/www.scientific.net/amr.605-607.2057.

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This paper studies a low noise amplifier design method for 5.8G wireless local area network. Using the software of designing RF circuit ADS(Advanced Design System) and Avago Technologies’s ATF-36077,we designed a three-cascade LNA. In 5.725G~5.85GHz range, noise figure less than 0.5dB, more than 30dB gain, input and output standing wave ratio less than 1.3dB.The LNA meet the design requirements.

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Yang, Hsin Chia, and Mu Chun Wang. "Extensive 6.0-18.0 GHz Frequency Low Noise Amplifiers Integrated to Form LC-Feedback Oscillators." Advanced Materials Research 225-226 (April 2011): 1075–79. http://dx.doi.org/10.4028/www.scientific.net/amr.225-226.1075.

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Low Voltage supplied radio-frequency (RF) CMOS devices by TSMC 0.18 micron process are used for the RF circuit designs of low noise amplifiers. Three components, low noise amplifiers (LNA), Class-E power amplifiers (PA), and LC oscillator simultaneously working at 6.0 to 18.0 GHz, are explored. The scenario combining two matched amplifiers, LNA and PA, and then amplifying the coupled signals from the oscillators is proven to be working. LNA usually runs prior to PA to suppress the noises, and thus the whole set functions like an integrated LNA, whose forward gain may be promoted as high as at least over 40 dB just as expected. At 6.0, 12.0 and 18.0 GHz, magnitudes of both S11 and S22 in the Smith Chart are deliberately tuned to approach to zero as shown. And Noise Figure determined to be 1.175 gives promising integrated circuit.

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Ndukwe, Cherechi, Oliver Ozioko, and Okere A. U. "Design and Fabrication of a 1.5GHz Microwave Low Noise Amplifier with Suitable Low-noise and High Gain Characteristics." European Journal of Engineering Research and Science 2, no. 8 (August 17, 2017): 7. http://dx.doi.org/10.24018/ejers.2017.2.8.425.

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This paper presents the design, simulation and fabrication of a low noise amplifier with high gain of 1.5GHz. In communication systems, there is always difficulty in distinguishing the received signal from noise at very low signal powers. A low noise amplifier (LNA) is an effective and low-cost way of enhancing this signal quality through signal amplification at the receiver. In this work, LNA simulation and a novel design was carried out using the N76038A field effect transistor (FET). To ensure it is stable over a wide range of frequencies, the input and output stability of the transistor were plotted over its operating frequencies (0.1 GHz to 18 GHz). Constant gain and noise figure circles were plotted and the source impedance properly chosen. The input network was matched to the source impedance and conjugate matching used to match the output. The schematic was converted to microstrip and produced on a printed circuit board. Testing was carried out using the vector network analyser (VNA) and matching errors then corrected by calibration process. The fabricated LNA has a gain of 13.76dB and noise figure of 1.57dB which is in close agreement with a simulation result of 14.25dB and 1.56dB respectively.

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Djennati, Z. A., and K. Ghaffour. "Noise Characterization in InAlAs/InGaAs/InP pHEMTs for Low Noise Applications." International Journal of Electrical and Computer Engineering (IJECE) 7, no. 1 (February 1, 2017): 176. http://dx.doi.org/10.11591/ijece.v7i1.pp176-183.

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In this paper, a noise revision of an InAlAs/InGaAs/InP psoeudomorphic high electron mobility transistor (pHEMT) in presented. The noise performances of the device were predicted over a range of frequencies from 1GHz to 100GHz. The minimum noise figure (NFmin), the noise resistance (Rn) and optimum source impedance (Zopt) were extracted using two approaches. A physical model that includes diffusion noise and G-R noise models and an analytical model based on an improved PRC noise model that considers the feedback capacitance Cgd. The two approaches presented matched results allowing a good prediction of the noise behaviour. The pHEMT was used to design a single stage S-band low noise amplifier (LNA). The LNA demonstrated a gain of 12.6dB with a return loss coefficient of 2.6dB at the input and greater than -7dB in the output and an overall noise figure less than 1dB.

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Malmqvist, R., C. Samuelsson, A. Gustafsson, P. Rantakari, S. Reyaz, T. Vähä-Heikkilä, A. Rydberg, J. Varis, D. Smith, and R. Baggen. "A K-Band RF-MEMS-Enabled Reconfigurable and Multifunctional Low-Noise Amplifier Hybrid Circuit." Active and Passive Electronic Components 2011 (2011): 1–7. http://dx.doi.org/10.1155/2011/284767.

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A K-band (18–26.5 GHz) RF-MEMS-enabled reconfigurable and multifunctional dual-path LNA hybrid circuit (optimised for lowest/highest possible noise figure/linearity, resp.) is presented, together with its subcircuit parts. The two MEMS-switched low-NF (higher gain) and high-linearity (lower gain) LNA circuits (paths) present 16.0 dB/8.2 dB, 2.8 dB/4.9 dB and 15 dBm/20 dBm of small-signal gain, noise figure, and 1 dB compression point at 24 GHz, respectively. Compared with the two (fixed) LNA subcircuits used within this design, the MEMS-switched LNA circuit functions show minimum 0.6–1.3 dB higher NF together with similar values ofP1 dBat 18–25 GHz. The gain of one LNA circuit path is reduced by 25–30 dB when the MEMS switch and active circuitry used within in the same switching branch are switched off to select the other LNA path and minimise power consumption.

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Ibrahim, Abu Bakar, Che Zalina Zulkifli, Shamsul Arrieya Ariffin, and Nurul Husna Kahar. "High frequency of low noise amplifier architecture for WiMAX application: A review." International Journal of Electrical and Computer Engineering (IJECE) 11, no. 3 (June 1, 2021): 2153. http://dx.doi.org/10.11591/ijece.v11i3.pp2153-2164.

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The low noise amplifier (LNA) circuit is exceptionally imperative as it promotes and initializes general execution performance and quality of the mobile communication system. LNA's design in radio frequency (R.F.) circuit requires the trade-off numerous imperative features' including gain, noise figure (N.F.), bandwidth, stability, sensitivity, power consumption, and complexity. Improvements to the LNA's overall performance should be made to fulfil the worldwide interoperability for microwave access (WiMAX) specifications' prerequisites. The development of front-end receiver, particularly the LNA, is genuinely pivotal for long-distance communications up to 50 km for a particular system with particular requirements. The LNA architecture has recently been designed to concentrate on a single transistor, cascode, or cascade constrained in gain, bandwidth, and noise figure.

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Bao, Kuan, and Xiang Ning Fan. "An ESD Protected Wideband CMOS Low Noise Amplifier Employing Active Feedback Technique." Advanced Materials Research 403-408 (November 2011): 2809–13. http://dx.doi.org/10.4028/www.scientific.net/amr.403-408.2809.

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This paper presents a wideband low noise amplifier (LNA) for multi-standard radio applications. The low noise characteristic and input matching are simultaneously achieved by active-feedback technique. Bond-wire inductors and electrostatic devices (ESDs) are co-designed to improve the chip performance. Implemented in 0.18-μm CMOS process, the core size of the fully integrated LNA circuits is 535 μm×425 μm without any passive on-chip inductor. The simulated gain and the minimal noise figure of the CMOS LNA are 17.5 dB and 2.0 dB, respectively. The LNA achieves a -3dB bandwidth of 3.1 GHz. And the simulated IIP3 is -4.4 dBm at 2.5 GHz. Operating at 1.8V, the LNA draws a current of 7.7 mA.

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Muhamad, Maizan, Norhayati Soin, and Harikrishnan Ramiah. "Design of Low Power Low Noise Amplifier using Gm-boosted Technique." Indonesian Journal of Electrical Engineering and Computer Science 9, no. 3 (March 1, 2018): 685. http://dx.doi.org/10.11591/ijeecs.v9.i3.pp685-689.

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This paper presents the development of low noise amplifier integrated circuit using 130nm RFCMOS technology. The low noise amplifier function is to amplify extremely low noise amplifier without adding noise and preserving required signal to a noise ratio. A detailed methodology and analysis that leads to a low power LNA are being discussed throughout this paper. Inductively degenerated and Gm-boosted topology are used to design the circuit. Design specifications are focused for 802.11b/g/n IEEE Wireless LAN Standards with center frequency of 2.4 GHz. The best low noise amplifier provides a power gain (S21) of 19.841 dB with noise figure (NF) of 1.497 dB using the gm-boosted topology while the best low power amplifier drawing 4.19mW power from a 1.2V voltage supply using the inductively degenerated.

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Tarighat, Asieh Parhizkar, and Mostafa Yargholi. "Wideband Input Matching CMOS Low-Noise Amplifier with Noise and Distortion Cancellation." Journal of Circuits, Systems and Computers 29, no. 04 (June 27, 2019): 2050059. http://dx.doi.org/10.1142/s0218126620500590.

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In this paper, a wideband low-noise amplifier (LNA) is designed based on the resistive feedback topology with a TSMC 0.18[Formula: see text][Formula: see text]m standard RF CMOS process. Bandwidth expansion is provided by the second-order Chebyshev filter. The noise figure (NF) increases at high frequency because of the source parasitic capacitors of the cascode transistor; so, noise cancelling technique is applied to the cascode transistor of the proposed LNA. Bias conditions and sizes of the transistors are optimized to cancel the nonlinear transconductance ([Formula: see text]). With this modified technique, low noise figure, high linearity and improved input and output matching can be attained for 3.1–10.6[Formula: see text]GHz frequency band. Post-layout simulation result of the proposed LNA shows the maximum power gain of 17[Formula: see text]dB at 5.5[Formula: see text]GHz frequency, NF of lower than 4.5[Formula: see text]dB over the whole band of 3.1–10.6[Formula: see text]GHz, maximum IIP2 of [Formula: see text]28[Formula: see text]dBm and IIP3 of [Formula: see text]7.5[Formula: see text]dBm, while dissipating 9[Formula: see text]mW (with buffer) from a 1.8 V supply voltage. It occupies [Formula: see text]m silicon die area.

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Sotskov, Denis, Vadim Elesin, Alexander Kuznetsov, Nikolay Usachev, Nikita Zhidkov, and Alexander Nikiforov. "A single power supply 0.1-3.5 GHz low noise amplifier design using a low cost 0.5 μm d-mode pHEMT process." Facta universitatis - series: Electronics and Energetics 33, no. 2 (2020): 317–26. http://dx.doi.org/10.2298/fuee2002317s.

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Design and testing results of a single power supply wide-band low noise amplifier (LNA) based on low cost 0.5 ?m D-mode pHEMT process are presented. It is shown that the designed cascode LNA has operating frequency range up to 3.5 GHz, power gain above 15 dB, noise figure below 2.2 dB, output linearity above 17 dBm and power consumption less than 325 mW. Potential immunity of the LNA to total ionizing dose and destructive single event effects exceed 300 krad and 60 MeV?cm2/mg respectively.

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Firmansyah, Teguh, Anggoro Suryo Pramudyo, Siswo Wardoyo, Romi Wiryadinata, and Alimuddin Alimuddin. "Concurrent Quad-band Low Noise Amplifier (QB-LNA) using Multisection Impedance Transformer." International Journal of Electrical and Computer Engineering (IJECE) 7, no. 4 (August 1, 2017): 2061. http://dx.doi.org/10.11591/ijece.v7i4.pp2061-2070.

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A quad-band low noise amplifier (QB-LNA) based on multisection impedance transformer designed and evaluated in this research. As a novelty, a multisection impedance transformer was used to produce QB-LNA. A multisection impedance transformer is used as input and output impedance matching because it has higher stability, large Q factor, and low noise than lumpedcomponent.The QB-LNA was designed on FR4 microstrip substrate with er= 4.4, thickness h=0.8 mm, and tan d= 0.026. The proposed QB-LNA was designed and analyzed by Advanced Design System (ADS).The simulation has shown that QB-LNA achieves gain (S21) of 22.91 dB, 16.5 dB, 11.18 dB, and 7.25 dB at 0.92 GHz, 1.84 GHz, 2.61 GHz, and 3.54 GHz, respectively.The QB-LNA obtainreturn loss (S11) of -21.28 dB, -31.87 dB, -28.08 dB, and -30.85 dB at 0.92 GHz, 1.84 GHz, 2.61 GHz, and 3.54 GHz, respectively. It also achieves a noise figure (nf) of 2.35 dB, 2.13 dB, 2.56 dB, and 3.55 dB at 0.92 GHz, 1.84 GHz, 2.61 GHz, and 3.54 GHz, respectively. This research also has shown that the figure of merit (FoM) of the proposed QB-LNA is higher than that of another multiband LNA.

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Yu, Bing Liang, Xiao Ning Xie, and Wen Yuan Li. "A Full Integrated LNA in 0.18μm SiGe BiCMOS Technology." Applied Mechanics and Materials 380-384 (August 2013): 3287–91. http://dx.doi.org/10.4028/www.scientific.net/amm.380-384.3287.

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A fully integrated low noise amplifier (LNA) for wireless local area network (WLAN) application is presents. The circuit is fabricated in 0.18μm SiGe BiCMOS technology. For the low noise figure, a feedback path is introduced into the traditional inductively degenerated common emitter cascade LNA, which decreases the inductance for input impedance matching, therefore reduces the thermal noise caused by loss resistor. Impedance matching and noise matching are achieved at the same time. Measured results show that the resonance point of the output resonance network shifts from 2.4GHz to 2.8GHz, due to the parasitic effects at the output. At the frequency of 2.8GHz, the LNA achieves 2.2dB noise figure, 19.4dB power gain. The core circuit consumes only 13mW from a 1.8V supply and occupies less than 0.5mm2.

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Malhotra, Ankit, and Thorsten M. Buzug. "A Summing Configuration based Low Noise Amplifier for MPI and MPS." Current Directions in Biomedical Engineering 4, no. 1 (September 1, 2018): 83–86. http://dx.doi.org/10.1515/cdbme-2018-0021.

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AbstractMagnetic particle imaging (MPI) is a novel tomographic imaging modality which uses static and dynamic magnetic fields to measure the magnetic response generated by superparamagnetic iron oxide nanoparticles (SPIONs). For the characterization of the SPIONs magnetic particle spectroscopy (MPS) is used. In the current research, a low noise amplifier (LNA) suitable for MPI and MPS is presented. LNA plays a significant role in the receive chain of MPI and MPS by amplifying the signals from the nanoparticles while keeping the noise induced through its own circuitry minimal. The LNA is based on the summing configuration and fabricated on a printed circuit board (PCB). Moreover, the prototyped LNA is compared with a commercially available pre-amplifier. The input voltage noise of the prototyped LNA with a receiving coil of series resistance of 0.551 mΩ and an inductance of 130 μH is 561 pV/√Hz with a noise figure (NF) of 11.57 dB.

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Song, Dan, Xiang Ning Fan, Kuan Bao, and Zai Jun Hua. "Design of a Capacitor Cross-Coupled Common Gate Wideband Low Noise Amplifier with Noise Canceling Technique." Applied Mechanics and Materials 618 (August 2014): 548–52. http://dx.doi.org/10.4028/www.scientific.net/amm.618.548.

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This paper presents a wideband low noise amplifier (LNA) for multi-standard radio application .The low noise amplifier achieves wideband matching with the structure of differential common gate .Meanwhile ,the low noise characteristic is achieved by noise canceling and capacitor cross-coupled. Fabricated in 0.18μm CMOS process, the LNA is designed to operate from 700MHz to 2.6GHz.As are shown in the results of simulation, when the LNA operates from 700MHz to 2.6GHz,the S11 is less than-10dB,the gain achieves 8.5 dB and the variation is within ±0.5dB.The noise figure is 2.2dB wih the supply voltage is 1.8v and the drain current is 8mA.

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ROY, NILADRI, GARRETT MCCORMICK, VIJAY DEVABHAKTUNI, and RABIN RAUT. "A SYSTEMATIC COMPUTER-AIDED APPROACH TO LOW-NOISE AMPLIFIER DESIGN." Journal of Circuits, Systems and Computers 19, no. 06 (October 2010): 1163–79. http://dx.doi.org/10.1142/s0218126610006803.

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Low-noise amplifiers (LNAs) are critical to a wide variety of electronic circuits. In the design phase preceding fabrication, an LNA needs to be designed for a given set of specifications (e.g., gain, noise-figure, power consumption, etc.), which tend to be application-dependent. Typically, LNA design using commercial computer-aided design (CAD) tools can be human-intensive and requires a certain degree of expertise. This paper presents a systematic multi-phase CAD approach for the design of LNAs. In the first phase, a quick pre-analysis of the given LNA specifications is carried out leading to the selection of an appropriate LNA topology. In the second phase, an initial design of the LNA is generated employing an appropriate design procedure. Finally, the initial design is adjusted/fine-tuned so as to meet/exceed the given specifications, where necessary. The advantages of the proposed approach are shown through several practical LNA design examples in 0.18 μm CMOS technology.

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Baylis, Charles, Robert J. Marks, and Lawrence Cohen. "Pareto optimization of radar receiver low-noise amplifier source impedance for low noise and high gain." International Journal of Microwave and Wireless Technologies 8, no. 8 (November 20, 2015): 1133–39. http://dx.doi.org/10.1017/s1759078715001610.

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In radar receivers, the low noise amplifier(LNA)must provide very low noise figure and high gain to successfully receive very low signals reflected off of illuminated targets. Obtaining low noise figure and high gain, unfortunately, is a well-known trade-off that has been carefully negotiated by design engineers for years. This paper presents a fundamental solution method for the source reflection coefficient providing the maximum available gain under a given noise figure constraint, and also for the lowest possible noise figure under a gain constraint. The design approach is based solely on the small-signal S-parameters and noise parameters of the device; no additional measurements or information are required. This method is demonstrated through examples. The results are expected to find application in design of LNAs and in real-time reconfigurable amplifiers for microwave communication and radar receivers.

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Abbas, Mohammed Nadhim, and Farooq Abdulghafoor Khaleel. "Mixed Linearity Improvement Techniques for Ultra-wideband Low Noise Amplifier." International Journal of Electrical and Computer Engineering (IJECE) 8, no. 4 (August 1, 2018): 2038. http://dx.doi.org/10.11591/ijece.v8i4.pp2038-2045.

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We present the linearization of an ultra-wideband low noise amplifier (UWB-LNA) operating from 2GHz to 11GHz through combining two linearization methods. The used linearization techniques are the combination of post-distortion cancellation and derivative-superposition linearization methods. The linearized UWB-LNA shows an improved linearity (IIP3) of +12dBm, a minimum noise figure (NFmin.) of 3.6dB, input and output insertion losses (S11 and S22) below -9dB over the entire working bandwidth, midband gain of 6dB at 5.8GHz, and overall circuit power consumption of 24mW supplied from a 1.5V voltage source. Both UWB-LNA and linearized UWB-LNA designs are verified and simulated with ADS2016.01 software using BSIM3v3 TSMC 180nm CMOS model files. In addition, the linearized UWB-LNA performance is compared with other recent state-of-the-art LNAs.

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A. Z. Murad, S., A. Azizan, and A. F. Hasan. "Ultra-low power 0.45 mW 2.4 GHz CMOS low noise amplifier for wireless sensor networks using 0.13-m technology." Bulletin of Electrical Engineering and Informatics 9, no. 1 (February 1, 2020): 396–402. http://dx.doi.org/10.11591/eei.v9i1.1852.

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This paper describes the design topology of a ultra-low power low noise amplifier (LNA) for wireless sensor network (WSN) application. The proposed design of ultra-low power 2.4 GHz CMOS LNA is implemented using 0.13-μm Silterra technology. The LNA benefits of low power from forward body bias technique for first and second stages. Two stages are implemented in order to enhance the gain while obtaining low power consumption for overall circuit. The simulation results show that the total power consumed is only 0.45 mW at low supply voltage of 0.55 V. The power consumption is decreased about 36% as compared with the previous work. A gain of 15.1 dB, noise figure (NF) of 5.9 dB and input third order intercept point (IIP3) of -2 dBm are achieved. The input return loss (S11) and the output return loss (S22) is -17.6 dB and -12.3 dB, respectively. Meanwhile, the calculated figure of merit (FOM) is 7.19 mW-1.

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Amin, Najam Muhammad, Lianfeng Shen, Zhi-Gong Wang, Muhammad Ovais Akhter, and Muhammad Tariq Afridi. "60 GHz-Band Low-Noise Amplifier." Journal of Circuits, Systems and Computers 26, no. 05 (February 8, 2017): 1750075. http://dx.doi.org/10.1142/s021812661750075x.

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This paper presents the design of a 60[Formula: see text]GHz-band LNA intended for the 63.72–65.88[Formula: see text]GHz frequency range (channel-4 of the 60[Formula: see text]GHz band). The LNA is designed in a 65-nm CMOS technology and the design methodology is based on a constant-current-density biasing scheme. Prior to designing the LNA, a detailed investigation into the transistor and passives performances at millimeter-wave (MMW) frequencies is carried out. It is shown that biasing the transistors for an optimum noise figure performance does not degrade their power gain significantly. Furthermore, three potential inductive transmission line candidates, based on coplanar waveguide (CPW) and microstrip line (MSL) structures, have been considered to realize the MMW interconnects. Electromagnetic (EM) simulations have been performed to design and compare the performances of these inductive lines. It is shown that the inductive quality factor of a CPW-based inductive transmission line ([Formula: see text] is more than 3.4 times higher than its MSL counterpart @ 65[Formula: see text]GHz. A CPW structure, with an optimized ground-equalizing metal strip density to achieve the highest inductive quality factor, is therefore a preferred choice for the design of MMW interconnects, compared to an MSL. The LNA achieves a measured forward gain of [Formula: see text][Formula: see text]dB with good input and output impedance matching of better than [Formula: see text][Formula: see text]dB in the desired frequency range. Covering a chip area of 1256[Formula: see text][Formula: see text]m[Formula: see text]m including the pads, the LNA dissipates a power of only 16.2[Formula: see text]mW.

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Chang, Yi Cheng, Meng Ting Hsu, and Yu Chang Hsieh. "Design of 3.1-10.6GHz CMOS LNA Based on Input Matching Technique of Common-Gate Topology." Applied Mechanics and Materials 479-480 (December 2013): 1014–17. http://dx.doi.org/10.4028/www.scientific.net/amm.479-480.1014.

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In this study, three stage ultra-wide-band CMOS low-noise amplifier (LNA) is presented. The UWB LNA is design in 0.18μm TSMC CMOS technique. The LNA input and output return loss are both less than-10dB, and achieved 10dB of average power gain, the minimum noise figure is 6.55dB, IIP3 is about-9.5dBm. It consumes 11mW from a 1.0-V supply voltage.

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Seo, Heesong, Hyejeong Song, Changjoon Park, Jehyung Yoon, Inyoung Choi, and Bumman Kim. "Blocker filtering low-noise amplifier for SAW-less Bluetooth receiver system." International Journal of Microwave and Wireless Technologies 1, no. 5 (October 2009): 447–52. http://dx.doi.org/10.1017/s1759078709990699.

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A 2.4 GHz CMOS blocker filtering low-noise amplifier (BF-LNA) suitable for Bluetooth™ application is presented. The circuit employs a differential amplifier topology with a current mirror active load and a notch filter. Each path amplifies differentially with the common mode input signal, but there is a notch filter rejecting only the wanted signal at one path. By subtracting the two signals from each path, the large interferers are rejected and only the wanted signal is amplified. Therefore, it becomes a narrow-band amplifier with blocker filtering capability, realizing a receiver system without need of the off-chip SAW filter. The BF-LNA is designed using a 0.13-μm CMOS process. The measured performances are a gain of 11.4 dB, and a noise figure of 1.85 dB. Attenuation levels at 400 MHz apart from the target frequency are −13 and −29 dBc at each sideband. The P1dB,in and IIP3 are −8.2 and 1.46 dBm, respectively. The proposed BF-LNA can reject large interferers at the front-end of the receiver system with a good noise figure.

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Wang, Yu Lin, Man Long Her, Ming Wei Hsu, and Wen Ko. "A Ku-Band Low Noise Amplifier Based on Transformer." Advanced Materials Research 655-657 (January 2013): 1550–54. http://dx.doi.org/10.4028/www.scientific.net/amr.655-657.1550.

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The aim of this paper is to design and implement a low noise amplifier (LNA) based on transformer for a Ku-band application. The proposed CMOS LNA can have an enhanced gain because of the cascade topology, a highly flat gain response because of the RC feedback network, and a wide passband because of the source degeneration structure that effectively suppresses the Miller effect. The Ku-band LNA dissipates 22.175 mW power and achieves the S11 of -10.31 to -6.77 dB, S22 of -18.1 to -37.78 dB, flat S21 of 8.78 to 10.59 dB, and noise figure of 3.96 to 5.33 dB across the 12~18 GHz span. The measured output P1dB is approximately -2 dBm. The chip size including all testing pads is only 0.545 x 0.599 mm2.

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KARYANA, ASEP, YUYUN SITI ROHMAH, and BUDI PRASETYA. "Realisasi LNA Dua Tingkat dengan Teknik Penyesuai Impedansi Trafo λ/4 dan Lumped Element untuk DVB-T2." ELKOMIKA: Jurnal Teknik Energi Elektrik, Teknik Telekomunikasi, & Teknik Elektronika 8, no. 1 (January 31, 2020): 1. http://dx.doi.org/10.26760/elkomika.v8i1.1.

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ABSTRAK Digital Video Broadcasting-Second Generation Terrestrial (DVB-T2) merupakan standar internasional yang menaungi pemberlakuan televisi digital saat ini. Pada konfigurasi DVB-T2 terdapat perangkat penerima sinyal di sisi pelanggan. Permasalahan yang sering dijumpai adalah lemahnya daya sinyal yang diterima. Oleh sebab itu, dibutuhkan penguat daya pada sistem penerima, yaitu Low Noise Amplifier (LNA) yang diletakkan setelah antena penerima. Pada penelitian ini, direalisasikan LNA menggunakan transistor BJT BFR96 dengan target desain dualstage, matching impedance Trafo λ/4 pada sisi input dan output, serta lumped element untuk penyepadanan impedansi antar tingkat. LNA direalisasikan untuk bekerja optimal pada frekuensi 630 MHz. Nilai Gain dan Noise Figure (NF) yang diperoleh berturut-turut, yaitu 12.96 dB dan 4.05 dB. Selain itu, nilai Voltage Standing Wave Ratio (VSWR) input dan output yang diperoleh berturut-turut sebesar 3.5674 dan 1.7718. Kata kunci: DVB-T2, LNA, Televisi, Gain, Noise Figure ABSTRACT Digital Video Broadcasting-Second Generation Terrestrial (DVB-T2) is the international standard that over shadows the current implementation of digital television. In the DVB-T2 configuration, there is a signal receiving device on the receiver side. The problem that is often encountered is the weak signal power received. Therefore, a power amplifier is needed in the receiving system, namely Low Noise Amplifier (LNA) which is placed after the receiving antenna. In this research, LNA was realized using a BJT BFR96 transistor with a dual-stage configuration design target, λ/4 impedance matching transformer on the input and output sides, and a lumped element for interstage matching impedances. LNA is realized to work optimally at frequency of 630 MHz. The Gain and Noise Figure (NF) values obtained were 12.96 dB and 4.05 dB, respectively. In addition, the input and output Voltage Standing Wave Ratio (VSWR) values obtained were 3.5674 and 1.7718, respectively. Keywords: DVB-T2, LNA, Television, Gain, Noise Figure

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Heredia, Julio, Miquel Ribó, Lluís Pradell, Selin Tolunay Wipf, Alexander Göritz, Matthias Wietstruck, Christian Wipf, and Mehmet Kaynak. "Miniature Switchable Millimeter-Wave BiCMOS Low-Noise Amplifier at 120/140 GHz Using an HBT Switch." Micromachines 10, no. 10 (September 21, 2019): 632. http://dx.doi.org/10.3390/mi10100632.

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A 120–140 GHz frequency-switchable, very compact low-noise amplifier (LNA) fabricated in a 0.13 µm SiGe:C BiCMOS technology is proposed. A single radio-frequency (RF) switch composed of three parallel hetero junction bipolar transistors (HBTs) in a common-collector configuration and a multimodal three-line microstrip structure in the input matching network are used to obtain a LNA chip of miniaturized size. A systematic design procedure is applied to obtain a perfectly balanced gain and noise figure in both frequency states (120 GHz and 140 GHz). The measured gain and noise figure are 14.2/14.2 dB and 8.2/8.2 dB at 120/140 GHz respectively, in very good agreement with circuit/electromagnetic co-simulations. The LNA chip and core areas are 0.197 mm2 and 0.091 mm2, respectively, which supposes an area reduction of 23.4% and 15.2% compared to other LNAs reported in this frequency band. The experimental results validate the design procedure and its analysis.

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Zhang, Jian Ye, Ling Tian, Wei Hong, and Jia Qi Liu. "Design and Implementation of a Wideband C-Band LNA." Applied Mechanics and Materials 130-134 (October 2011): 3272–75. http://dx.doi.org/10.4028/www.scientific.net/amm.130-134.3272.

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This paper presents the design and implementation of a C-band 6-8 GHz wideband low noise amplifier (LNA). The design is based on balanced structure. The compensated matching networks are designed to obtain gain flatness, two Wilkinson couplers are used to obtain good input and output VSWR, a section of microstrip line is introduced between the source and ground to improve the stability. The measured gain is 12±0.5 dB and noise figure is less than 1.5 dB, the input and output VSWR are better than 1.7. The LNA with broad bandwidth, flat gain, low noise figure and high stability can be used in wideband RF receivers.

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Ramya, T. Rama Rao, and Revathi Venkataraman. "Concurrent Multi-Band Low-Noise Amplifier." Journal of Circuits, Systems and Computers 26, no. 06 (March 5, 2017): 1750104. http://dx.doi.org/10.1142/s0218126617501043.

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With rapid expansions of wireless communications, requirements for transceivers that support concurrent multiple services are continuously increasing and demanding design of a concurrent low-noise amplifier (LNA) with low noise figure (NF), high gain, and high linearity over a wide frequency range for various wireless applications. The proposed work focuses on a concurrent multi-band LNA that works at navigational frequencies, namely, of 1.2[Formula: see text]GHz and 1.5[Formula: see text]GHz, wireless communication frequencies, namely, of 2.45[Formula: see text]GHz and 3.3[Formula: see text]GHz, dedicated short range communication (DSRC) frequency of 5.8[Formula: see text]GHz for the vehicular communication applications. This circuit has a distinct input matching network which resonates at all desired five frequency bands and is achieved by adapting frequency transformation method. To accomplish simultaneous reception of the desired penta-band, the output matching is designed with simple LC matching network with the aid of load-pull methodology.

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Guo, Benqing, Hongpeng Chen, Xuebing Wang, Jun Chen, Yueyue Li, Haiyan Jin, and Yongjun Yang. "A wideband CMOS single-ended low noise amplifier employing negative resistance technique." Modern Physics Letters B 32, no. 06 (February 28, 2018): 1850068. http://dx.doi.org/10.1142/s0217984918500689.

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A wideband common-gate CMOS low noise amplifier with negative resistance technique is proposed. A novel single-ended negative resistance structure is employed to improve gain and noise of the LNA. The inductor resonating is adopted at the input stage and load stage to meet wideband matching and compensate gain roll-off at higher frequencies. Implemented in a 0.18 [Formula: see text]m CMOS technology, the proposed LNA demonstrates in simulations a maximal gain of 16.4 dB across the 3 dB bandwidth of 0.2–3 GHz. The in-band noise figure of 3.4–4.7 dB is obtained while the IIP3 of 5.3–6.8 dBm and IIP2 of 12.5–17.2 dBm are post-simulated in the designed frequency band. The LNA core consumes a power dissipation of 3.8 mW under a 1.5 V power supply.

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Szczepkowski, Grzegorz, and Ronan Farrell. "Study of Linearity and Power Consumption Requirements of CMOS Low Noise Amplifiers in Context of LTE Systems and Beyond." ISRN Electronics 2014 (March 4, 2014): 1–11. http://dx.doi.org/10.1155/2014/391240.

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This paper presents a study of linearity in wideband CMOS low noise amplifiers (LNA) and its relationship to power consumption in context of Long Term Evolution (LTE) systems and its future developments. Using proposed figure of merit (FoM) to compare 35 state-of-the-art LNA circuits published over the last decade, the paper explores a dependence between amplifier performance (i.e., combined linearity, noise figure, and gain) and power consumption. In order to satisfy stringent linearity specifications for LTE standard (and its likely successors), the paper predicts that LNA FoM increase in the range of +0.2 dB/mW is expected and will inevitably translate into a significant increase in power consumption—a critical budget planning aspect for handheld devices, active antenna arrays, and base stations operating in small cells.

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44

Malhotra, Ankit, and Thorsten Buzug. "Op-amp based low noise amplifier for magnetic particle spectroscopy." Current Directions in Biomedical Engineering 3, no. 2 (September 7, 2017): 599–602. http://dx.doi.org/10.1515/cdbme-2017-0125.

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AbstractMagnetic particle spectrometry (MPS) is a novel technique used to measure the magnetization response of superparamagnetic iron oxide nanoparticles (SPIONs). Therefore, it is one of the most important tools for the characterization of the SPIONs for imaging modalities such as magnetic particle imaging (MPI) and Magnetic Resonance Imaging (MRI). In MPS, change in the particle magnetization induces a voltage in a dedicated receive coil. The amplitude of the signal can be very low (ranging from a few nV to 100 μV) depending upon the concentration of the nanoparticles. Hence, the received signal needs to be amplified with a low noise amplifier (LNA). LNA’s paramount task is to amplify the received signal while keeping the noise induced by its own circuitry minimum. In the current research, we purpose modeling, design, and development of a prototyped LNA for MPS. The designed prototype LNA is based on the parallelization technique of Op-amps. The prototyped LNA consists of 16 Op-amps in parallel and is manufactured on a printed circuit board (PCB), with a size of 110.38 mm × 59.46 mm and 234 components. The input noise of the amplifier is approx. 546 pV/√Hz with a noise figure (NF) of approx. 1.4 dB with a receive coil termination. Furthermore, a comparison between the prototyped LNA and a commercially available amplifier is shown.

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Huang, Shaomin, Zhongpan Yang, and Chao Hua. "A 1.4mW 900MHz LNA with Noise-Canceling Technique in 130nm CMOS Process." Journal of Circuits, Systems and Computers 27, no. 01 (August 23, 2017): 1850003. http://dx.doi.org/10.1142/s0218126618500032.

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A noise-canceling low noise amplifier (LNA) structure is proposed in this paper. The LNA works in the 900[Formula: see text]MHz ISM band. The techniques of noise canceling and current-reusing are proposed to improve the noise performance and reduce the power dissipation. The noise cancellation schema is realized by mutually canceling the noise currents of the common-source and common-gate amplifiers. A prototype of the LNA is designed and fabricated in a standard 130[Formula: see text]nm CMOS process. Measurement results under a 1.2[Formula: see text]V supply voltage show that the proposed LNA achieves a voltage gain of 18[Formula: see text]dB and a noise figure of 2[Formula: see text]dB. The whole circuit only consumes a power dissipation of 1.4[Formula: see text]mW.

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Vijay, Ramya, Thipparaju Rama Rao, Revathi Venkataraman, and Murugiah Sivashanmugham Vasanthi. "Design of penta-band low noise amplifier with integrated active antenna for vehicular communications." International Journal of Microwave and Wireless Technologies 9, no. 9 (June 5, 2017): 1883–94. http://dx.doi.org/10.1017/s1759078717000630.

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The design and integration of penta-band planar antenna with a low noise amplifier (LNA) for vehicular wireless applications is discussed in this research. By integrating antenna with a LNA, the return loss can be kept low with the increased bandwidth compared with a passive antenna with the same design. The performance of the passive antenna, LNA, and integrated active antenna (IAA) are individually validated with the aid of vector network analyzer. The designed IAA covers navigational frequencies 1.2 and 1.5 GHz, wireless communication frequencies 2.4, 3.3 GHz and dedicated short range communication frequency 5.8 GHz, with LNA gain (>10 dB) and noise figure (<2 dB). The proposed design gives room for simultaneous reception of all the desired frequency bands with better performance for vehicular communications.

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Li, Kang, Chi Liu, Xiao Feng Yang, Qian Feng, Chao Xian Zhu, and Guo Dong Huang. "A 3.1~10.6 Ghz Ultra-Wideband SiGe Low Noise Amplifier with Current-Reused Technique." Applied Mechanics and Materials 130-134 (October 2011): 3251–54. http://dx.doi.org/10.4028/www.scientific.net/amm.130-134.3251.

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A 3.1 ~ 10.6 GHz Ultra-Wideband SiGe Low Noise Amplifier (LNA) is proposed. This low noise amplifier utilizes a current-reused technique to increase the gain and extend the bandwidth. We have a detailed analysis for the input matching, noise figure, gain and other features. The LNA was designed with the TSMC 0.35µm bipolar silicon-germanium (SiGe) processes. Simulation results show that the input reflection coefficient is less than-9dB, the output reflection coefficient is less than-10dB, the maximum power gain of 17 dB and the minimum noise factor (NF) of 2.35dB. The total power consumption is 6.2 mW with 2.5V power supply.

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ALAVI-RAD, HOSEIN, SOHEYL ZIABAKHSH, and MUSTAPHA C. E. YAGOUB. "A 1.2 V CMOS COMMON-GATE LOW NOISE AMPLIFIER FOR UWB WIRELESS COMMUNICATIONS." Journal of Circuits, Systems and Computers 22, no. 07 (August 2013): 1350052. http://dx.doi.org/10.1142/s0218126613500527.

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In this paper, an ultra-wide band 0.18 μm CMOS common-gate low-noise amplifier (LNA) is presented. Designed in the ultra-wide band frequency range of 3.1–10.6 GHz, it uses a current-reused technique with modified input matching. This approach allowed obtaining a flat broadband gain of 12.75 ± 0.83 dB with an input reflection coefficient less than -5.5 dB, an output reflection coefficient less than -7 dB, and a noise figure less than 3.7 dB. Furthermore, the proposed low-power LNA consumes only 12.14 mW (excluding buffer) from a 1.2 V supply voltage.

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Murad, S. A. Z., A. F. Hasan, A. Azizan, A. Harun, and J. Karim. "A concurrent dual-band CMOS low noise amplifier at 2.4/5.2 GHz for WLAN applications." Indonesian Journal of Electrical Engineering and Computer Science 14, no. 2 (May 1, 2019): 555. http://dx.doi.org/10.11591/ijeecs.v14.i2.pp555-563.

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This paper presents a concurrent dual-band CMOS low noise amplifier (LNA) at operating frequency of 2.4 GHz and 5.2 GHz for WLAN applications. The proposed LNA employed cascode common source to obtain high gain using 0.13-µm CMOS technology. The concurrent dual-band frequencies are matched using LC network band-pass and band-stop notch filter at the input and output stages. The filters help to shape the frequency response of the proposed LNA. The simulation results indicate that the LNA achieves a forward gain of 21.8 dB and 14.22 dB, input return loss of -18 dB and -14 dB at 2.4 GHz and 5.2 GHz, respectively. The noise figure of 4.1 dB and 3.5 dB with the input third-order intercept points 7 dBm and 10 dBm are obtained at 2.4 GHz and 5.2 GHz, respectively. The LNA dissipates 2.4 mW power at 1.2 V supply voltage with a chip size of 1.69 mm2.

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Le, Phong Dai, Vu Duy Thong, and Pham Le Binh. "Broadband GaAs pHemt LNA design for T/R module application." Vietnam Journal of Science and Technology 54, no. 5 (October 19, 2016): 584. http://dx.doi.org/10.15625/0866-708x/54/5/6978.

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In this paper, a three stages monolithic low noise amplifier (LNA) for T/R module application is presented. This LNA is fully integrated on 0.15-um pHEMT GaAs technology and achieves a wide bandwidth from 6 GHz to 11 GHz. Within this band, the LNA has the minimum of 1.3 dB noise figure and over 25 dB small signal gain. The output third order interception point (OIP3) is over 30 dBm and the 1 dB compression point (P1 dB) is 16 dBm at the output.

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Journal articles on the topic 'Low Noise figure LNA'

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