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Dissertations / Theses on the topic 'Low Power Filter'

Author: Grafiati

Published: 3 June 2025

Last updated: 31 July 2025

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1

Bystrøm, Vebjørn. "Low power/high performance dynamic reconfigurable filter-design." Thesis, Norwegian University of Science and Technology, Department of Electronics and Telecommunications, 2008. http://urn.kb.se/resolve?urn=urn:nbn:no:ntnu:diva-8899.

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<p>The main idea behind this thesis was to optimize the multipliers in a finite impulse response (FIR) filter. The project was chosen because digital filters are very common in digital signal processing and is an exciting area to work with. The first part of the text describes some theory behind the digital filter and how to optimize the multipliers that are a part of digital filters. The substantial thing to emphasize here is the use of Canonical Signed Digits (CSD) encoding. CSD representation for FIR filters can reduce the delay and complexity of the hardware implementation. CSD-encoding r

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2

Arman, Mahmoud Fayez. "An 'active' passive-filter topology for low power DC/AC inverters." Thesis, Brunel University, 2011. http://bura.brunel.ac.uk/handle/2438/6072.

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This thesis presents a new output passive filter for voltage source inverter applications which is based on a shunt connected single tuned filter topology. The proposed circuit has the advantage of tracing harmonic components wherever its location in the frequency spectrum. The change in the harmonic location might be as a result of a change in the inverter operating frequency. Also, the proposed filter achieves harmonic reduction close to the traditional single tuned passive filter. In order to show the superiority of the proposed model, a comparison is introduced with other self tuning harmo

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3

Bakula, Casey J. "LOW-POWER PULSE-SHAPING FILTER DESIGN USING HARDWARE-SPECIFIC POWER MODELING AND OPTIMIZATION." University of Akron / OhioLINK, 2008. http://rave.ohiolink.edu/etdc/view?acc_num=akron1204743997.

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4

Erdogan, Ahmet Teyfik. "Low power FIR filter implementations for VLSI-based DSP systems." Thesis, Cardiff University, 1999. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.312049.

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5

Mulyana, Ridwan S. "A Low Voltage, Low Power 4th Order Continuous-time Butterworth Filter for Electroencephalography Signal Recognition." The Ohio State University, 2010. http://rave.ohiolink.edu/etdc/view?acc_num=osu1281981810.

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6

Cederström, Love. "Power Efficient Digital Decimation Filters for Sigma-Delta ADCs." Thesis, Linköping University, Department of Electrical Engineering, 2009. http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-51464.

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<p>The development of integrated circuit technology seen in the last decades has enabled a large variety of battery operated equipment to emerge, such as smallsensors and medical implants. These applications often has low requirements on sampling frequency but require a very low power consumption to achieve a longbattery life.</p><p>This thesis investigates one aspect of implementing a low power and low frequency analog to digital converter (ADC) using a technique called Sigma Delta-modulation.The Sigma Delta-ADC uses few analog components but instead it requires a digital filter to extract th

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7

Pham, Tien Ke. "Low-power, high-accuracy, and fast-tuning integrated continuous-time 450-KHz bandpass filter." Diss., Georgia Institute of Technology, 2001. http://hdl.handle.net/1853/13525.

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8

Lam, Chi Seng. "An adaptive low dc-voltage controlled LC coupling hybrid active power filter in three-phase four-wire power systems." Thesis, University of Macau, 2012. http://umaclib3.umac.mo/record=b2580608.

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9

Gulbrandsen, Truls Magnus Aamodt. "Low Power Capacitive Touch Digital Detection Filter : A Comparative Study of Synchronous and Asynchronous Methodologies." Thesis, Norges teknisk-naturvitenskapelige universitet, Institutt for elektronikk og telekommunikasjon, 2012. http://urn.kb.se/resolve?urn=urn:nbn:no:ntnu:diva-19507.

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In this thesis, both synchronous and asynchronous methodologies is explored for implementing a capacitive touch digital detection filter circuit.Asynchronous methodologies promise characteristics such as lower power, higher area cost and lower emission than synchronous methodologies. The aim of this thesis is to show if this can be exploited for this application.The synchronous implementation is written in Verilog, and follows a standard synchronous design flow. The asynchronous implementation is written in Balsa, and follows a Balsa Asynchronous Synthesis System design flow.Both implementatio

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10

Mohsén, Mikael. "Implementation and Evaluation of Single Filter Frequency Masking Narrow-Band High-Speed Recursive Digital Filters." Thesis, Linköping University, Department of Electrical Engineering, 2003. http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-1522.

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<p>In this thesis two versions of a single filter frequency masking narrow-band high-speed recursive digital filter structure, proposed in [1], have been implemented and evaluated considering the maximal clock frequency, the maximal sample frequency and the power consumption. The structures were compared to a conventional filter structure, that was also implemented. The aim was to see if the proposed structure had some benefits when implemented and synthesized, not only in theory. For the synthesis standard cells from AMS csx 0.35 mm CMOS technology were used.</p>

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11

Zheng, Guizhen. "Low Power Reconfigurable Microwave Circuts Using RF MEMS Switches for Wireless Systems." Diss., Georgia Institute of Technology, 2005. http://hdl.handle.net/1853/11656.

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This dissertation presents the research on several different projects. The first project is a via-less CPW RF probe pad to microstrip transition; The second, the third, and the fourth one are reconfigurable microwave circuits using RF MEMS switches: an X-band reconfigurable bandstop filter for wireless RF frontends, an X-band reconfigurable impedance tuner for a class-E high efficiency power amplifier using RF MEMS switches, and a reconfigurable self-similar antenna using RF MEMS switches. The first project was developed in order to facilitate the on-wafer measurement for the second and the th

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12

Yoo, Heejong. "Low-Power Audio Input Enhancement for Portable Devices." Diss., Georgia Institute of Technology, 2005. http://hdl.handle.net/1853/6821.

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With the development of VLSI and wireless communication technology, portable devices such as personal digital assistants (PDAs), pocket PCs, and mobile phones have gained a lot of popularity. Many such devices incorporate a speech recognition engine, enabling users to interact with the devices using voice-driven commands and text-to-speech synthesis. The power consumption of DSP microprocessors has been consistently decreasing by half about every 18 months, following Gene's law. The capacity of signal processing, however, is still significantly constrained by the limited power budget of these

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13

Murtic, Adis. "Design av ett decimeringsfilter med låg effektförbrukning Design of a decimation filter with low power consumption." Thesis, Linköping University, Department of Electrical Engineering, 2003. http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-1764.

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<p>Implementering av FIR filter kan göras på olika sätt. I detta examensarbete har två olika varianter beskrivits med hjälp av VHDL, syntetiserats, simulerats och sedan jämförts med avseende på effektförbrukning.</p>

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14

Bienholz, Markus [Verfasser], Gerd [Akademischer Betreuer] Griepentrog, and Johanna [Akademischer Betreuer] Myrzik. "Parallel Resonances between Filter Capacitors and the Low Voltage Power Grid / Markus Bienholz ; Gerd Griepentrog, Johanna Myrzik." Darmstadt : Universitäts- und Landesbibliothek Darmstadt, 2019. http://d-nb.info/1190285657/34.

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15

Billman, Steven John. "Design of a Low Power and Area Efficient Digital Down Converter and SINC Filter in CMOS 90-nm Technology." Wright State University / OhioLINK, 2011. http://rave.ohiolink.edu/etdc/view?acc_num=wright1307746437.

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16

Khan, Abbas. "Optimization through Co-Simulation of Antenna, Bandpass Filter and Low-Noise Amplifier at 6-9 GHz." Thesis, Linköpings universitet, Fysik och elektroteknik, 2012. http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-110575.

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Ultra-wide band (UWB) 6-9 GHz antenna, band pass filter and low-noise amplifier (LNA) optimization using co-simulation of the RF front-end. At higher frequencies, carefully conducted design methodologies are required for RF front-end parameter optimization, such as power gain and low noise figure with low power consumption.

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17

Jiang, Yan. "Three Dimensional Passive Integrated Electronic Ballast for Low Wattage HID Lamps." Diss., Virginia Tech, 2009. http://hdl.handle.net/10919/26427.

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Around 19% of global power consumption and around 3% of global oil demand is attributable to lighting. After the first incandescent lamp was invented in 1879, more and more energy efficient lighting devices, such as gas discharge lamps, and light-emitting diodes (LED), have been developed during the last century. It is estimated that over 38% of future global lighting energy demand could be avoided by the use of more efficient lamps and ballasts [1]. High intensity discharge (HID) lamps, one category of gas discharge lamp, have been widely used in both commercial and residential lighting appl

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18

Yang, Guang. "Design, fabrication & evaluation of a biomimetic filter-bank architecture for low-power noise-robust cochlear implant processors." Thesis, Imperial College London, 2012. http://hdl.handle.net/10044/1/42220.

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This thesis presents a new bio-inspired filterbank-architecture termed 'OZGF-with-LI' for the signal processing in cochlear implants (CIs), and its ultra-low-power analog very-large-scale-integration (VLSI) implementation. The OZGF-with-LI system provides a potential solution to the noise susceptibility of current CI users by simulating the lateral inhibition (LI) - a biological spectral-enhancement mechanism that may partly account for the high noise robustness of the human auditory system but is missing in current CIs - as a soft local 'winner-take-all' link between different frequency regio

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19

Broddfelt, Michel. "Design of a Finite-Impulse Response filter generator." Thesis, Linköping University, Department of Electrical Engineering, 2003. http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-2027.

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<p>In this thesis a FIR filter generator has been designed. The program generates FIR filters in the form of VHDL-files. Four different filter structures have been implemented in the generator, Direct Form (DF), Differential Coefficients Method (DCM), polyphase filters and (2-by-2) filters. </p><p>The focus of the thesis was to implement filter structures that create FIR filters with as low power consumption and area as possible. </p><p>The generaterator has been implemented i C++. The C++ program creates text-files with VHDL-code. The user must then compile and synthesize the VHDL-files. The

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20

Karlsson, Magnus. "Implementation of digit-serial filters." Doctoral thesis, Linköpings universitet, Institutionen för systemteknik, 2005. http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-3520.

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In this thesis we discuss the design and implementation of Digital Signal Processing (DSP) applications in a standard digital CMOS technology. The aim is to fulfill a throughput requirement with lowest possible power consumption. As a case study a frequency selective filter is implemented using a half-band FIR filter and a bireciprocal Lattice Wave Digital Filter (LWDF) in a 0.35 µm CMOS process. The thesis is presented in a top-down manner, following the steps in the topdown design methodology. This design methodology, which has been used for bit-serial maximally fast implementations of IIR f

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21

Geury, Thomas. "Smart matrix converter-based grid-connected photovoltaic system for mitigating current and voltage-related power quality issues on the low-voltage grid." Doctoral thesis, Universite Libre de Bruxelles, 2017. http://hdl.handle.net/2013/ULB-DIPOT:oai:dipot.ulb.ac.be:2013/243967.

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The increasing penetration of distributed energy resources, in particular Photovoltaic (PV) production units, and the ever-growing use of power electronics-based equipment has led to specific concern about Power Quality (PQ) in the Low-Voltage (LV) grid. These include high- and low-order current harmonics as well as voltage distortion at the point of common coupling. Solutions to overcome these issues, meeting international grid codes, are being proposed in the context of smart energy management schemes.This work proposes a novel three-phase topology for a PV system with enhanced PQ mitigation

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22

Sajid, Attique. "Detection of a low power communication signal in the presence of a strong co-channel TV broadcast interference using Kalman filter." Thesis, Monterey, California: Naval Postgraduate School, 2014. http://hdl.handle.net/10945/44663.

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Approved for public release; distribution is unlimited<br>This research focuses on the detection of a low power communication signal in the presence of a strong co-channel television broadcast interference signal. The presence of strong co-channel interference makes the recovery of the desired weak power signal impossible using conventional filtering techniques that are based on time and frequency characteristics of the signals. The second-generation digital video broadcasting terrestrial (DVB-T2) standard is employed as co-channel interference in an additive white Gaussian noise channel. The

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23

Lee, Sang Min. "A CMOS analog pulse compressor with a low-power analog-to-digital converter for MIMO radar applications." Diss., Georgia Institute of Technology, 2010. http://hdl.handle.net/1853/42875.

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Multiple-input multiple-output (MIMO) radars, which utilize multiple transmitters and receivers to send and receive independent waveforms, have been actively investigated as a next generation radar technology inspired by MIMO techniques in communication theory. Complementary metal-oxide-semiconductor (CMOS) technology offers an opportunity for dramatic cost and size reduction for a MIMO array. However, the resulting formidable signal processing burden has not been addressed properly and remains a challenge. On the other hand, from a block-level point of view, an analog-to-digital converter (AD

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24

Wang, Lei. "Design and implementation of a three-phase three-wire thyristor controlled LC-coupling hybrid active power filter with low dc-link voltage and wide compensation range." Thesis, University of Macau, 2017. http://umaclib3.umac.mo/record=b3691876.

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25

Mohieldin, Ahmed Nader. "High performance continuous-time filters for information transfer systems." Texas A&M University, 2003. http://hdl.handle.net/1969/233.

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26

hart, charles. "A Low-cost Omni-directional Visual Bearing Only Localization System." Case Western Reserve University School of Graduate Studies / OhioLINK, 2014. http://rave.ohiolink.edu/etdc/view?acc_num=case1386695142.

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27

Nejadmalayeri, Amir Hossein. "CDMA Channel Selection Using Switched Capacitor Technique." Thesis, University of Waterloo, 2001. http://hdl.handle.net/10012/782.

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CDMA channel selection requires sharp as well as wide-band Filtering. SAW Filters which have been used for this purpose are only available in IF range. In direct conversion receivers this has to be done at low frequencies. Switched Capacitor technique has been employed to design a low power, highly selective low-pass channel select Filter for CDMA wireless receivers. The topology which has been chosen ensures the low sensitivity of the Filter response. The circuit has been designed in a mixed-mode 0. 18u CMOS technology working with a single supply of 1. 8 V while its current co

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28

Khatib, Nabhan. "Obvody pro analogové zpracování signálů na bázi nekonvenčních aktivních prvků." Doctoral thesis, Vysoké učení technické v Brně. Fakulta elektrotechniky a komunikačních technologií, 2013. http://www.nusl.cz/ntk/nusl-233586.

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Disertační práce se zabývá zaváděním nových struktur moderních aktivních prvků pracujících v napěťovém, proudovém a smíšeném režimu. Funkčnost a chování těchto prvků byly ověřeny prostřednictvím SPICE simulací. V této práci je zahrnuta řada simulací, které dokazují přesnost a dobré vlastnosti těchto prvků, přičemž velký důraz byl kladen na to, aby tyto prvky byly schopny pracovat při nízkém napájecím napětí, jelikož poptávka po přenosných elektronických zařízeních a implantabilních zdravotnických přístrojích stále roste. Tyto přístroje jsou napájeny bateriemi a k tomu, aby byla prodloužena jej

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29

Keskar, Neeraj. "High bandwidth wide LC-Resr compliant sigma-delta boost DC-DC switching converters." Diss., Georgia Institute of Technology, 2008. http://hdl.handle.net/1853/22530.

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In low power, battery-operated, portable applications, like cell phones, PDAs, digital cameras, etc., miniaturization at a low cost is a prominent driving factor behind product development and marketing efforts. As such, power supplies in portable applications must not only conform and adapt to their highly integrated on-chip and in-package environments but also, more intrinsically, respond quickly to fast load dumps to achieve and maintain high accuracy. The frequency-compensation network, however, limits speed and regulation performance because, in catering to all combinations of the output

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30

Szabó, Michal. "Vývojový prostředek pro lokalizaci." Master's thesis, Vysoké učení technické v Brně. Fakulta elektrotechniky a komunikačních technologií, 2021. http://www.nusl.cz/ntk/nusl-442522.

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This document describes a device capable to determine geographical position thanks to its GNSS module and measure the change of movement with the help of an accelerometer and gyroscope. Outputs of these integrated circuits are combined, data are processed and fused thanks to a numerical integration and mathematical filters. Results are stored on a memory card. The whole development is described from a concept, through the making of the device and software algorithms to the testing of its functions.

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31

Dong, Zhiwei. "Low-power, low-distortion constant transconductance Gm-C filters." Diss., Georgia Institute of Technology, 2002. http://hdl.handle.net/1853/25400.

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32

Amin, Farooq ul. "On the Design of an Analog Front-End for an X-Ray Detector." Thesis, Linköping University, Department of Electrical Engineering, 2009. http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-21395.

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<p>Rapid development in CMOS technology has resulted in its suitability for the implementation of readout front-end systems in terms of high integration density, and low power consumption yet at the same time posing many challenges for analog circuits design like readout front-end. One of the significant challenges is the low noise design for high speed front-end systems, while at the same time minimizing the power consumption as much as possible.</p><p>A high speed, low noise, low power, and programmable readout front-end system is designed and implemented for an X-ray detector in CMOS 0.18 m

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33

Wróblewski, Artur [Verfasser]. "Design of Low Power Digital Filters / Artur Wróblewski." Aachen : Shaker, 2005. http://d-nb.info/1181615852/34.

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34

Johansson, Kenny. "Low Power and Low complexity Constant Multiplication using Serial Arithmetic." Licentiate thesis, Linköping : Department of Electrical Engineering, Linköpings universitet, 2006. http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-7965.

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35

Chen, Mingdeng. "Low-voltage, low-power circuits for data communication systems." Diss., Texas A&M University, 2003. http://hdl.handle.net/1969.1/1585.

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There are growing industrial demands for low-voltage supply and low-power consumption circuits and systems. This is especially true for very high integration level and very large scale integrated (VLSI) mixed-signal chips and system-on-a-chip. It is mainly due to the limited power dissipation within a small area and the costs related to the packaging and thermal management. In this research work, two low-voltage, low-power integrated circuits used for data communication systems are introduced. The first one is a high performance continuous-time linear phase filter with automatic frequency tuni

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36

Saab, Sami James. "Design of digital filters for low-power digital signal processing applications." Thesis, National Library of Canada = Bibliothèque nationale du Canada, 1999. http://www.collectionscanada.ca/obj/s4/f2/dsk1/tape8/PQDD_0001/MQ41376.pdf.

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37

Whatmough, P. N. "Timing-error tolerance techniques for low-power DSP : filters and transforms." Thesis, University College London (University of London), 2012. http://discovery.ucl.ac.uk/1370582/.

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Low-power Digital Signal Processing (DSP) circuits are critical to commercial System-on-Chip design for battery powered devices. Dynamic Voltage Scaling (DVS) of digital circuits can reclaim worst-case supply voltage margins for delay variation, reducing power consumption. However, removing static margins without compromising robustness is tremendously challenging, especially in an era of escalating reliability concerns due to continued process scaling. The Razor DVS scheme addresses these concerns, by ensuring robustness using explicit timing-error detection and correction circuits. Nonethele

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38

Johansson, Kenny. "Low Power and Low Complexity Shift-and-Add Based Computations." Doctoral thesis, Linköping : Department of Electrical Engineering, Linköping University, 2008. http://www.bibl.liu.se/liupubl/disp/disp2008/tek1201s.pdf.

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39

Gambhir, Manisha. "Low power architecture and circuit techniques for high boost wideband Gm-C filters." Texas A&M University, 2003. http://hdl.handle.net/1969.1/5941.

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With the current trend towards integration and higher data rates, read channel design needs to incorporate significant boost for a wider signal bandwidth. This dissertation explores the analog design problems associated with design of such 'Equalizing Filter' (boost filter) for read channel applications. Specifically, a 330MHz, 5th order Gm-C continuous time lowpass filter with 24dB boost is designed. Existing architectures are found to be unsuitable for low power, wideband and high boost operation. The proposed solution realizes boosting zeros by efficiently combining available transfer funct

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40

Alsibai, Ziad. "Návrh analogových obvodů s nízkým napájecím napětím a nízkým příkonem." Doctoral thesis, Vysoké učení technické v Brně. Fakulta elektrotechniky a komunikačních technologií, 2014. http://www.nusl.cz/ntk/nusl-233672.

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Disertační práce je zaměřena na výzkum nejběžnějších metod, které se využívají při návrhu analogových obvodů s využití nízkonapěťových (LV) a nízkopříkonových (LP) struktur. Tyto LV LP obvody mohou být vytvořeny díky vyspělým technologiím nebo také využitím pokročilých technik návrhu. Disertační práce se zabývá právě pokročilými technikami návrhu, především pak nekonvenčními. Mezi tyto techniky patří využití prvků s řízeným substrátem (bulk-driven - BD), s plovoucím hradlem (floating-gate - FG), s kvazi plovoucím hradlem (quasi-floating-gate - QFG), s řízeným substrátem s plovoucím hradlem (bu

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Almeida, Maria Cecilia Pedreira de. "Escravos, súditos e homens: a noção de consentimento na polêmica Locke-Filmer." Universidade de São Paulo, 2006. http://www.teses.usp.br/teses/disponiveis/8/8133/tde-11012008-112407/.

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Os Dois tratados sobre o governo, de John Locke, têm um papel de destaque na filosofia política das Luzes. Neles, ao afirmar as idéias de liberdade e igualdade naturais dos homens, o autor mina as bases do pensamento absolutista. Apesar de ser no Segundo tratado que o autor estabelece de modo mais evidente sua teoria política, é importante notar que o pressuposto lógico desta obra é o Primeiro tratado sobre o governo, texto menos conhecido e estudado pela história da filosofia, no qual Locke refuta de forma minuciosa as idéias de Robert Filmer, sistematizador da doutrina patriarcalista e do di

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42

Zhao, Yao Hua. "Low-power high-linearity and area-efficient switched capacitor filters design techniques in nanoscale CMOS." Thesis, University of Macau, 2015. http://umaclib3.umac.mo/record=b3335858.

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43

DEILAM, SALEHI MOHAMMADMEHDI. "Design of Highly Linear and Low Power Base-Band Filters for High Bandwidth Current-Mode Receivers." Doctoral thesis, Università degli studi di Pavia, 2020. http://hdl.handle.net/11571/1341328.

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Two base-band filters are presented in this thesis, the first one which is the first-order Trans-Impedance Amplifier (TIA) filter in a current mode receiver is a 80 MHz bandwidth filter. The main challenge to design such a high bandwidth block is stability. Since the traditional compensation approaches like the Miller technique suffer the parasitic non-dominant pole effects, it is not possible to provide such a high bandwidth compensation. The main idea proposed here is using a parallel branch to add some zeros to the system in a high-frequency range and modify the phase behavior.

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44

Zheng, Guizhen. "Low power reconfigurable microwave circuits using RF MEMS switches for wireless systems." Available online, Georgia Institute of Technology, 2005, 2005. http://etd.gatech.edu/theses/available/etd-05242005-135940/.

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Thesis (Ph. D.)--Electrical and Computer Engineering, Georgia Institute of Technology, 2006.<br>John Papapolymerou, Committee Chair ; Joy Laskar, Committee Member ; John Cressler, Committee Member ; Alan Doolittle, Committee Member ; Clifford Henderson, Committee Member.

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Li, Feng-Yih, and 李封藝. "Investigation of Low-Power Filter." Thesis, 2001. http://ndltd.ncl.edu.tw/handle/13502167982736304758.

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碩士<br>國立交通大學<br>電子工程系<br>89<br>In this thesis, we propose a new multiplier design technique using inverse polarity method for low-power filtering. The new design can reduce signal switching activity within a multiplier array. We also investigate various implementation techniques for the realization of low-power multipliers. The new designed results are compared to the existing ones. In addition, we investigate the advantages and disadvantages of using a single multiplier of different kinds, assuming various kinds of filter structures. On the other hand, for each structure, we consider the reso

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Lo, Wan-Chen, and 羅宛珍. "Low Voltage Low Power Square-Root-Domain Filter." Thesis, 2006. http://ndltd.ncl.edu.tw/handle/24526224277511824972.

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碩士<br>國立中山大學<br>電機工程學系研究所<br>94<br>In this thesis, a brand new first-order low pass square root domain filter (SRD filter) based on operational transconductors amplifiers (OTAs) is presented. The SRD filter consists of a translinear filter and two OTAs. We improve Cruz’s SRD filter [15], reduce the number of transconductors from 3 to 2, and replace Class-AB linear transconductors with OTAs. The circuit has the least number of transistors up to date, therefore, the least power consumption and least chip area. The circuit has been fabricated with 0.35μm CMOS technology. It operates with a supp

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Cheng-Chang, Huang, and 黃成昌. "Low-Power CMOS Continuous-Time Filter Design." Thesis, 1998. http://ndltd.ncl.edu.tw/handle/46848689851680571071.

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碩士<br>大同工學院<br>電機工程研究所<br>86<br>Design considerations for low-power continuous-time current-mode filters are presented in the thesis. The basic building block is a fully-balanced integrator with its unity-gain frequency determined by a small-signal transconductance and a MOSFET gate capacitance. Integrator excess phase shift is reduced by using balanced signals path, and open-loop gain is increased by using low-voltage cascode amplifiers. Replacing the ideal current source with temperature-independent current bias generator, the unity gain of the integrator will not vary with process and tempe

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Lin, Hung-Yi, and 林弘益. "Low Power Decimation Filter for Biomedical Signal." Thesis, 2012. http://ndltd.ncl.edu.tw/handle/31983882030802752039.

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碩士<br>國立中央大學<br>電機工程研究所碩士在職專班<br>100<br>In portable and implementable biomedical systems, there are two more important design issues in the biomedical chip than other applications, which are very low power consumption and low power supply voltage. Besides, the low power design has to effectively shrink down the chip area and battery volume to satisfy portable and long battery lifetime requirements of biomedical instruments. The high resolution and low power analog-to-digital converter (ADC) is a key component in biomedical systems. By taking the advantage of oversampling technique, the sigma-d

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NAND, MANISHA. "HIGH POWER HANDLING TUNABLE LOW PASS FILTER." Thesis, 2017. http://dspace.dtu.ac.in:8080/jspui/handle/repository/16016.

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The goal of high-e ciency power ampli er operation from 30-520 MHz has been addressed in the current design by the use of tunable reactive elements in the out- put resonant network. Filtering at the target harmonic frequencies will be achieved by maintaining a xed inductance and utilizing a PIN diode switching circuit to selectively introduce di erent capacitance values, presenting the frequency-speci c short and open circuits that will allow for power ampli er operation at the de- sired fundamental frequency. This approach allows the power ampli er to cover several octaves or more, ac

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Das, Jitendra Kumar. "Low Power Digital Filter Implementation in FPGA." Thesis, 2010. http://ethesis.nitrkl.ac.in/2080/1/Low_Power_Digital_Filter_Implementation_in_FPGA.pdf.

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Digital filters suitable for hearing aid application on low power perspective have been developed and implemented in FPGA in this dissertation. Hearing aids are primarily meant for improving hearing and speech comprehensions. Digital hearing aids score over their analog counterparts. This happens as digital hearing aids provide flexible gain besides facilitating feedback reduction and noise elimination. Recent advances in DSP and Microelectronics have led to the development of superior digital hearing aids. Many researchers have investigated several algorithms suitable for hearing aid appli

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