To see the other types of publications on this topic, follow the link: Low voltage redundancy.
Journal articles on the topic 'Low voltage redundancy'
Create a spot-on reference in APA, MLA, Chicago, Harvard, and other styles
Consult the top 50 journal articles for your research on the topic 'Low voltage redundancy.'
Next to every source in the list of references, there is an 'Add to bibliography' button. Press on it, and we will generate automatically the bibliographic reference to the chosen work in the citation style you need: APA, MLA, Harvard, Chicago, Vancouver, etc.
You can also download the full text of the academic publication as pdf and read online its abstract whenever available in the metadata.
Browse journal articles on a wide variety of disciplines and organise your bibliography correctly.
1
Shin, Gicheol, Eunyoung Lee, Jongmin Lee, Yongmin Lee, and Yoonmyung Lee. "A Redundancy Eliminated Flip-Flop in 28 nm for Low-Voltage Low-Power Applications." IEEE Solid-State Circuits Letters 3 (2020): 446–49. http://dx.doi.org/10.1109/lssc.2020.3025667.
Full text
2
Shi, Yong, and Zhuoyi Xu. "Wide Load Range ZVS Three-level DC-DC Converter: Modular Structure, Redundancy Ability, and Reduced Filters Size." Energies 12, no. 18 (September 15, 2019): 3537. http://dx.doi.org/10.3390/en12183537.
Full textAbstract:
In future dc distributed power systems, high performance high voltage dc-dc converters with redundancy ability are welcome. However, most existing high voltage dc-dc converters do not have redundancy ability. To solve this problem, a wide load range zero-voltage switching (ZVS) three-level (TL) dc-dc converter is proposed, which has some definitely good features. The primary switches have reduced voltage stress, which is only Vin/2. Moreover, no extra clamping component is needed, which results simple primary structure. Redundancy ability can be obtained by both primary and secondary sides, which means high system reliability. With proper designing of magnetizing inductance, all primary switches can obtain ZVS down to 0 output current, and in addition, the added conduction loss can be neglected. TL voltage waveform before the output inductor is obtained, which leads small volume of the output filter. Four secondary MOSFETs can be switched in zero-current switching (ZCS) condition over wide load range. Finally, both the primary and secondary power stages are modular architecture, which permits realizing any given system specifications by low voltage, standardized power modules. The operation principle, soft switching characteristics are presented in this paper, and the experimental results from a 1 kW prototype are also provided to validate the proposed converter.
3
Malinowski, M. "Cascaded multilevel converters in recent research and applications." Bulletin of the Polish Academy of Sciences Technical Sciences 65, no. 5 (October 1, 2017): 567–78. http://dx.doi.org/10.1515/bpasts-2017-0062.
Full textAbstract:
Abstract Multilevel converters have been intensively investigated and developed since 1960s and have found successful industrial applications. The aim of this paper is to present state of the art as well as recent research and applications of cascaded multilevel converters, which are a very interesting solution for power distribution systems and renewable energy sources. Cascaded multilevel converters can easily operate at medium and high voltage based on the series connection of power modules (cells), which use standard low-voltage component configurations. Series connections of modules (cells) allow for high quality output voltages and input currents, reduction of passive components and availability of component redundancy. Due to these features the cascaded multilevel converters have been recognized as attractive solutions for high-voltage direct-current (HVDC) transmission, solid state transformers (SST) and photovoltaic (PV) systems.
4
Yuldoshev, Isroil, Sanjar Shoguchkarov, Tulqin Jamolov, and Shakhnoza Rustamova. "Features of operation of the grid connected photovoltaic power station with a capacity of 10 kW." E3S Web of Conferences 216 (2020): 01172. http://dx.doi.org/10.1051/e3sconf/202021601172.
Full textAbstract:
Photovoltaic power station (PPS) operating function (without redundancy) with a nominal capacity of 10 kW connected to the low voltage electrical network established by "Zhejiang Chint Electrics Co Ltd" (PRC) under Tashkent conditions is defined. Operation parameters and characteristics of the PPS and parameters at the output of the network inverter are given. The deviations of voltage of each phase from the standard nominal voltage at the point of electric network transmission are studied. The analysis of the results of the evaluation of the power generation of the PPS for the conditions of clear weather and clear cloudiness was carried out. According to the monitoring data for the winter period is 2211,5 kW·h. The problems of PPS connected to the low-voltage network, connected to the loss of electric power with the account of influence of external factors and reliability of stable voltage and frequency in a permissible range are revealed.
5
Dong, Bo, Yang Chen, Jing Lian, and Xiaohui Qu. "A Novel Compensation Circuit for Capacitive Power Transfer System to Realize Desired Constant Current and Constant Voltage Output." Energies 15, no. 4 (February 18, 2022): 1523. http://dx.doi.org/10.3390/en15041523.
Full textAbstract:
Capacitive power transfer (CPT) technique possesses the advantages of safety, isolation, low cost, and insensitivity to conductive barriers. To charge lithium-ion batteries, CPT should possess the output profile consisting of first constant current (CC) output and later constant voltage (CV) output. To fulfill the output profile, many power switches or compensation components are added in the CPT circuit, which is not expected due to the bulky size and additional losses. To reduce the redundancy of the CPT system, an Lx-PS CPT circuit with only five compensation components is proposed in this paper. After a systematic analysis and a parameter design procedure, the proposed CPT circuit can realize input ZPA at both CC and CV modes. In addition, the output current at CC mode and the output voltage at CV mode are all adjustable based on the charging demands of different loads. Finally, simulations are done to prove the analysis in this paper. Compared to previous research, the CPT circuit proposed in this paper can not only achieve the charging demands of lithium-ion batteries, but also reduce the redundancy of the whole system.
6
Kim, Nam Sung, Stark C. Draper, Shi-Ting Zhou, Sumeet Katariya, Hamid Reza Ghasemi, and Taejoon Park. "Analyzing the Impact of Joint Optimization of Cell Size, Redundancy, and ECC on Low-Voltage SRAM Array Total Area." IEEE Transactions on Very Large Scale Integration (VLSI) Systems 20, no. 12 (December 2012): 2333–37. http://dx.doi.org/10.1109/tvlsi.2011.2173220.
Full text
7
Zhang, Mengtian, Xianghua Huang, Shengchao Wang, and Liantan Luo. "In-the-Loop Simulation Experiment of Aero-Engine Fault-Tolerant Control Technology." Applied Sciences 12, no. 3 (February 7, 2022): 1716. http://dx.doi.org/10.3390/app12031716.
Full textAbstract:
Aeroengines are prone to failure due to their large range of working envelopes and bad working environments. Fault diagnosis and a fault-tolerant control strategy for aeroengines and control systems are important means to improve the reliability of aeroengine. In this article, the turbofan engine is taken as the research object, and the fault diagnosis and fault-tolerant control of an aeroengine control system are studied. First, based on the principle of component-level modeling and the algorithm of the extended Kalman filter, an adaptive turbofan model is established, and the adaptive effect of the model in the range of the full envelopment is verified by digital simulation. Next, based on the analytical redundancy provided by the adaptive model, sensor fault diagnosis and fault-tolerant control are studied. The low-voltage speed closed-loop control and EPR closed-loop control are designed, and the sensor fault-tolerant control based on analytic redundancy and the switching control rate is studied. The simulation results show that the filter based on the adaptive model can accurately locate and diagnose the sensor faults, and the sensor fault-tolerance based on the analytic redundancy and switching control rate can be effective fault tolerance for the sensor faults. Finally, as a hardware platform, this article selects MC203 VxWorks as an embedded system, the adaptive model for a turbofan engine as the research object, and has carried on the fault diagnosis and fault-tolerant control in the loop simulation experiment research; the experimental results show that the adaptive model can provide accurate analytical redundancy, and the real-time and fault tolerance of sensor fault effect is better.
8
Mahmoudi, Morad, Abdellah El Barkany, and Ahmed El Khalfi. "Toward an Integrated Approach of HV and MV Circuit-Breakers Optimization Maintenance Planning and Reliability Assessment: A Case Study." International Journal of Engineering Research in Africa 29 (March 2017): 133–53. http://dx.doi.org/10.4028/www.scientific.net/jera.29.133.
Full textAbstract:
This paper investigates technical and organizational tools to improve maintenance planning performances. Indeed, maintaining a high level of reliability and availability of a Medium Voltage electrical network protection system such as the Medium Voltage and High Voltage circuit-breaker and its numerical protection relay at a low operating expenses cost is one of the most critical and challenging tasks for MV electrical distribution network operators. This work has mainly two goals. Firstly, to propose an operating expenses budget function that evaluates the Planned Scheduled Preventive Maintenance Policy combined with a Condition-based maintenance fora real series-parallel multi-assets MV electrical distribution system with active redundancy under the reliability and the maintenance frequency visits of these components. Secondly, to implement an integrated genetic algorithm approach in order to look for the optimal perfect and planned preventive maintenance scheduling policy and condition-based maintenance that minimizes the maximum operating expenses cost of the entire system.The method determines the optimal schedule of preventive maintenance actions based on minimization both reliabilty and operating expenses costs. Conclusions and recommendations for practice are made on the basis of obtained results.
9
Pham, Khoa Dang, Quan Vinh Nguyen, and Nho-Van Nguyen. "PWM Strategy to Alleviate Common-Mode Voltage with Minimized Output Harmonic Distortion for Five-Level Cascaded H-Bridge Converters." Energies 14, no. 15 (July 24, 2021): 4476. http://dx.doi.org/10.3390/en14154476.
Full textAbstract:
High-frequency components of common-mode voltage (CMV) induce the shaft voltage and bearing current, which lead to premature failures in motors. In addition, due to non-zero average CMV, the low-frequency components of CMV, particularly the third-order harmonic component, have been reported to cause difficulties in common-mode filter design. Furthermore, the utilization of distant voltage vectors in the pulse-width modulation (PWM) with reduced CMV magnitudes gives rise to high output harmonic distortion compared to PWM ones without CMV reduction. In an attempt to solve the aforementioned issues, this article presents a PWM strategy that features reduced CMV magnitudes, zero average CMV, and improved output harmonic distortion for a five-level cascaded H-bridge (CHB) converter. In addition, the carrier rotation technique based on the phase-leg redundancy of the CHB topology is also combined with the proposed scheme to achieve equal power loss distribution among power switching devices. Both simulation and experimental results confirm that the proposed strategy produces better output harmonic distortion than that of POD-SPWM and APOD-SPWM under the condition of reduced CMV magnitudes, zero average CMV, and equal power loss distribution.
10
Bai, Na, Liang Wang, Yaohua Xu, and Yi Wang. "Design of a Digital Baseband Processor for UHF Tags." Electronics 10, no. 17 (August 26, 2021): 2060. http://dx.doi.org/10.3390/electronics10172060.
Full textAbstract:
In this paper, we present a new digital baseband processor for UHF tags. It is a low-power and low-voltage digital circuit and adopts the Chinese military standard protocol GJB7377.1. The processor receives data or commands from the RF front-end and carries out various functions, such as receiving and writing data to memory, reading and sending memory data to the RF front-end and killing tags. The processor consists of thirteen main sub-modules: TPP decoding, clock management, random number generator, power management, memory controller, cyclic redundancy check, FM0 encoding, input data processing, output data processing, command detection module, initialization module, state machine module and controller. We use ModelSim for the TPP decoding simulation and communication simulation between tag and reader, and the simulation results meet the design requirements. The processor can be applied to UHF tags and has been taped out using a TSMC 0.18 um CMOS process.
11
Babenko, V. P., and V. K. Bityukov. "Protection of battery-powered devices against accidental swap of power supply connections." Russian Technological Journal 10, no. 6 (December 1, 2022): 52–59. http://dx.doi.org/10.32362/2500-316x-2022-10-6-52-59.
Full textAbstract:
Objectives. Battery-powered devices (e.g., wireless sensors, pacemakers, watches and other wrist-worn devices, virtual reality glasses, unmanned aerial vehicles, robots, pyrometers, cars, DC/DC converters, etc.) are widely used today. For such devices, it is highly important to ensure safe primary power supply connection, including protection against reverse polarity. The conventional solution to the reverse polarity problem, involving the use of Schottky diodes during system redundancy or increasing power by combining two or more power supplies in the OR-ing circuit due to a large voltage drop, results in significant power losses at high currents, heat dissipation problems, and an increase in the mass and size of the equipment. For this reason, it becomes necessary to develop efficient batterypowered equipment protection against incorrect reverse polarity connection.Methods. The problem is solved using circuit simulation in the Electronics Workbench environment.Results. When protecting equipment against reverse voltage polarity, it is shown that the minimum level of losses and low voltage drop are provided by “ideal diode” circuit solutions based on discrete components and microcircuits of the “integrated diode” type with external and internal power metal–oxide–semiconductor field-effect transistors (MOSFETs). The circuit simulation of ideal diodes based on p- and n-channel transistors with superior technical parameters allows the characteristics and voltage and power losses in the protected circuits to be specified along with a presentation of the proposed technical solution simplicity. The contemporary component base of protection devices is discussed in terms of efficiency.Conclusions. Examples of equipment for protecting against reverse voltage polarity are given along with circuit solutions based on discrete and integrated components. The simulation of the transfer characteristics of protection devices shows the limit for the minimum input voltage value of around 4 V using a MOSFET transistor.
12
Zakerian, Ali, and Daryoosh Nazarpour. "New Hybrid Structure Based on Improved Switched Inductor Z-Source and Parallel Inverters for Renewable Energy Systems." International Journal of Power Electronics and Drive Systems (IJPEDS) 6, no. 3 (September 1, 2015): 636. http://dx.doi.org/10.11591/ijpeds.v6.i3.pp636-647.
Full textAbstract:
Nowadays, more and more distributed generations and renewable energy sources, such as wind, solar and tidal power, are connected to the public grid by the means of power inverters. They often form microgrids before being connected to the public grid. Due to the availability of high current power electronic devices, it is inevitable to use several inverters in parallel for high-power and/or low-cost applications. So, inverters should be connected in parallel to provide system redundancy and high reliability, which are important for critical customers. In this paper, the modeling, designing and stability analysis of parallel-connected three-phase inverters are derived for application in renewable energy systems. To enlarge voltage adjustability, the proposed inverter employs an improved switched inductor Z-source impedance network to couple the main circuit and the power source. Compared with the classical Z-source inverter (ZSI) and switched inductor Z-source inverter (SL-ZSI), the proposed inverter significantly increases the voltage boost inversion ability and also can increase the power capacity and the reliability of inverter systems. The proposed topology and its performances are validated using simulation results which are obtained in Matlab/Simulink.
13
Soares, Thiago, Ubiratan Bezerra, and Maria Tostes. "Full-Observable Three-Phase State Estimation Algorithm Applied to Electric Distribution Grids." Energies 12, no. 7 (April 6, 2019): 1327. http://dx.doi.org/10.3390/en12071327.
Full textAbstract:
This paper proposes the development of a three-phase state estimation algorithm, which ensures complete observability for the electric network and a low investment cost for application in typical electric power distribution systems, which usually exhibit low levels of supervision facilities and measurement redundancy. Using the customers´ energy bills to calculate average demands, a three-phase load flow algorithm is run to generate pseudo-measurements of voltage magnitudes, active and reactive power injections, as well as current injections which are used to ensure the electrical network is full-observable, even with measurements available at only one point, the substation-feeder coupling point. The estimation process begins with a load flow solution for the customers´ average demand and uses an adjustment mechanism to track the real-time operating state to calculate the pseudo-measurements successively. Besides estimating the real-time operation state the proposed methodology also generates nontechnical losses estimation for each operation state. The effectiveness of the state estimation procedure is demonstrated by simulation results obtained for the IEEE 13-bus test network and for a real urban feeder.
14
Klinke, Sebastián, Nicolas Foos, Jimena J. Rinaldi, Gastón Paris, Fernando A. Goldbaum, Pierre Legrand, Beatriz G. Guimarães, and Andrew Thompson. "S-SAD phasing of monoclinic histidine kinase fromBrucella abortuscombining data from multiple crystals and orientations: an example of data-collection strategy anda posteriorianalysis of different data combinations." Acta Crystallographica Section D Biological Crystallography 71, no. 7 (June 30, 2015): 1433–43. http://dx.doi.org/10.1107/s1399004715007622.
Full textAbstract:
The histidine kinase (HK) domain belonging to the light–oxygen–voltage histidine kinase (LOV-HK) fromBrucella abortusis a member of the HWE family, for which no structural information is available, and has low sequence identity (20%) to the closest HK present in the PDB. The `off-edge' S-SAD method in macromolecular X-ray crystallography was used to solve the structure of the HK domain from LOV-HK at low resolution from crystals in a low-symmetry space group (P21) and with four copies in the asymmetric unit (∼108 kDa). Data were collected both from multiple crystals (diffraction limit varying from 2.90 to 3.25 Å) and from multiple orientations of the same crystal, using the κ-geometry goniostat on SOLEIL beamline PROXIMA 1, to obtain `true redundancy'. Data from three different crystals were combined for structure determination. An optimized HK construct bearing a shorter cloning artifact yielded crystals that diffracted X-rays to 2.51 Å resolution and that were used for final refinement of the model. Moreover, a thorougha posteriorianalysis using several different combinations of data sets allowed us to investigate the impact of the data-collection strategy on the success of the structure determination.
15
Kim, Kihyun, Sein Oh, and Hyungil Chae. "Conception and Simulation of a 2-Then-1-Bit/Cycle Noise-Shaping SAR ADC." Electronics 10, no. 20 (October 18, 2021): 2545. http://dx.doi.org/10.3390/electronics10202545.
Full textAbstract:
A 2-then-1-bit/cycle noise-shaping successive-approximation register (SAR) analog-to-digital converter (ADC) for high sampling rate and high resolution is presented. The conversion consists of two phases of a coarse 2-bit/cycle SAR conversion for high speed and a fine 1-bit/cycle noise-shaping SAR conversion for high accuracy. The coarse conversion is performed by both voltage and time comparison for low power consumption. A redundancy after the coarse conversion corrects the error caused by a jitter noise during the time comparison. Additionally, a mismatch error between signal and reference paths is eliminated with the help of a tail-current-sharing comparator. The proposed ADC was designed in a 28 nm CMOS process, and the simulation result shows a 68.2 dB signal-to-noise distortion (SNDR) for a sampling rate of 480 MS/s and a bandwidth of 60 MHz with good energy efficiency.
16
Sharov, I. M., O. A. Demin, A. A. Sudakov, and A. D. Yarlykov. "Development and research of uninterruptible power supply system for networks with supply voltage up to 24 V." Russian Technological Journal 10, no. 5 (October 21, 2022): 60–72. http://dx.doi.org/10.32362/2500-316x-2022-10-5-60-72.
Full textAbstract:
Objectives. Due to the continuous rapid development of renewable energy sources, requirements for secondary power supply systems keep increasing from year to year. Productive uptime for end users is dependent on the efficiency and stability of the power supply system. Such systems should be able to distribute and store energy from renewable sources having various parameters and configurations. Therefore, the present work is aimed at developing technical solutions for efficient uninterruptible secondary power supply systems in low voltage DC networks.Methods. Advanced circuitry solutions are used for performing pulse conversions with high efficiency. The flexible hardware-software system is used for implementing the parameter control system.Results. An uninterruptible power supply for low-voltage DC networks is developed. The description of subsystems and calculations for all main elements including the power ones are given. Using a contemporary component base, the system prototype is assembled, configured, and measured by parameters. The presented solutions allow achieving the universality of the system in terms of the input and output voltage range. Support for the fast-charging Power Delivery protocol is integrated. As well as regulating the battery charging current and voltage, the Li+ battery charging controller permits changes in the number of chargeable cells. The monitoring and control unit monitors network parameters and controls the system automation. Using a microcontroller as the control device, it is possible to easily change control parameters by changing software settings. Dual redundancy of the module monitoring the built-in battery parameters is used to ensure the reliability and safety of system functioning. Support for the standardized I2C communication protocol with a separate power bus allows any necessary sensors to be connected for monitoring system parameters. External high-power devices controlled by a PWM signal may be added, if required. In the paper, the Li+ battery charging profile recommended by the manufacturer is provided.Conclusions. The designed system provides stable power supply to end users at a power consumption up to 40 W for at least 45 min. The automation demonstrates reliable operation.
17
Köse, Hüseyin, and Mehmet Timur Aydemir. "Design and implementation of a 22 kW full-bridge push–pull series partial power converter for stationary battery energy storage system with battery charger." Measurement and Control 53, no. 7-8 (July 30, 2020): 1454–64. http://dx.doi.org/10.1177/0020294020944944.
Full textAbstract:
A wide variety of AC/DC power converter topologies have been developed in order to improve the system efficiency, input power factor and system redundancy for stationary battery energy storage systems. Due to the nature of high-power batteries, there is a big voltage difference between battery terminals from the end of discharge to the high charge value. To prevent unregulated battery voltages from harming the system loads, several techniques are used in the industry. A well-known old technique named as diode dropper is simple but suffers from low efficiency. Using a DC-DC converter is more advantageous, although it increases the cost. In this paper, the use of partial power processing converters which attract interest these days has been proposed as an alternative. The proposed full bridge/push-pull series connected partial power converter has a slight modification compared to the classical one presented in the literature. A system with 22 kW power rating was designed and tested. In order to compare the results, a two-switch buck-boost converter was also designed and tested for the same conditions. The results show that the proposed converter is superior to both the two-switch buck-boost converter and other topologies in terms of efficiency and response speed. Efficiencies of 97%–99% have been attained with the proposed converter.
18
Porcello, Darrell M., Chi Shun Ho, Rolf H. Joho, and John R. Huguenard. "Resilient RTN Fast Spiking in Kv3.1 Null Mice Suggests Redundancy in the Action Potential Repolarization Mechanism." Journal of Neurophysiology 87, no. 3 (March 1, 2002): 1303–10. http://dx.doi.org/10.1152/jn.00556.2001.
Full textAbstract:
Fast spiking (FS), GABAergic neurons of the reticular thalamic nucleus (RTN) are capable of firing high-frequency trains of brief action potentials, with little adaptation. Studies in recombinant systems have shown that high-voltage-activated K+ channels containing the Kv3.1 and/or Kv3.2 subunits display biophysical properties that may contribute to the FS phenotype. Given that RTN expresses high levels of Kv3.1, with little or no Kv3.2, we tested whether this subunit was required for the fast action potential repolarization mechanism essential to the FS phenotype. Single- and multiple-action potentials were recorded using whole-cell current clamp in RTN neurons from brain slices of wild-type and Kv3.1-deficient mice. At 23°C, action potentials recorded from homozygous Kv3.1 deficient mice (Kv3.1−/−) compared with their wild-type (Kv3.1+/+) counterparts had reduced amplitudes (−6%) and fast after-hyperpolarizations (−16%). At 34°C, action potentials in Kv3.1−/− mice had increased duration (21%) due to a reduced rate of repolarization (−30%) when compared with wild-type controls. Action potential trains in Kv3.1−/− were associated with a significantly greater spike decrement and broadening and a diminished firing frequency versus injected current relationship ( F/I) at 34°C. There was no change in either spike count or maximum instantaneous frequency during low-threshold Ca2+ bursts in Kv3.1−/− RTN neurons at either temperature tested. Our findings show that Kv3.1 is not solely responsible for fast spikes or high-frequency firing in RTN neurons. This suggests genetic redundancy in the system, possibly in the form of other Kv3 members, which may suffice to maintain the FS phenotype in RTN neurons in the absence of Kv3.1.
19
Luan, Jian, Xuqiang Zheng, Danyu Wu, Yuzhen Zhang, Linzhen Wu, Lei Zhou, Jin Wu, and Xinyu Liu. "A 56 GS/s 8 Bit Time-Interleaved ADC in 28 nm CMOS." Electronics 11, no. 5 (February 23, 2022): 688. http://dx.doi.org/10.3390/electronics11050688.
Full textAbstract:
This paper presents a real-time output 56 GS/s 8 bit time-interleaved analog-to-digital converter (ADC), where the full-speed converted data are output by 16-lane transmitters. A 64-way 8 bit asynchronous SAR array using monotonous and split switching strategy with 1 bit redundancy is utilized to achieve a high linearity and high-power efficiency. A low-power ring voltage-controlled oscillator-based injection-locked phase-locked loop combining with a phase interpolator-based time-skew adjuster is developed to generate the 8 equally spaced sampling phases. Digital gain correction, digital-detection-analog-correction offset calibration, and coarse–fine two-step time-skew calibration are combined to optimize the ADC’s performances. An edge detector and phase selector associated with a common near-end data-transmission position and far-end data-collection instant are designed to avoid reset competition and implement deterministic latency. Fabricated in a 28 nm CMOS process, the prototype ADC achieves an outstanding SNDR of 36.38 dB at 56 GS/s with a 19.9 GHz input, where 7.25 dB and 9.33 dB are optimized by offset-gain calibration and time-skew calibration, respectively. The ADC core occupies an area of 1.2 mm2 and consumes 432 mW power consumption.
20
Mestice, Marco, Bruno Neri, Gabriele Ciarpi, and Sergio Saponara. "Analysis and Design of Integrated Blocks for a 6.25 GHz Spacefibre PLL." Sensors 20, no. 14 (July 19, 2020): 4013. http://dx.doi.org/10.3390/s20144013.
Full textAbstract:
The design of a Phase-Locked Loop (PLL) to generate the clock reference for the new Spacefibre standard is presented in this paper. Spacefibre has been recently released by the European Space Agency (ESA) and supports up to 6.25 Gbps for on-board satellite communications. Taking as a starting point a rad-hard 6.25 GHz Voltage Controlled Oscillator in 65 nm technology, this work presents the design of the key blocks for an integrated PLL: a Triple Modular Redundancy Phase/Frequency Detector, a Charge Pump, and a passive Loop Filter. The modeling activities carried out in an Advanced Design System have proven that the proposed PLL can be completely integrated on-chip, with a Loop Filter area consumption of only 6000 µm2 (considering the 65 nm technology). The design of active circuits has been carried out at the transistor level in a Cadence Virtuoso environment, implementing both system and layout rad-hard techniques, and different solutions are discussed in this paper. As a result, a compact (0.09 mm2), low power (10.24 mW), dead zone free and rad-hard PLL is obtained with a Phase Noise below −80 dBc/Hz @ 1 MHz. A preliminary block view and floor plan of the test chip is also proposed.
21
Zhao, Chong, Siyu Jiang, Yu Xie, Longze Wang, Delong Zhang, Yiyi Ma, Yan Zhang, and Meicheng Li. "Analysis of Fault and Protection Strategy of a Converter Station in MMC-HVDC System." Sustainability 14, no. 9 (April 30, 2022): 5446. http://dx.doi.org/10.3390/su14095446.
Full textAbstract:
With the development of power energy technology, flexible high voltage direct current (HVDC) systems with high control degree of freedom flexibility, power supply to passive systems, small footprint, and other advantages stand out in the field of long-distance large-capacity transmission engineering. HVDC transmission technology based on a modular multilevel converter has been widely used in power grids due to its advantages such as large transmission capacity, less harmonic content, low switching loss, and wide application field. In the modular multilevel converter (MMC)-based HVDC system, the protection strategy of converter station internal faults is directly related to the reliability and security of the power transmission system. Starting from the MMC topological structure, this paper establishes the MMC mathematical model in a synchronous rotation coordinate system by combining the working state of sub-modules and the relationship between each variable of the upper and lower bridge arms of each phase of the MMC. It provides a theoretical basis for the design of the MMC-HVDC control system. The causes of the AC system faults and the internal faults of the converter station in the MMC-HVDC system are analyzed, and the sub-module faults and bridge arm reactor faults in the converter station are studied. The sub-module redundancy protection and bridge arm overcurrent protection strategies are designed for the faults, and the correctness of the scheme is verified by Matlab/Simulink.
22
Bogimi, Sirisha. "A grid interconnected nested neutral point clamped inverter with voltage synchronization using synchronous reference frame controller." International Journal of Applied Power Engineering (IJAPE) 10, no. 4 (December 1, 2021): 362. http://dx.doi.org/10.11591/ijape.v10.i4.pp362-372.
Full textAbstract:
<p><span lang="EN-US">Nested neutral point clamped multi level inverter with inter connection to grid through the synchronous reference frame (SRF) controller for synchronization of voltage to the grid is demonstrated. The system's main feature is that voltage stress in each inverter switching device is kept to a minimum, and redundant inverter switching states are utilised for neutral point and flying capacitor voltage balancing with sinusoidal pulse-width modulation (PWM) technique, synchronisation to grid voltages, and power injection with low harmonic generation. The inverter receives its input from a photovoltaic (PV) source that is coupled to DC-DC booster converters that are regulated by the maximum power point tracking (MPPT) incremental conductance algorithm to maintain a constant dc voltage. The system is examined under various load conditions with MATLAB Simulink model.</span></p>
23
Bogimi, Sirisha. "A grid interconnected nested neutral-point clamped inverter with voltage synchronization using synchronous reference frame controller." International Journal of Applied Power Engineering (IJAPE) 10, no. 4 (December 1, 2021): 364. http://dx.doi.org/10.11591/ijape.v10.i4.pp364-372.
Full textAbstract:
<p><span lang="EN-US">Nested neutral-point clamped multi level inverter with inter connection to grid through the synchronous reference frame (SRF) controller for synchronization of voltage to the grid is demonstrated. The system's main feature is that voltage stress in each inverter switching device is kept to a minimum, and redundant inverter switching states are utilised for neutral point and flying capacitor voltage balancing with sinusoidal pulse-width modulation (PWM) technique, synchronisation to grid voltages, and power injection with low harmonic generation. The inverter receives its input from a photovoltaic (PV) source that is coupled to DC-DC booster converters that are regulated by the maximum power point <span lang="EN-US">(MPP)</span> tracking incremental conductance algorithm to maintain a constant dc voltage. The system is examined under various load conditions with MATLAB/Simulink model.</span></p>
24
Mishra, Santanu, and Xingsheng Zhou. "Design Considerations for a Low-Voltage High-Current Redundant Parallel Voltage Regulator Module System." IEEE Transactions on Industrial Electronics 58, no. 4 (April 2011): 1330–38. http://dx.doi.org/10.1109/tie.2010.2049714.
Full text
25
KONYUKHOVA, Elena A. "Reliability indicators of medium- and low-voltage redundant power supply arrangements." Elektrichestvo, no. 6 (2017): 23–30. http://dx.doi.org/10.24160/0013-5380-2017-6-23-30.
Full text
26
García-Leyva, Lancelot, Dennis Andrade, Sergio Gómez, Antonio Calomarde, Francesc Moll, and Antonio Rubio. "New redundant logic design concept for high noise and low voltage scenarios." Microelectronics Journal 42, no. 12 (December 2011): 1359–69. http://dx.doi.org/10.1016/j.mejo.2011.09.007.
Full text
27
Hu, Yang, Heng Zhang, Jing Chen, Huan Zhang, Xinmeng Liu, Jiachen Li, Hanyu Chen, and Haiyang Hu. "A Multi-Functional De-Icing Equipment Using Modular Parallel PWM Current Source Converters." E3S Web of Conferences 256 (2021): 01033. http://dx.doi.org/10.1051/e3sconf/202125601033.
Full textAbstract:
For transmission line de-icing, a five level specific harmonic elimination (5l-she) modulation method for high-power parallel current source is proposed, which realizes the current balance of DC bridge arm and the suppression of common mode voltage, and ensures the power quality of grid connected current at low switching frequency. In addition the reactive power of the low voltage load can be compensated at the same time. Firstly, the switching states are classified according to the different mode lengths of PWM current, and the common mode voltage corresponding to each switching state is calculated. Secondly, the current sharing control strategy is established based on the analysis of the influence of redundant switching state on the current sharing of DC bridge arm. Then, the 5l-she waveform is constructed based on the switching state with lower common mode voltage, and the redundant switching states is optimized according to the current sharing strategy. Finally, the effectiveness of the proposed method is verified by simulation.
28
Gu, Xin, Bingxu Wei, Guozheng Zhang, Zhiqiang Wang, and Wei Chen. "Improved Synchronized Space Vector PWM Strategy for Three-Level Inverter at Low Modulation Index." Electronics 8, no. 12 (November 23, 2019): 1400. http://dx.doi.org/10.3390/electronics8121400.
Full textAbstract:
Aimed at reducing the switching loss and common-mode voltage amplitude of high-power medium-voltage three-level inverter under low modulation index conditions, an improved synchronous space vector PWM strategy is proposed in this paper. The switching times in each fundamental period are reduced by the re-division of small regions and the full use of the redundant switching state. The sum of switching algebra is introduced as an evaluation index and the switching state with the minimum value of the sum of switching algebra are adopted. Then, the common mode voltage amplitude is reduced. The theoretical analysis and experimental results show that the improved modulation strategy proposed in this paper can effectively reduce the switching loss and common-mode voltage amplitude of the inverter under the condition of the low modulation index. Moreover, the neutral-point voltage ripple is also reduced simultaneously.
29
Wang, Dong, Xiaobo Tang, Xiao Han, Jiao Yu, Ze Shi, and Yu Zhao. "Abnormal Diagnosis Method of Line Loss Rate in Low-voltage Station Area Based on Data-driven." Journal of Physics: Conference Series 2401, no. 1 (December 1, 2022): 012034. http://dx.doi.org/10.1088/1742-6596/2401/1/012034.
Full textAbstract:
Abstract In the conventional method of line loss rate anomaly diagnosis, there is an excellent correlation between the data of low-voltage stations and the line loss anomalies diagnosed overlap, which leads to a decrease in the accuracy of anomaly diagnosis. Therefore, a data-driven diagnosis method for abnormal line loss rate in low-voltage substation areas is designed. The main component characteristics of line loss data in low-voltage station areas are extracted, redundant data with overlapping partitions are processed, and then the abnormal diagnosis model of line loss rate is constructed using data-driven technology and a closed-loop low-voltage intelligent operation analysis platform. The reasonable interval of line loss in the low-voltage station area is analyzed to realize the accurate diagnosis of line loss rate abnormality in the low-voltage station area. In contrast, it is verified that the diagnostic accuracy of this method is higher and has a higher practical value.
30
Ali, Mohammad, Mohd Tariq, Chang-Hua Lin, Ripon K. Chakrobortty, Basem Alamri, Ahmad Alahmadi, and Michael J. Ryan. "Operation of a UXE-Type 11-Level Inverter with Voltage-Balance Modulation Using NLC and ACO-Based SHE." Sustainability 13, no. 16 (August 12, 2021): 9035. http://dx.doi.org/10.3390/su13169035.
Full textAbstract:
In this article, the UXE-Type inverter is considered for eleven-level operation. This topology exhibits a boosting capability along with reduced switches and one source. An algorithm that utilizes the redundant states to control the voltage-balance of the auxiliary direct current (DC)-link is presented. The proposed control algorithm is capable of maintaining the voltages of each capacitor at Vdc/4 resulting in a successful multilevel operation for all values of load. The inverter is also compared with 11-level inverters. The modulation of the inverter is performed by employing nearest level control and ant colony optimization based selective harmonic elimination. The maximum inverter efficiency is 98.1% and its performance is validated on an hardware-in-the-loop platform.
31
Guidi, Giuseppe, and Tore M. Undeland. "Redundant and Self-Healing Drive System for Pure EV Based on Low Voltage Building Blocks." World Electric Vehicle Journal 1, no. 1 (December 28, 2007): 73–80. http://dx.doi.org/10.3390/wevj1010073.
Full text
32
Xun, Zhuyu, Hongfa Ding, and Zhou He. "A Novel Switched-Capacitor Inverter with Reduced Capacitance and Balanced Neutral-Point Voltage." Electronics 10, no. 8 (April 16, 2021): 947. http://dx.doi.org/10.3390/electronics10080947.
Full textAbstract:
A novel three-phase switched-capacitor multilevel inverter (SCMLI) with reduced capacitance and balanced neutral-point voltage is proposed in this paper. Applying only one DC source, the three-phase seven-level topology possessing voltage-boosting capability is accomplished without the high-voltage stress of power switches. Owing to the inherent redundant switching states of the proposed topology, two charging approaches that can effectively limit the voltage ripples and path selection for capacitors can be realized. This provides the presented topology with reduced capacitance, balanced neutral-point voltage, good performance in not only the three-phase four-wire system but also the three-phase three-wire system, and low total harmonic distortion (THD) of the output voltage. A comprehensive comparison with previous SCMLIs in various aspects is conducted to validate the merits mentioned above. The simulation results accord with theoretical analyses, confirming the feasibility of the proposed three-phase SCMLI.
33
Jiaxiong, YE, WANG Jikang, PENG Yuanquan, FAN Xinming, and LIU Yijun. "High Quality NLM Method for Medium Voltage Hybrid Bridge MMC." E3S Web of Conferences 236 (2021): 01030. http://dx.doi.org/10.1051/e3sconf/202123601030.
Full textAbstract:
Medium voltage hybrid bridge multilevel converter (MMC) usually has a lower number of links. Therefore, the traditional Nearest Level Modulation (NLM) method has the problems of low equivalent switching frequency and poor output quality. And the traditional Carrier Phase-shifted Pulse Width Modulation (CPS-PWM) modulation has problems such as difficulty in hybrid bridge control, difficulty in redundant configuration, and large amount of calculation. In response to the above problems, this paper proposes a new high-quality NLM method. Based on the traditional NLM modulation method, PWM modulation output and module voltage equalization are realized through the time difference between one module input and one module exit in each control cycle. It achieves the purpose of improving the equivalent switching frequency and output power quality, and at the same time has the advantages of the traditional NLM modulation method with small calculation amount, redundant configuration and hybrid bridge modulation. This article describes the three modulation methods and compares their effects. Finally, the theoretical analysis is verified by PSCAD simulation.
34
Haraguchi, Makoto, Hiroshi Kobayashi, Akio Inoue, and Junji Furusho. "A Development of 2-D Force Display System with Redundant Low-voltage Driving ER Fluid Brakes." Nihon Reoroji Gakkaishi 38, no. 2 (2010): 99–105. http://dx.doi.org/10.1678/rheology.38.99.
Full text
35
Yurish, Sergey Y. "Advanced Analog-to-Digital Conversion Using Voltage-to-Frequency Converters for Remote Sensors." Key Engineering Materials 381-382 (June 2008): 623–26. http://dx.doi.org/10.4028/www.scientific.net/kem.381-382.623.
Full textAbstract:
This paper presents an advanced analog-to-digital conversion technique based on a voltage-to-frequency-to-digital conversion that is suitable for remote sensors, telemetry applications and multichannel data acquisition systems. A voltage-to-frequency conversion part can be based, for example, on high performance, charge-balance voltage-to-frequency converter (VFC), where monostable is replaced by a bistable, driven by an external clock, or other existing high performance VFCs. The frequency-to-digital converter “bottleneck” problem in such promised ADC scheme was solved due to proposed advanced method of the dependent count for frequency-to-digital conversion. This ADC technique lets receive many advantages such as high accuracy, relatively low power consumption, low cost solution, wide dynamic range, great stability and faster conversion time in comparison with existing VFC-based techniques. The conversion rate (6.25 µs to 6.25 ms) in such ADC scheme is programmable, non-redundant, shorter than for pulse counting technique and comparable with successive-approximation and Σ- ADC.
36
Balasubramanian, Padmanabhan, Douglas Maskell, and Nikos Mastorakis. "Low Power Robust Early Output Asynchronous Block Carry Lookahead Adder with Redundant Carry Logic." Electronics 7, no. 10 (October 9, 2018): 243. http://dx.doi.org/10.3390/electronics7100243.
Full textAbstract:
Adder is an important datapath unit of a general-purpose microprocessor or a digital signal processor. In the nanoelectronics era, the design of an adder that is modular and which can withstand variations in process, voltage and temperature are of interest. In this context, this article presents a new robust early output asynchronous block carry lookahead adder (BCLA) with redundant carry logic (BCLARC) that has a reduced power-cycle time product (PCTP) and is a low power design. The proposed asynchronous BCLARC is implemented using the delay-insensitive dual-rail code and adheres to the 4-phase return-to-zero (RTZ) and the 4-phase return-to-one (RTO) handshaking. Many existing asynchronous ripple-carry adders (RCAs), carry lookahead adders (CLAs) and carry select adders (CSLAs) were implemented alongside to perform a comparison based on a 32/28 nm complementary metal-oxide-semiconductor (CMOS) technology. The 32-bit addition was considered for an example. For implementation using the delay-insensitive dual-rail code and subject to the 4-phase RTZ handshaking (4-phase RTO handshaking), the proposed BCLARC which is robust and of early output type achieves: (i) 8% (5.7%) reduction in PCTP compared to the optimum RCA, (ii) 14.9% (15.5%) reduction in PCTP compared to the optimum BCLARC, and (iii) 26% (25.5%) reduction in PCTP compared to the optimum CSLA.
37
Bhattacharya, Sumantra, Caroline Willich, and Josef Kallo. "Design and Demonstration of a 540 V/28 V SiC-Based Resonant DC–DC Converter for Auxiliary Power Supply in More Electric Aircraft." Electronics 11, no. 9 (April 26, 2022): 1382. http://dx.doi.org/10.3390/electronics11091382.
Full textAbstract:
Efficient and robust power electronic converters are vital to the success of the electrification of aircraft. Especially, low voltage auxiliary converters, which usually supply high current and low voltage loads, are not readily available industrially and need special attention. In terms of energy density and efficiency, LLC converters are among the most commonly used and efficient topologies for automotive and aerospace applications. In the case of aerospace applications, a fault-tolerant topology is highly desirable to reduce the need for redundant components and weight by removing backup systems. To solve this issue, this study introduces a new 2.0 kW LLC-based converter with a reconfigurable fault-tolerant architecture. With the help of a specially designed secondary side, the proposed converter can reconfigure itself so that even if one of the semiconductor switches fails permanently, the converter can still maintain power at nominal voltage levels, ensuring that the aircraft’s vital functionality is preserved. This paper also describes the basic operation principle, component-design aspects, conduction loss reduction techniques, and control system algorithm. Finally, a 2.0 kW experimental prototype is built to verify and demonstrate the operation of the proposed reconfigurable LLC converter.
38
Bhattacharya, Sumantra, Caroline Willich, and Josef Kallo. "Design and Demonstration of a 540 V/28 V SiC-Based Resonant DC–DC Converter for Auxiliary Power Supply in More Electric Aircraft." Electronics 11, no. 9 (April 26, 2022): 1382. http://dx.doi.org/10.3390/electronics11091382.
Full textAbstract:
Efficient and robust power electronic converters are vital to the success of the electrification of aircraft. Especially, low voltage auxiliary converters, which usually supply high current and low voltage loads, are not readily available industrially and need special attention. In terms of energy density and efficiency, LLC converters are among the most commonly used and efficient topologies for automotive and aerospace applications. In the case of aerospace applications, a fault-tolerant topology is highly desirable to reduce the need for redundant components and weight by removing backup systems. To solve this issue, this study introduces a new 2.0 kW LLC-based converter with a reconfigurable fault-tolerant architecture. With the help of a specially designed secondary side, the proposed converter can reconfigure itself so that even if one of the semiconductor switches fails permanently, the converter can still maintain power at nominal voltage levels, ensuring that the aircraft’s vital functionality is preserved. This paper also describes the basic operation principle, component-design aspects, conduction loss reduction techniques, and control system algorithm. Finally, a 2.0 kW experimental prototype is built to verify and demonstrate the operation of the proposed reconfigurable LLC converter.
39
Leow, Yoong Yang, and Chia Ai Ooi. "T-shaped hybrid alternate arm converter with arm energy balancing control for battery energy storage systems." Journal of Electrical Engineering 72, no. 6 (December 1, 2021): 395–400. http://dx.doi.org/10.2478/jee-2021-0056.
Full textAbstract:
Abstract Multilevel voltage source converters (VSCs), such as modular multilevel converter (MMC), cascaded H-Bridge (CHB) and alternate arm converter (AAC), are competent topologies for battery energy storage systems (BESSs) due to modularity, scalability and low harmonic distortion. However, there is a lack of studies about interfacing AAC with a BESS due to the arm energy balancing issue. Redundant sub-modules (SMs) are inserted passively into MMC, CHB and AAC to achieve high reliability; consequently, some of them are constantly idling, resulting in low SM utilization. We propose a novel topology -T-shaped hybrid alternate arm converter (TSHAAC) for BESS applications. In addition to the aforementioned features, the proposed TSHAAC requires lower number of SMs than MMC and AAC, along with lower number of switches than CHB. Moreover, an adapted arm energy balancing control is proposed to take advantage of the redundant SMs that are idling to achieve faster balancing than in conventional AAC configuration. The simulation results validate the integration of TSHAAC configuration in a BESS; the adapted arm energy balancing control is able to improve the balancing duration by 27 %.
40
Sirisha, B., and P. Satishkumar. "Simplified Space Vector Pulse Width Modulation based on Switching Schemes with Reduced Switching Frequency and Harmonics for Five Level Cascaded H-Bridge Inverter." International Journal of Electrical and Computer Engineering (IJECE) 8, no. 5 (October 1, 2018): 3417. http://dx.doi.org/10.11591/ijece.v8i5.pp3417-3426.
Full textAbstract:
This paper presents a simplified control strategy of spacevector pulse width modulation technique with a three segment switching sequence and seven segment switching sequence for high power applications of multilevel inverters. In the proposed method, the inverter switching sequences are optimized for minimization of device switching frequency and improvement of harmonic spectrum by using the three most desired switching states and one suitable redundant state for each space vector. The proposed three-segment sequence is compared with conventional seven-segment sequence for five level Cascaded H-Bridge inverter with various values of switching frequencies including very low frequency. The output spectrum of the proposed sequence design shows the reduction of device switching frequency, current and line voltage THD, thereby minimizing the filter size requirement of the inverter, employed in industrial applications, where sinusoidal output voltage is required.
41
Sirisha, B., and Dr P. Satishkumar. "Simplified Space Vector Pulse Width Modulation Based on Switching Schemes with Reduced Switching Frequency and Harmonics for Five Level Cascaded H-Bridge Inverter." International Journal of Advances in Applied Sciences 7, no. 2 (June 1, 2018): 127. http://dx.doi.org/10.11591/ijaas.v7.i2.pp127-134.
Full textAbstract:
This paper presents a simplified control strategy of SVPWM with a three segment switching sequence and 7 segment switch frequency for high power multilevel inverter. In the proposed method, the inverter switching sequences are optimized for minimization of device switching sequence frequency and improvement of harmonic spectrum by using the three most derived switching states and one suitable redundant state for each space vector. The proposed 3-segment sequence is compared with conventional 7-segment sequence similar for five level Cascaded H-Bridge inverter with various values of switching frequencies including very low frequency. The output spectrum of the proposed sequence design shows the reduction of device switching frequency and states current and line voltage. THD this minimizing the filter size requirement of the inverter, employed in industrial applications. Where sinusoidal output voltage is required<em>.</em>
42
Petridis, Stefanos, Orestis Blanas, Dimitrios Rakopoulos, Fotis Stergiopoulos, Nikos Nikolopoulos, and Spyros Voutetakis. "An Efficient Backward/Forward Sweep Algorithm for Power Flow Analysis through a Novel Tree-Like Structure for Unbalanced Distribution Networks." Energies 14, no. 4 (February 9, 2021): 897. http://dx.doi.org/10.3390/en14040897.
Full textAbstract:
The increase of distributed energy resources (DERs) in low voltage (LV) distribution networks requires the ability to perform an accurate power flow analysis (PFA) in unbalanced systems. The characteristics of a well performing power flow algorithm are the production of accurate results, robustness and quick convergence. The current study proposes an improvement to an already used backward-forward sweep (BFS) power flow algorithm for unbalanced three-phase distribution networks. The proposed power flow algorithm can be implemented in large systems producing accurate results in a small amount of time using as little computational resources as possible. In this version of the algorithm, the network is represented in a tree-like structure, instead of an incidence matrix, avoiding the use of redundant computations and the storing of unnecessary data. An implementation of the method was developed in Python programming language and tested for 3 IEEE feeder test cases (the 4 bus feeder, the 13 bus feeder and the European Low Voltage test feeder), ranging from a low (4) to a very high (907) buses number, while including a wide variety of components witnessed in LV distribution networks.
43
Alharbi, Mohammed, Semih Isik, and Subhashish Bhattacharya. "Submodule Fault-Tolerant Strategy for Modular Multilevel Converter with Scalable Control Structure." Sustainability 14, no. 24 (December 8, 2022): 16445. http://dx.doi.org/10.3390/su142416445.
Full textAbstract:
Modular Multilevel Converter (MMC) topology is considered a good candidate for high-voltage applications. One of the reasons is that an MMC can quickly generate a higher voltage with an excellent sine wave with the series connection of many power blocks, called Sub-Modules (SMs). In such applications, the control system of an MMC can be challenging, and the possibility of an SM failure increases. As a result, the reliability and availability of the application reduce over time. To reduce the effects of SM failure, an MMC is usually equipped with Redundant SMs (RSMs). The RSMs are added into MMC arms as regular SMs to increase the application’s reliability and reduce downtime. This paper proposes a unique decentralized SM fault-tolerant control model for RSMs to participate in any SM sets. In an MMC arm, a dedicated controller is assigned to RSMs, while the group of SMs has their local controllers. The controller of the RSMs continually monitors the voltage of all the SM sets in the arm. If there is any failure, the controller of the RSMs activates a requested number of SMs to help local controllers to generate the desired voltage level. The proposed control system significantly reduces local controllers’ computational and communication requirements compared to conventional redundant controllers. The proposed control system is based on a distributed structure, so it does not limit hardware flexibility, such as the scalability and modularity of an MMC system. Besides, the separate controller for the RSMs significantly helps increase the reliability of an MMC application.
44
Alquennah, Alamera Nouran, Mohamed Trabelsi, Khaled Rayane, Hani Vahedi, and Haitham Abu-Rub. "Real-Time Implementation of an Optimized Model Predictive Control for a 9-Level CSC Inverter in Grid-Connected Mode." Sustainability 13, no. 15 (July 21, 2021): 8119. http://dx.doi.org/10.3390/su13158119.
Full textAbstract:
The Crossover Switches Cell (CSC) is a recent Single DC-Source Multilevel Inverter (SDCS-MLI) topology with boosting abilities. In grid-connected PV applications, the CSC should be controlled to inject a sinusoidal current to the grid with low THD% and unity power factor, while balancing the capacitor voltage around its reference. These two objectives can be met through the application of a finite control set model predictive control (FCS-MPC) method. Thus, this paper proposes a design of an optimized FCS-MPC for a 9-level grid-tied CSC inverter. The switching actions are optimized using the redundant switching states. The design is verified through simulations and real-time implementation. The presented results show that the THD% of the grid current is 1.73%, and the capacitor voltage is maintained around its reference with less than 0.5 V mean error. To test the reliability of the control design, different scenarios were applied, including variations in the control reference values as well as the AC grid voltage. The presented results prove the good performance of the designed controller in tracking the reference values and minimizing the steady-state errors.
45
Lou, Qinghui, Liguo Sun, Haisong Lu, Weifeng Xu, Zhebei Wang, Dan Cai, and Xiangjian Shi. "A High Speed Redundant IO Bus for Energy Power Controller System." Journal of Physics: Conference Series 2113, no. 1 (November 1, 2021): 012024. http://dx.doi.org/10.1088/1742-6596/2113/1/012024.
Full textAbstract:
Abstract This paper designs and implements a High Speed Redundant IO Bus for Energy Power Controller System. The physical layer adopts multi-point low-voltage differential signal standard. This bus has the characteristics of high real-time, high throughput and easy expansion. The controller communicates with IO module by A/B bus alternately, monitors link status in real time and collects IO module data. Non real time slots can be used to control non real time messages for IO modules such as time synchronizing and memory monitoring. The controller ARM core runs QNX real-time operating system, and transmits the message needed to communicate with IO modules to the FPGA through DMA. After receiving the message, the FPGA parses the message and automatically fills in the CRC check code and frame end flag at the end of the message. When the FPGA receives the data feedback from the IO module, it performs CRC verification. If the verification passes, it fills the corresponding module receiving buffer. Otherwise, it fills the CRC verification error flag in the register of the corresponding IO module to reduce the load of the arm core.
46
Guchinsky, R. V., and S. V. Petinov. "Uncertainties in fatigue assessment of structures in design and in service." Herald of the Ural State University of Railway Transport, no. 4 (2021): 35–44. http://dx.doi.org/10.20291/2079-0392-2021-4-35-44.
Full textAbstract:
The rules for calculating the fatigue of bridge structures, ships, transport and other structures subjected to significant variable loads during operation are accompanied by a number of uncertainties. When calculating the fatigue of structures at the stage of assessing the operational load, significant errors are introduced. Loads on structures may depend on the economic situation, for example, traffic on bridges during the designated service life, changes in passenger traffic that affect the congestion of urban transport, etc. These uncertainties accompany the design process, since loading conditions in the service life of the structure are predicted approximately, mainly taking into account the accumulated operational experience. In addition, there are uncertainties in the existing methodology for assessing structural fatigue, embedded in the specifics of the S-N criteria for fatigue and approaches to the application of criteria for assessing fatigue damage. Despite the fact that a number of uncertainties in the current procedures for assessing structural fatigue have been discussed for many years, approaches to calculation do not change significantly. Among the power approaches based on the use of S-N curves, there are three main types. Firstly, the nominal stress approach, which represents a set of S-N curves for typical welded joints and structural parts in which fatigue life depends on the nominal stress corresponding to the critical region. Secondly, the approach of stresses at the hot spot, where the selected S-N curves are given for the main material and the weld material, in this case, the stress at the hot spot is associated with geometric features of the joint and is determined using the finite element method. Thirdly, the peak stress approach, which also uses S-N curves for the base and deposited metal materials, but the local stress is calculated taking into account the shape of the part and the weld in question with detailed modeling of geometry of the critical area, the weld sole. The approaches of stress at the hot spot and peak stresses assume linear transformation of the nominal voltage, linear elastic behavior of the material in the stress concentration area. In this case, the local cyclic elastic-plastic deformation of the material is not taken into account. However, failure to take into account the cyclic plasticity of the material, even with moderate stress concentration, leads to some underestimation of the estimated fatigue damage to structures. Another source of uncertainty in evaluation of fatigue properties is discrepancy between the size and nature of fatigue damage in standard test samples for the purpose of obtaining S-N curves and in the design areas under consideration. In addition, in methodology of fatigue assessment, it is important that the nominal stress in many parts of real structures that detect fatigue damage and the early appearance of cracks practically is not changed due to redundancy of structures during the growth of cracks. The formation of a crack leads to sharp relaxation of stresses and often to redistribution of efforts to the structures surrounding the crack. This means that areas of high stress concentration are controlled more by movements than by efforts. This thesis, based on numerous experimental observations, leads to the conclusion that testing samples to determine the fatigue characteristics of the material In addition, in the methodology of fatigue assessment, it is important that the nominal stress in many parts of real structures that detect fatigue damage and the early appearance of cracks practically does not change due to the redundancy of structures during the growth of cracks. The formation of a crack leads to a sharp relaxation of stresses and often to a redistribution of efforts to the structures surrounding the crack. This means that areas of high stress concentration are controlled more by movements than by efforts. This thesis, based on numerous experimental observations, leads to the conclusion that tests of samples to determine the fatigue characteristics of the material should be carried out within constant limits of movement of the testing machine grips. Based on the results of the work, the following conclusions were made. The local stress in the concentration area in accordance with the currently accepted approaches of stresses at the hot spot and peak stresses is determined from the assumption of linear elastic behaviour of the material over the entire range of operational loads. Fatigue tests of standard samples carried out until almost complete destruction include the initial accumulation of damage in the structure of the material, the origin and growth of the crack. The condition of structural damage in finite element models based on sample tests is estimated indefinitely. It is assumed that the calculated S-N curves uniformly characterize the fatigue resistance of low-carbon and high-strength steels and the corresponding welded joints, although the fatigue resistance of the base material differs for different structural steels. The damaging effect of medium cycle stresses, including residual welding stresses, is manifested mainly in the phase of crack growth. When testing samples with a zero loading cycle, these stresses cannot be properly taken into account in the approaches used. As measures to improve fatigue calculation methods, it is proposed to test samples under conditions of control of the displacement range before the origin of a macroscopic crack (controlled, for example, by the potential drop method). It is also recommended to distinguish between the mechanical properties of materials when planning, conducting fatigue tests, analyzing the results and constructing S-N curves.
47
Chen, Yanhu, Yujia Zang, Canjun Yang, Zhiyong Duan, Haoyu Zhang, and Gul Muhammad. "Reconfigurable Power Converter for Constant Current Underwater Observatory." Electronics 9, no. 2 (February 10, 2020): 307. http://dx.doi.org/10.3390/electronics9020307.
Full textAbstract:
A constant current (CC) underwater observatory employing the shunt method to provide constant voltage (CV) power for external loads is favored in occasions where shunt-fault tolerance is required. However, low efficiency of CC to CV conversion with the shunt method limits its application, especially in scenarios of varying loads. In this paper, a highly reliable and stable CC/CV converter with better efficiency is introduced based on the proposed novel active soft bypass (ASB) technology and the proposed novel priority-based power management strategy (PPMS). The ASB technology is a method that employs switches and a special control sequence which greatly depresses the large voltage transient presenting on the input side when trying hard bypass redundant modules, and the PPMS makes the system easy to monitor and ensures the absolute reliability of ASB technology. The theoretical study of this novel reconfigurable CC/CV converter and validation experiments on a prototype are carried out, with results showing great improvement in the performance. In addition, the proposed reconfigurable power converter is applied to a coastal observatory in the East China Sea.
48
Vardhan, Mangi Shetti Harsha, S. Maddilety, and Dr P. Sankar Babu. "An Advanced Power Flow Control in Small Scale DC Power Structure by Using Multilevel Converter." International Journal of Research In Science & Engineering, no. 12 (November 19, 2021): 1–8. http://dx.doi.org/10.55529/ijrise.12.1.8.
Full textAbstract:
Because they combine outstanding harmonic performance with low switching frequencies, multilevel transforms are attractive options in Small-Scale DC Power Ne2rks. High dependability can also be obtained by including redundant submodules into the cascaded transform chain. DC microgrids are developing as the next generation of smallscale electric power structures, with very low line impedance. This phenomena creates high currents in microgrids even with little voltage changes; hence, a power flow controller must have quick transient reaction and accurate power flow management. Multi-level transforms are used as power flow controllers in this work to provide high speed and high accuracy power flow management in a dc microgrid. Because a multi-level transform is employed, the output filter can be tiny. The linear controller, such as PI or PID, is established and widely used in the power electronics sector, but its performance degrades as system parameters change. In this paper, a neural structure (NN) based voltage management technique for a DC-DC transform is developed. This project also shows how to construct the output LC filter of a multi-level transform to meet a current ripple requirement. In comparison to typical 2-level transforms, we can demonstrate that a multilevel transform with a smaller filter may provide high-speed and high-precision power flow management for low line impedance situations. MATLAB/Simulink Simulation results are used to evaluate the control performance of each output current in the step response while accounting for transient variations in the power flow.
49
Vardhan, Mangi Shetti Harsha, S. Maddilety, and Dr P. Sankar Babu. "An Advanced Power Flow Control in Small Scale DC Power Structure by Using Multilevel Converter." International Journal of Research In Science & Engineering, no. 26 (November 29, 2022): 1–8. http://dx.doi.org/10.55529/ijrise.26.1.8.
Full textAbstract:
Because they combine outstanding harmonic performance with low switching frequencies, multilevel transforms are attractive options in Small-Scale DC Power Ne2rks. High dependability can also be obtained by including redundant submodules into the cascaded transform chain. DC microgrids are developing as the next generation of smallscale electric power structures, with very low line impedance. This phenomena creates high currents in microgrids even with little voltage changes; hence, a power flow controller must have quick transient reaction and accurate power flow management. Multi-level transforms are used as power flow controllers in this work to provide high speed and high accuracy power flow management in a dc microgrid. Because a multi-level transform is employed, the output filter can be tiny. The linear controller, such as PI or PID, is established and widely used in the power electronics sector, but its performance degrades as system parameters change. In this paper, a neural structure (NN) based voltage management technique for a DC-DC transform is developed. This project also shows how to construct the output LC filter of a multi-level transform to meet a current ripple requirement. In comparison to typical 2-level transforms, we can demonstrate that a multilevel transform with a smaller filter may provide high-speed and high-precision power flow management for low line impedance situations. MATLAB/Simulink Simulation results are used to evaluate the control performance of each output current in the step response while accounting for transient variations in the power flow.
50
Buzdugan, M. "A Brief Introduction in the Mitigation of Conducted Electromagnetic Interference lssues." Renewable Energy and Power Quality Journal 19 (September 2021): 373–78. http://dx.doi.org/10.24084/repqj19.297.
Full textAbstract:
This paper deals with the mitigation of the influence of electromagnetic conducted emissions in low voltage grids, which can be performed using different filtering methods. Due to the relatively young age of the electromagnetic compatibility domain, the specific terminology is not yet fully consecrated. That is why the specific literature abounds in a bunch of definitions and notions, incomplete, redundant, or worse, even contradictory. Therefore, all over this paper, the terminology from the successive issues of the standard IEC 60050-161 International Electrotechnical Vocabulary, is used. The introductory section presents generalities regarding the broader context of electromagnetic compatibility in which the paper fit. Section II is devoted to measurement techniques and measuring equipment used in conducted electromagnetic interference tests, specifically for electromagnetic emissions that flow in/from the equipment under test through power lines in the standardized frequency range from 100 kHz to 30 MHz. These measurement techniques and equipment are further used in the next section which presents electromagnetic interference experiments, performed on an induction motor driven by a frequency converter. To mitigate the conducted electromagnetic emissions to fit into the standard limits, a cascade of two EMI filtering cells has been designed and implemented. This demonstrated the usefulness and effectiveness of mains EMI filters in low voltage power applications. The experiment also demonstrated that in some cases it would be necessary to retrofit more than one filtering cell