Dissertations / Theses on the topic 'Measurements on RF Power Amplifiers'

Abstract

In this thesis, a measurement system was set to perform comprehensive measurements on RF power amplifiers. Data obtained from the measurements is then processed mathematically to obtain three dimensional graphs of the basic parameters affected or generated by nonlinearities of the amplifier i.e. gain, efficiency and distortion. Using a class AB amplifier as the DUT, two sets of signals – both swept in power level and frequency - were generated to validate the method, a two-tone signal and a WCDMA signal. The three dimensional plot gives a thorough representation of the behavior of the amplifier in any arbitrary range of spectrum and input level. Sweet spots are consequently easy to detect and analyze. The measurement setup can also yield other three dimensional plots of variations of gain, efficiency or distortion versus frequencies and input levels. Moreover, the measurement tool can be used to plot traditional two dimensional plots such as, input versus gain, frequency versus efficiency etc, making the setup a practical tool for RF amplifiers designers.

The test signals were generated by computer then sent to a vector signal generator that generates the actual signals fed to the amplifier. The output of the amplifier is fed to a vector signal analyzer then collected by computer to be handled. MATLAB® was used throughout the entire process.

The distortion considered in the case of the two-tone signals is the third order intermodulation distortion (IM3) whereas Adjacent Channel Power Ratio (ACPR) was considered in the case of WCDMA.

Measurements are important to specify and verify properties for components, modules and systems. The specifications for a certain figure of merit are usually given in a numerical value or a two dimensional plot. However, there are some devices, like power amplifiers with certain figure of merits that depends on two or more working conditions, requiring a three dimensional plot.

This thesis presents a measurement method including graphical user interface of three parameters gain, efficiency and distortion when two-tone or WCDMA signals are used as an input to the PA.

The FREIA laboratory is a Facility for REsearch Instrumentation and Acceleratior development at Uppsala University, Sweden, constructed recently to test and develop superconducting accelerating cavities and their high power RF sources. FREIA's activity target initially the European Spallation Source (ESS) requirements for testing spoke cavities and RF power stations, typically 400 kW per cavity. Different power stations will be installed at the FREIA laboratory. The first one is based on vacuum tubes and the second on a combination of solid state modules. In this context, we investigate different related aspects, such as power generation and power combination. For the characterization of solid state amplifier modules in pulsed mode, at ESS specifications, we implement a Hot Sparameter measurement set-up, allowing in addition the measurement of different parameters such as gain and efficiency. Two new solid state amplifier modules are designed, constructed and measured at 352 MHz, using commercially available LDMOS transistors. Preliminary results show a drain efficiency of 71 % at 1300 W pulsed output power. The effects of changing quiescent current (IDq) and drain voltage are investigated, aswell as the possibilities to combine several modules together.

In this thesis we introduce a two-way Doherty amplifier architecture with multiple feedbacks for digital predistortion based on impedance-inverting directional coupler (transcoupler). The tunable two-way Doherty amplifier with a tuned circulator-based impedance inverter is presented. Compact N-way Doherty architectures that subsume impedance inverter and offset line functionality into output matching networks are derived. Comprehensive N-way Doherty amplifier design and analysis techniques based on load-pull characterization of active devices and impedance modulation effects are developed. These techniques were then applied to the design of a two-way Doherty amplifier and a three-way Doherty amplifier which were manufactured and their performance measured and compared to the amplifier performance specifications and simulated results.

Abstract The main emphasis in modern RF power amplifier (PA) research is on improving linearity while at the same time maintaining reasonably good efficiency, for which purpose external linearization in the form of feedforward or predistortion is often used. Linearity and linearization can be considered from both a fundamental signal (amplitude and phase conversions, AM-AM & AM-PM) and an intermodulation distortion (IMD) regeneration point of view, and since a study of intermodulation gives more information on the behaviour of an amplifier, linearity is studied in this thesis by analysing the amplitude and phase of IM components under varying signal conditions, i.e. as functions of temperature, modulation bandwidth and amplitude. To study the behaviour of IM components analytically, a Volterra model including electro-thermal distortion mechanisms is developed and a simulation technique is introduced to determine how easily the amplifier can be linearized. An S-parameter characterization method for extracting the Volterra model and the simulation model is developed, and the amplitude and phase dependences of the IM components are shown by means of measurements performed by a novel technique developed here. The results show that the behaviour of IM components is more complicated than had commonly been expected. Three techniques are developed for eliminating the frequency dependence of IM components, impedance optimization, envelope filtering and envelope injection. In the envelope injection technique, a low frequency envelope signal is added to the input of the amplifier in order to improve both the bandwidth and amplitude range of the memoryless predistortion. The functionality of envelope injection is demonstrated by Volterra calculations, simulations and measurements, and the technique is applied to 1W, 1.8 GHz common-emitter BJT and common-source MESFET amplifiers. IM cancellation better than 20 dB is achieved over a wide range of bandwidths and amplitudes. It is concluded that an inherently linear amplifier is not necessarily easy to linearize any further using external techniques, but that the part of the distortion that varies with bandwidth and amplitude can be cancelled out using envelope injection and the remaining memoryless distortion by means of a simple polynomial RF predistorter. This results in good cancellation of distortion, and since both envelope injection and RF predistortion consume little power, both good efficiency and linearity can be achieved.

Depuis plusieurs années, la technologie de transistors à effet de champ à haute mobilité (HEMT) sur Nitrure de Gallium (GaN) a démontré un potentiel très important pour la montée en puissance et en fréquence des dispositifs. Malheureusement, la présence des effets parasites dégrade les performances dynamiques des composants ainsi que leur fiabilité à long-terme. En outre, l'origine de ces pièges et leur emplacement physique restent incertains jusqu'à aujourd'hui. Une partie du travail de recherche menée dans cette thèse est axée sur la caractérisation des pièges existant dans les dispositifs HEMTs GaN à partir de mesures de paramètre S basse fréquence (BF), les mesures du bruit BF et les mesures I(V) impulsionnelles. Parallèlement, nous avons effectué des simulations physiques basées sur TCAD afin d'identifier la localisation des pièges dans le transistor. De plus, notre étude expérimentale de caractérisation et de simulation montre que les mesures BF pourraient constituer un outil efficace pour caractériser les pièges existant dans le buffer GaN, alors que la caractérisation de Gate-lag pourrait être plus utile pour identifier les pièges de barrière des dispositifs GaN HEMT. La deuxième partie de ce travail de recherche est axée sur la caractérisation des dispositifs AlN/GaN HEMT sur substrat Si et SiC. Une méthode d’extraction simple et efficace de la résistance canal et de la résistance de contact a été mise au point en utilisant conjointement la simulation physique et les techniques de caractérisation. Le principe de l’extraction de la résistance canal est basée sur la mesure de la résistance RON. Celle-ci est calculée à partir des mesures de courant de drain IDS et de la tension VDS pour différentes valeurs de températures En outre, nous avons procédé à une évaluation complète du comportement thermique de ces composants en utilisant conjointement les mesures et les simulations thermiques tridimensionnelles (3D) sur TCAD. La résistance thermique (RTH) a été extraite pour les transistors de différentes géométries à l'aide des mesures et ensuite validée par les simulations thermiques sur TCAD
GaN High Electron Mobility Transistors (HEMTs) have demonstrated their capabilities to be an excellent candidate for high power microwave and mm-wave applications. However, the presence of traps in the device structure significantly degrades the device performance and also detriments the device reliability. Moreover, the origin of these traps and their physical location remains unclear till today. A part of the research work carried out in this thesis is focused on characterizing the traps existing in the GaN/AlGaN/GaN HEMT devices using LF S-parameter measurements, LF noise measurements and drain-lag characterization. Furthermore, we have used TCAD-based physical device simulations in order to identify the physically confirm the location of traps in the device. Moreover, our experimental characterization and simulation study suggest that LF measurements could be an effective tool for characterizing the traps existing in the GaN buffer whereas gate-lag characterization could be more useful to characterize the AlGaN barrier traps of GaN HEMT devices. The second aspect of this research work is focused on characterizing the AlN/GaN/AlGaN HEMT devices grown on Si and SiC substrate. We attempt to characterize the temperature-dependent on-resistance (RON) extraction of these devices using on-wafer measurements and TCAD-based physical simulations. Furthermore, we have proposed a simplified methodology to extract the temperature and bias-dependent channel sheet resistance (Rsh) and parasitic series contact resistance (Rse) of AlN/GaN HEMT devices. Further, we have made a comprehensive evaluation of thermal behavior of these devices using on-wafer measurements and TCAD-based three-dimensional (3D) thermal simulations. The thermal resistance (RTH) has been extracted for various geometries of the device using measurements and validated using TCAD-thermal simulations

This thesis is concerned with the design and implementation of radio frequency (RF) power amplifiers and micro-electromechanical systems---namely MEMS varactors. This is driven by the many wireless communication systems which are constantly moving towards increased integration, better signal quality, and longer battery life.
The power amplifier consumes most of the power in a receiver/transmitter system (transceiver), and its output signal is directly transmitted by the antenna without further modification. Thus, optimizing the PA for low power consumption, increased linearity, and compact integration is highly desirable.
Micro-electromechanical systems enable new levels of performance in radio-frequency integrated circuits, which are not readily available via conventional IC technologies. They are good candidates to replace lossy, low Q-factor off-chip components, which have traditionally been used to implement matching networks or output resonator tanks in class AB, class F, or class E power amplifiers. The MEMS technologies also make possible the use of new architectures, with the possibility of flexible re-configurability and tunability for multi-band and/or multi-standard applications.
The major effort of this thesis is focused on the design and fabrication of an RF frequency class AB power amplifier in the SiGe BiCMOS 5HP technology, with the capability of being tuned with external MEMS varactors. The latter necessitated the exploration of wide-tuning range MEMS variable capacitors, with prototypes designed and fabricated in the Metal-MUMPS process.
An attempt is made to integrate the power amplifier chip and the MEMS die in the same package to provide active tuning of the power amplifier matching network, in order to keep the efficiency of the PA constant for different input power levels and load conditions.
Detailed simulation and measurement results for all circuits and MEMS devices are reported and discussed.

Abstract. Constantly growing number of mobile data users, and thus the mobile data, creates challenges for spectral efficient data transmission. A high data throughput of a base station requires linear modulation methods and broadband signals. Radio frequency (RF) power amplifier (PA) as a part of base station has an important role making the output signal of the transceiver as linear and spectral efficient as possible. The key RF parameters such as peak power, efficiency, linearity and gain suffer from productional variety which needs to be taken into account in design process. In this thesis, the RF PA design is optimized to tolerate the productional variety of certain RF parameters. The effects of productional variety are pre-analyzed by building the design using corner sample transistors. The build consists of seven different PA module versions where the RF transistor’s internal matchings are modified. The best information of the PA performance is gathered from measurement results and therefore, the presented design optimization method is based on hardware measuring and tuning. Measurement results are compared to self-defined specification limits of each RF parameter and to the nominal version. Another method for analyzing a build which aims for illustrating large population of PA modules is statistical analysis. Along with the help of process capability index Cpk, the statistical behavior compared to the specification limits is evaluated. Peak power proved to be the optimized parameter. Changing the biasing of the transistor and tuning the external input matching network, the peak power results increased. The measurement results proved that the RF PA design is optimized to tolerate the productional variety better with the design optimization method presented in this thesis.RF-tehovahvistinsuunnittelun optimointi mittausdataa ja tilastollisia menetelmiä käyttäen. Tiivistelmä. Mobiilidatan käyttäjien, ja siten myös mobiilidatan määrä on jatkuvasti kasvussa, mikä luo haasteita spektritehokkaaseen datansiirtoon. Tukiaseman suuri datansyöttö vaatii laajakaistaisia signaaleja sekä lineaarisia modulointimenetelmiä. RF-tehovahvistimella on siis tärkeä rooli tukiaseman osana saada lähtösignaalista mahdollisimman lineaarinen ja spektritehokas. Tehovahvistimen RF-parametrit, kuten huipputeho, hyötysuhde, lineaarisuus sekä vahvistus kärsivät tuotannollisesta vaihtelusta, kun tehovahvistinmoduulia aletaan tuottaa suuria määriä. Tämän opinnäytetyön tarkoituksena on optimoida RF-tehovahvistimen suunnittelu sellaiseksi, että se on sietokykyinen tiettyjen RF-parametrien tuotannolliselle vaihtelulle. Tuotannollisen vaihtelun vaikutuksia analysoidaan etukäteen käyttämällä tehovahvistimessa kulmanäytetransistoria. Kulmanäytteet koostuvat seitsemästä erilaisesta versiosta, jossa RF-transistorin sisäisiä sovituksia on muunneltu. Paras tieto tehovahvistimen käyttäytymisestä saadaan mittaustuloksista, minkä takia työssä käytetään mittauksiin ja laitteiston hienosäätämiseen perustuvaa optimointimetodia. Kulmanäytteiden mittaustuloksia verrataan itse määrittelemiin RF-parametrien spesifikaatioihin sekä nominaaliversioon. Toinen analyysimetodi suuren tehovahvistinmoduulimäärän havainnollistamiseen on tilastollinen analyysi. Prosessin kyvykkyysindeksin Cpk analysoinnin kanssa, RF-parametrien tilastollinen käyttäytyminen spesifikaatiorajoihin verrattuna voidaan arvioida. Huipputeho osoittautui optimoitavaksi parametriksi. Transistorin biasoinnin muutoksella sekä tulon ulkoisen sovituspiirin muokkauksella huipputehoa saatiin kasvatettua. Mittaustulokset osoittavat, että työssä esitetyllä suunnittelun optimointimetodilla tehovahvistin saatiin sietämään tuotannollista vaihtelua paremmin.

Next generation mobile communication systems require the use of linear RF power amplifier for higher data transmission rates. However, linear RF power amplifiers are inherently inefficient and usually require additional circuits or further system adjustments for better efficiency. This dissertation focuses on the development of new efficiency enhancement schemes for linear RF power amplifiers. The multistage Doherty amplifier technique is proposed to improve the performance of linear RF power amplifiers operated in a low power level. This technique advances the original Doherty amplifier scheme by improving the efficiency at much lower power level. The proposed technique is supported by a new approach in device periphery calculation to reduce AM/AM distortion and a further improvement of linearity by the bias adaptation concept. The device periphery adjustment technique for efficiency enhancement of power amplifier integrated circuits is also proposed in this work. The concept is clearly explained together with its implementation on CMOS and SiGe RF power amplifier designs. Furthermore, linearity improvement technique using the cancellation of nonlinear terms is proposed for the CMOS power amplifier in combination with the efficiency enhancement technique. In addition to the efficiency enhancement of power amplifiers, a scalable large-signal MOSFET model using the modified BSIM3v3 approach is proposed. A new scalable substrate network model is developed to enhance the accuracy of the BSIM3v3 model in RF and microwave applications. The proposed model simplifies the modeling of substrate coupling effects in MOS transistor and provides great accuracy in both small-signal and large-signal performances.

The wireless market has experienced a remarkable development and growth since the introduction of the first modern mobile phone systems, with a steady increase in the number of subscribers, new application areas, and higher data rates. As mobile phones and wireless connectivity have become consumer mass markets, the prime goal of the IC manufacturers is to provide low-cost solutions. The power amplifier (PA) is a key building block in all RF transmitters. To lower the costs and allow full integration of a complete radio System-on-Chip (SoC), it is desirable to integrate the entire transceiver and the PA in a single CMOS chip. While digital circuits benefit from the technology scaling, it is becoming harder to meet the stringent requirements on linearity, output power, bandwidth, and efficiency at lower supply voltages in traditional PA architectures. This has recently triggered extensive studies to investigate the impact of different efficiency enhancement and linearization techniques, like polar modulation and outphasing, in nanometer CMOS technologies. This thesis addresses the potential of integrating linear and power-efficient PAs in nanometer CMOS technologies at GHz frequencies. In total eight amplifiers have been designed - two linear Class-A PAs, two switched Class-E PAs, and four Class-D PAs linearized in outphasing configurations. Based on the outphasing PAs, amplifier models and predistorters have been developed and evaluated for uplink (terminal) and downlink (base station) signals. The two linear Class-A PAs with LC-based and transformer-based input and interstage matching networks were designed in a 65nm CMOS technology for 2.4GHz 802.11n WLAN. For a 72.2Mbit/s 64-QAM 802.11n OFDM signal with PAPR of 9.1dB, both PAs fulfilled the toughest EVM requirement in the standard at average output power levels of +9.4dBm and +11.6dBm, respectively. The two PAs were among the first PAs implemented in a 65nm CMOS technology. The two Class-E PAs, intended for DECT and Bluetooth, were designed in 130nm CMOS and operated at low ‘digital’ supply voltages. The PAs delivered +26.4 and +22.7dBm at 1.5V and 1.0V supply voltages with PAE of 30% and 36%, respectively. The Bluetooth PA was based on thin oxide devices and the performance degradation over time for a high level of oxide stress was evaluated. The four Class-D outphasing PAs were designed in 65nm, 90nm, and 130nm CMOS technologies. The first outphasing design was based on a Class-D stage utilizing a cascode configuration, driven by an AC-coupled low-voltage driver, to allow a 5.5V supply voltage in a 65nm CMOS technology without excessive device voltage stress. Two on-chip transformers combined the outputs of four Class-D stages. At 1.95GHz the PA delivered +29.7dBm with a PAE of 26.6%. The 3dB bandwidth was  1.6GHz, representing state-of-the-art bandwidth for CMOS Class-D RF PAs. After one week of continuous operation, no performance degradation was noticed. The second design was based on the same Class-D stage, but combined eight amplifier stages by four on-chip transformers in 130nm CMOS to achieve a state-of-the-art output power of +32dBm for CMOS Class-D RF PAs. Both designs met the ACLR and modulation requirements without predistortion when amplifying uplink WCDMA and 20MHz LTE signals. The third outphasing design was based on two low-power Class-D stages in 90nm CMOS featuring a harmonic suppression technique, cancelling the third harmonic in the output spectrum which also improves drain efficiency. The proposed Class-D stage creates a voltage level of VDD/2 from a single supply voltage to shape the drain voltage, uses only digital circuits and eliminates the short-circuit current present in inverter-based Class-D stages. A single Class-D stage delivered +5.1dBm at 1.2V supply voltage with a drain efficiency and PAE of 73% and 59%, respectively. Two Class-D stages were connected to a PCB transformer to create an outphasing amplifier, which was linear enough to amplify EDGE and WCDMA signals without the need for predistortion. The fourth outphasing design was based on two Class-D stages  connected to an on-chip transformer with peak power of +10dBm. It was used in the development of a behavioral model structure and model-based phase-only predistortion method suitable for outphasing amplifiers to compensate for both amplitude and phase mismatches. In measurements for EDGE and WCDMA signals, the predistorter improved the margin to the limits of the spectral mask and the ACLR by more than 12dB. Based on a similar approach, an amplifier model and predistortion method were developed and evaluated for the +32dBm Class-D PA design using a downlink WCDMA signal, where the ACLR was improved by 13.5dB. A least-squares phase predistortion method was developed and evaluated for the +30dBm Class-D PA design using WCDMA and LTE uplink signals, where the ACLR was improved by approximately 10dB.

PONTIFÍCIA UNIVERSIDADE CATÓLICA DO RIO DE JANEIRO
Este trabalho descreve o desenvolvimento completo de um Amplificador de Potência de RF para Transceptores Multibanda. Em sua etapa inicial mostra um apanhado geral da teoria de todos os parâmetros relevantes para a medida de desempenho desses dispositivos, como potência, ganho e parâmetros de não linearidades. Em seguida são expostas as teorias básicas para o entendimento dos mecanismos para extração da máxima potência de um transistor, focando nos transistores de efeito de campo FET, incluindo a caracterização para regimes de alta potência. São apresentados os modos de operação de um amplificador de potência, focando nos chamados modos clássicos, dado que esses modos são convenientes para operação em banda larga. Para a correta operação de qualquer dispositivo que apresente ganho, a análise de estabilidade é apresentada com o procedimento de estabilização de transistores. A partir de todo o apanhado teórico, é desenvolvida uma metodologia de projeto de amplificadores de potência utilizando a ferramenta de simulação computacional Advanced Design System. Então, após toda a modelagem do amplificador, a construção e medidas são realizadas e boa concordância com a simulação foi obtida.
This work describes the full development of a RF Power Amplifier for Multiband Transceivers. In its initial stage shows an overview of the theory of all relevant parameters to measure the performance of these devices, like power, gain and nonlinearity parameters. Then it exposes the basic theories for the understanding of the mechanisms for extracting the maximum power of a transistor, focusing on field effect transistors FET, including characterization for regimes of high power. It presents the modes of operation of a power amplifier, focusing on so-called classical modes, since these modes are suitable for broadband operation. For proper operation of any device that presents gain, the stability analysis is presented with the stabilization procedure of transistors. From all theoretical basis, is developed a design methodology of power amplifiers using the computational simulation tool Advanced Design System. So after all the amp modeling, construction and measurements are performed and good agreement was obtained with the simulation.

As the mobile phone is an essential accessory for everyone nowadays, predistortion for the RF power amplifiers in mobile phone systems becomes more and more popular. Especially, new predistortions for power amplifiers with both nonlinearities and memory effects interest the researchers. In our thesis, novel predistortion techniques are presented for this purpose. Firstly, we improve the digital injection predistortion in the frequency domain. Secondly, we are the first authors to propose a novel predistortion, which combines digital LUT (Look-up Table) and injection. These techniques are applied to both two-tone tests and 16 QAM (Quadrature Amplitude Modulation) signals. The test power amplifiers vary from class A, inverse class E, to cascaded amplifier systems. Our experiments have demonstrated that these new predistortion techniques can reduce the upper and lower sideband third order intermodulation products in a two-tone test by 60 dB, or suppress the spectral regrowth by 40 dB and reduce the EVM (Error Vector Magnitude) down to 0.7% rms in 16 QAM signals, disregarding whether the tested power amplifiers or cascade amplifier systems exhibit significant nonlinearities and memory effects. i

Thesis (M. Eng.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2007.
This electronic version was submitted by the student author. The certified thesis is available in the Institute Archives and Special Collections.
Includes bibliographical references (p. 95-98).
Electrical stresses in the transistors of high-efficiency switching power amplifiers can lead to hot-electron-induced "breakdown" in these devices. This thesis explores issues related to breakdown in the Transcom TC2571 PHEMT, and the effects this has on the Draper Laboratory 2.3 GHz microwave power amplifier in which the transistor is used. Characterization of breakdown was performed under DC and RF drive conditions, and shows the surprising role of impact ionization at low temperatures in DC off-state breakdown, as well as the apparent prevalence of on-state breakdown under RF drive. DC characterization shows that breakdown walkout and recovery both proceed more quickly at higher temperatures, and also shows that breakdown stress might lead to the permanent creation of traps that degrade breakdown voltage. Walkout under RF drive decreases amplifier gain at lower levels of RF input drive, but appears to have no negative effect on amplifier saturated output power. The use of temperature-compensated input drive and a diode to clamp negative gate voltage swing are also explored as circuit design techniques that can mitigate device degradation due to breakdown stress.
by Gautham Venkat Arumilli.
M.Eng.

Thesis (MTech(Electrical Engineering))--Cape Peninsula University of Technology, 2006.
Electronic communication systems have become an integral part of our everyday lives. RF (Radio Frequency) power amplifiers form part of the fundamental building blocks of an electronic communication system. RF power amplifiers can also be one of the major causes of distortion in an electronic communication system. This thesis describes the linearity requirement for a RF power amplifier that is used in a transmitter section of an electronic communication system. Furthermore, five different linearisation techniques are presented and their characteristics compared. Since a power amplifier employing the Feedforward linearisation technique was designed, built and tested, this thesis focuses on the Feedforward technique. The design methods for the various Feedforward components are presented. The measured parameters of the Feedforward linearised amplifier are compared with the measured parameters of a non-linearised amplifier.

The objective of this research is to develop, characterize, and demonstrate novel parametric architectures capable of wideband operation while maintaining high gain and stability. To begin the study, phase-incoherent upconverting parametric amplifiers will be explored by first developing a set of analytical models describing their achievable gain and efficiency. These models will provide a set of design tools to optimize and evaluate prototype circuit boards. The prototype boards will then be used to demonstrate their achievable gain, bandwidth, efficiency, and stability. Further investigation of the analytical models and data collected from the prototype boards will conclude bandwidth and gain limitations and end the investigation into phase-incoherent upconverting parametric amplifiers in lieu of negative-resistance parametric amplifiers. Traditionally, there were two versions of negative-resistance parametric amplifiers available: degenerate and non-degenerate. Both modes of operation are considered single-frequency amplifiers because both the input and output frequencies occur at the source frequency. Degenerate parametric amplifiers offer more power gain than their non-degenerate counterpart and do not require additional circuitry for idler currents. As a result, a phase-coherent degenerate parametric amplifier printed circuit board prototype will be built to investigate achievable gain, bandwidth, and stability. Analytical models will be developed to describe the gain and efficiency of phase-coherent degenerate parametric amplifiers. The presence of a negative resistance suggests the possibility of instability under certain operating conditions, therefore, an in-depth stability study of phase-coherent degenerate parametric amplifiers will be performed. The observation of upconversion gain in phase-coherent degenerate parametric amplifiers will spark investigation into a previously unknown parametric architecture: phase-coherent upconverting parametric amplifiers. Using the phase-coherent degenerate parametric amplifier prototype board, stable phase-coherent upconversion with gain will be demonstrated from the source input frequency to its third harmonic. An analytical model describing the large-signal transducer gain of phase-coherent upconverting parametric amplifiers from the first to the third harmonic of the source input will be derived and validated using the prototype board and simulations.

Thesis (Ph.D)--Electrical and Computer Engineering, Georgia Institute of Technology, 2010.
Committee Chair: Laskar, Joy; Committee Member: Cressler, John; Committee Member: Kohl, Paul; Committee Member: Kornegay, Kevin; Committee Member: Tentzeris, Emmanouil. Part of the SMARTech Electronic Thesis and Dissertation Collection.

This thesis focuses on class A radio frequency power amplifiers in dynamic supply modulation architectures (dynamic bias). These are promising efficiency enhancement techniques where the device is driven harder by varying its bias signals. Non linearities that arise are considered as digitally compensated through, for example, digital predistortion (DPD). Bias signals are meant as functions of the PA?s output power level (P out). Therefore, the input power level (P in) as well as the feeding signals are thought as quantities the amplifier need to give a certain P out. The selected set of bias points the device sweeps through is called bias trajectory or bias path. A tool to find a suitable bias trajectory is developed considering the requirements a class A power amplifier should satisfy: high power added efficiency, acceptable gain and output phase variations as P out changes (allowing a DPD algorithm to be effective), low harmonic distortion and not too complicated bias signals patterns. The tool consists of two softwares: ADS and Matlab. ADS simulates the device under test while Matlab allows the user to analyze the data and find a suitable bias path. Once a trajectory is identified, ADS can sweep along it and give more information on linearity and efficiency through, for instance, 2-tone harmonic balance simulations. Note that only static characteristics are evaluated and memory effects disregarded. The path searching algorithm is then applied to a HBT transistor, at a frequency of 1.9GHz and to a complete pHEMT class A PA (frequency of 6Ghz). In both cases a suitable trajectory is identified and analyzed back in ADS. The Matlab plots are qualitatively similar to each other when switching form one device to another. The HBT transistor has then been tested in the laboratory and static measurements have been performed showing good agreement with simulations. Keywords: Bias trajectory, dynamic bias, efficiency, HBT, linearity, pHEMT, power amplifier

Today, ESD is a major consideration in the design and manufacture of ICs. ESD problems are increasing in the electronics industry because of the increasing trend toward higher speed and smaller device sizes. There is growing interest in knowing the effects of ESD protection circuit on the performance of semiconductor integrated circuits (ICs) because of the impact it has on core RF circuit performance. This study investigated the impact of ESD protection circuit on RF Power amplifiers. Even though ESD protection for digital circuits has been known for a while, RF-ESD is a challenge. From a thorough literature search on prior art ESD protection circuits, Silicon controlled rectifier was found to be most effective and reliable ESD protection for power amplifier circuit. A SCR based ESD protection was used to protect the power amplifier and a model was developed to gain better understanding of ESD protected power amplifiers. Simulated results were compared and contrasted against theoretically derived equations. A 5.2GHz fully ESD protected Class AB power amplifier was designed and simulated using TSMC 0.18 micrometer] technology. Further, the ESD protection circuit was added to a cascoded Class-E power amplifier operating at 5.2 GHz. ADS simulation results were used to analyze the PA's RF performance degradation. Various optimization techniques were used to improve the RF circuit performance.
ID: 029809372; System requirements: World Wide Web browser and PDF reader.; Mode of access: World Wide Web.; Thesis (M.S.)--University of Central Florida, 2011.; Includes bibliographical references.
M.S.
Masters
Electrical Engineering and Computer Science
Engineering and Computer Science

In recent years, tremendous growth of the wireless market can be defined through the following words: smartphone and high-data rate wireless communication. This situation gives new challenges to RF power amplifier design, which includes high-efficiency, multi-band operation, and robustness to antenna mismatch conditions. In addition to these issues, the industry and consumers demand a low-cost small-sized wireless device. A fully integrated single-chip CMOS transceiver is the best solution in terms of cost and level of integration with other functional blocks. Therefore, the effective approaches in a CMOS process for the abovementioned hurdles are highly desirable. In this dissertation, the new challenges are overcome by introducing adaptability to a CMOS power amplifier. Meaningful achievements are summarized as follows. First, a new CMOS switched capacitor structure for high power applications is proposed. Second, a dual-mode CMOS PA with an integrated tunable matching network is proposed to extend battery lifetime. Third, a switchless dual-band matching structure is proposed, and the effectiveness of dual-band matching is demonstrated with a fully-integrated CMOS PA. Lastly, a reconfigurable CMOS PA with an automatic antenna mismatch recovery system is presented, which can maintain its original designed performance even under various antenna mismatch conditions. Conclusively, the research in this dissertation provides various solutions for new challenges of advanced mobile terminals.

This thesis presents the design process of a class E RF power amplifier and a transmitter in a standard CMOS technology. CMOS radio frequency class-E power amplifiers (PA) for GMSK/GFSK modulations have been designed and fabricated using 0.25/0.35mum technologies. The operating frequencies are centered at 1.2GHz and 2.65GHz with 24--26dBm output power. In order to reduce the driving requirement, mode locking techniques are employed for both designs. High efficiency broadband off-chip hybrid ring baluns are used at both input and output for converting signals from single-ended to differential and vice versa. Regular bonding wires are used as inductors for the 1.2GHz PA, and on-chip bondwires are used for the 2.65GHz PA. With a 1.3V supply, the measured power added efficiency (PAE) of the 1.2GHz PA, after taking into account the losses in the baluns, is 62%. The PAE for the 2.65GHz PA is 38% when operated from a 1.7V power supply. Furthermore, a transmitter stage for 5.5GHz frequency application has been designed and simulated using a 0.18mum CMOS technology. The design and layout is completed, with a simulation frequency of 5.9GHz and an output signal of 7dBm.

Background:

The task of this thesis is to investigate the possibility of using non-linear high efficiency switching power amplifiers with spectrally efficient varying envelope modulation schemes and, if possible, further investigate such a solution on a high level.

The thesis focuses on the theory necessary to understand the technical issues related to power amplifiers and the procedures behind simulating and measuring the characteristics of different power amplifier configurations. The thesis also covers basic theory behind Delta-Sigma-modulators. The theory is needed to draw conclusions about the feasibility of using a Delta-Sigma-modulator as input to a switching amplifier.

Results:

Using a Delta-Sigma-modulated input to a switching amplifier inherently degrades the performance, mainly because of poor coding efficiency and high switching activity. However, by merely using a switching amplifier as a mixer it is shown to be possible to transmit a non-constant envelope signal, with digital logic. The resulting circuit is, however, not an amplifier and it should not be seen as the final result. As already mentioned: the result lies in the investigation of a using Delta-Sigma-modulator as input to a switching amplifier.

Conclusion:

From this investigation we believe that the widely known technique: pulse width modulation (PWM), together with a tuned switching amplifier and some linearization technique, for example pre-distortion, is a better way to go. Much effort should be put in understanding the fundamental limits and possibilities of an efficient tuned switching power amplifier.

Development of linear modulation schemes has opened the way for spectrally efficient, high speed digital communication systems for voice and data applications. A trend has been to develop ultra wide and wide bandwidth modulation formats, which has meant feedback linearisation schemes (both analogue and digital) are no longer effective. This has in turn led to a number of approaches that involve predistorting the signal prior to amplification, with a characteristic that is the inverse to that of the power amplifier (PA). This thesis presents a polynomial based predistortion for linearisation of an RF PA. The predistortion characteristic is adaptive, using the LMS algorithm to minimise the mean squared error between output of the PA, and a scaled version of the baseband signal. This system can reduce third-order intermodulation by 40 dB when running in real time.

The demands for high data rates and broadband wireless access require the development of wireless systems that can support wide and multi-band signals. To deploy these signals, new radio frequency (RF) front-ends are required which impose new challenges in terms of power consumption efficiency and sources of distortion e.g., nonlinearity. These challenges are more pronounced in power amplifiers (PAs) that degrade the overall performance of the RF transmitter. Since it is difficult to optimize the linearity and efficiency characteristics of a PA simultaneously, a trade-off is needed. At high input power, a PA exhibits high efficiency at the expense of linearity. On the other hand, at low input power, a PA is linear at the expense of the efficiency. To achieve linearity and efficiency at the same time, digital pre-distortion (DPD) is often used to compensate for the PA nonlinearity at high input power. In case of multi-channel PAs, input and output signals of different channels interact with each other due to cross-talk. Therefore, these PAs exhibit different nonlinear behavior than the single-input single-output (SISO) PAs. The DPD techniques developed for SISO PAs do not result in adequate performance when used for multi-channel PAs. Hence, an accurate behavioral modeling is essential for the development of DPD for multi-channel RF PAs. In this thesis, we propose three novel behavioral models and DPD schemes for nonlinear multiple-input multiple-output (MIMO) transmitters in presence of cross-talk. A study of the source of cross-talk in MIMO transmitters have been investigated to derive simple and powerful modeling schemes. These models are extensions of a SISO generalized memory polynomial model. A comparative study with a previously published MIMO model is also presented. The effect of coherent and partially non-coherent signal generationon DPD performance is also highlighted. It is shown experimentally that with partially non-coherent signal generation, the performance of the DPD degrades compared to coherent signal generation. In context of multi-channel RF transmitters, PA behavioral models and DPD schemes suffer from a large number of model parameters with the increase in nonlinear order and memory depth. This growth leads to high complexity model identification and implementation. We have designed a DPD scheme for MIMO PAs using a sparse estimation technique for reducing model complexity. This technique also increases the numerical stability when linear least square estimation model identification is used. A method to characterize the memory effects in a nonlinear concurrent dual-band PAs is also presented. Compared to the SISO PAs, concurrent dual-band PAs are not only affected by intermodulation distortions but also by cross-modulation distortions. The characterization of memory effects inconcurrent dual-band transmitter is performed by injecting a two-tone test signal in each input channel of the transmitter. Asymmetric energy surfaces are introduced for the intermodulation and cross-modulation products, which can be used to identify the power and frequency regions where the memory effects are dominant.

QC 20141217

Este trabalho apresenta o projeto de um amplificador de potência (PA) de rádio-frequência (RF) linear em tecnologia complementar metal-oxido silício (CMOS). Nele são analisados os desafios encontrados no projeto de PAs CMOS assim como soluções encontradas no estado-da-arte. Um destes desafios apresentados pela tecnologia é a baixa tensão de alimentação e passivos com alta perda, o que limita a potência de saída e a eficiência possível de ser atingida com métodos tradicionais de projeto de PA e suas redes de transformação de impedância. Este problema é solucionado através do uso de redes de combinação de impedância integradas, como a usada neste trabalho chamada transformador combinador em série (SCT). Os problemas com o uso de tecnologia CMOS se tornam ainda mais críticos para padrões de comunicação que requerem alta linearidade como os usados para redes sem-fio locais (WLAN) ou padrões de telefonia móvel 3G e 4G. Tais protocolos requerem que o PA opere em uma potência menor do que seu ponto de operação ótimo, degradando sua eficiência. Técnicas de linearização como pré-distorção digital são usadas para aumentar a potência média transmitida. Uma ténica analógica de compensação de distorção AM-PM através da linearização da capacitância de porta dos transistores é usada neste trabalho. O processo de projeto é detalhado e evidencia as relações de compromisso em cada passo, particularmente o impacto da terminação de harmônicos e a qualidade dos passivos na rede de transformação de carga. O projeto do SCT é otimizado para sintonia da impedância de modo comum que é usada para terminar o segundo harmonico de tensão do amplificador. O amplificador projetado tem um único estágio devido a área do chip ser limitada a 1:57 x 1:57 mm2, fato que impacta seu desempenho. O PA foi analisado através de simulação numérica sob várias métricas. Ele atinge uma potência máxima de saída de 24:4 dBm com uma eficiência de dreno de 24:53% e Eficiência em adição de potência (PAE) de 22%. O PA possui uma curva de ganho plana em toda faixa ISM de 2.4 GHz, com magnitude de 15:8 0:1dB. O PA tem um ponto de compressão de OP1dB = 20:03 dBm e o sinal tem um defasamento não-linear de = 1:2o até esta potência de saída. Um teste de intermodulação de dois tons com potência 3dB abaixo do OP1dB tem como resultado uma relação entre intermodulação de terceira ordem e fundamental de IMD3 = 24:22 dB, e de quinta ordem inferior e superior e fundamental de IMD5Inferior = 48:16 dB e IMD5Superior = 49:8 dB. Por fim, mostra-se que o PA satisfaz os requerimentos para operar no padrão IEEE 802.11g. Ele atinge uma potência média de saída de 15:4 dBm apresentando uma magnitude do vetor erro (EVM) de 5:43%, ou 25:3 dB e satisfazendo a máscara de saída para todos os canais.
This work presents the design of a fully integrated Radio-frequency (RF) linear Power Amplifier( PA) in complementary metal-oxide silicon (CMOS) technology. In this work we analyse the challenges in CMOS PA design as well as the state-of-the-art solutions. One such challenge presented by this technology is the low supply voltage and high-loss passives, which pose severe limits on the output power and efficiency achieved with traditional PA design methods and load impedance transformation networks. This issue is addressed by the use of on-chip, highly efficient power combining networks such as the one in this work: A series combining transformer (SCT). The problem of using CMOS becomes even more critical for recent communications standards that require high transmitter linearity such as the ones used for wireless local area network (WLAN) or 3G and 4G mobile communications. This requirement is such that the PA operate at a high power back-off from its optimum operating point, degrading efficiency. To address this problem linearization techniques such as digital pre-distortion can be used in order to decrease the necessary power back-off. In this work an analog technique of AM-PM distortion compensation is used to linearize the capacitance at the input of the amplifier’s transistors and reduce this type of distortion that severely impacts the error vector magnitude (EVM) of the signal. The design process is detailed and aims to make evident the trade-offs of PA design and particularly the impact of harmonic termination and the quality of passives on the load transformation network, the series combining transformer design is optimized for common-mode impedance tuning used for 2nd harmonic termination. The circuit has only a single amplifying stage due to its area being limited to 1:57 x 1:57 mm2 and the design is very constrained by this fact. The PA simulated performance is analyzed under various metrics. It achieves a simulated maximum output power of 24:4 dBm with a drain efficiency of 24:53% and power added efficiency (PAE) of 22%. The PA has a very flat power gain of 15:8 0:1 dB throughout the 2.4 GHz industrial, scientific and medical (ISM) band and is unconditionally stable with 4:9. The PA has a compression point of OP1dB = 20:03 dBm and the signal has a non-linear phase shift of = 1:2o up to this output power. A two-tone intermodulation test with 3dB back-off from OP1dB has a ratio of third-order intermodulation to fundamental of IMD3 = 24:22 dB, and lower and upper fifth order intermodulation to fundamental of IMD5Lower = 48:16 dB and IMD5Upper = 49:8 dB. Finally the PA is shown to satisfy the requirements for operation within the institute of electrical and electronic engineers (IEEE) 802.11g standard. It achieves an average output power of 15:4 dBm while having an EVM of 5:43% or 25:3 dB while satisfying the output spectrum mask for all channels.

In modern wireless communication systems, advanced modulation techniques are used to support more users by handling high data rates and to increase the utilization efficiency of the limited RF spectrum. These techniques are sensitive to the nonlinear distortions due to their high peak to average power ratios. Main source of nonlinear distortion in transmitter topologies are power amplifiers that determine the overall efficiency and linearity of the transmitter. To increase linearity without sacrificing efficiency, power amplifier linearization techniques may be a choice. Baseband predistortion technique is known to be one of the optimum methods due to its relatively low complexity and its convenience for adaptation. In this thesis, different memoryless baseband signal predistortion methods are investigated and analyzed by simulations. Look-Up Table(LUT) and Polynomial approaches are compared and LUT approach is found to be better in performance. Parameters, like indexing, training sequences and training duration are evaluated. An open loop testbench is built with a real amplifier and a different LUT predistortion method that is based on amplifier modeling is offered. It is evaluated by using two tone test and adjacent channel power suppression with 8PSK data. Also, some Look-Up Table parameters are re-investigated with the proposed method. The performances of the proposed method in dierent amplifier classes are observed. Along with these studies, a list of prerequisites for design of a predistortion system is determined.

Power amplifiers (PAs) are one of the most crucial elements in wireless standards becasue they are the most power hungry subsystems. These elements have to face an important issue, which is the power efficiency, a fact related with the output back-off (OBO). But the OBO depends on the kind of modulated signal, in proportion to the modulated signal peak-to-average power ratio (PAPR). The higuer is the data rate, the higer is the OBO, and consequently the lower is the efficiency. A low efficiency of PAs causes the waste of energy as heat. Furthermore, the trade-off between linearity and efficiency in PAs is another major issue. To cope with the undesired circumstances producing efficiency degradation, the Doherty power amplifier (DPA) is one of the useful techniques which provide high efficiency for high PAPR of modern communication signals. Nevertheless, the limited bandwidth (BW) of this kind of PAs (about 10% of fractional bandwidth) and its importance (in modern wireless systems such as LTE, WiMAX, Wi-Fi and satellite systems) have encouraged the researchers to improve this drawback in recent years. Some typical BW limiting factors effect on the performance of DPAs: i) quarter-wave length transformers, ii) phase compensation networks in/output matching circuits, iii) offset lines and device non-idealities; The quarter-wave length transformers performs as an inverter impedance in the load modulation technique of DPAs. The future objective in designing DPAs is to decrease the impact of these issues. In this context, this PhD-thesis is focused on improving fractional bandwidth of DPAs using the new methods that are related to impedance transformers instead of impedance inverters in the load modulation technique. This study is twofold. First, it is presented a novel DPA where a wideband GaN DPA in the 2.5 GHz band with an asymmetrical Wilkinson splitter. The impedance transformer of the proposed architecture is based on a matching network including a tapered line with multi-section transformer in the main stage. The BW of this DPA has ranged from 1.8 to 2.7 GHz. Plus, the obtained power efficiency (drain) is higher than 33% in the whole BW at both maximum and OBO power levels. Second, based on the benefits of the Klopfenstein taper, a promising DPA design is proposed where a Klopfenstein taper replaces the tapered line. In fact, this substitution results on reducing the reflection coefficient of the transformer. From a practical prototype realization of this novel Doherty-like PA in the 2.25 GHz band, this modification has demonstrated that the resulting DPA BW is increased in comparison to the conventional topology while keeping the efficiency figures. Moreover, this study also shows that the Klopfenstein taper based design allows an easy tuning of the group delay through the output reactance of the taper, resulting in a more straightforward adjustments than other recently published designs where the quarter-wave transformer is replaced by multi-section transmission lines (hybrid or similar). Experimental results have shown 43-54% of drain efficiency at 42 dBm output power, in the range of 1.7 to 2.75 GHz. Concretely, the results presented in this novel Doherty-like PA implies an specific load modulation technique that uses the mixed Klopfenstein tapered line together with a multi-section transformer in order to obtain high bandwidth with the usual efficiency in DPAs.
Los amplificadores de potencia (PAs) son uno de los elementos más importantes para los transmisores inalámbricos desde el punto de vista del consumo energético. Un aspecto muy importante es su eficiencia energética, un concepto relacionado con el back-off de salida (OBO), que a su vez viene condicionadpo por el PAPR de la señal modulada a amplificar. Una baja eficiencia de los PA hace que la pérdida de energía se manifieste en forma de calor. De hecho, esta cuestión conduce al incremento de los costes y tamaño, esto último por los radiadores. Además, el compromiso entre la linealidad y la eficiencia en los PA es otro problema importante. Para hacer frente a las circunstancias que producen la degradación de la eficiencia, el amplificador de potencia tipo Doherty (DPA) es una de las técnicas más útiles que proporcionan una buena eficiencia incluso para los altos PAPR comunes en señales de comunicación modernos. Sin embargo, el limitado ancho de banda (BW) de este tipo de PA (alrededor del 10% del ancho de banda fraccional) y su importancia (en los sistemas inalámbricos modernos, tales como LTE, WiMAX, Wi-Fi y sistemas de satélites) han animado a los investigadores para mejorar este inconveniente en los últimos años. Algunos aspectos típicos que limitan el BW en los DPA son: i) transformadores de longitud de cuarto de onda, ii) redes de compensación de fase y circuitos de adaptación de salida, iii) compensación de las líneas y los dispositivos no ideales. Los transformadores de cuarto de onda actuan como un inversor de impedancia en la técnica de modulación de carga de la DPA "("load modulation"). Concretamente, el objetivo futuro de diseño de DPA es disminuir el impacto de estos problemas. En este contexto, esta tesis doctoral se centra en mejorar el ancho de banda fraccional de DPA utilizando los nuevos métodos que están relacionados con el uso de transformadores de impedancias en vez de inversores en el subcircuito de modulación de carga. Este estudio tiene dos niveles. En primer lugar, se presenta una novedosa estructura del DPA de banda ancha usándose dispositivos de GaN en la banda de 2,5 GHz con un divisor Wilkinson asimétrico. El transformador de impedancias de la arquitectura propuesta se basa en una red de adaptación, incluyendo una línea cónica con múltiples secciones del transformador en la etapa principal. El BW de este DPA ha sido de 1,8 a 2,7 GHz. Además, se obtiene una eficiencia de drenador de más del 33% en todo el BW, tanto a nivel de potencia máxima como a nivel del OBO. En segundo lugar, aprovechando los beneficios de un adaptador de Klopfenstein, se propone un nuevo diseño del DPA. Con la sustitución de la lina conica por el Klopfenstein se reduce el coeficiente de reflexión de transformador de impedancias. Sobre un prototipo práctico de esta nueva estructura del Doherty, en la banda de 2,25 GHz, se ha demostrado que el BW resultante se incrementa en comparación con la topología convencional mientras se mantienen las cifras de eficiencia. Por otra parte, en este estudio se demuestra que el diseño basado en el Klopfenstein permite una afinación fácil del retardo de grupo a través de la reactancia de salida del taper, lo que resulta en un ajuste más sencillo que otros diseños publicados recientemente en el que el transformador de cuarto de onda se sustituye por multi-líneas de transmisión de la sección (híbridos o similar). Los resultados experimentales han mostrado un 43-54% de eficiencia de drenador sobre 42 dBm de potencia de salida, en el intervalo de 1,7 a 2,75 GHz. Concretamente, los resultados presentados en esta nueva estructura tipo-Doherty implican una técnica de modulación de carga que utiliza una combinación de un Klopfenstein junto con un transformador de múltiples secciones con el fin de obtener un alto ancho de banda con la eficiencia habitual en DPAs.
Els amplificadors de potència (PA) són un dels elements més importants per els sistemes ràdio ja que sone ls principals consumidors d'energía. Un aspecte molt important és l'eficiència de l'amplificador, aspecte relacionat amb el back-off de sortida (OBO) que a la seva vegada ve condicionat pel PAPR del senyal modulat. Una baixa eficiència dels PA fa que la pèrdua d'energia en manifesti en forma de calor. De fet, aquesta qüestió porta a l'increment dels costos i grandària, degut als dissipadors de calor. A més, el compromís entre la linealitat i l'eficiència en els PA es un altre problema important. Per fer front a les circumstàncies que porten a la degradació de l'eficiència, l'amplificador de potència Doherty (DPA) és una de les tècniques més útils i que proporcionen una bona eficiència per als alts PAPR comuns en senyals de comunicació moderns. No obstant això, l'ample de banda limitat (BW) d'aquest tipus de PA (al voltant del 10% de l'ample de banda fraccional) i la seva importància (en els sistemes moderns, com ara LTE, WiMAX, Wi-Fi i sistemes de satèl·lits) han animat els investigadors per millorar aquest inconvenient en els últims anys. Alguns aspectes tipicament limitadors del BW en els DPA son: i) transformadors de longitud d'quart d'ona, ii) xarxes de compensació de fase en circuits / adaptacions de sortida, iii) compensació de les línies i els dispositius no ideals. Els transformadors de quart d'ona s'utilitzen com a inversors d'impedàncies en la tècnica de modulació de càrrega del DPA ("load modulation"). Concretament, l'objectiu futur de disseny d'DPA és disminuir l'impacte d'aquests problemes. En aquest context, aquesta tesi doctoral es centra en millorar l'ample de banda fraccional dels DPA utilitzant nous mètodes que estan relacionats amb l'ús de transformadors d'impedàncies, en comptes d'inversors, en el subcircuit de modulació de càrrega. Aquest treball té dos nivells. En primer lloc, es presenta un DPA novedós que fa servir dispositus GaN DPA a la banda de 2,5 GHz amb un divisor Wilkinson asimètric. El transformador d'impedàncies de l'arquitectura proposada es basa en una xarxa d'adaptació, incloent una línia cònica amb múltiples seccions del transformador en l'etapa principal. El BW d'aquest DPA ha mostrat ser d'1,8 a a 2,7 GHz. A més, s'obté una eficiència de drenador de més del 33% en tot el BW, tant a nivell de potència màxima com de OBO. En segon lloc, sobre la base dels beneficis del adaptador de Klopfenstein, un proposa un nou disseny on un Klopfenstein substitueix la anterior línia cònica. Aquesta substitució repercuteix en la reducció del coeficient de reflexió de transformador d'impedàncies.Des d'una realització pràctica (prototipus) d'aquest nou amplificador tipus Doherty a la banda de 2,25 GHz, s'ha demostrat que el BW resultant s'incrementa en comparació amb la topologia convencional mentre es mantenen les xifres d'eficiència. D'altra banda, en aquest estudi es demostra que el disseny basat en el Klopfenstein permet una afinació fàcil del retard de grup a través de la reactància de sortida de la forma cònica, el que resulta en un ajust més senzill que altres dissenys publicats recentment en què el transformador de quart d'ona es substitueix per multi-línies de transmissió de la secció (híbrids o similar). Els resultats experimentals han mostrat un 43-54% d'eficiència de drenador en 42 dBm de potència de sortida, en l'interval de 1,7-2,75 GHz. Concretament, els resultats presentats en aquest nou amplificador tipus Doherty impliquen una tècnica de modulació de càrrega específic que utilitza una combinació del Klopfenstein juntament amb un transformador de múltiples seccions per tal d'obtenir un alt ample de banda amb la usual eficiència en DPAs.

Thesis (Ph. D.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2012.
Cataloged from PDF version of thesis.
Includes bibliographical references (p. 123-126).
Power amplifiers are the circuit blocks in wireless transceivers that require the largest power budget because of their relatively low efficiencies. RF designers cannot depend solely on the development better semiconductor devices in advanced deeply scaled process technologies to obtain improved power amplifier performance. The development of new and better circuits, architectures and design methodologies to maximally exploit the available semiconductor devices is very important as well. This thesis investigates a number of techniques that can be used to improve the efficiency of power amplifiers and break the power-frequency tradeoff in power amplifier design. The first technique emphasizes the use of a class E tuned output network as an efficiency enhancement tool for power amplifiers regardless of their bias conditions. A Class E tuned CMOS power amplifier (PA) operating in the 60 GHz band was designed. Design, layout, and parasitic modeling considerations to attain high-efficiency millimeter-wave PA operation are discussed. Both single-ended and differential versions of the single-stage PA were implemented in a 32 nm SOI CMOS process. Peak power added efficiency of 27% (30%), power gain of 8.8 dB (10 dB), and saturated output power > 9 dBm (12.5 dBm) were measured at 60 GHz from the single-ended (differential) PA with 0.9 V supply. The second technique investigated the efficacy of resistance compression networks in an energy recycling network operating at multi-gigahertz frequencies. The resistance compression network reduces the variation in resonant rectifier input impedance seen at the isolation port of an isolating power combiner. The system was operated at 2.14 GHz and was built around Schottky barrier diodes custom fabricated in a 0.13 [mu]m CMOS process. It is the first experimental demonstration that resistance compression networks can be used for energy recycling in multi-gigahertz applications.
by Olumuyiwa Temitope Ogunnika.
Ph.D.

In modern wireless communication systems, a base station typically serves a few hundred users within its cell coverage. To combat the near-far problem – the situation where a nearby user’s strong cellular signal masks the cellular signal of a faraway user – base stations continually enforce power control. That is, nearby users must lower their transmit power. In CDMA technology, power control can be as large as 70-80dB. At low power outputs, this greatly impacts the performance of the RF power amplifier (PA) in the cellular device. For small RF drives, the magnitude of the output RF current approaches the magnitude of the DC current and thus the efficiency suffers. Operating the RF PA in class C operation improves the efficiency, but results in poor linearity. Several methods of so-called dynamic biasing have been proposed. These strategies entail lowering the bias of the PA as the RF drive increases. The proposed methods, however, fail to explain how to achieve linearity and low third-order intermodulation distortion. Additionally, the methods utilize open-loop implementations. This work presents a novel dynamic biasing topology that results in a much improved linear class C PA. The topology utilizes a closed loop that cleverly senses the operating conditions of the "power device." Particularly, the loop operates on the principle of keeping the conduction angle remarkably constant and thereby ensuring linearity. The work details a thorough design methodology that should provide assistance to a designer wanting to implement the topology in an RF integrated circuit. Agilent ADS simulations and laboratory results from a functional PCB prototype bring merit to the topology.

Abstract This thesis studies the design methods and properties of supply-modulated switch-mode radio frequency power amplifiers. Besides simulation based studies and theory review, two amplifiers were designed: a discrete MESFET class E amplifier (0.5 W at 1 GHz), and an integrated pHEMT class E-1 amplifier (2.0 W at 1.6 GHz) with an on-chip resonator. The existing design methods of the resonant output network of switching amplifiers were reviewed and some extensions on the handling of nonlinear capacitances were proposed. The effects of varying supply voltage were studied and suggestions were given to minimize Vdd / AM and Vdd / PM distortion in supply modulated amplifiers. The implementation of the bias feed was also discussed resulting in proposing a combination of a short transmission line and a small inductor, which provides both fast supply modulation and little effect on harmonic impedances. The main contributions are related to the study of the input impedance of a class E power amplifier, where the effects of supply dependent input impedance and timing skew generated by injected harmonic distortion were analyzed. The stabilization of the amplifier was also discussed. Based on the findings, a push-pull class E amplifier with extra cross-coupled feedback capacitors and second harmonic traps at the gates appears to be a very good starting point for a further study
Tiivistelmä Tämä väitöstyö käsittelee radiotaajuuksilla toimivien käyttöjännitemoduloitujen kytkintehovahvistimien ominaisuuksia ja suunnittelumenetelmiä. Suunnittelumenetelmiin liittyvän katsauksen ja simulaatioihin perustuvan tutkimusten lisäksi kaksi vahvistinta toteutettiin väitöstutkimuksen aikana: diskreettikomponentein toteutettu E-luokan vahvistin (MESFET, 0.5 W ja 1 GHz) ja integroituna piirinä toteutettu käänteinen E-luokan vahvistin (pHEMT, 2.0 W ja 1.6 GHz), jonka lähdön resonaattoripiiri sisällytettiin integroituun piiriin. Kytkinvahvistimien suunnittelumenetelmiä verrattiin ja kehitettiin edelleen siten, että suunnitteluvaiheessa voidaan ottaa huomioon esim. transistoripiirin takaisinkytkennässä olevan kapasitanssin epälineaarisuus. Työssä tutkittiin myös käyttöjännitemodulaation vaikutusta kytkinvahvistimien toimintaan, ja tutkimuksen tuloksena annettiin muutamia ehdotuksia käyttöjänniteriippuvan amplitudi- (Vdd / AM) ja vaihemodulaation (Vdd / PM) vähentämiseksi. Lähdön biasointipiirin toteutukseen suositeltiin pienen kelan ja siirtolinjan yhdistelmää. Yhdistelmän avulla pyritään maksimoimaan modulaationopeus ja minimoimaan vaikutukset harmonisiin impedansseihin. Pääkohtina väitöksessä ovat E-luokan kytkinvahvistimesta saadut tutkimus- ja mittaushavainnot käyttöjännitteen funktiona muuttuvasta transistorin tuloimpedanssista sekä suurikokoisen transistorin tuloissa tapahtuvan, säröytymisen aiheuttaman tulosignaalien ajoitusvirheen analyysi. Näiden lisäksi vahvistimen stabiilisuuteen kiinnitettiin huomiota. Saatujen havaintojen perusteella voimme todeta, että push-pull -tyyppinen E-luokan vahvistin olisi mielenkiintoinen valinta jatkotutkimuksille

The World today is deeply transformed by the advancement in wireless technology. The envision of a smart society where interactions between physical and virtual dimensions of life are intertwined and where human interaction is mediated by machines, e.g., smart phones, demands increasingly more data traffic. This continual increase in data traffic requires re-designing of the wireless technologies for increased system capacity and flexibility. In this thesis, aspects related to behavioral modeling, characterization, and linearization of multi-channel/band power amplifiers (PAs) are discussed. When building a model of any system, it is advantageous to take into account the knowledge of the physics of the system and include into the model. This approach could help to improve the model performance. In this context, three novel behavioral models and DPD schemes for nonlinear MIMO transmitters are proposed. To model and compensate distortions in GaN based RF PAs in presence of long-term memory effects, novel models for SISO and concurrent dual-band PAs are proposed. These models are based on a fixed pole expansion technique and have infinite impulse response. They show substantial performance improvement. A behavioral model based on the physical knowledge of the concurrent dual-band PA is derived, and its performance is investigated both for behavioral modeling and compensation of nonlinear distortions. Two-tone characterization is a fingerprint method for the characterization of memory effects in dynamic nonlinear systems. In this context, two novel techniques are proposed. The first technique is a dual two-tone characterization technique to characterize the memory effects of self- and cross-modulation products in concurrent dual-band transmitter. The second technique is for the characterization and analysis of self- and cross-Volterra kernels of nonlinear 3x3 MIMO systems using three-tone signals.

QC 20161205

With the explosive growth of the wireless market, the demand for low-cost and highly-integrated radio frequency (RF) transceiver has been increased. Keeping up with this trend, complimentary metal-oxide-semiconductor (CMOS) has been spotlighted by virtue of its superior characteristics. However, there are challenges in achieving this goal, especially designing the transmitter portion. The objective of this research is to demonstrate the feasibility of fully integrated CMOS transmitter module which includes power amplifier (PA) and transmit/receive (T/R) switch by compensating for the intrinsic drawbacks of CMOS technology. As an effort to overcome the challenges, the high-power handling T/R switches are introduced as the first part of this dissertation. The proposed differential switch topology and feed-forward capacitor helps reducing the voltage stress over the switch devices, enabling a linear power transmission. With the high-power T/R switches, a new transmitter front-end topology - differential PA and T/R switch topology with the multi-section PA output matching network - is also proposed. The multi-stage PA output matching network assists to relieve the voltage stress over the switch device even more, by providing a low switch operating impedance. By analyzing the power performance and efficiency of entire transmitter module, design methodology for the high-power handling and efficient transmitter module is established. Finally, the research in this dissertation provides low-cost, high-power handling, and efficient CMOS RF transmitter module for wireless applications.

Energy-efficient radio frequency (RF) power amplifiers (PAs) are critical and paramount to achieve longer battery life in state-of-the-art portable systems because they typically determine and dominate the power consumption of such devices. In this dissertation, a high-efficiency, linear RF PA with a dynamically adaptive supply and bias current control for code division multiple access (CDMA) and wideband CDMA (WCDMA) is conceived, simulated, and experimentally demonstrated with a discrete PCB-level design and in integrated circuit (IC) form. The PA efficiency is improved by dynamically adjusting both its supply voltage and bias current, there by minimizing its quiescent power dissipation. The PA supply voltage is derived from the battery by a noninverting, synchronous buck-boost switching regulator because of its flexible functionality and high efficiency. Adjusting the PA supply voltage and bias current by tracking the output power, instead of following the complete envelope in large baseband bandwidth wireless applications, is achieved by a converter with a lower switching frequency and consequently higher light-load efficiency, which translates to prolonged battery life. A discrete PCB-level prototype of the proposed system with 915 MHz center frequency, CDMA IS-95 signal having 27-dBm peak-output power resulted in more than four times improvement in the average efficiency compared to a fixed-supply class-AB PA while meeting the required performance specifications. In the IC solution fabricated in AMIs 0.5-micron CMOS process through MOSIS, a dual-mode, buck-boost converter with pulse-width modulation (PWM) control for high power and pulse-frequency modulation (PFM) for low power is designed and implemented to improve the PA efficiency during active and standby operation, respectively. The performance of the dynamically adaptive supply and bias control IC was validated by realizing a 25-dBm, 1.96 GHz center frequency, WCDMA PA over an input supply range of 1.4 4.2 V. The PA with dual-mode power supply and bias control IC showed an average-efficiency improvement of seven times compared to a fixed-supply class-AB PA, which translates to five times improvement in battery life assuming the PA is active for 2 % of the total time and in standby mode otherwise.

In modern wireless communication systems, new modulation types are introduced in order to support more users by considering spectral efficiency. These new signals are ensitive to nonlinearity when they have high peak to average ratio. The main part in the system that causes nonlinearity is the power amplifier. For power amplifiers, between linearity and efficiency, there is a trade-off. However, by using predistortion techniques, both linearity and efficiency can be obtained. In this thesis, various predistortion methods are explained and memory polynomial digital predistortion is studied because of its great advantages. The results are obtained by simulations through MATLAB and experiments. An open loop test bench is built up with real amplifier. During experimental procedure, as input two tone signal, 8psk modulated signal and pi/2 bpsk modulated signal are used. Predistortion with memory and memoryless predistortion performances are compared and superiority of the predistortion with memory is shown. Predistortion performance with respect to memory depth and polynomial order is also studied. Moreover, predistortion model range is investigated through evaluation of performance by applying predistorter function estimated at a specific bandwidth and power to other signals having different bandwidth and power. Besides these works, the details of predistortion algorithm and the problems that can be countered in practice are explained.