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Books on the topic 'Memory accesses'

Author: Grafiati

Published: 4 June 2021

Last updated: 4 February 2022

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1

Gössel, Michael. Memory architecture & parallel access. Elsevier, 1994.

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2

Semiconductor, National. Random access memory databook. National Semiconductor, 1987.

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3

Denning, Peter J. Is random access memory random? Research Institute for Advanced Computer Science, NASA Ames Research Center, 1986.

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4

Sangyōshō, Japan Keizai. DRAM no juyō to kyōkyū no kankei oyobi sorera ga kokunai kakaku ni ataeta eikyō tō ni tsuite no teiryōteki bunseki to genʼin tankyū: Hōkokusho. Nomura Sōgō Kenkyūjo, 2005.

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5

Random thoughts: RAM random access memory. Nidahas Publication, 2005.

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6

Handōtai memori. Koronasha, 2008.

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7

1978-, Kishi Hirofumi, ed. Teikō henka memori no chiteki zairyō sekkei: Intelligent/directed materials design for resistance random access memory. Ōsaka Daigaku Shuppankai, 2012.

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8

Nonvolatile memories: Materials, device and applications. American Scientific Publishers, 2012.

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9

Kanad, Chakraborty, ed. Testing and testable design of high-density random-access memories. Kluwer Academic, 1996.

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10

Inc, Toshiba America, and Toshiba America. Toshiba MOS memory products data book. Toshiba America, 1987.

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11

IEEE International Workshop on Memory Technology, Design, and Testing (1998 San Jose, California). Memory technology, design and testing: Proceedings : International Workshop on Memory Technology, Design, and Testing. IEEE Computer Society Press, 1998.

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12

Huber, David Miles. Random access audio. SAMS Pub., 1992.

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13

Dieny, Bernard, Ronald B. Goldfarb, and Kyung&xJin Lee, eds. Introduction to Magnetic Random&;#x02010;Access Memory. John Wiley &;#38; Sons, Inc., 2017. http://dx.doi.org/10.1002/9781119079415.

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14

Static random access memory semiconductors from the Republic of Korea and Taiwan. U.S. International Trade Commission, 1998.

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15

United States International Trade Commission. Static random access memory semiconductors from the Republic of Korea and Taiwan. U.S. International Trade Commission, 1997.

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16

Institute Of Electrical and Electronics Engineers. IEEE standard for communicating among processors and peripherals using shared memory (Direct Memory Access--DMA). Institute of Electrical and Electronics Engineers, 1994.

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17

Musgrave, Jeffrey L. Shared direct memory access on the Explorer II-LX. National Aeronautics and Space Administration, 1990.

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18

Przybylski, Steven A. New DRAM technologies: A comprehensive analysis of the new architectures. 2nd ed. MicroDesign Resources, 1996.

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19

Vagts, Christopher Bryan. A single-transistor memory cell and sense amplifier for a gallium arsenide dynamic random access memory. Naval Postgraduate School, 1992.

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20

IEEE International Workshop on Memory Technology, Design, and Testing (1997 San Jose, Calif.). Proceedings: International Workshop on Memory Technology, Design, and Testing. IEEE Computer Society Press, 1997.

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21

Algorithms and data structures for external memory. Published, sold, and distributed by now Publishers, 2008.

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22

Hamdioui, Said. Testing static random access memories: Defects, fault models, and test patterns. Kluwer Academic, 2004.

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23

MS-DOS beyond 640K: Working with extended and expanded memory. Windcrest, 1989.

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24

IEEE, International Workshop on Memory Technology Design and Testing (1994 San Jose Calif ). Records of the IEEE International Workshop on Memory Technology, Design, and Testing, August 8-9, 1994, San Jose, California. IEEE Computer Society Press, 1994.

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25

IEEE International Workshop on Memory Technology, Design, and Testing (1999 San Jose, Calif.). Records of the 1999 IEEE International Workshop on Memory Technology, Design, and Testing, August 9-10, 1999, San Jose, California, USA. IEEE Computer Society Press, 1999.

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26

Rochit, Rajsuman, Rajkanan K, IEEE Computer Society. Test Technology Technical Committee., IEEE Computer Society. Technical Committee on VLSI., and IEEE Solid-State Circuits Council, eds. Records of the 1995 IEEE International Workshop on Memory Technology, Design, and Testing, August 7-8, 1995, San Jose, California. IEEE Computer Society Press, 1995.

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27

IEEE, International Workshop on Memory Technology Design and Testing (17th 2009 Hsinchu Taiwan). MTDT 2009: 2009 IEEE International Workshop on Memory Technology, Design, and Testing : proceedings, 31 August- 2 September 2009, Hsinchu, Taiwan. IEEE Computer Society, 2009.

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28

B, Courtois, Wik T, Zorian Yervant, et al., eds. Proceedings of the 2002 IEEE International Workshop on Memory Technology, Design and Testing : (MTDT 2002) : 10-12 July, 2002, Isle of Bendor, France. IEEE Computer Society, 2002.

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29

Tom, Wit, Singh Adit, Rajsuman Rochit, et al., eds. Records of the 2003 IEEE International Workshop on Memory Technology, Design and Testing, 28-29 July, 2003, San Jose, California. IEEE Computer Society, 2003.

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30

Rochit, Rajsuman, and IEEE Computer Society. Test Technology Technical Committee., eds. Records of the 1993 IEEE International Workshop on Memory Testing, August 9-10, 1993, San Jose, California. IEEE Computer Society Press, 1993.

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31

IEEE International Workshop on Memory Technology, Design and Testing (8th 2000 San Jose, Calif.). Records of the 2000 IEEE International Workshop on Memory Technology, Design and Testing: August 7-8, 2000, San Jose, California. IEEE Computer Society, 2000.

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32

IEEE International Workshop on Memory Technology, Design and Testing (12th 2004 San Jose, Calif.). MTDT 2004: Records of the 2004 International Workshop on Memory Technology, Design and Testing : 9-10 August, 2004, San Jose, California, USA. IEEE Computer Society, 2004.

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33

Yervant, Zorian, IEEE Computer Society, IEEE Computer Society. Technical Committee on VLSI., IEEE Computer Society. Technical Council on Test Technology., and IEEE Solid-State Circuits Society, eds. Proceedings: 2001 IEEE International Workshop on Memory Technology, Design, and Testing : August 6-7, 2001, San Jose, California. IEEE Computer Society, 2001.

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34

Siu, Joseph Wai-Kit. Design and implementation of a 16kbit 1T1C ferroelectric random access memory testchip. National Library of Canada, 2001.

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35

Using disk and RAM utilities. Heinemann Newtech, 1990.

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36

Commission, United States International Trade. In the matter of certain memory devices with increased capacitance and products containing same. U.S. International Trade Commission, 1996.

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37

Fugate, James K. Programming tools for the IBM PC: Screen design, code generator, and high memory access. Brady Communications Co., 1985.

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38

United States International Trade Commission. In the matter of certain dynamic random access memories, components thereof and products containing same: Investigation no. 337-TA-242. U.S. International Trade Commission, 1987.

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39

1972-, Jensen Lotte. Free access to the past: Romanticism, cultural heritage and the nation. Brill, 2010.

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40

United States International Trade Commission. 64K dynamic random access memory components from Japan: Determination of the Commission in investigation no. 731-TA-270 (preliminary) under the Tariff Act of 1930, together with the information obtained in the investigation. U.S. International Trade Commission, 1985.

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41

Ilene, Hersher, ed. 64K dynamic random access memory components from Japan: Determination of the Commission in investigation no. 731-TA-270 (final) under the Tariff Act of 1930, together with the information obtained in the investigation. U.S. International Trade Commission, 1986.

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42

Data access patterns: Database interactions in object-oriented applications. Addison-Wesley, 2004.

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43

Fast, Efficient and Predictable Memory Accesses. Springer Netherlands, 2006. http://dx.doi.org/10.1007/1-4020-4822-x.

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44

Marwedel, Peter, and Lars Wehmeyer. Fast, Efficient and Predictable Memory Accesses: Optimization Algorithms for Memory Architecture Aware Compilation. Springer, 2010.

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45

Fast, Efficient and Predictable Memory Accesses: Optimization Algorithms for Memory Architecture Aware Compilation. Springer, 2006.

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46

Cruz, Eduardo H. M., Matthias Diener, and Philippe O. A. Navaux. Thread and Data Mapping for Multicore Systems: Improving Communication and Memory Accesses. Springer, 2018.

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47

Dieny, Bernard, Ronald B. Goldfarb, and Kyung-Jin Lee. Introduction to Magnetic Random-Access Memory. Wiley & Sons, Incorporated, John, 2016.

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48

United States. National Aeronautics and Space Administration. Scientific and Technical Information Division., ed. Parallel optical random access memory (PORAM). National Aeronautics and Space Administration, Office of Management, Scientific and Technical Information Division, 1989.

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49

Dieny, Bernard, Ronald B. Goldfarb, and Kyung-Jin Lee. Introduction to Magnetic Random-Access Memory. Wiley & Sons, Incorporated, John, 2016.

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50

Kai'an, Zheng, ed. Ci xing ji yi ti chuan li di tu ji fen xi: Patent analysis of MRAM. Xing zheng yuan Guo jia ke xue wei yuan hui ke xue ji shu zi liao zhong xin, 2004.

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