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Zhu, Shaojuan. "Associative memory as a Bayesian building block /." Full text open access at:, 2008. http://content.ohsu.edu/u?/etd,655.
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Peters, Nicholas Rayfield. "Block structures, multi-layering and memory : composition portfolio : commentary." Thesis, Brunel University, 2010. http://bura.brunel.ac.uk/handle/2438/4603.
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This commentary accompanies a portfolio of nine compositions written between October 2006 and June 2009. This commentary traces the development of a range of compositional ideas throughout the portfolio. These revolve around the creation of multilayered textures where all the material and all subtle variations thereof are audible, leading to an investigation of rhythmical block durations and the role of memory. The context in which these ideas arose is provided through discussion of specific existing work that closely relates to the portfolio, in particular by John Cage, Morton Feldman, György Ligeti and Giacinto Scelsi.
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Chi, Hsiang. "Flash memory boot block architecture for safe firmware updates." FIU Digital Commons, 1995. http://digitalcommons.fiu.edu/etd/2160.
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The most significant risk of updating embedded system code is the possible loss of system firmware during the update process. If the firmware is lost, the system will cease to operate, which can be very costly to the end user. This thesis is concerned with exploring alternate architectures which exploit the integration of flash memory technology in order to overcome this problem. Three design models and associated software techniques will be presented. These design models are described in detail in terms of the strategies they employ in order to prevent system lockup and the loss of firmware. The most important objective, which is addressed in the third model, is to ensure that the system can continue to process interrupts during the update. In addition, a portion of this research was aimed at providing the capability to perform updates remotely, and at maximizing system code memory space and available system RAM.
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Jarque, Al V. "Recursive block-by-block integral equation solution for transient dynamic analysis with memory-type elements." Thesis, Monterey, Calif. : Springfield, Va. : Naval Postgraduate School ; Available from National Technical Information Service, 2001. http://handle.dtic.mil/100.2/ADA390953.
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Malard, Joël. "Block solvers for dense linear systems on local memory multiprocessors." Thesis, McGill University, 1992. http://digitool.Library.McGill.CA:80/R/?func=dbin-jump-full&object_id=39760.
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The solution of dense systems of linear equations is at the heart of numerical computations. Such systems are best solved by direct methods based on one of the LU, Cholesky or QR factorizations. Typical parallel algorithms for the LU, Cholesky and QR factorizations of dense matrices stored on a message passing multicomputer hide latency by overlapping communication with arithmetic and by restricting communications to occur along a subring of processors. We show empirically that exploiting the full connectivity of the underlying multicomputer is essential for designing communication efficient algorithms.A specialized total exchange algorithm is presented for improving communication load balance during an LU factorization with pivoting. Threshold pivoting is proposed as a way of significantly reducing processor idle time due to row exchanges during an LU factorization with pivoting.
The columns of the Q factor computed by modified Gram-Schmidt QR factorization algorithms can be far from orthogonal. Parallelizations of the algorithm proposed by Bjorck and Paige for safely using the computed Q are also presented.
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Lianekhammy, Joann. "INVESTIGATING AGE-RELATED INHIBITORY DEFICITS IN SPATIAL WORKING MEMORY." UKnowledge, 2006. http://uknowledge.uky.edu/gradschool_theses/402.
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Age-related inhibitory effects were investigated during spatial memory performance. In Experiment 1, 15 young (M = 20 years) and 16 old adults (M = 70 years) completed two spatial tasks (i.e., Block Suppression Test, Corsi Block Tapping Test) that differed in need for inhibitory processing. Accuracy differences within each task revealed age-related differences in spatial working memory and between task differences revealed that older adults had difficulty ignoring irrelevant items. Experiment 2 (10 young, 10 old adults) examined whether the distractibility of irrelevant items in the inhibition task (i.e. BST) accounted for the age-related inhibitory effects. Findings were largely consistent with the initial experiment indicating that inhibitory function was affected by adult aging.
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Gupta, Sandeep K. S. "Synthesizing communication-efficient distributed memory parallel programs for block recursive algorithms /." The Ohio State University, 1995. http://rave.ohiolink.edu/etdc/view?acc_num=osu1487861796820607.
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Kirschner, Johannes [Verfasser], and Marcus [Gutachter] Halik. "Block Copolymer Hybrid Dielectrics in Organic Memory Transistors / Johannes Kirschner ; Gutachter: Marcus Halik." Erlangen : Friedrich-Alexander-Universität Erlangen-Nürnberg (FAU), 2017. http://d-nb.info/1152079026/34.
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Chandrakar, Shant. "Memory Architecture Template for Fast Block Matching Algorithms on Field Programmable Gate Arrays." DigitalCommons@USU, 2009. https://digitalcommons.usu.edu/etd/495.
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Fast Block Matching (FBM) algorithms for video compression are well suited for acceleration using parallel data-path architectures on Field Programmable Gate Arrays (FPGAs). However, designing an efficient on-chip memory subsystem to provide the required throughput to this parallel data-path architecture is a complex problem. This thesis presents a memory architecture template that can be parameterized for a given FBM algorithm, number of parallel Processing Elements (PEs), and block size. The template can be parameterized with well known exploration techniques to design efficient on-chip memory subsystems. The memory subsystems are derived for two existing FBM algorithms and are implemented on a Xilinx Virtex 4 family of FPGAs. Results show that the derived memory subsystem in the best case supports up to 27 more parallel PEs than the three existing subsystems and processes integer pixels in a 1080p video sequence up to a rate of 73 frames per second. The speculative execution of an FBM algorithm for the same number of PEs increases the number of frames processed per second by 49%.
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JANARTHANAN, ARUN. "LOW POWER CONTROLLER MAPPING BY DISABLING THE EMBEDDED MEMORY BLOCKS IN FPGAs." University of Cincinnati / OhioLINK, 2007. http://rave.ohiolink.edu/etdc/view?acc_num=ucin1178109590.
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Wilmoth, Nathan G. "Determining the Mechanical Properties of Lattice Block Structures." Cleveland State University / OhioLINK, 2013. http://rave.ohiolink.edu/etdc/view?acc_num=csu1366275566.
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Garrison, Brooks Stroud Charles E. "Analysis and improvement of Virtex-4 block RAM Built-In Self-Test and introduction to Virtex-5 block RAM Built-In Self-Test." Auburn, Ala, 2009. http://hdl.handle.net/10415/1667.
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Pantoja, Marcos. "Compounding and Processing Approaches for the Fabrication of Shape Memory Polymers." University of Akron / OhioLINK, 2019. http://rave.ohiolink.edu/etdc/view?acc_num=akron1555666527682024.
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Heikkilä, V. (Valtteri). "A study on dynamic memory allocation mechanisms for small block sizes in real-time embedded systems." Master's thesis, University of Oulu, 2013. http://urn.fi/URN:NBN:fi:oulu-201302081026.
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Embedded real-time and battery-powered systems are increasing in numbers, and their software complexity is growing. This creates a demand for more efficient dynamic memory allocation in real-time embedded systems. Small improvements in dynamic memory allocation can greatly reduce system overall memory usage, fragmentation and energy consumption. Most of today’s general-purpose allocators are unsuitable for real-time embedded systems since they are not designed for real-time constraints.
This thesis contains a study on the suitability of dynamic memory allocation mechanisms for small block allocation in real-time embedded systems. We first perform a literature survey on dynamic memory allocation mechanisms and then analyze general-purpose allocators. From this we arrive to a set of allocation mechanisms for additional experimental study. We then conduct simulations on the selected mechanisms by using both real and synthetic traces to measure the mechanism fragmentation and WCET. We then evaluate the mechanisms and their tradeoffs and present an analysis on their suitability for small block allocation in real-time embedded systems.
This thesis additionally introduces Bitframe allocator, a new bitmapped fits allocator. The introduced allocator demonstrates that bitmapped fits can be used effectively for dynamic memory allocation. We are however unsure if bitmapped fits can offer better efficiency than other mechanisms.
Our results confirm that TLSF is one of the best allocators for real-time systems in terms of performance and fragmentation. Our results also confirm that reaps has low fragmentation and very low WCET when small blocks are allocated. Our results also show that simple segregated storage and region mechanism should not be used in real-time systems due to high worst-case fragmentation.
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Desai, Satyajit. "Process Variation Aware DRAM (Dynamic Random Access Memory) Design Using Block-Based Adaptive Body Biasing Algorithm." DigitalCommons@USU, 2012. https://digitalcommons.usu.edu/etd/1419.
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Large dense structures like DRAMs (Dynamic Random Access Memory) are particularly susceptible to process variation, which can lead to variable latencies in different memory arrays. However, very little work exists on variation studies in DRAMs. This is due to the fact that DRAMs were traditionally placed off-chip and their latency changes due to process variation did not impact the overall processor performance. However, emerging technology trends like three-dimensional integration, use of sophisticated memory controllers, and continued scaling of technology node, substantially reduce DRAM access latency. Hence, future technology nodes will see widespread adoption of embedded DRAMs. This makes process variation a critical upcoming challenge in DRAMs that must be addressed in current and forthcoming technology generations. In this paper, techniques for modeling the effect of random, as well as spatial variation, in large DRAM array structures are presented. Sensitivity-based gate level process variation models combined with statistical timing analysis are used to estimate the impact of process variation on the DRAM performance and leakage power. A simulated annealing-based Vth assignment algorithm using adaptive body biasing is proposed in this thesis to improve the yield of DRAM structures. By applying the algorithm on a 1GB DRAM array, an average of 14.66% improvement in the DRAM yield is obtained.
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Abdelhadi, Ameer M. S. "Architecture of block-RAM-based massively parallel memory structures : multi-ported memories and content-addressable memories." Thesis, University of British Columbia, 2016. http://hdl.handle.net/2429/59146.
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Since they were first introduced three decades ago, Field-Programmable Gate Arrays (FPGAs) have evolved from being merely used as glue-logic to implementing entire compute accelerators. These massively parallel systems demand highly parallel memory structures to keep pace with their concurrent nature since memories are usually the bottleneck of computation performance. However, the vast majority of FPGA devices provide dual-ported SRAM blocks only. In this dissertation, we propose new ways to build area-efficient, high-performance SRAM-based parallel memory structures in FPGAs, specifically Multi-Ported Random Access Memory and Content-Addressable Memory (CAM). While parallel computation demands more RAM ports, leading Multi-Ported Random Access Memory techniques in FPGAs have relatively large overhead in resource usage. As a result, we have produced new design techniques that are near-optimal in resource overhead and have several practical advantages. The suggested method reduces RAM usage by over 44% and improves clock speed by over 76% compared to the best of previous approaches. Furthermore, we propose a novel switched-ports technique that allows further area reduction if some RAM ports are not simultaneously active. A memory compiler is proposed to generalize the previous approach and allow generating Multi-Switched-Ports Random Access Memory. Content-Addressable Memories (CAMs), the hardware implementation of associative arrays, are capable of searching the entire memory space for a specific value within a single clock cycle. CAMs are massively parallel search engines accessing all memory content to compare with the searched pattern simultaneously. CAMs are used in a variety of scientific fields requiring high-speed associative searches. Despite their importance, FPGAs lack an area-efficient CAM implementation. We propose a series of scalable, area-efficient, and high-performance Binary Content-Addressable Memories (BCAMs) based on hierarchical search and data compression methods. Compared to current RAM-based BCAM architectures, our BCAMs require a maximum of 18% the RAM storage while enhancing clock speed by 45% on average, hence exhibiting a superior single-cycle search rate. As a result, we can build faster and more cost-effective accelerators to solve some of the most important computational problems.Applied Science, Faculty of
Electrical and Computer Engineering, Department of
Graduate
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Fei, Pengzhan. "Investigation of a Side-Chain Crystalline Shape Memory Block Copolymer and Maximum Bubble Pressure Rheology of Organogels." University of Akron / OhioLINK, 2013. http://rave.ohiolink.edu/etdc/view?acc_num=akron1384286113.
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Guerra, Jorge. "Improving Storage with Stackable Extensions." FIU Digital Commons, 2012. http://digitalcommons.fiu.edu/etd/706.
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Storage is a central part of computing. Driven by exponentially increasing content generation rate and a widening performance gap between memory and secondary storage, researchers are in the perennial quest to push for further innovation. This has resulted in novel ways to “squeeze” more capacity and performance out of current and emerging storage technology. Adding intelligence and leveraging new types of storage devices has opened the door to a whole new class of optimizations to save cost, improve performance, and reduce energy consumption.
In this dissertation, we first develop, analyze, and evaluate three storage exten- sions. Our first extension tracks application access patterns and writes data in the way individual applications most commonly access it to benefit from the sequential throughput of disks. Our second extension uses a lower power flash device as a cache to save energy and turn off the disk during idle periods. Our third extension is designed to leverage the characteristics of both disks and solid state devices by placing data in the most appropriate device to improve performance and save power.
In developing these systems, we learned that extending the storage stack is a complex process. Implementing new ideas incurs a prolonged and cumbersome de- velopment process and requires developers to have advanced knowledge of the entire system to ensure that extensions accomplish their goal without compromising data recoverability. Futhermore, storage administrators are often reluctant to deploy specific storage extensions without understanding how they interact with other ex- tensions and if the extension ultimately achieves the intended goal. We address these challenges by using a combination of approaches. First, we simplify the stor- age extension development process with system-level infrastructure that implements core functionality commonly needed for storage extension development. Second, we develop a formal theory to assist administrators deploy storage extensions while guaranteeing that the given high level goals are satisfied. There are, however, some cases for which our theory is inconclusive. For such scenarios we present an experi- mental methodology that allows administrators to pick an extension that performs best for a given workload. Our evaluation demostrates the benefits of both the infrastructure and the formal theory.
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Heaton, Brian Craig. "A Shape Memory Polymer for Intracranial Aneurysms: An Investigation of Mechanical and Radiographic Properties of a Tantalum-Filled Shape Memory Polymer Composite." Thesis, Available online, Georgia Institute of Technology, 2004:, 2004. http://etd.gatech.edu/theses/available/etd-07092004-155026/unrestricted/heaton%5Fbrian%5Fc%5F200407%5Fms.pdf.
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Thesis (M.S.)--School of Materials Science and Engineering, Georgia Institute of Technology, 2005. Directed by Janet Hampikian.Zhuqing Zhang, Committee Member ; Roger Narayan, Committee Member ; Brent Carter, Committee Member ; Janet Hampikian, Committee Chair. Includes bibliographical references.
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Balachandran, Neerajnayan. "Low power memory controller subsystem IP exploration using RTL power flow : An End-to-end power analysis and reduction Methodology." Thesis, KTH, Skolan för elektroteknik och datavetenskap (EECS), 2020. http://urn.kb.se/resolve?urn=urn:nbn:se:kth:diva-280095.
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With FinFET based Application Specific Integrated Circuit (ASIC) designs delivering on the promises of scalability, performance, and power, the road ahead is bumpy with technical challenges in building efficient ASICs. Designers can no longer rely on the ‘auto-scaling’ power reduction that follows technology node scaling, in these times when 7nm presents itself as a ‘long-lived’ node. This leads to the need for early power analysis and reduction flows that are incorporated into the ASIC Intellectual Property (IP) design flow. This leads to a focus on power-efficient design in addition to being functionally efficient. Power inefficiency related hotspots are the leading causes of chip re-spins, and a guideline methodology to design blocks in a power-efficient manner leads to a power-efficient design of the Integrated Circuits (ICs). This alleviates the intensity of cooling requirements and the cost. The Common Memory controller is one of the leading consumers of power in the ASIC designs at Ericsson. This Thesis focusses on developing a power analysis and reduction flow for the common memory controller by connecting the verification environment of the block to low-level power analysis tools, using motivated test cases to collect power metrics, thereby leading to two main goals of the Thesis, characterization and optimization of the block for power. This work also includes an energy efficiency perspective through the Differential Energy Analysis technique, initiated by Qualcomm and Ansys, to improve the flow by improving the test cases that help uncover power inefficiencies/bugs and therefore optimize the block. The flow developed in the Thesis fulfills the goals of characterizing and optimizing the block. The characterization data is presented to provide an idea of the type of data that can be collected and useful for SoC architects and designers in planning for future designs. The characterization/profiling data collected from the blocks collectively contribute to the Electronic System-level power analysis that helps correlate the ASIC power estimate to silicon. The work also validates the flow by working on a specific sub-block, identifying possible power bugs, modifying the design and validating improved performance and thereby, validating the flow.Med FinFET-baserade applikationsspecifika integrerade kretsar (ASIC) -konstruktioner som ger löften om skalbarhet, prestanda och kraft är vägen framåt ojämn med tekniska utmaningar när det gäller att bygga effektiva ASIC: er. Formgivare kan inte längre lita på den "autoskalande" effektminskningen som följer teknisk nodskalning, i dessa tider då 7nm presenterar sig som en "långlivad" nod. Detta leder till behovet av tidig kraftanalys och reduktionsflöden som är integrerade i ASIC Intellectual Property (IP) designflöde. Detta leder till fokus på energieffektiv design förutom att det är funktionellt effektivt. Krafteffektivitetsrelaterade hotspots är de ledande orsakerna till respins av chip, och en riktlinjemetodik för att konstruera block på ett energieffektivt sätt leder till energieffektiv design av Integrated Circuits (ICs). Detta lindrar intensiteten hos kylbehovet och kostnaden. Common Memory-kontrollen är en av de ledande energikonsumenterna i ASIC-designen hos Ericsson. Denna avhandling fokuserar på att utveckla en effektanalys och reduktionsflöde för den gemensamma minneskontrollern genom att ansluta verifieringsmiljön för blocket till lågnivåeffektanalysverktyg, med hjälp av motiverade test caser för att samla effektmätvärden, vilket leder till två huvudmål för avhandlingen, karakterisering och optimering av blocket för kraft. Detta arbete inkluderar också energieffektivitetsperspektiv genom Differential Energy Analys-teknik, initierad av Qualcomm och Ansys, för att förbättra flödet genom att förbättra test cases som hjälper till att upptäcka effekteffektivitet / buggar och därför optimera blocket. Flödet som utvecklats i avhandlingen uppfyller målen att karakterisera och optimera blocket. Karaktäriseringsdata presenteras för att ge en uppfattning om vilken typ av data som kan samlas in och vara användbara för SoC-arkitekter och designers i planering för framtida mönster. Karaktäriserings/ profileringsdata som samlats in från blocken bidrar tillsammans till effektanalysen för elektronisk systemnivå som hjälper till att korrelera ASIC-effektberäkningen till kisel. Arbetet validerar också flödet genom att arbeta på ett specifikt underblock, identifiera möjliga effektbuggar, modifiera utforma och validera förbättrad prestanda och därmed validera flödet.
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Raghunathan, Vijai. "AN EFFECTIVE CACHE FOR THE ANYWHERE PIXEL ROUTER." UKnowledge, 2007. http://uknowledge.uky.edu/ece_etds/8.
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Designing hardware to output pixels for light field displays or multi-projector systems is challenging owing to the memory bandwidth and speed of the application. A new technique of hardware that implements ‗anywhere pixel routing‘ was designed earlier at the University of Kentucky. This technique uses hardware to route pixels from input to output based upon a Look up Table (LUT). The initial design suffered from high memory latency due to random accesses to the DDR SDRAM input buffer. This thesis presents a cache design that alleviates the memory latency issue by reducing the number of random SDRAM accesses.
The cache is implemented in the block RAM of a field programmable gate array (FPGA). A number of simulations are conducted to find an efficient cache. It is found that the cache takes only a few kilobits, about 7% of the block RAM and on an average speeds up the memory accesses by 20-30%.
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Lim, Nien Yi. "Separating instruction fetches from memory accesses ILAR (Instruction Line Associative Registers) /." Lexington, Ky. : [University of Kentucky Libraries], 2009. http://hdl.handle.net/10225/1121.
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Thesis (M.S.)--University of Kentucky, 2009.Title from document title page (viewed on May 6, 2010). Document formatted into pages; contains: viii, 59 p. : ill. (some col.). Includes abstract and vita. Includes bibliographical references (p. 56-58).
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Crespin, Ludwig. "Redécouvrir la conscience par le rêve : le débat entre théories cognitives et théories non cognitives de la conscience à l’épreuve de la recherche sur le rêve." Thesis, Clermont-Ferrand 2, 2016. http://www.theses.fr/2016CLF20014/document.
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En 1995, le philosophe Ned Block a proposé de distinguer deux notions de conscience : une notion purement expérientielle, la « conscience phénoménale », qui désigne l’effet que cela fait d’être dans tel ou tel état mental, et une notion purement fonctionnelle, la « conscience d’accès », ou « accès cognitif » (Block, 2007), entendue comme la capacité du sujet à utiliser ses représentations pour le contrôle de ses opérations cognitives, et, via ces opérations, pour le contrôle de la parole et de l’action. Block défend depuis l’hypothèse très discutée selon laquelle l’expérience consciente, ou « conscience phénoménale », déborde l’accès cognitif du sujet. L’objet central de ce travail est de mettre cette hypothèse à l’épreuve de la recherche sur le rêve. Nous y soutenons principalement les trois arguments suivants : 1. Sous hypothèse d’une continuité entre les propriétés de la mémoire onirique et vigile, on peut objectiver la réalité d’expériences conscientes pendant le sommeil en s’appuyant sur le critère canonique de rapportabilité. De fait, de nombreuses études convergent pour montrer que les sujets peuvent rapporter un contenu onirique qui reflète de manière non équivoque un stimulus présenté plus d’une minute avant l’éveil – ce qui, au regard de l’extrême évanescence de la perception subliminale, ne pourrait pas être le cas si le rêve était un processus inconscient. Sachant que le sommeil s’accompagne d’une sévère désactivation des aires frontales, et en particulier du cortex dorsolatéral préfontal (DlPFC), un tel résultat tend à questionner le modèle neuropsychologique de « l’espace neuronal global de travail » (Dehaeneet Naccache, 2001 ; Dehaene et al, 2006) qui fait dépendre la perception consciente de l’activation de ces aires.2. Le fait même d’objectiver la réalité d’expériences conscientes pendant le sommeil à travers des récits de rêves recueillis à l’éveil implique cependant de reconnaître que ces mêmes expériences ont été remarquées par le dormeur et qu’elles relèvent en ce sens minimum de la conscience d’accès. Pour autant, certains désordres cognitifs de la conscience rêvante, tels notamment que la cécité au changement, suggèrent qu’il ne suffit pas qu’une expérience soit remarquée par le dormeur pour qu’elle relève de plein droit de la conscience d’accès : il fautencore qu’elle puisse être maintenue activement dans la mémoire de travail. Le phénomène bien connu des « dissociations identité-apparence » (Schwartz, 1999) suggère pareillement que la rapportabilité d’une expérience onirique n’assure pas qu’elle soit posée pour le contrôle des opérations cognitives dans le rêve.3. Dès l’instant où l’on a pu objectiver la réalité des expériences oniriques à travers le critère canonique de rapportabilité, il devient possible – là encore, sous hypothèse de continuité –d’inférer de façon empiriquement contraignante l’existence d’une vie consciente non rapportable du dormeur. Se pose alors la question de savoir si un tel vécu, dont on peut soutenir qu’il constitue une forme d’inconscient psychique, relève de plein droit de la conscience d’accès.Enfin, à travers ces trois arguments portant spécifiquement sur la conscience onirique, nous montrons que la recherche sur le rêve permet de questionner de façon privilégiée la notion d’une nécessaire rapportabilité de l’expérience consciente et de faire valoir le concept de modularité de la conscience qui sous-tend l’hypothèse blockéenne du débordement expérientiel (Block, 1995, 1997)In 1995, the American philosopher Ned Block proposed to distinguish between two notions of consciousness: “Access-consciousness” and “Phenomenal-consciousness”. “P-consciousness” is experience: it refers to what it is like to be in a certain mental state. “Aconsciousness” is a purely functional notion. A mental state is A-conscious when it allows the subject to cognitively control its reasoning, speech and action. Since 1995, Block supports the controversial hypothesis according to which conscious experience overflows our cognitive access to it. The main goal of this work is to assess this hypothesis from the point of view of scientific research on dreaming. This PhD dissertation makes the three following points : 1. Assuming there is a continuity between waking and dreaming memory, one can objectively verify that dreams are conscious experiences that occur during sleep relying on the canonical criterion of reportability. Indeed, many studies show that subjects can report on a dream content that unequivocally reflects a stimulus that has occurred more than one minute before awakening – which couldn’t be had this dream content been unconsciously processed. Considering that sleeping involves a severe deactivation of the frontal areas of the brain, especially of the dorsolateral prefrontal cortex (DlPFC), this result seems to call into question the global neuronal workspace theory of consciousness. Indeed, according to this theory the activation of these very areas is a necessary condition for a conscious perception to occur(Dehaene & Naccache, 2001; Dehaene et al, 2006). 2. There is no way though to demonstrate scientifically that dreams are conscious experiences of the sleeper without implying they were noticed during sleep, which, in turn, implies an elementary level of access. Still, certain cognitive disorders of our dreaming consciousness, such as change blindness, suggest that, due to a severe weakness of working memory, noticing an experience during sleep might not suffice to constitute a genuine cognitive access to it. The well-known phenomenon called “identity-appearance dissociation” (Schwartz, 1999) also suggests that dreaming experiences that are reportable on awakening might not always be poised for cognitive control in the dream. 3. Once the reality of conscious experiences during sleep is objectively established relying on the criterion of reportability, it becomes possible – again under the assumption of continuity - to empirically infer the existence of dreaming experiences that the subject cannot report. The following question then arises: are these experiences, which can be seen as a form of unconscious mental life, access-conscious? Finally, and more generally, we show that the results of dreaming research offer a vantage point both to call into question the notion that conscious experience is necessarily reportable and to support the concept of modularity of our conscious selves (Nagel, 1971; Gazzaniga,1985) that underlies Block’s overflow hypothesis (Block, 1995, 1997)
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Riegel, Torvald. "Software Transactional Memory Building Blocks." Doctoral thesis, Saechsische Landesbibliothek- Staats- und Universitaetsbibliothek Dresden, 2013. http://nbn-resolving.de/urn:nbn:de:bsz:14-qucosa-115596.
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Exploiting thread-level parallelism has become a part of mainstream programming in recent years. Many approaches to parallelization require threads executing in parallel to also synchronize occassionally (i.e., coordinate concurrent accesses to shared state). Transactional Memory (TM) is a programming abstraction that provides the concept of database transactions in the context of programming languages such as C/C++. This allows programmers to only declare which pieces of a program synchronize without requiring them to actually implement synchronization and tune its performance, which in turn makes TM typically easier to use than other abstractions such as locks.
I have investigated and implemented the building blocks that are required for a high-performance, practical, and realistic TM. They host several novel algorithms and optimizations for TM implementations, both for current hardware and future hardware extensions for TM, and are being used in or have influenced commercial TM implementations such as the TM support in GCC.
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Click, Ivy A., S. K. Thacker, BK S. Beale, G. D. Frye, and Russell W. Brown. "Mecamylamine Blocks Nicotine’s Enhancement of Reference Memory but Not Working Memory." Digital Commons @ East Tennessee State University, 2002. https://dc.etsu.edu/etsu-works/6423.
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Cadar, Cristian. "Enhancing availability and security through boundless memory blocks." Thesis, Massachusetts Institute of Technology, 2004. http://hdl.handle.net/1721.1/33123.
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Thesis (M. Eng.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2004.Includes bibliographical references (leaves 49-52).
We present a new technique, boundless memory blocks, that automatically eliminates buffer overflow errors, enabling programs to continue to execute through memory errors without memory corruption. Buffer overflow vulnerabilities are caused by programming errors that allow an attacker to cause the program to write beyond the bounds of an allocated memory block to corrupt other data structures. The standard way to exploit a buffer overflow vulnerability involves a request that is too large for the buffer intended to hold it. The buffer overflow error causes the program to write part of the request beyond the bounds of the buffer, corrupting the address space of the program and causing the program to execute injected code contained in the request. Our boundless memory blocks compiler inserts checks that dynamically detect all out of bounds accesses. When it detects an out of bounds write, it stores the value away in a hash. Our compiler can then return the stored value as the result of an out of bounds read to that address. In the case of uninitialized addresses, our compiler simply returns a predefined value. We have acquired several widely used open source applications (Apache, Sendmail, Pine, Mutt, and Midnight Commander). With standard compilers, all of these applications are vulnerable to buffer overflow attacks as documented at security tracking web sites. Instead, our compiler enables the applications to execute successfully through buffer overflow attacks to continue to correctly service user requests without security vulnerabilities. We have also found that only one application contains uninitialized reads, which means that in most cases, the net effect of our compiler is to (conceptually) give each allocated memory block unbounded size and to eliminate out of bounds accesses as a programming error.
by Cristian Cadar.
M.Eng.
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Worsley, Gayll. "Black Filmmaker's Foundation." Thesis, Virginia Tech, 2003. http://hdl.handle.net/10919/9893.
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Can architecture live in the passage of real time and memory? It has occured to me that movement must not be limited to action (horizontal and vertical.) For instance, the movement of people, light or objects are not the only consideration. In fact I have overlooked passive motion. Perhaps a design could link both passive and active motion as the design element. The independent African American Filmmaker creates a cinematic experience that lives in layers of time. In the end the film is sustained in the memory of the viewer.Master of Architecture
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Brown, La Tasha Amelia. "The diasporic black Caribbean experience : nostalgia, memory and identity." Thesis, University of Warwick, 2011. http://wrap.warwick.ac.uk/35719/.
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The purpose of this study is to examine how children of Jamaican parentage, who came of age during the 1980s in Britain and the 1990s in the United States, constructed their identity by using social memory and popular culture. This research project is an interdisciplinary, comparative study that seeks to analyze how the shifting of boundaries, sense of dislocation, and loss of rootedness are grounded in the construction of a new transnational urban Jamaican Black identity, for which I have coined the term yáad/yard-hip hop. Yáad/Yard-Hip Hop characterizes the post-1960s immigrant generation, who found themselves “locked symbiotically into an antagonistic relationship” between their parents’ memories of home and their understanding of self within the socio-political context of Britain and the United States (Gilroy, The Black Atlantic 1-2). The deconstruction of these two narratives exposes the position of this age group as being wedged in-between two temporal spaces. Therefore, the significance of this study serves to demonstrate that the state of ambivalence experienced by this post-1960s immigrant generation not only encapsulated their identity within the period of the 1980s and the 1990s, but can also be viewed as indicative of how Caribbeanness, or more specifically, Jamaicanness, came to be reconfigured outside of the Caribbean region from the 1960s onwards.
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Wan, Pauline Gail. "Female trauma and memory in constructions of black identity." Thesis, Hong Kong : University of Hong Kong, 1999. http://sunzi.lib.hku.hk/hkuto/record.jsp?B21510969.
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Davis, Patricia G. "Ripping the veil collective memory and Black southern identity /." Diss., [La Jolla] : University of California, San Diego, 2009. http://wwwlib.umi.com/cr/ucsd/fullcit?p3369239.
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Thesis (Ph. D.)--University of California, San Diego, 2009.Title from first page of PDF file (viewed September 15, 2009). Available via ProQuest Digital Dissertations. Vita. Includes bibliographical references.
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Beau, Chrystelle. "Du Calepin visuo-spatial aux traitements visuo-spatiaux de l'information. Résolution de l'épreuve de Corsi par des patients Alzheimer." Phd thesis, Université de Provence - Aix-Marseille I, 2011. http://tel.archives-ouvertes.fr/tel-00645278.
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A ce jour, pour rendre compte du traitement de l'information visuo-spatiale, l'hypothèse dominante est celle du calepin visuo-spatial (Baddeley, 1986), qui renvoie aux modèles structuralistes de la mémoire. Cependant ces types de modèles postulant l'existence de plusieurs modules autonomes sont actuellement remis en question et les théories fonctionnelles récentes défendent l'idée d'un système mnésique unique. C'est dans cette perspective que se situe notre recherche qui s'organise autour de trois questions. La première consiste à définir les différents traitements visuo-spatiaux mis en œuvre lors de la manipulation d'informations visuo-spatiales. La seconde tente d'établir des profils comportementaux des traitements visuo-spatiaux caractéristiques du vieillissement normal et pathologique (Alzheimer). La troisième porte sur l'expression de la flexibilité cognitive chez des sujets âgés lors de la résolution du problème des blocs de Corsi (épreuve visuo-spatiale séquentielle). Deux expériences ont été réalisées dans lesquelles les participants (personnes âgées souffrant de maladie d'Alzheimer et personnes âgées contrôle) devaient résoudre la tâche des blocs de Corsi, dans sa version ordre direct (expérience 1) et dans ces versions ordre direct et indirect (expérience 2). Les données ont été exploitées en recourant à une méthodologie d'analyse de protocoles individuels permettant une analyse qualitative à un degré suffisamment fin des réponses des sujets. Dans la première expérience, nous nous sommes intéressée aux différentes erreurs rencontrées lors de la résolution de l'épreuve. Dans la seconde étude, nous avons étendu nos analyses aux traitements visuo-spatiaux inhérents à ces erreurs. Les résultats obtenus ont permis de définir cinq grands traitements visuo-spatiaux (le traitement vectoriel, vectoriel partiel, identité stricte, approximatif et mixte), de mettre en évidence des profils comportementaux concernant le traitement vectoriel partiel et identité stricte pour les sujets âgés sains lors de la condition indirecte et de montrer l'expression de flexibilité cognitive spontanée chez les sujets Alzheimer et sains lors des traitements visuo-spatiaux séquentiels. Nos analyses ont ainsi permis de proposer une approche différente du traitement de l'information visuo-spatiale en substituant le concept de traitement visuo-spatial à celui de calepin visuo-spatial ainsi que d'approfondir les connaissances de celui-ci aussi bien dans le vieillissement normal que pathologique (Alzheimer) en analysant les sujets en action.
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Freeman, Michael. "Hardware support of recovery blocks." Thesis, University of York, 1999. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.341599.
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Farrow, G. S. D. "A theoretical study of Bloch line memory by computer modelling." Thesis, University of Manchester, 1987. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.383195.
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Hastings, Rachel N. "Black Eyez: Memoirs of a Revolutionary." OpenSIUC, 2008. https://opensiuc.lib.siu.edu/dissertations/278.
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Black Eyez: Memoirs of a Revolutionary engages in an investigation of the performative relationship between race and color. It offers a review of the genesis of race as a political invention, to articulate the intersubjective relationship between Black Power ideology and the Black Aesthetic. By highlighting the historical recovery of Black subjectivity, I argue Black aestheticians produced a form of performative decolonization. I then suggest the use of ethnographic dramaturgy as both an informed approach to staging the self, as well as a space to offer my personal performance philosophy. The script "Sole/Daughter" is offered as an augmentation of The Revolutionary Theatre's paradigmatic assumptions.
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Kennon, Raquel. "Transforming Trauma: Memory and Slavery in Black Atlantic Literature since 1830." Thesis, Harvard University, 2012. http://dissertations.umi.com/gsas.harvard:10396.
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Transforming Trauma: Memory and Slavery in Black Atlantic Literature since 1830 examines the interplay between remembering and forgetting in literary and cultural engagements with the trauma of transatlantic slavery. The dissertation considers how intergenerational, trans-temporal trauma becomes re-narrativized and re-envisioned over time in four symbolic sites of slavery (five countries)—Africa (Ghana and Mozambique), the Caribbean (Cuba), Brazil, and the United States—with the goal of exposing differences and emphasizing ruptures. Each chapter functions like a slave schooner arriving at an outpost of the African Diaspora, touring an eclectic transatlantic archive of slavery including art, public space, newspaper clippings, telenovelas, monuments (both imagined and built), song, and advertising copy, then dropping an anchor to explore a more traditional cross section of literature from each national context, juxtaposing canonical and non-canonical works. Taken together, the chapters probe the ways nineteenth and twentieth century Inter-American and African “texts,” broadly defined, register the trauma of slavery in the Black Atlantic. Chapter 1 discusses Brazilian author Bernardo Guimarães’ short novel, A Escrava Isaura (1875) and its wildly popular telenovela adaption in 1976 as an example of one of slavery’s twentieth century kitsch manifestations. The theme of Exodus in African American literature is considered in chapter 2 with a reading of Frances E.W. Harper’s 1869 poem, “Moses,” followed by an extended exploration of the early twentieth century Mammy cult including the 1922 statue proposal. Chapter 3 explores scenes of racial violence and offers a reading of the horrific American ritual of lynching in Jean Toomer’s “Kabnis” and “Portrait in Georgia” in Cane (1923) followed by textual analysis of Robert Hayden’s “Middle Passage” (1962, 1966). Chapter 4 focuses on the Brazilian collective memory of the old historic district of Pelourinho in Salvador, Bahia as the former site of punishment at the pillory (whipping post) for enslaved Africans. Close readings in this chapter include Castro Alves’s classic epic poem, “O navio negreiro” from Os Escravos (1883) and Carolina Maria de Jesus’s diary of favela life, O Quarto de Despejo (1960) in addition to shorter readings of the poetry of Alzira Rufino, Esmeralda Ribeiro, Francisco Alvim, and a short novel by Dudda Seixas. Chapter 5 engages with the charged metaphor of sugar and compares the only extant nineteenth century Cuban slave narrative, Juan Francisco Manzano’s Autobiografía de un esclavo (1839) with a twentieth century account of maroon Esteban Montejo’s slave narrative as related to anthropologist/writer Miguel Barnet in Cimarrón: Historia de un esclavo (1966). The final chapter addresses the so-called literary African amnesia around slavery and examines vestiges of the memory of slavery in three African texts: Noémia de Sousa’s “Negra” (1949), Ama Ata Aidoo’s The Dilemma of a Ghost (1965), and Ayi Kwei Armah’s Two Thousand Seasons (1973).
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Plummer, Sharbreon S. "Haptic Memory: Resituating Black Women’s Lived Experiences in Fiber Art Narratives." The Ohio State University, 2020. http://rave.ohiolink.edu/etdc/view?acc_num=osu1586990257051988.
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Bethea, Robert A. "The Effects of Carbon Black Reinforcement Systems on Crosslinked Shape Memory Elastomers." University of Akron / OhioLINK, 2014. http://rave.ohiolink.edu/etdc/view?acc_num=akron1418301296.
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Song, Li. "Piecewise models for long memory time series." Paris 11, 2010. http://www.theses.fr/2010PA112128.
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De nombreux travaux existent sur les processus stationnaires à longue mémoire (LM) et sur les modèles présentant des changements structurels. Cependant, il y a relativement peu de travaux sur les processus à LM non stationnaires faisant intervenir des ruptures, et ceci sans doute car LM et changement structurel sont deux phénomènes qu'il est facile de confondre. Dans cette thèse, nous considérons un modèle paramétrique de séries chronologiques à LM et non stationnaires : le processus localement autorégressif à moyenne mobile fractionnairement intégrée (FARlMA). Dans ce modèle, le nombre et les positions des points de ruptures (PRs) peuvent varier entre deux régimes, de même que les ordres et les coefficients des différentes parties FARlMA. Nous proposons deux méthodes pour estimer les paramètres de ce modèle. La première consiste à optimiser un critère basé sur le principe de description de longueur minimum (MDL). Nous montrons que ce critère est meilleur que le critère d'information bayésien et qu'un critère existant dans la littérature et aussi basé sur le principe MOL. Comme l'espace paramétrique est de grande dimension, l'optimisation pratique de notre critère est une tâche difficile et nous proposons une mise en oeuvre basée sur un algorithme génétique. La seconde méthode s'applique au cas de séries très longues comme des données de trafic intemet par exemple. En effet dans ce cas, la minimisation d'un critère basé sur le principe MDL est quasi impossible en pratique. Pour ajuster le modèle, nous proposons une méthode basée sur les différences entre les estimations des paramètres des différents blocs de données. La méthode se décompose en quatre étapes. Dans l'étape 1, nous ajustons un modèle FARlMA stationnaire à la série complète. Des estimées locales des paramètres sont obtenues dans l'étape 2. Dans l'étape 3, pour tous les nombres possibles de PR, on sélectionne les intervalles contenant un PR, on estime les positions des PRs et on estime les paramètres de chaque bloc. Enfin, l'étape 4 concerne la sélection du nombre de PRs en utilisant la somme des carrés des résidus des différents blocs. On montre l'efficacité de nos deux méthodes d'estimation au moyen de simulations numériques et on étudie aussi le cas de séries réellesThere are many studies on stationary processes exhibiting long range dependence (LRD) and on piecewise models involving structural changes. But the literature on structural breaks in LRD models is relatively sparse because structural changes and LRD are easily confused. Some works consider the case where only some coefficients in a LRD model are allowed to change. Ln this thesis, we consider a non-stationary LRD parametric model, namely the piecewise fractional autoregressive integrated moving-average (FARlMA) model. It is a pure structural change model inwhich the nurnber and the locations of break points (BPs) as well as the ARMA orders and the corresponding coefficients are allowed to change between two regimes. Two methods are proposed to estimate the parameters of this model. The first one is to optimize a criterion based on the minimum description length (MDL) principle. We show that this criterion outperforms the Bayesian information criterion and another MDL based criterion proposed in the literature. Since the search space is huge, the practical optimization of our criterion is a complicated task and we design an automatic methodology based on a genetic algorithm. The second method is designed for very long time series, like Internet traffic data. Ln such cases, the minimisation of the criterion based on MDL is very difficult. We propose a method based on the differences between parameter estimations of different blocks of data to fit the piecewise FARIMA model. This method consists in a four-step procedure. Ln Step 1, we fit a stationary FARiMA model to the whole series. Local parameter estimates are obtained in Step 2. Ln Step 3, for all possible BP numbers, we select the intervals with a BP, we estimate the BP locations and we estimate the parameters of each stationary block. Lastly, Step 4 concerns the selection of the BP number using the sum of squared residuals of the different fitted piecewise models. The effectiveness of the two methods proposed in the thesis is shown by simulations and applications to real data are considered
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Hastings, Rachel N. "Black eyez : memoirs of a revolutionary /." Available to subscribers only, 2009. http://proquest.umi.com/pqdweb?did=1791777371&sid=1&Fmt=2&clientId=1509&RQT=309&VName=PQD.
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Thesis (Ph. D.)--Southern Illinois University Carbondale, 2009."Department of Speech Communication." Keywords: Black aesthetic, Black power, Black theater, Ethnographic dramaturgy. Includes bibliographical references (p. 228-237). Also available online.
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Janarthanan, Arun. "Low power controller mapping by disabling thr embedded memory blocks in FPGAs." Cincinnati, Ohio University of Cincinnati, 2007. http://www.ohiolink.edu/etd/view.cgi?ucin1178109590.
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Thesis (M.S.)--University of Cincinnati, 2007.Title from electronic thesis title page (viewed July 9, 2007). Includes abstract. Keywords: FPGA; FSM Implementation; Sychronous Embedded Memory Block (SEMB) Includes bibliographical references.
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Bakare-Yusuf, Bibi. "In the sea of memory : embodiment and agency in the black diaspora." Thesis, University of Warwick, 2000. http://wrap.warwick.ac.uk/4029/.
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This thesis is a sustained meditation on the relationship between embodiment, memory and cultural creativity in the black diaspora. It seeks to generate a theoretical vocabulary outside the stale polarisation between essentialism and anti-essentialism. Using the phenomenology of lived experience, I contend that black diasporic memory and identity are actively constructed within each present. I argue that bodily expression is part of a broader set of cultural strategies of self-definition, self-maintenance and self-preservation. In the case of the black diaspora, the past is evoked, invoked and provoked into existence once again through each expression of embodiment. A key concern in the thesis is therefore to highlight the active capacity of the body to recreate its world and in the process empower, renew and re-orient itself in the face of adversity and oppression. Rather than succumb to an account of black diasporicity as either a history of pain or the background of cultural hybridity, I argue that the pleasures and pains of black diasporicity are different aspects of the same ongoing phenomenon. Through the example of Jamaican dancehall culture, I show how the adorned, transgressive dancing body of dancehall women creates a dynamic of eroticised autonomy in an otherwise hostile environment. In sum, my thesis provides an analysis of the dynamics of diasporic identity and the antiphonies of continuity and discontinuity.
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MacMichael, Conall. "The fire this time : media, myth, memory and the Black Power movement." Thesis, Queen's University Belfast, 2016. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.707356.
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The dissertation examines the popular memory of the Black Power movement and demonstrates that contrary to the dominant narrative of the 1960s, Black Power was a broad, heterogeneous phenomenon that appealed to a multi-hued chorus of activists in the African American community. By interrogating media narratives surrounding the commemoration of three crucial Civil Rights events -the Murder of Emmett Till, the Montgomery Bus Boycott, and the March on Washington - and through exploring the media reaction to the upsurge of Black Power in the late 1960s, I reveal the narrow fashion in which both movements are portrayed. The overwhelmingly positive narrative surrounding the Civil Rights movement reaffirms the ideal of American exceptionalism, while Black Power, with its implicit and explicit questioning of this ideal, is rejected and characterized as the preserve of rage and violence. This monochromatic narrative has served to silence the activists that approached and wielded Black Power in a variety of different ways. Lawyers, pastors, activists, athletes, and entertainers all found aspects of Black Power that they believed could be used to exert a positive influence in their community or that they could apply to their personal lives. To paraphrase E.P. Thompson, this dissertation gives voice to those activists whose works have been brushed aside in favour of a simplistic narrative that blurs our understanding of the post-war Black Freedom Struggle.
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Sumbul, Huseyin Ekin. "A Novel Design Methodology for Synthesizing Application-Specific Logic-in-Memory Blocks." Research Showcase @ CMU, 2015. http://repository.cmu.edu/dissertations/999.
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As the fraction of integrated circuit area dedicated to embedded memory continues to increase, the energy spent for transporting data on-chip becomes increasingly larger than the energy needed to perform computation, thereby creating system-level challenges for data-intensive application-domains. One effective approach for this challenge is to use Logic-in-Memory (LiM) blocks, whereby custom application-specific logic is embedded within the memory block to significantly improve the system’s energy, performance, and area efficiency. Recent studies on technology scaling below the 20nm node demonstrate that extremely restrictive patterning enables the automated synthesis of LiM systems by the use of compatible logic and memory patterns. While in-memory processing architectures have been proposed and successfully built for various applications, this dissertation aims to exploit the extremely restrictive patterning to create an end-to-end design methodology for automated synthesis of application-specific LiM blocks. The LiM synthesis methodology eliminates all the full-custom design effort that is inherently needed to build a LiM block, thereby enabling the co-design of algorithms and hardware at an affordable design cost that would be otherwise impractical. Silicon results for two data-intensive applications demonstrate that systems based on synthesized LiM designs can provide dramatic improvements of one to two orders of magnitude of energy and performance efficiency. This methodology further enables rapid design-space exploration for the overall LiM based system by making customization efficient and robust with no extra design-cost. This dissertation attempts to formulate, implement, and validate a novel design methodology that provides automated synthesis of application-specific LiM blocks.
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Creson, Thomas Kyle. "Dose-response effects of lithium on spatial memory in the black molly fish." [Johnson City, Tenn. : East Tennessee State University], 2002. http://etd-submit.etsu.edu/etd/theses/available/etd-0829102-150014/unrestricted/CresonT091102f.pdf.
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Llerar, Meza Gerónimo. "Upscaling nonreactive solute transport." Doctoral thesis, Universitat Politècnica de València, 2009. http://hdl.handle.net/10251/5848.
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This thesis focuses on solute transport upscaling. Upscaling of solute transport is usually required to obtain computationally efficient numerical models in many field applications such as, remediation of aquifers, environmental risk to groundwater resources or the design of underground repositories of nuclear waste. The non-Fickian behavior observed in the field, and manifested by peaked concentration profiles with pronounced tailing, has questioned the use of the classical advection-dispersion equation to simulate solute transport at field scale using numerical models with discretizations that cannot capture the field heterogeneity. In this context, we have investigated the use of the advection-dispersion equation with mass transfer as a tool for upscaling solute transport in a general numerical modeling framework.
Solute transport by groundwater is very much affected by the presence of high and low water velocity zones, where the contaminant can be channelized or stagnant. These contrasting water velocity zones disappear in the upscaled model as soon as the scale of discretization is larger that the size of these zones. We propose, for the modeling solute transport at large scales, a phenomenological model based on the concept of memory functions, which are used to represent the unresolved processes taking place within each homogenized block in the numerical models.
We propose a new method to estimate equivalent blocks, for which transport and mass transfer parameters have to be provided. The new upscaling technique consists in replacing each heterogeneous block by a homogeneous one in which the parameters associated to a memory functions are used to represent the unresolved mass exchange between highly mobile and less mobile zones occurring within the block. Flow upscaling is based on the Simple Laplacian with skin, whereas transport upscaling is based in the estimation of macrodispersion and mass transfer parameters as a result of the interpretation of the rLlerar Meza, G. (2009). Upscaling nonreactive solute transport [Tesis doctoral no publicada]. Universitat Politècnica de València. https://doi.org/10.4995/Thesis/10251/5848
Palancia
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Ferdeen, Mats. "Reducing Energy Consumption Through Image Compression." Thesis, Linköpings universitet, Datorteknik, 2016. http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-134335.
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The energy consumption to make the off-chip memory writing and readings are aknown problem. In the image processing field structure from motion simpler compressiontechniques could be used to save energy. A balance between the detected features suchas corners, edges, etc., and the degree of compression becomes a big issue to investigate.In this thesis a deeper study of this balance are performed. A number of more advancedcompression algorithms for processing of still images such as JPEG is used for comparisonwith a selected number of simpler compression algorithms. The simpler algorithms canbe divided into two categories: individual block-wise compression of each image andcompression with respect to all pixels in each image. In this study the image sequences arein grayscale and provided from an earlier study about rolling shutters. Synthetic data setsfrom a further study about optical flow is also included to see how reliable the other datasets are.Energikonsumtionen för att skriva och läsa till off-chip minne är ett känt problem. Inombildbehandlingsområdet struktur från rörelse kan enklare kompressionstekniker användasför att spara energi. En avvägning mellan detekterade features såsom hörn, kanter, etc.och grad av kompression blir då en fråga att utreda. I detta examensarbete har en djuparestudie av denna avvägning utförts. Ett antal mer avancerade kompressionsalgoritmer förbearbetning av stillbilder som tex. JPEG används för jämförelse med ett antal utvaldaenklare kompressionsalgoritmer. De enklare algoritmerna kan delas in i två kategorier:individuell blockvis kompression av vardera bilden och kompression med hänsyn tillsamtliga pixlar i vardera bilden. I studien är bildsekvenserna i gråskala och tillhandahållnafrån en tidigare studie om rullande slutare. Syntetiska data set från ytterligare en studie om’optical flow’ ingår även för att se hur pass tillförlitliga de andra dataseten är.
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Ghosh, Anandaroop. "Energy Efficient Computing in FPGA Through Embedded RAM Blocks." Case Western Reserve University School of Graduate Studies / OhioLINK, 2013. http://rave.ohiolink.edu/etdc/view?acc_num=case1365198486.
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Hulbert, Matthew C. "Politics of the Black Flag: Guerrilla Memory and Southern Conservatism in the New South." NCSU, 2010. http://www.lib.ncsu.edu/theses/available/etd-03262010-202225/.
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This thesis explores the intersection of Civil War memory and the history of conservative politics in the New South through two critical phases and its historiographic context. Phase one examines the partisan constructs of guerrilla honor, defeat, and extra-legal violence presented in Noted Guerrillas, Or, The Warfare of the Border (1877) by fire-eating Democratic newspaperman John Newman Edwards. Through his creation of âguerrilla memory,â Edwards kindled a significant counter-narrative to traditional strands of early-Lost Cause mythology. More importantly, by harnessing class-based bushwhacker imagery and violence, Edwards expanded the socio-economic reach of the conservative Lost Cause and adjoined a newly important political function to social memory during Reconstruction. Phase two addresses broader concepts of race, gender, citizenship, and commemoration by tracing how guerrilla memory and its bushwhackers-turned-authors adapted to shifting standards of conservatism in the New South and attempted to situate themselves snugly within its elite ranks. While highlighting how turn-of-the-century bushwhacker memoirs adapted to increasingly powerful women, subsequent wars, and changing racial attitudes, practical light is also shed on the fundamental processes of memory itselfâthat is, the theoretical means by which strains of memory are created, updated, and even destroyed. Finally, this thesis includes a sweeping historiographic analysis of guerrilla memory; how historians and propagandists waged a partisan struggle over the memory of William C. Quantrill as an avenue to controlling guerrilla memory as a whole; and how the fallout from this debate shapedâfor better and worseâthe study of Confederate guerrillas for decades. In the process of surveying these sources, methodological conclusions regarding the treatment of primary materials, allegedly âtaintedâ by the forces of social memory, are also addressed and put to rest. Overall, âPolitics of the Black Flag: Guerrilla Memory and Southern Conservatism in the New Southâ seeks to illuminate that deeper understanding of the ways in which southern conservatism has been remembered will, in turn, lead to equally better understanding of the forces and environment that shaped it.
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Roberts, Christopher G. "The Sanctioned Antiblackness of White Monumentality: Africological Epistemology as Compass, Black Memory, and Breaking the Colonial Map." Diss., Temple University Libraries, 2018. http://cdm16002.contentdm.oclc.org/cdm/ref/collection/p245801coll10/id/502652.
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African American StudiesPh.D.
In the cities of Richmond, Virginia; Charleston South Carolina; New Orleans, Louisiana; and Baltimore, Maryland, this dissertation endeavors to find out what can be learned about the archaeology(s) of Black memory(s) through Africological Epistemic Visual Storytelling (AEVS); their silences, their hauntings, their wake work, and their healing? This project is concerned with elucidating new African memories and African knowledges that emerge from a two-tier Afrocentric analysis of Eurocentric cartography that problematizes the dual hegemony of the colonial archive of public memory and the colonial map by using an Afrocentric methodology that deploys a Black Digital Humanities research design to create an African agentic ritual archive that counters the colonial one. Additionally, this dissertation explains the importance of understanding the imperial geographic logics inherent in the hegemonically quotidian cartographies of Europe and the United States that sanction white supremacist narratives of memory and suppress spatial imaginations and memories in African communities primarily, but Native American communities as well. It is the hope of the primary researcher that from this project knowledge will be gained about how African people can use knowledge gained from analyzing select monuments/sites of memorialization for the purposes of asserting agency, resisting, and possibly breaking the supposed correctness of the colonial map.
Temple University--Theses
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Hicks, Isaiah Deonte. ""We Don't Want Another Black Freedom Movement!" : An Inquiry into the desire for new social movements by comparing how people perceived both the Civil Rights Movement and the Black Power Movement versus the Black Lives Matter Movement." Bowling Green State University / OhioLINK, 2020. http://rave.ohiolink.edu/etdc/view?acc_num=bgsu1587123845884206.
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