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Dissertations / Theses on the topic 'Memory faults'

Author: Grafiati
Published: 4 June 2021
Last updated: 26 July 2025

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1

Koneru, Venkata Raja Ramchandar. "Fault Insertion and Fault Analysis of Neural Cache Memory." University of Cincinnati / OhioLINK, 2020. http://rave.ohiolink.edu/etdc/view?acc_num=ucin1592171695469746.

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2

Blum, Daniel Ryan. "Hardened by design approaches for mitigating transient faults in memory-based systems." Online access for everyone, 2007. http://www.dissertations.wsu.edu/Dissertations/Spring2007/d_blum_043007.pdf.

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3

Rink, Norman Alexander, and Jeronimo Castrillon. "Comprehensive Backend Support for Local Memory Fault Tolerance." Saechsische Landesbibliothek- Staats- und Universitaetsbibliothek Dresden, 2016. http://nbn-resolving.de/urn:nbn:de:bsz:14-qucosa-215785.

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Technological advances drive hardware to ever smaller feature sizes, causing devices to become more vulnerable to transient faults. Applications can be protected against faults by adding error detection and recovery measures in software. This is popularly achieved by applying automatic program transformations. However, transformations applied to program representations at abstraction levels higher than machine instructions are fundamentally incapable of protecting against vulnerabilities that are introduced during compilation. In particular, a large proportion of a program’s memory accesses ar
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ARORA, VIKRAM. "AN EFFICIENT BUILT-IN SELF-DIAGNOSTIC METHOD FOR NON-TRADITIONAL FAULTS OF EMBEDDED MEMORY ARRAYS." University of Cincinnati / OhioLINK, 2002. http://rave.ohiolink.edu/etdc/view?acc_num=ucin1037998809.

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5

Gadde, Priyanka. "A BIST Architecture for Testing LUTs in a Virtex-4 FPGA." University of Toledo / OhioLINK, 2013. http://rave.ohiolink.edu/etdc/view?acc_num=toledo1375316199.

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6

Mihalik, Whitney Mae. "Correcting Faults and Preserving Love: The Defense of Monastic Memory in Bernard of Clairvaux's Apologia and Peter the Venerable's Letter 28." University of Akron / OhioLINK, 2013. http://rave.ohiolink.edu/etdc/view?acc_num=akron1374487679.

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7

Izadi, Baback A. "Design of fault-tolerant distributed memory multiprocessors /." The Ohio State University, 1995. http://rave.ohiolink.edu/etdc/view?acc_num=osu148786754173319.

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8

MARTIN, ROBERT ROHAN. "MULTI-LEVEL CELL FLASH MEMORY FAULT TESTING AND DIAGNOSIS." University of Cincinnati / OhioLINK, 2005. http://rave.ohiolink.edu/etdc/view?acc_num=ucin1120232606.

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9

Taleb, Mohammed Yacine. "Optimizing Distributed In-memory Storage Systems˸ Fault-tolerance, Performance, Energy Efficiency." Thesis, Rennes, École normale supérieure, 2018. http://www.theses.fr/2018ENSR0015/document.

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Les technologies émergentes, telles que les objets connectés et les réseaux sociaux sont en train de changer notre manière d’interagir avec autrui. De par leur large adoption, ces technologies génèrent de plus en plus de données. Alors que la gestion de larges volumes de données fut l’un des sujets majeurs de la dernière décennie, un nouveau défi est apparu récemment : comment tirer profit de données générées en temps réel. Avec la croissance des capacités de mémoires vives, plusieurs fournisseurs services, tel que Facebook, déploient des péta-octets de DRAM afin de garantir un temps d’accès r
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Hulme, Charles A. "Testing and evaluation of the configurable fault tolerant processor (CFTP) for space-based application." Thesis, Monterey, Calif. : Springfield, Va. : Naval Postgraduate School ; Available from National Technical Information Service, 2003. http://library.nps.navy.mil/uhtbin/hyperion-image/03Dec%5FHulme.pdf.

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Thesis (M.S. in Electrical Engineering)--Naval Postgraduate School, December 2003.<br>Thesis advisor(s): Herschel H. Loomis, Jr., Alan A. Ross. Includes bibliographical references (p. 241-243). Also available online.
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11

Meenakshi, Siddharthan Rathna Keerthi. "Fault Modeling and Analysis for FinFET SRAM Arrays." University of Cincinnati / OhioLINK, 2013. http://rave.ohiolink.edu/etdc/view?acc_num=ucin1368014414.

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12

Butler, Bryan P. (Bryan Philip). "A fault-tolerant shared memory system architecture for a Byzantine resilient computer." Thesis, Massachusetts Institute of Technology, 1989. http://hdl.handle.net/1721.1/13360.

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Thesis (M.S.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 1989.<br>Includes bibliographical references (leaves 145-147).<br>by Bryan P. Butler.<br>M.S.
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13

Dhoke, Aditya Anil. "On Partial Aborts and Reducing Validation Costs in Fault-tolerant Distributed Transactional Memory." Thesis, Virginia Tech, 2013. http://hdl.handle.net/10919/23890.

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Distributed Transactional Memory (DTM) is an emerging synchronization abstraction thatpromises to alleviate the scalability, programmability, and composability challenges of lock-based distributed synchronization. With DTM, programmers organize code that read/writeshared memory objects, both local and remote, as memory transactions. An underlying DTMframework guarantees atomicity, isolation, and consistency properties for those transactionsthrough speculative concurrency control. In DTM, restarting an aborted transaction from the beginning can degrade performance astransactional conflicts may
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14

Gómez, Requena Crispín. "Low-Memory Techniques for Routing and Fault-Tolerance on the Fat-Tree Topology." Doctoral thesis, Universitat Politècnica de València, 2010. http://hdl.handle.net/10251/8856.

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Actualmente, los clústeres de PCs están considerados como una alternativa eficiente a la hora de construir supercomputadores en los que miles de nodos de computación se conectan mediante una red de interconexión. La red de interconexión tiene que ser diseñada cuidadosamente, puesto que tiene una gran influencia sobre las prestaciones globales del sistema. Dos de los principales parámetros de diseño de las redes de interconexión son la topología y el encaminamiento. La topología define la interconexión de los elementos de la red entre sí, y entre éstos y los nodos de computación. Por su parte,
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15

RAMAN, VENKATESH. "A STUDY OF CLUSTER PAGING METHODS TO BOOST VIRTUAL MEMORY PERFORMANCE." University of Cincinnati / OhioLINK, 2002. http://rave.ohiolink.edu/etdc/view?acc_num=ucin1014062558.

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16

KUNAPULI, UDAYKUMAR. "A STUDY OF SWAP CACHE BASED PREFETCHING TO IMPROVE VITUAL MEMORY PERFORMANCE." University of Cincinnati / OhioLINK, 2002. http://rave.ohiolink.edu/etdc/view?acc_num=ucin1014063417.

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17

Cassel, Mike [Verfasser]. "A Fault Tolerant Spaceborne Memory System with Very High Data Integrity Requirements / Mike Cassel." München : Verlag Dr. Hut, 2011. http://d-nb.info/1018982752/34.

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18

Biggs, Victoria Mary-Louise. "Stories on the fault lines : storytelling, community, and memory among Israeli and Palestinian youth." Thesis, University of Manchester, 2017. https://www.research.manchester.ac.uk/portal/en/theses/stories-on-the-fault-lines-storytelling-community-and-memory-among-israeli-and-palestinian-youth(6658280a-4c68-4fdd-906d-4c2afee21610).html.

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Storytelling holds a significant place in peace education and dialogue work with young people in Israel/Palestine, reflecting the popularity of the dual narrative approach as a framework for understanding the conflict. The approach is predicated on the assumption that there are two competing national narratives that have collided in the same geographical space, with young people only able to come to terms with the ‘other’ narrative through a process of concession and compromise, mediated by adults. Recognising the constraints and limitations of the dual narrative approach, my thesis focuses on
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19

Mauroux, Pierre-Didier. "Test et fiabilité des mémoires Flash." Thesis, Montpellier 2, 2011. http://www.theses.fr/2011MON20185/document.

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Depuis quelques années, les mémoires non-volatiles de type Flash sont présentes dans un grand nombre de systèmes sur puce. La grande densité d'intégration et la complexité de leur procédé de fabrication rendent les mémoires Flash de plus en plus sujette aux défauts. La présence de défauts dans les mémoires est une des problématiques majeures. En effet, de tels défauts pourraient affecter le rendement, la rétention, l'endurance et donc la fiabilité des mémoires Flash. Cette thèse a porté sur l'analyse des mécanismes de défaillances, la modélisation des comportements fautifs et le développement
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20

Halwan, Vivek. "Efficient and fault-tolerant communication algorithms in wormhole-routed distributed membory multiprocessors /." The Ohio State University, 1999. http://rave.ohiolink.edu/etdc/view?acc_num=osu1488187049539756.

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21

Shrimal, Shubhendra. "Maximizing Parallelization Opportunities by Automatically Inferring Optimal Container Memory for Asymmetrical Map Tasks." Bowling Green State University / OhioLINK, 2016. http://rave.ohiolink.edu/etdc/view?acc_num=bgsu1468011920.

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22

Stenberg, Johan. "Snapple : A distributed, fault-tolerant, in-memory key-value store using Conflict-Free Replicated Data Types." Thesis, KTH, Skolan för datavetenskap och kommunikation (CSC), 2016. http://urn.kb.se/resolve?urn=urn:nbn:se:kth:diva-188691.

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As services grow and receive more traffic, data resilience through replication becomes increasingly important. Modern large-scale Internet services such as Facebook, Google and Twitter serve millions of users concurrently. Replication is a vital component of distributed systems. Eventual consistency and Conflict-Free Replicated Data Types (CRDTs) are suggested as an alternative to strong consistency systems. This thesis implements and evaluates Snapple, a distributed, fault-tolerant, in-memory key-value database based on CRDTs running on the Java Virtual Machine. Snapple supports two kinds of
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23

Jeffery, Casey Miles. "Performance analysis of dynamic sparing and error correction techniques for fault tolerance in nanoscale memory structures." [Gainesville, Fla.] : University of Florida, 2004. http://purl.fcla.edu/fcla/etd/UFE0007163.

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24

Hirve, Sachin. "On the Fault-tolerance and High Performance of Replicated Transactional Systems." Diss., Virginia Tech, 2015. http://hdl.handle.net/10919/56668.

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With the recent technological developments in last few decades, there is a notable shift in the way business/consumer transactions are conducted. These transactions are usually triggered over the internet and transactional systems working in the background ensure that these transactions are processed. The majority of these transactions nowadays fall in Online Transaction Processing (OLTP) category, where low latency is preferred characteristic. In addition to low latency, OLTP transaction systems also require high service continuity and dependability. Replication is a common technique that ma
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25

Sanz-Marco, Vicent. "Fault tolerance for stream programs on parallel platforms." Thesis, University of Hertfordshire, 2015. http://hdl.handle.net/2299/17110.

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A distributed system is defined as a collection of autonomous computers connected by a network, and with the appropriate distributed software for the system to be seen by users as a single entity capable of providing computing facilities. Distributed systems with centralised control have a distinguished control node, called leader node. The main role of a leader node is to distribute and manage shared resources in a resource-efficient manner. A distributed system with centralised control can use stream processing networks for communication. In a stream processing system, applications typically
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26

Lepiller, Julien. "Vérification d'isolation de fautes logicielle." Thesis, Rennes 1, 2019. http://www.theses.fr/2019REN1S067.

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Nous sommes habitués à utiliser des ordinateurs sur lesquels coopèrent des programmes d'origines diverses. Chacun de ces programmes a besoin d'accéder à de la mémoire vive pour fonctionner correctement, mais il ne faudrait pas qu'un programme accède ou modifie la mémoire d'un autre programme. Si cela ce produisait, les programmes ne pourraient plus faire confiance à la mémoire et pourraient se comporter de manière erratique. Les programmeurs n'ont pourtant pas besoin de se mettre d'accord à l'avance sur les zones mémoire qu'ils pourront ou non utiliser. Le matériel s'occupe d'allouer des zones
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27

Pinho, Sara Maria Maio Ezedin. "Visões de criança, história de adultos: uma leitura de Fault lines, de Nancy Huston." reponame:Repositório Institucional da FURG, 2010. http://repositorio.furg.br/handle/1/2653.

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Dissertação(mestrado) - Universidade Federal do Rio Grande, Programa de Pós-Graduação em Letras, Instituto de Letras e Artes, 2010.<br>Submitted by Cristiane Silva (cristiane_gomides@hotmail.com) on 2012-10-20T10:50:47Z No. of bitstreams: 1 sarapinho.pdf: 776948 bytes, checksum: eadb2d192bf011f9be6bfa5a2755bd0b (MD5)<br>Approved for entry into archive by Bruna Vieira(bruninha_vieira@ibest.com.br) on 2012-11-05T13:57:17Z (GMT) No. of bitstreams: 1 sarapinho.pdf: 776948 bytes, checksum: eadb2d192bf011f9be6bfa5a2755bd0b (MD5)<br>Made available in DSpace on 2012-11-05T13:57:17Z (GMT). No. of bitst
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Kurt, Mehmet Can. "Fault-tolerant Programming Models and Computing Frameworks." The Ohio State University, 2015. http://rave.ohiolink.edu/etdc/view?acc_num=osu1437390499.

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29

Zhang, Tingting. "Finite Memory Observer Design for Continuous-Time Nonlinear Systems with Discrete-Time Measurements : application to diagnosis." Electronic Thesis or Diss., Bourges, INSA Centre Val de Loire, 2021. http://www.theses.fr/2021ISAB0006.

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L’objectif de cette thèse est de développer un observateur non linéaire pour un outil de diagnostic pour des systèmes non linéaires à temps continu et à mesures discrètes. Ce mémoire débute par l’étude de notions d’observabilité faisant le point sur l’observation de ces systèmes. Nous enchaînons ensuite par l’analyse d’observateurs non linéaires obtenu par optimisation, puis nous présentons les méthodes de diagnostic à l'aide d'observateurs. Un observateur à mémoire finie est ensuite synthétisé pour détecter et localiser les défauts capteurs et actionneurs d’une classe de systèmes non linéaire
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30

Haas, Florian [Verfasser], and Theo [Akademischer Betreuer] Ungerer. "Fault-tolerant Execution of Parallel Applications on x86 Multi-core Processors with Hardware Transactional Memory / Florian Haas ; Betreuer: Theo Ungerer." Augsburg : Universität Augsburg, 2019. http://d-nb.info/1194312942/34.

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31

Rhod, Eduardo Luis. "Proposal of two solutions to cope with the faulty behavior of circuits in future technologies." reponame:Biblioteca Digital de Teses e Dissertações da UFRGS, 2007. http://hdl.handle.net/10183/16086.

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A diminuição no tamanho dos dispositivos nas tecnologias do futuro traz consigo um grande aumento na taxa de erros dos circuitos, na lógica combinacional e seqüencial. Apesar de algumas potenciais soluções começarem a ser investigadas pela comunidade, a busca por circuitos tolerantes a erros induzidos por radiação, sem penalidades no desempenho, área ou potência, ainda é um assunto de pesquisa em aberto. Este trabalho propõe duas soluções para lidar com este comportamento imprevisível das tecnologias futuras: a primeira solução, chamada MemProc, é uma arquitetura baseada em memória que propõe
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Pacifico, Giuseppe. "Analisi degli effetti di guasti transitori di memorie resistive." Master's thesis, Alma Mater Studiorum - Università di Bologna, 2018. http://amslaurea.unibo.it/17267/.

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L'elaborato di tesi, argomenta il problema degli errori transitori nell'array di memoria ReRAM, in cui i driver sono colpiti da particelle energetiche. Viene messo in evidenza l'aumento di suscettibilità a questi errori, proporzionale all'aging dei driver. Sono mostrate simulazioni, in cui sono quantificati gli upset avvenuti nelle celle di memoria.
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33

Gupta, Viyas. "Analysis of single event radiation effects and fault mechanisms in SRAM, FRAM and NAND Flash : application to the MTCube nanosatellite project." Thesis, Montpellier, 2017. http://www.theses.fr/2017MONTS087/document.

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L’environnement radiatif spatial est un environnement sévère qui agit sur tout composants électroniques embarqués sur des engins spatiaux, y compris sous le bouclier naturel que nous procure le champ magnétique terrestre en orbite basse. Bien qu’il soit possible, en particulier à ces orbites, de se protéger efficacement contre les particules créant de la dose totale ionisante, cela pose plus de difficultés pour les particules générant des effets singuliers. Cela est d’autant plus un problème que l’utilisation des composants commerciaux (dits « COTS »), non conçus pour de telles applications, s
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34

Carré, Sébastien. "Attaques exploitant le temps de calcul : modélisation et protections." Electronic Thesis or Diss., Institut polytechnique de Paris, 2020. http://www.theses.fr/2020IPPAT045.

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Une classe d'attaque par canal auxiliaire particulièrement efficace est celle des attaques caches, qui exploitent une différence de temps entre les mémoires caches et la mémoire principale, qui sont considérées dans cette thèse d'un point de vue cryptographique. Un des objectifs de cette thèse est alors de mieux comprendre ces attaques. D'un autre côté, l'attaque Rowhammer est une attaque par faute qui induit des perturbations dans les condensateurs des modules DRAM dans le but de créer des erreurs appelées aussi fautes qui sont aussi considérées dans cette thèse d'un point de vue cryptographi
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Joubert, Philippe. "Conception et evaluation d'une architecture multiprocesseur a memoire partagee tolerante aux fautes." Rennes 1, 1993. http://www.theses.fr/1993REN10004.

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L'objectif de cette etude est la proposition d'une architecture multiprocesseur a memoire partagee tolerante aux fautes. Pour recuperer les defaillances de processus communiquant par memoire partagee, nous proposons un protocole de recuperation d'erreurs par retour arriere de type planifie qui prend en compte les communications au moyen d'une relation de dependance qui permet de definir dynamiquement l'ensemble des processus concernes par l'etablissement ou la restauration d'un point de recuperation. Nous proposons une mise en uvre de ce protocole dans laquelle la gestion des points de recuper
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36

Gruwell, Ammon Bradley. "High-Speed Programmable FPGA Configuration Memory Access Using JTAG." BYU ScholarsArchive, 2017. https://scholarsarchive.byu.edu/etd/6321.

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Over the past couple of decades Field Programmable Gate Arrays (FPGAs) have become increasingly useful in a variety of domains. This is due to their low cost and flexibility compared to custom ASICs. This increasing interest in FPGAs has driven the need for tools that both qualify and improve the reliability of FPGAs for applications where the reconfigurability of FPGAs makes them vulnerable to radiation upsets such as in aerospace environments. Such tools ideally work with a wide variety of devices, are highly programmable but simple to use, and perform tasks at relatively high speeds. Of
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GEFFLAUT, ALAIN. "Proposition et evaluation d'une architecture multiprocesseur extensible a memoire partagee tolerante aux fautes." Rennes 1, 1995. http://www.theses.fr/1995REN10034.

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L'objectif de cette etude est la proposition d'une architecture multiprocesseur extensible a memoire partagee tolerante aux fautes. Pour ameliorer leur efficacite, les architectures extensibles a memoire partagee utilisent des caches maintenus coherents a l'aide de protocoles de coherence. Les architectures coma (cache only memory architectures) etendent ce principe en utilisant les memoires standard comme des caches de grande dimension. D'un autre cote, la recuperation arriere est une technique de tolerance aux fautes qui necessite la conservation et la replication de donnees de recuperation.
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Lorente, Garcés Vicente Jesús. "Cache architectures based on heterogeneous technologies to deal with manufacturing errors." Doctoral thesis, Universitat Politècnica de València, 2015. http://hdl.handle.net/10251/58428.

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[EN] SRAM technology has traditionally been used to implement processor caches since it is the fastest existing RAM technology.However,one of the major drawbacks of this technology is its high energy consumption.To reduce this energy consumption modern processors mainly use two complementary techniques: i)low-power operating modes and ii)low-power memory technologies.The first technique allows the processor working at low clock frequencies and supply voltages.The main limitation of this technique is that manufacturing defects can significantly affect the reliability of SRAM cells when working
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Matana, luza Lucas. "Étude des effets induits par la radiation spatial et atmosphérique sur des mémoires électroniques." Electronic Thesis or Diss., Montpellier, 2021. http://www.theses.fr/2021MONTS100.

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Le rayonnement est défini comme l'émission ou la transmission d'énergie sous forme d'ondes ou de particules, qui peuvent être ionisantes ou non ionisantes. L'interaction entre le rayonnement et la matière peut générer différentes réactions, qui peuvent varier en fonction des propriétés de la particule (type, énergie cinétique, masse et charge) et de la matière ciblée (semi-conducteurs dans le cadre de cette thèse). L'exposition de composants électroniques à des environnements avec une présence significative de rayonnement peut conduire à ce type d'interaction et, par conséquent, à une variété
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Pottier, Loïc. "Co-scheduling for large-scale applications : memory and resilience." Thesis, Lyon, 2018. http://www.theses.fr/2018LYSEN039/document.

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Cette thèse explore les problèmes liés à l'ordonnancement concurrent dans le contexte des applications massivement parallèle, de deux points de vue: le coté mémoire (en particulier la mémoire cache) et le coté tolérance aux fautes.Avec l'avènement récent des architectures dites many-core, tels que les récents processeurs multi-coeurs, le nombre d'unités de traitement augmente de manière importante.Dans ce contexte, les avantages fournis par les techniques d'ordonnancements concurrents ont été démontrés à travers de nombreuses études.L'ordonnancement concurrent, aussi appelé co-ordonnancement,
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41

Seclen, Jorge Lucio Tonfat. "Frame-level redundancy scrubbing technique for SRAM-based FPGAs." reponame:Biblioteca Digital de Teses e Dissertações da UFRGS, 2015. http://hdl.handle.net/10183/143194.

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Confiabilidade é um parâmetro de projeto importante para aplicações criticas tanto na Terra como também no espaço. Os FPGAs baseados em memoria SRAM são atrativos para implementar aplicações criticas devido a seu alto desempenho e flexibilidade. No entanto, estes FPGAs são susceptíveis aos efeitos da radiação tais como os erros transientes na memoria de configuração. Além disso, outros efeitos como o envelhecimento (aging) ou escalonamento da tensão de alimentação (voltage scaling) incrementam a sensibilidade à radiação dos FPGAs. Nossos resultados experimentais mostram que o envelhecimento e
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42

KERMARREC, ANNE-MARIE. "Une approche globale fondee sur la replication pour la disponibilite et l'efficacite des systemes extensibles a memoire partagee." Rennes 1, 1996. http://www.theses.fr/1996REN10105.

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Les travaux presentes dans cette these portent sur la conception et la mise en uvre d'un mecanisme efficace de tolerance aux fautes, exploitant la replication de donnees, dans les systemes extensibles a memoire partagee repartie (mpr). Ces architectures sont particulierement attrayantes pour l'execution des applications paralleles dont les besoins ne cessent d'augmenter car elles allient un modele de programmation simple a une grande puissance de calcul. Toutefois, l'inconvenient majeur de ces architectures est leur probabilite de defaillance qu'entraine le nombre substantiel d'elements dont e
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43

Vašíček, Libor. "Efektivní správa paměti ve vícevláknových aplikacích." Master's thesis, Vysoké učení technické v Brně. Fakulta informačních technologií, 2008. http://www.nusl.cz/ntk/nusl-235931.

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This thesis describes design and implementation of effective memory management for multi-threaded applications. At first, the virtual memory possibilities are described, which can be found in the latest operating systems, such as Microsoft Windows and Linux. Afterwards the most frequently used algorithms for memory management are explained. Consequently, their features are used properly for a new memory manager. Final design includes particular tools for application debugging and profiling. At the end of the thesis a series of tests and evaluation of achieved results were done.
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44

Rabeyroux, Nicolas. "Que faut-il penser de l'antibioprophylaxie dans les fractures ouvertes de membres ? bilan de cinq ans d'experience au samu de montlucon." Clermont-Ferrand 1, 1991. http://www.theses.fr/1991CLF13041.

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CASABURO, NATHALIE. "Faut-il associer l'epiphysiodese du perone a l'epiphysiodese tibiale dans le traitement des inegalites de longueur des membres inferieurs ?" Lyon 1, 1990. http://www.theses.fr/1990LYO1M201.

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Nechvátal, Petr. "Výuková aplikace stránkování paměti." Master's thesis, Vysoké učení technické v Brně. Fakulta informačních technologií, 2017. http://www.nusl.cz/ntk/nusl-385867.

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This master's thesis deals with design and implementation of educational application forpaging. Goal of the application is to help students understand and practice some conceptsfrom paging. It will allow students to write parts of these concepts and see how their codework on visualization of simulation of memory system. Application will be implemented asa web application in HTML, CSS and JavaScript. Server, which will be taking care ofcompiling of user code will be a desktop application. This thesis mainly describes pagingand technologies which will be used for this thesis and application desi
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Khorguani, Ana. "Gestion de données persistantes efficace pour des serveurs hybrides avec mémoire non-volatile." Electronic Thesis or Diss., Université Grenoble Alpes, 2023. http://www.theses.fr/2023GRALM069.

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Les technologies de mémoire non-volatile (NVMM) offrent une excellente opportunité pour créer des programmes rapides et tolérants aux fautes, car elles fournissent un stockage persistant utilisable comme mémoire principale. Cependant, puisque les caches du processeur restent volatiles, des solutions sont nécessaires pour récupérer un état cohérent à partir de la NVMM après un crash. Dans cette thèse, nous proposons des techniques de sauvegarde de points de reprise en NVMM afin de rendre les programmes multi-threads tolérants aux fautes. Nous nous concentrons principalement sur l'optimisation d
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Heczko, Martin. "Počítačové modelování hranic dvojčatění ve slitinách s tvarovou pamětí." Master's thesis, Vysoké učení technické v Brně. Fakulta strojního inženýrství, 2020. http://www.nusl.cz/ntk/nusl-416633.

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This Master‘s thesis is focused on theoretical study of twinning in magnetic shape memory alloys based on Ni2MnGa using ab initio calculations of electronic structure within the projector augmented wave method. In particular, the effect of increasing concentration of manganese at the expense of gallium was studied on total energy and stress profiles along different deformation paths in the (10-1)[101] shear system of non-modulated martensite. Further, this work deals with the effect of the concentration of manganese on the energy of planar fault caused by presence of partial dislocation due to
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Le, Bouder Gabriel. "Optimisation de la mémoire pour les algorithmes distribués auto-stabilisants." Electronic Thesis or Diss., Sorbonne université, 2023. http://www.theses.fr/2023SORUS002.

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L'auto-stabilisation est un paradigme adapté aux systèmes distribués, particulièrement susceptibles de subir des fautes transitoires. Des erreurs de corruption de mémoire, de messages, la rupture d'un lien de communication peuvent plonger le système dans un état incohérent. Un protocole est auto-stabilisant si, quel que soit l'état initial du système, il garantit un retour à un fonctionnement normal en temps fini. Plusieurs contraintes s'appliquent aux algorithmes conçus pour les systèmes distribués. L'asynchronie en est un exemple emblématique. Une des manières d'appréhender ces problèmes est
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Zana-Regniez, Marie-Françoise. "Mémoire au féminin : la mémoire de l'histoire dans les romans autobiographiques et les chroniques familiales de Anna Banti, Fausta Cialente, Gianna Manzini, Virginia Galante Garrone, Lalla Romano, Natalia Ginzburg, Marina Jarre... /par Marie-Françoise Zana-Regniez." Grenoble 3, 1991. http://www.theses.fr/1991GRE39034.

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A travers le biais de la memoire, ce travail suit des itineraires de femmes - de l'unite italienne au neo-feminisme-dela maison, espace feminin traditionnel, et espace specifique pour la femme elle-meme (la maison comme un ventre maternel), jusqu'au "monde" trouble de cette fin de millenaire : la "storia" d'un quotidien qui rend compte cependant de la violence du siecle. La maison etant fonction d'un imaginaire social autant que domestique, quitter la maison repond a une double necessite pour les femmes: dystopie de la maison comme vaine protection et volonte de participer a la gestion du mond
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