Relevant bibliographies by topics / Memory on Silicon

Contents

  1. Journal articles
  2. Dissertations / Theses
  3. Books
  4. Book chapters
  5. Conference papers
  6. Reports

Academic literature on the topic 'Memory on Silicon'

Author: Grafiati
Published: 4 June 2021
Last updated: 18 February 2022

Create a spot-on reference in APA, MLA, Chicago, Harvard, and other styles

Select a source type:

Consult the lists of relevant articles, books, theses, conference reports, and other scholarly sources on the topic 'Memory on Silicon.'

Next to every source in the list of references, there is an 'Add to bibliography' button. Press on it, and we will generate automatically the bibliographic reference to the chosen work in the citation style you need: APA, MLA, Harvard, Chicago, Vancouver, etc.

You can also download the full text of the academic publication as pdf and read online its abstract whenever available in the metadata.

Journal articles on the topic "Memory on Silicon"

1

Jackson, W. B., R. Elder, W. Hamburgen, et al. "Amorphous silicon memory arrays." Journal of Non-Crystalline Solids 352, no. 9-20 (2006): 859–62. http://dx.doi.org/10.1016/j.jnoncrysol.2005.11.139.

Full text
APA, Harvard, Vancouver, ISO, and other styles
2

Walters, R. J., P. G. Kik, J. D. Casperson, et al. "Silicon optical nanocrystal memory." Applied Physics Letters 85, no. 13 (2004): 2622–24. http://dx.doi.org/10.1063/1.1795364.

Full text
APA, Harvard, Vancouver, ISO, and other styles
3

Wang, Gunuk, Yang Yang, Jae-Hwang Lee, et al. "Nanoporous Silicon Oxide Memory." Nano Letters 14, no. 8 (2014): 4694–99. http://dx.doi.org/10.1021/nl501803s.

Full text
APA, Harvard, Vancouver, ISO, and other styles
4

Shannon, J. M., and S. P. Lau. "Memory switching in amorphous silicon-rich silicon carbide." Electronics Letters 35, no. 22 (1999): 1976. http://dx.doi.org/10.1049/el:19991296.

Full text
APA, Harvard, Vancouver, ISO, and other styles
5

Stone, N. J., and H. Ahmed. "Silicon single-electron memory structure." Microelectronic Engineering 41-42 (March 1998): 511–14. http://dx.doi.org/10.1016/s0167-9317(98)00119-1.

Full text
APA, Harvard, Vancouver, ISO, and other styles
6

Tiwari, Sandip, Farhan Rana, Hussein Hanafi, Allan Hartstein, Emmanuel F. Crabbé, and Kevin Chan. "A silicon nanocrystals based memory." Applied Physics Letters 68, no. 10 (1996): 1377–79. http://dx.doi.org/10.1063/1.116085.

Full text
APA, Harvard, Vancouver, ISO, and other styles
7

Lim, Doohyeok, Jaemin Son, Kyoungah Cho, and Sangsig Kim. "Quasi‐Nonvolatile Silicon Memory Device." Advanced Materials Technologies 5, no. 12 (2020): 2000915. http://dx.doi.org/10.1002/admt.202000915.

Full text
APA, Harvard, Vancouver, ISO, and other styles
8

Stone, N. J., and H. Ahmed. "Silicon single electron memory cell." Applied Physics Letters 73, no. 15 (1998): 2134–36. http://dx.doi.org/10.1063/1.122401.

Full text
APA, Harvard, Vancouver, ISO, and other styles
9

Poitrasson, Franck. "A silicon memory of subduction." Nature Geoscience 12, no. 9 (2019): 682–83. http://dx.doi.org/10.1038/s41561-019-0418-3.

Full text
APA, Harvard, Vancouver, ISO, and other styles
10

Barrios, C. A., and M. Lipson. "Silicon photonic read-only memory." Journal of Lightwave Technology 24, no. 7 (2006): 2898–905. http://dx.doi.org/10.1109/jlt.2006.875964.

Full text
APA, Harvard, Vancouver, ISO, and other styles
More sources

Dissertations / Theses on the topic "Memory on Silicon"

1

Garcia, Ramirez Mario Alberto. "Suspended gate silicon nanodot memory." Thesis, University of Southampton, 2011. https://eprints.soton.ac.uk/204355/.

Full text
Abstract:
The non-volatile memory market has been driven by Flash memory since its invention more than three decades ago. Today, this non-volatile memory is used in a wide variety of devices and systems from pen drives, mp3 players to cars, planes and satellites. However,the conventional floating gate memory technology in use for flash memory is facing a serious scalability issue, the tunnel oxide thickness cannot be reduced to less than 7nm as pointed out in the latest international technology roadmap for semiconductors (ITRS2010) [1]. The limit imposed on the tunnel oxide layer reduces the programming
APA, Harvard, Vancouver, ISO, and other styles
2

Cheong, Kuan Yew, and n/a. "Silicon Carbide as the Nonvolatile-Dynamic-Memory Material." Griffith University. School of Microelectronic Engineering, 2004. http://www4.gu.edu.au:8080/adt-root/public/adt-QGU20050115.101233.

Full text
Abstract:
This thesis consists of three main parts, starting with the use of improved nitridation processes to grow acceptable quality gate oxides on silicon carbide (SiC)[1]–[7], to the comprehensive investigation of basic electron-hole generation process in 4H SiC-based metal–oxide–semiconductor (MOS) capacitors [8], [9], and concluding with the experimental demonstration and analysis of nonvolatile characteristics of 4H SiC-based memory devices [10]–[15]. In the first part of the thesis, two improved versions of nitridation techniques have been introduced to alleviate oxide-growth rate and toxicity p
APA, Harvard, Vancouver, ISO, and other styles
3

Feng, Tao Atwater Harry Albert. "Silicon nanocrystal charging dynamics and memory device applications /." Diss., Pasadena, Calif. : Caltech, 2006. http://resolver.caltech.edu/CaltechETD:etd-06052006-141803.

Full text
APA, Harvard, Vancouver, ISO, and other styles
4

Choi, Wee Kiong. "The forming process in amorphous silicon memory devices." Thesis, University of Edinburgh, 1986. http://hdl.handle.net/1842/13377.

Full text
APA, Harvard, Vancouver, ISO, and other styles
5

Gateru, Robert Gitumbo. "Memory switching in ion bombarded hydrogenated amorphous silicon alloys." Thesis, University of Surrey, 2003. http://epubs.surrey.ac.uk/842936/.

Full text
Abstract:
Electrical, forming and switching characteristics of metal-semiconductor-metal (MSM) memory switches of ion bombarded hydrogenated amorphous silicon (a-Si:H) and its alloys are presented. MSM devices for memory switching applications are known to be characterised by instabilities as well as non-uniformity and irreproducibility of the forming and switching characteristics. It is believed that the presence of defect states in the semiconductor layer plays a significant role in the observation of memory switching in these MSM devices. Gas-phase doping and current stressing of the semiconductor ar
APA, Harvard, Vancouver, ISO, and other styles
6

Hu, Jian. "Constant current forming in amorphous silicon semiconductor memory devices." Thesis, University of Edinburgh, 1998. http://hdl.handle.net/1842/14120.

Full text
Abstract:
This thesis describes the forming process under <I>constant current </I>conditions of Cr/<I>p</I><SUP>+</SUP>/V thin film devices (a-Si:H denotes hydrogenated amorphous silicon). In the initial stages of electro-forming by constant current stressing, with increasing injection of charge via either increasing bias or time, the <I>J - V </I>characteristics of devices exhibit an instability, as shown by a decrease in the reverse current. This is interpreted in terms of the creation of defects in the a-Si:H. The defect generation rate, as measured by the voltage shift verse current in the <I>J - V<
APA, Harvard, Vancouver, ISO, and other styles
7

Nominanda, Helinda. "Amorphous silicon thin film transistor as nonvolatile device." Texas A&M University, 2008. http://hdl.handle.net/1969.1/86004.

Full text
Abstract:
n-channel and p-channel amorphous-silicon thin-film transistors (a-Si:H TFTs) with copper electrodes prepared by a novel plasma etching process have been fabricated and studied. Their characteristics are similar to those of TFTs with molybdenum electrodes. The reliability was examined by extended high-temperature annealing and gate-bias stress. High-performance CMOS-type a-Si:H TFTs can be fabricated with this plasma etching method. Electrical characteristics of a-Si:H TFTs after Co-60 irradiation and at different experimental stages have been measured. The gamma-ray irradiation damaged bulk f
APA, Harvard, Vancouver, ISO, and other styles
8

Buckwell, Mark. "Probing the resistance switching mechanism in silicon suboxide memory devices." Thesis, University College London (University of London), 2018. http://discovery.ucl.ac.uk/10047028/.

Full text
Abstract:
Redox-based resistive random access memory has the scope to greatly improve upon current electronic data storage, though the mechanism by which devices operate is not understood completely. In particular, the connection between oxygen migration, the formation of conductive filaments and device longevity is still disputed. Here, I used atomic force microscopy, scanning electron microscopy and x-ray photoelectron spectroscopy to characterise the growth of filaments and the movement of oxygen in silicon-rich silicon oxide memory devices. As such, I was able to establish some of the chemical and s
APA, Harvard, Vancouver, ISO, and other styles
9

Gage, Simon M. "Amorphous silicon memory devices : the forming process and filamentary conduction." Thesis, University of Edinburgh, 1989. http://hdl.handle.net/1842/13866.

Full text
APA, Harvard, Vancouver, ISO, and other styles
10

Olivares, Sánchez-Mellado Irene. "Development of Photonic Devices Based on the Strained Silicon Technology." Doctoral thesis, Universitat Politècnica de València, 2021. http://hdl.handle.net/10251/167055.

Full text
Abstract:
[ES] En la última década, la plataforma de silicio ha emergido como la plataforma por excelencia para desarrollar circuitos fotónicos integrados debido a su versatilidad, la posibilidad de miniaturización y de una producción de bajo coste y a gran escala compatible con los sistemas CMOS ("complementary metal-oxide semiconductor"). La conversión de señales eléctricas a alta velocidad en señales ópticas es una función crítica hoy en día tanto para el procesamiento de datos como en el ámbito de las telecomunicaciones. La forma más eficaz de implementar actualementeuna ,modulación electro-óp
APA, Harvard, Vancouver, ISO, and other styles
More sources

Books on the topic "Memory on Silicon"

1

Marshall, Andrew. SOI design: Analog, memory and digital techniques. Kluwer Academic Publishers, 2002.

Find full text
APA, Harvard, Vancouver, ISO, and other styles
2

Sreedhar, Natarajan, ed. SOI design: Analog, memory and digital techniques. Kluwer Academic Publishers, 2002.

Find full text
APA, Harvard, Vancouver, ISO, and other styles
3

Silicon non-volatile memories: Paths of innovation. ISTE, 2009.

Find full text
APA, Harvard, Vancouver, ISO, and other styles
4

Marshall, Andrew. SOI design: Analog, memory and digital techniques. Kluwer Academic Publishers, 2002.

Find full text
APA, Harvard, Vancouver, ISO, and other styles
5

Andrew, Marshall. SOI design: Analog, memory and digital techniques. Kluwer Academic Publishers, 2002.

Find full text
APA, Harvard, Vancouver, ISO, and other styles
6

Maeda, Shigenobu. Teishōhi denryoku kōsoku MOSFET gijutsu: Takesshō shirikon TFT fukagata SRAM to SOI debaisu. Sipec, 2002.

Find full text
APA, Harvard, Vancouver, ISO, and other styles
7

Bhattacharyya, Arup. Silicon Based Unified Memory Devices and Technology. Taylor & Francis Group, 2017.

Find full text
APA, Harvard, Vancouver, ISO, and other styles
8

Silicon Based Unified Memory Devices and Technology. Taylor & Francis Group, 2017.

Find full text
APA, Harvard, Vancouver, ISO, and other styles
9

Bhattacharyya, Arup. Silicon Based Unified Memory Devices and Technology. CRC Press, 2017. http://dx.doi.org/10.1201/9781315206868.

Full text
APA, Harvard, Vancouver, ISO, and other styles
10

Marshall, Andrew, and Sreedhar Natarajan. SOI Design: Analog, Memory and Digital Techniques. Springer, 2001.

Find full text
APA, Harvard, Vancouver, ISO, and other styles
More sources

Book chapters on the topic "Memory on Silicon"

1

Oda, Shunri, and Shaoyun Huang. "Silicon Nanocrystal Flash Memory." In Silicon Nanocrystals. Wiley-VCH Verlag GmbH & Co. KGaA, 2010. http://dx.doi.org/10.1002/9783527629954.ch15.

Full text
APA, Harvard, Vancouver, ISO, and other styles
2

Rao, R. A., M. A. Sadd, R. F. Steimle, C. T. Swift, H. Gasquet, and M. Stoker. "Silicon Nanocrystal Nonvolatile Memory." In Nanotechnology for Electronic Materials and Devices. Springer US, 2007. http://dx.doi.org/10.1007/978-0-387-49965-9_4.

Full text
APA, Harvard, Vancouver, ISO, and other styles
3

Duisenbaev, M. "Quenching Photoconductivity and Photoelectric Memory in 6H-SiC." In Silicon Carbide and Related Materials 2005. Trans Tech Publications Ltd., 2006. http://dx.doi.org/10.4028/0-87849-425-1.513.

Full text
APA, Harvard, Vancouver, ISO, and other styles
4

Lee, Doowon, and Valeria Bertacco. "Test Generation and Lightweight Checking for Multi-core Memory Consistency." In Post-Silicon Validation and Debug. Springer International Publishing, 2018. http://dx.doi.org/10.1007/978-3-319-98116-1_9.

Full text
APA, Harvard, Vancouver, ISO, and other styles
5

Vergos, Haridimos T., Dimitris Nikolos, Petros Mitsiadis, and Chrisovalantis Kavousianos. "Reconfigurable CPU Cache Memory Design: Fault Tolerance and Performance Evaluation." In VLSI: Integrated Systems on Silicon. Springer US, 1997. http://dx.doi.org/10.1007/978-0-387-35311-1_9.

Full text
APA, Harvard, Vancouver, ISO, and other styles
6

Mahmoodi, Hamid. "Low-Power and Variation-Tolerant Memory Design." In Low-Power Variation-Tolerant Design in Nanometer Silicon. Springer US, 2010. http://dx.doi.org/10.1007/978-1-4419-7418-1_5.

Full text
APA, Harvard, Vancouver, ISO, and other styles
7

Yang, Seung Dong, Kwang Seok Jeong, Ho Jin Yun, et al. "RTS Noise Analysis in Fin-type Silicon-Oxide-High-k-Oxide-Silicon Flash Memory." In Supplemental Proceedings. John Wiley & Sons, Inc., 2012. http://dx.doi.org/10.1002/9781118357002.ch11.

Full text
APA, Harvard, Vancouver, ISO, and other styles
8

Li, Qiliang, X. Zhu, Y. Yang, D. E. Ioannou, J. S. Suehle, and C. A. Richter. "Silicon Nanowire-Based Nonvolatile Memory Cells: Progress and Prospects." In Future Trends in Microelectronics. John Wiley & Sons, Inc., 2010. http://dx.doi.org/10.1002/9780470649343.ch16.

Full text
APA, Harvard, Vancouver, ISO, and other styles
9

Lenoski, Daniel E., and James P. Laudon. "Scalable Shared-Memory Multiprocessing and the Silicon Graphics S2MP Architecture." In Advances in High Performance Computing. Springer Netherlands, 1997. http://dx.doi.org/10.1007/978-94-011-5514-4_3.

Full text
APA, Harvard, Vancouver, ISO, and other styles
10

Tsendin, K. D. "Chalcogenide Glassy Semiconductors - Could They Replace Silicon in Memory Devices?" In Future Trends in Microelectronics. John Wiley & Sons, Inc., 2010. http://dx.doi.org/10.1002/9780470649343.ch18.

Full text
APA, Harvard, Vancouver, ISO, and other styles

Conference papers on the topic "Memory on Silicon"

1

Steimle, R. F., R. A. Rao, B. Hradsky, et al. "Hybrid Silicon Nanocrystal Silicon Nitride Memory." In 2003 International Conference on Solid State Devices and Materials. The Japan Society of Applied Physics, 2003. http://dx.doi.org/10.7567/ssdm.2003.e-9-2.

Full text
APA, Harvard, Vancouver, ISO, and other styles
2

Jo, Mingyu, Reon Katsumura, Atsushi Tsurumaki-Fukuchi, et al. "Analog memory characteristics of 1T1R MoOx resistive random access memory." In 2016 IEEE Silicon Nanoelectronics Workshop (SNW). IEEE, 2016. http://dx.doi.org/10.1109/snw.2016.7577993.

Full text
APA, Harvard, Vancouver, ISO, and other styles
3

Feng, Yang, Xuepeng Zhan, and Jiezhi Chen. "Flash Memory based Computing-In-Memory to Solve Time-dependent Partial Differential Equations." In 2020 IEEE Silicon Nanoelectronics Workshop (SNW). IEEE, 2020. http://dx.doi.org/10.1109/snw50361.2020.9131425.

Full text
APA, Harvard, Vancouver, ISO, and other styles
4

Lee, Gil Sung, Il Han Park, Seongjae Cho, et al. "Memory characteristics improvement encouraged by the shape of narrow drain in cone SONOS memory structure." In 2008 IEEE Silicon Nanoelectronics Workshop (SNW). IEEE, 2008. http://dx.doi.org/10.1109/snw.2008.5418386.

Full text
APA, Harvard, Vancouver, ISO, and other styles
5

Dukovic, J., S. Ramaswami, S. Pamarthy, et al. "Through-silicon-via technology for 3D integration." In 2010 IEEE International Memory Workshop. IEEE, 2010. http://dx.doi.org/10.1109/imw.2010.5488399.

Full text
APA, Harvard, Vancouver, ISO, and other styles
6

Moon, Kibong, Sangsu Park, Daeseok Lee, et al. "Resistive-switching analogue memory device for neuromorphic application." In 2014 Silicon Nanoelectronics Workshop (SNW). IEEE, 2014. http://dx.doi.org/10.1109/snw.2014.7348602.

Full text
APA, Harvard, Vancouver, ISO, and other styles
7

Barrios, C. A., and M. Lipson. "Silicon photonic nonvolatile memory device." In Frontiers in Optics. OSA, 2005. http://dx.doi.org/10.1364/fio.2005.jwa63.

Full text
APA, Harvard, Vancouver, ISO, and other styles
8

Miscuglio, Mario, Jiawei Meng, Omer Yesiliurt, et al. "Intelligent edge processing with photonic multilevel memory." In Integrated Photonics Research, Silicon and Nanophotonics. OSA, 2020. http://dx.doi.org/10.1364/iprsn.2020.im2a.4.

Full text
APA, Harvard, Vancouver, ISO, and other styles
9

Maikap, S., W. Banerjee, S. Z. Rahaman, and A. Das. "Flash memory device characteristics of atomic layer deposited crystallite Al2O3 films with large memory window and long retention." In 2008 IEEE Silicon Nanoelectronics Workshop (SNW). IEEE, 2008. http://dx.doi.org/10.1109/snw.2008.5418388.

Full text
APA, Harvard, Vancouver, ISO, and other styles
10

Hung, Min-Feng, Jiang-Hung Chen, and Yung-Chun Wu. "Π-gate nanowires TANOS poly-Si TFT nonvolatile memory." In 2010 Silicon Nanoelectronics Workshop (SNW). IEEE, 2010. http://dx.doi.org/10.1109/snw.2010.5562547.

Full text
APA, Harvard, Vancouver, ISO, and other styles

Reports on the topic "Memory on Silicon"

1

DRAPER, BRUCE L., D. M. FLEETWOOD, TIMOTHY L. MEISENHEIMER, et al. A Novel Non-Destructive Silicon-on-Insulator Nonvolatile Memory - LDRD 99-0750 Final Report. Office of Scientific and Technical Information (OSTI), 1999. http://dx.doi.org/10.2172/14811.

Full text
APA, Harvard, Vancouver, ISO, and other styles
2

Baker, Michael Sean, and Kenneth Roy Pohl. High-G testing of MEMS mechanical non-volatile memory and silicon re-entry switch. Office of Scientific and Technical Information (OSTI), 2005. http://dx.doi.org/10.2172/875630.

Full text
APA, Harvard, Vancouver, ISO, and other styles
You might also be interested in the extended bibliographies on the topic 'Memory on Silicon' for particular source types:
Journal articles Dissertations / Theses Books
We offer discounts on all premium plans for authors whose works are included in thematic literature selections. Contact us to get a unique promo code!

To the bibliography