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1

Garcia, Ramirez Mario Alberto. "Suspended gate silicon nanodot memory." Thesis, University of Southampton, 2011. https://eprints.soton.ac.uk/204355/.

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The non-volatile memory market has been driven by Flash memory since its invention more than three decades ago. Today, this non-volatile memory is used in a wide variety of devices and systems from pen drives, mp3 players to cars, planes and satellites. However,the conventional floating gate memory technology in use for flash memory is facing a serious scalability issue, the tunnel oxide thickness cannot be reduced to less than 7nm as pointed out in the latest international technology roadmap for semiconductors (ITRS2010) [1]. The limit imposed on the tunnel oxide layer reduces the programming
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2

Cheong, Kuan Yew, and n/a. "Silicon Carbide as the Nonvolatile-Dynamic-Memory Material." Griffith University. School of Microelectronic Engineering, 2004. http://www4.gu.edu.au:8080/adt-root/public/adt-QGU20050115.101233.

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This thesis consists of three main parts, starting with the use of improved nitridation processes to grow acceptable quality gate oxides on silicon carbide (SiC)[1]–[7], to the comprehensive investigation of basic electron-hole generation process in 4H SiC-based metal–oxide–semiconductor (MOS) capacitors [8], [9], and concluding with the experimental demonstration and analysis of nonvolatile characteristics of 4H SiC-based memory devices [10]–[15]. In the first part of the thesis, two improved versions of nitridation techniques have been introduced to alleviate oxide-growth rate and toxicity p
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3

Feng, Tao Atwater Harry Albert. "Silicon nanocrystal charging dynamics and memory device applications /." Diss., Pasadena, Calif. : Caltech, 2006. http://resolver.caltech.edu/CaltechETD:etd-06052006-141803.

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4

Choi, Wee Kiong. "The forming process in amorphous silicon memory devices." Thesis, University of Edinburgh, 1986. http://hdl.handle.net/1842/13377.

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5

Gateru, Robert Gitumbo. "Memory switching in ion bombarded hydrogenated amorphous silicon alloys." Thesis, University of Surrey, 2003. http://epubs.surrey.ac.uk/842936/.

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Electrical, forming and switching characteristics of metal-semiconductor-metal (MSM) memory switches of ion bombarded hydrogenated amorphous silicon (a-Si:H) and its alloys are presented. MSM devices for memory switching applications are known to be characterised by instabilities as well as non-uniformity and irreproducibility of the forming and switching characteristics. It is believed that the presence of defect states in the semiconductor layer plays a significant role in the observation of memory switching in these MSM devices. Gas-phase doping and current stressing of the semiconductor ar
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6

Hu, Jian. "Constant current forming in amorphous silicon semiconductor memory devices." Thesis, University of Edinburgh, 1998. http://hdl.handle.net/1842/14120.

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This thesis describes the forming process under <I>constant current </I>conditions of Cr/<I>p</I><SUP>+</SUP>/V thin film devices (a-Si:H denotes hydrogenated amorphous silicon). In the initial stages of electro-forming by constant current stressing, with increasing injection of charge via either increasing bias or time, the <I>J - V </I>characteristics of devices exhibit an instability, as shown by a decrease in the reverse current. This is interpreted in terms of the creation of defects in the a-Si:H. The defect generation rate, as measured by the voltage shift verse current in the <I>J - V<
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7

Nominanda, Helinda. "Amorphous silicon thin film transistor as nonvolatile device." Texas A&M University, 2008. http://hdl.handle.net/1969.1/86004.

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n-channel and p-channel amorphous-silicon thin-film transistors (a-Si:H TFTs) with copper electrodes prepared by a novel plasma etching process have been fabricated and studied. Their characteristics are similar to those of TFTs with molybdenum electrodes. The reliability was examined by extended high-temperature annealing and gate-bias stress. High-performance CMOS-type a-Si:H TFTs can be fabricated with this plasma etching method. Electrical characteristics of a-Si:H TFTs after Co-60 irradiation and at different experimental stages have been measured. The gamma-ray irradiation damaged bulk f
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8

Buckwell, Mark. "Probing the resistance switching mechanism in silicon suboxide memory devices." Thesis, University College London (University of London), 2018. http://discovery.ucl.ac.uk/10047028/.

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Redox-based resistive random access memory has the scope to greatly improve upon current electronic data storage, though the mechanism by which devices operate is not understood completely. In particular, the connection between oxygen migration, the formation of conductive filaments and device longevity is still disputed. Here, I used atomic force microscopy, scanning electron microscopy and x-ray photoelectron spectroscopy to characterise the growth of filaments and the movement of oxygen in silicon-rich silicon oxide memory devices. As such, I was able to establish some of the chemical and s
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9

Gage, Simon M. "Amorphous silicon memory devices : the forming process and filamentary conduction." Thesis, University of Edinburgh, 1989. http://hdl.handle.net/1842/13866.

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10

Olivares, Sánchez-Mellado Irene. "Development of Photonic Devices Based on the Strained Silicon Technology." Doctoral thesis, Universitat Politècnica de València, 2021. http://hdl.handle.net/10251/167055.

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[ES] En la última década, la plataforma de silicio ha emergido como la plataforma por excelencia para desarrollar circuitos fotónicos integrados debido a su versatilidad, la posibilidad de miniaturización y de una producción de bajo coste y a gran escala compatible con los sistemas CMOS ("complementary metal-oxide semiconductor"). La conversión de señales eléctricas a alta velocidad en señales ópticas es una función crítica hoy en día tanto para el procesamiento de datos como en el ámbito de las telecomunicaciones. La forma más eficaz de implementar actualementeuna ,modulación electro-óp
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11

Ostraat, Michele L. Atwater Harry Albert. "Synthesis and characterization of aerosol silicon nanoparticle nonvolatile floating gate memory devices /." Diss., Pasadena, Calif. : California Institute of Technology, 2001. http://resolver.caltech.edu/CaltechETD:etd-04072005-081230.

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12

Lu, Chih-Yuan. "Group III-selenides : new silicon compatible semiconducting materials for phase change memory applications /." Thesis, Connect to this title online; UW restricted, 2007. http://hdl.handle.net/1773/10610.

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13

Mih, Thomas Attia. "A novel low-temperature growth method of silicon structures and application in flash memory." Thesis, De Montfort University, 2011. http://hdl.handle.net/2086/5183.

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Flash memories are solid-state non-volatile memories. They play a vital role especially in information storage in a wide range of consumer electronic devices and applications including smart phones, digital cameras, laptop computers, and satellite navigators. The demand for high density flash has surged as a result of the proliferation of these consumer electronic portable gadgets and the more features they offer – wireless internet, touch screen, video capabilities. The increase in the density of flash memory devices over the years has come as a result of continuous memory cell-size reduction
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14

Neel, Brian. "High Performance Shared Memory Networking in Future Many-core Architectures UsingOptical Interconnects." Ohio University / OhioLINK, 2014. http://rave.ohiolink.edu/etdc/view?acc_num=ohiou1397488118.

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15

Panchawagh, Hrishikesh Vijaykumar. "Investigation of silicon and shape memory polymer microactuators for deployment in biological media." Diss., Connect to online resource, 2006. http://gateway.proquest.com/openurl?url_ver=Z39.88-2004&rft_val_fmt=info:ofi/fmt:kev:mtx:dissertation&res_dat=xri:pqdiss&rft_dat=xri:pqdiss:3207679.

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16

Lee, Yung-Huei. "Dual-carrier charge transport and damage formation of LPCVD nitride for nonvolatile memory devices /." The Ohio State University, 1986. http://rave.ohiolink.edu/etdc/view?acc_num=osu1487322984316841.

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17

Bazin, Alexandre. "III-V Semiconductor Nanocavitieson Silicon-On-Insulator Waveguide : Laser Emission, Switching and Optical Memory." Phd thesis, Université Paris-Diderot - Paris VII, 2013. http://tel.archives-ouvertes.fr/tel-01007643.

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La photonique sur silicium constitue une plateforme idéale pour transmettre et distribuer des signaux optiques au sein d'une puce et sur de longues distances sans pertes excessives. L'intégration de semiconducteurs III-V sur des circuits photonique en silicium est un projet excitant mais ambitieux, que nous avons mené en combinant le meilleur de l'optoélectronique des semiconducteurs III-V et des technologies photonique en siliicium-sur-isolant (SOI en anglais). Afin de pouvoir remplacer les interconnexions metalliques existantes par des interconnexion optiques, nous nous sommes efforcés d'uti
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18

Ranganathan, Vaishnavi. "Silicon Carbide NEMS Logic and Memory for Computation at Extreme: Device Design and Analysis." Case Western Reserve University School of Graduate Studies / OhioLINK, 2013. http://rave.ohiolink.edu/etdc/view?acc_num=case1372682480.

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19

Sevison, Gary Alan. "Silicon Compatible Short-Wave Infrared Photonic Devices." University of Dayton / OhioLINK, 2018. http://rave.ohiolink.edu/etdc/view?acc_num=dayton1523553057993197.

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20

Chung, Koh Choon. "Processing and characterization of NiTi Shape Memory Alloy particle reinforced Sn-In solder." Thesis, Monterey, Calif. : Naval Postgraduate School, 2006. http://bosun.nps.edu/uhtbin/hyperion.exe/06Dec%5FChung.pdf.

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Thesis (M.S. in Mechanical Engineering)--Naval Postgraduate School, December 2006.<br>Thesis Advisor(s): Indranath Dutta. "December 2006." Includes bibliographical references (p. 51-55). Also available in print.
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21

Legba, Enagnon Thymour. "SYNTHESIS AND CHARACTERIZATION OF a-SILICON CARBIDE NANOSTRUCTURES." UKnowledge, 2007. http://uknowledge.uky.edu/gradschool_theses/494.

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Cubic-phase silicon carbide (andamp;acirc;-SiC) nanostructures were successfully synthesized by the reaction of silicon monoxide (SiO) powder with multi-walled carbon nanotubes (MWCNTs) at high temperatures. Experiments were conducted under vacuum or in the presence of argon gas in a high-temperature furnace and the fabrication parameters of temperature (1300 -1500andamp;deg;C), time, and reactant material mass were varied to optimize the material. The resulting samples were then physically characterized using X-ray diffraction (XRD), scanning electron microscopy (SEM) and transmission electro
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22

Bushra, Sobia. "Investigation of Wafer Level Au-Si Eutectic Bonding of Shape Memory Alloy (SMA) with Silicon." Thesis, KTH, Mikrosystemteknik, 2011. http://urn.kb.se/resolve?urn=urn:nbn:se:kth:diva-55483.

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The objective of this research work was to investigate the low temperature gold silicon eutectic bonding of SMA with silicon wafers. The research work was carried out to optimize a bond process with better yield and higher bond strength. The gold layer thickness, processing temperature, diffusion barrier, adhesive layer, and the removal of silicon oxide are the important parameters in determining a reliable and uniform bond. Based on the previous work on Au-Si eutectic bonding, 7 different Si substrates were prepared to investigate the effect of above mentioned parameters. Cantilevers with dif
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23

Bazin, Alexandre. "III-V semiconductor nanocavities on silicon-on insulator waveguide : laser emission, switching and optical memory." Paris 7, 2013. http://www.theses.fr/2013PA077050.

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La photonique sur silicium constitue une plateforme idéale pour transmettre et distribuer des signaux optiques au sein d'une puce et sur de longues distances sans pertes excessives. L'intégration de semiconducteurs NIA sur des circuits photonique en silicium est un projet excitant mais ambitieux, que nous avons mené en combinant le meilleur de l'optoélectronique des semiconducteurs III-V et des technologies photonique en siliicium-sur-isolant (SOI en anglais). Afin de pouvoir remplacer les interconnexions métalliques existantes par des interconnexion optiques, nous nous sommes efforcés d'utili
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24

Schmidt, Jan Uwe. "Synthesis of silicon nanocrystal memories by sputter deposition." Doctoral thesis, Technische Universität Dresden, 2004. https://tud.qucosa.de/id/qucosa%3A24477.

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In Silizium-Nanokristall-Speichern werden im Gate-Oxid eines Feldeffekttransistors eingebettete Silizium Nanokristalle genutzt, um Elektronen lokal zu speichern. Die gespeicherte Ladung bestimmt dann den Zustand der Speicherzelle. Ein wichtiger Aspekt in der Technologie dieser Speicher ist die Erzeugung der Nanokristalle mit einerwohldefinierten Größenverteilung und einem bestimmten Konzentrationsprofil im Gate-Oxid. In der vorliegenden Arbeit wurde dazu ein sehr flexibler Ansatz untersucht: die thermische Ausheilung von SiO2/SiOx (x &amp;lt; 2) Stapelschichten. Es wurde ein Sputterverfahren e
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25

Nayfeh, Osama Munir 1980. "Nonvolatile memory devices with colloidal, 1.0 nm silicon nanoparticles : principles of operation, fabrication, measurements, and analysis." Thesis, Massachusetts Institute of Technology, 2009. http://hdl.handle.net/1721.1/47785.

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Thesis (Ph. D.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2009.<br>Includes bibliographical references (leaves 101-105).<br>Silicon nanoparticles are candidate charge trapping and storage elements for future high density, low-voltage nonvolatile memory devices. Most previous works have studied nanoparticles of larger than 5 nm size and exhibited bulk-like trapping characteristics. Technologically viable and competitive future devices, however, will require nanoparticles of sub 3-nm dimensions; a zero-dimensional regime where significant chang
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26

Pandharpure, Shrinivas. "Process development for integration of CoFeB/MgO-based magnetic tunnel junction (MTJ) device on silicon /." Online version of thesis, 2007. http://hdl.handle.net/1850/5060.

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27

Schmidt, Jan Uwe. "Synthesis of silicon nanocrystal memories by sputter deposition." Doctoral thesis, Saechsische Landesbibliothek- Staats- und Universitaetsbibliothek Dresden, 2005. http://nbn-resolving.de/urn:nbn:de:swb:14-1112781427817-11246.

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In Silizium-Nanokristall-Speichern werden im Gate-Oxid eines Feldeffekttransistors eingebettete Silizium Nanokristalle genutzt, um Elektronen lokal zu speichern. Die gespeicherte Ladung bestimmt dann den Zustand der Speicherzelle. Ein wichtiger Aspekt in der Technologie dieser Speicher ist die Erzeugung der Nanokristalle mit einerwohldefinierten Größenverteilung und einem bestimmten Konzentrationsprofil im Gate-Oxid. In der vorliegenden Arbeit wurde dazu ein sehr flexibler Ansatz untersucht: die thermische Ausheilung von SiO2/SiOx (x &amp;lt; 2) Stapelschichten. Es wurde ein Sputterverfahren e
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28

Chen, Xiaowei. "High Performance Static Random Access Memory Design for Emerging Applications." Diss., North Dakota State University, 2018. https://hdl.handle.net/10365/31743.

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Memory wall is becoming a more and more serious bottleneck of the processing speed of microprocessors. The mismatch between CPUs and memories has been increasing since three decades ago. SRAM was introduced as the bridge between the main memory and the CPU. SRAM is designed to be on the same die with CPU and stores temporary data and instructions that are to be processed by the CPU. Thus, the performance of SRAMs has a direct impact on the performance of CPUs. With the application of mass amount data to be processed nowadays, there is a great need for high-performance CPUs. Three dimensional
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29

Gradin, Henrik. "Heterogeneous Integration of Shape Memory Alloysfor High-Performance Microvalves." Doctoral thesis, KTH, Mikrosystemteknik, 2012. http://urn.kb.se/resolve?urn=urn:nbn:se:kth:diva-94088.

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This thesis presents methods for fabricating MicroElectroMechanical System (MEMS) actuators and high-flow gas microvalves using wafer-level integration of Shape Memory Alloys (SMAs) in the form of wires and sheets. The work output per volume of SMA actuators exceeds that of other microactuation mechanisms, such as electrostatic, magnetic and piezoelectric actuation, by more than an order of magnitude, making SMA actuators highly promising for applications requiring high forces and large displacements. The use of SMAs in MEMS has so far been limited, partially due to a lack of cost efficient an
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30

Candelier, Philippe. "Contribution à l'amélioration de la fiabilité des mémoires non volatiles de type flash EEPROM." Université Joseph Fourier (Grenoble ; 1971-2015), 1997. http://www.theses.fr/1997GRE10245.

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L'augmentation continue de la densite d'integration des memoires non-volatiles de type flash eeprom passe par la comprehension des mecanismes de degradation intervenant dans le cadre du fonctionnement de ces memoires. Nous avons pu correler les degradations observees sur des dispositifs elementaires (transistors et capacites) aux derives des caracteristiques de la cellule flash. Cette etude demontre que de nouveaux modes de fonctionnement devront etre envisages. Le mode d'effacement par la source, habituellement utilise, pose des problemes d'optimisation technologique pour les cellules de faib
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31

Reddy, K. Siva Sankara. "Electrical Properties Of Diamond Like Carbon Films In Metal-Carbon-Silicon (MCS) Structure." Thesis, Indian Institute of Science, 1994. http://hdl.handle.net/2005/192.

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Amorphous carbon film with Diamond like properties is the subject of intense interest in the past one and half decade. The unusual properties of these diamond like carbon films arise from the preponderance of SP3 tetrahedral bonding of carbon in the film. Depending on the processing technique and the processing conditions used, the structure of the films can range from amorphous carbon to large grain polycrystalline diamond. These deposited amorphous carbon films, which are smooth, may find their use in optoelectronics, in dielectric films and in microelectronics. These films are found to be c
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32

Ulldemolins, Michel. "Étude du silicium et du germanium sous forme de couche mince en tant qu’électrode négative de (micro)accumulateur lithium-ion." Thesis, Bordeaux 1, 2013. http://www.theses.fr/2013BOR14944/document.

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Le silicium se présente comme un bon candidat d’électrode négative pour améliorer la densité d’énergie des accumulateurs Li-ion ou rendre les microaccumulateurs compatibles avec le procédé de brasure à refusion qui nécessite un recuit à 260 °C. En effet, il présente une forte capacité spécifique (3759 mAh.g-1) et sa température de fusion est élevée (1410°C). Néanmoins, de fortes variations volumiques se produisent lors du processus de lithiation/délithiation pouvant atteindre 280 %, ce qui constitue un frein majeur à son développement. Ces travaux de thèse se focalisent sur l’étude approfondie
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33

Reinicke, Marco. "Investigation of physical and chemical interactions during etching of silicon in dual frequency capacitively coupled HBr/NF3 gas discharges." Doctoral thesis, Dresden Techn. Univ, 2009. http://d-nb.info/998661384/04.

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34

Horikawa, Tsuyoshi. "A study of advanced integrated semiconductor device and process technologies for data storage and transmission." 京都大学 (Kyoto University), 2016. http://hdl.handle.net/2433/215222.

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35

Tang, Zih-Yun, and 唐紫橒. "Gate-All-Around Poly-Silicon Nanowires Flash Memory with Silicon Nanocrystals." Thesis, 2011. http://ndltd.ncl.edu.tw/handle/27048838712372131888.

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碩士<br>國立清華大學<br>工程與系統科學系<br>99<br>This thesis research topics for the Nonvolatile memory (NVM) that is based on a structure of Gate-All-Around (GAA) polycrystalline silicon (poly-Si) nanowires (NWs) structure with Silicon-Nanocrystals (NCs) as the storage nodes is demonstrated. The GAA poly-Si-SiO2-Si3N4-SiO2-poly-Si (SONOS) NVMs are also fabricated and compared. Using 3-D multi-gate structure can increase the coupling-ratio, so fast program and erase speed can be obtained. Silicon-Nanocrystals charge trapping layer improved reliability in this work. Used the Gate-All-Around structure of the n
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36

Chang, Wei, and 章緯. "Schottky Barrier Silicon Nanowire SONOS Flash Memory." Thesis, 2011. http://ndltd.ncl.edu.tw/handle/02018208850287818702.

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博士<br>國立清華大學<br>電子工程研究所<br>100<br>Silicon nanowire has attracted a growing interest from semiconductor industry to replace the bulk Silicon-Oxide-Nitride-Oxide-Silicon (SONOS) memory in future cell scaling, system-on-chip, system-on-panel, and 3D integration applications. However, a relatively high gate voltage is still required for the conventional nanowire SONOS cell during programming or erasing. Aggressive scaling of operation voltage is much preferred to improve cell speed, energy dissipation, periphery circuitry, and cell reliability for the use in practical embedded or mobile applicatio
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37

Miller, Gerald Matthew. "Electron Transport in Silicon Nanocrystal Devices: From Memory Applications to Silicon Photonics." Thesis, 2012. https://thesis.library.caltech.edu/6730/1/GMM_Thesis_Final.pdf.

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<p>The push to integrate the realms of microelectronics and photonics on the silicon platform is currently lacking an efficient, electrically pumped silicon light source. One promising material system for photonics on the silicon platform is erbium-doped silicon nanoclusters (Er:Si-nc), which uses silicon nanoclusters to sensitize erbium ions in a SiO2 matrix. This medium can be pumped electrically, and this thesis focuses primarily on the electrical properties of Er:Si-nc films and their possible development as a silicon light source in the erbium emission band around 1.5 micrometers.</p>
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Mathur, Guruvayurappan S. "Redox-active organic molecules on silicon and silicon dioxide surfaces for hybrid silicon-molecular memory devices." 2005. http://www.lib.ncsu.edu/theses/available/etd-11022005-085708/unrestricted/etd.pdf.

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39

Lin, Chun-Yen, and 林俊彥. "Through Silicon Via and Static Random Access Memory." Thesis, 2008. http://ndltd.ncl.edu.tw/handle/90232517174896268428.

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40

Feng, Tao. "Silicon Nanocrystal Charging Dynamics and Memory Device Applications." Thesis, 2006. https://thesis.library.caltech.edu/2460/1/Taothesisfinalversion.pdf.

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<p>The application of Si nanocrystals as floating gate in the metal oxide semiconductor field-effect transistor (MOSFET) based memory, which brings many advantages due to separated charge storage, attracted much attention in recent years. In this work, Si nanocrystal memory with nanocrystals synthesized by ion implantation was characterized to provide a better understanding of the relationship between structure and performance -- especially charge retention characteristics.</p> <p>In the structural characterization it was demonstrated that scanning tunneling microscopy (STM) and non-contact
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41

Lin, Yu-min, and 林鈺閔. "Characterization of Non-volatile Mesoporous Silicon Dot Memory." Thesis, 2009. http://ndltd.ncl.edu.tw/handle/18302934416168545504.

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碩士<br>義守大學<br>電子工程學系碩士班<br>97<br>We fabricate a metal-oxide-semiconductor (MOS) memory capacitor, the materials of the dielectrics is Si quantum-dot array in mesoporous film of silica. The area of the capacitor is 1.63×10-9mm2 , and the depth of the dielectrics is 2nm -SiO2/9.7nm-Mesoporous Si-SiO2/5nm-SiO2.We then using standard high-frequency ( 1 MHz ) capacitance voltage measurements to measure MOS capacitors. We find a counter-clockwise hysteresis CV curve and the memory window is about 1V, as Vg sweeps from +5V to -5V, and the gate oxide capacitance is 280pF.
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42

Wang, Chieh, and 王傑. "Fast Programming Metal-Gate Silicon Quantum Dot Nonvolatile Memory." Thesis, 2013. http://ndltd.ncl.edu.tw/handle/22421814697301712218.

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碩士<br>國立交通大學<br>顯示科技研究所<br>102<br>In this thesis, the green nanosecond laser spike annealing (GN-LSA) was employed to fabricate the poly-Si channel and source/drain activation of thin film transistor (TFT). The GN-LSA can transfer a-Si into poly-Si with large grain (1000 nm). Moreover, the chemical mechanical polishing (CMP) was used to planarize and thin poly-Si channel that reduces the mean roughness from 37A to 5A and achieve channel thickness to 40 nm. In addition, the GN-LSA reduces the resistivity to 1 mΩ-cm. Combining the thermal budget technologies and metal gate, We have fabricated a
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43

杜榮吉. "A silicon compiler for parmeterized memory-based FIR filters." Thesis, 1993. http://ndltd.ncl.edu.tw/handle/58326868999433386277.

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44

Li, Qiliang. "Approach towards hybrid silicon/molecular electronics for memory applications." 2004. http://www.lib.ncsu.edu/theses/available/etd-10242004-001909/unrestricted/etd.pdf.

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45

Tu, Cheng-Hui, and 凃政暉. "Micro-crystalline silicon thin film transistors and memory devices." Thesis, 2012. http://ndltd.ncl.edu.tw/handle/65667588506075349791.

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碩士<br>國立交通大學<br>光電工程學系<br>100<br>In this thesis, high crystallinity and low resistivity of intrinsic and n-type microcrystalline silicon (μc-Si:H) thin films were deposited at 265oC by inductively coupled plasma chemical vapor deposition system (ICPCVD). The high crystallinity of μc-Si:H and thin incubation layer of amorphous silicon (a-Si) were examined by the analysis of X-Ray diffraction (XRD) and transmission electron microscope (TEM), respectively. In addition, after systematically optimizing the parameters of dielectric, such as Ar flow, RF power, chamber pressure and the ratio of Si
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46

Huang, Jian-Da, and 黃建達. "Nonvolatile memory with gate of self-assembled nanostructures of silicon quantum-dots in mesoporos silica." Thesis, 2008. http://ndltd.ncl.edu.tw/handle/20769402143275645892.

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碩士<br>國立交通大學<br>光電工程系所<br>96<br>In this thesis, a new class of artificially engineered ferroelectric-like materials synthesized by embedding three-dimensional arrays of Si nanocrystals in mesoporous silica matrix was reported. We attribute the measured polarization switching to polar layers lying at the interfaces between one-side bonded Si nanocrystals and mesoporous silica matrix. A metal-oxide-semiconductor field-effect transistor with the ferroelectric-like material in place of the gate dielectrics was fabricated to demonstrate its high potential for the silicon-based nonvolatile random-ac
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47

"Resistive Switching and Memory effects in Silicon Oxide Based Nanostructures." Thesis, 2012. http://hdl.handle.net/1911/70503.

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Silicon oxide (SiO x 1 ∠ x [∠, double =]2) has long been used and considered as a passive and insulating component in the construction of electronic devices. In contrast, here the active role of SiO x in constructing a type of resistive switching memory is studied. From electrode-independent electrical behaviors to the visualization of the conducting filament inside the SiO x matrix, the intrinsic switching picture in SiO x is gradually revealed. The thesis starts with the introduction of some similar phenomenological switching behaviors in different electronic structures (Chapter 1), and then
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Guei-Rong, Ciou. "Application and Study of Novel Silicon-Germanium for Memory Device." 2006. http://www.cetd.com.tw/ec/thesisdetail.aspx?etdun=U0016-1303200709262308.

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陳宣凱. "Novel Structures of Nonvolatile Memory and CMOS on Bulk Silicon." Thesis, 2009. http://ndltd.ncl.edu.tw/handle/28090365407566578040.

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碩士<br>國立交通大學<br>電子工程系所<br>98<br>In this thesis, we fabricated non-typical devices on the silicon bulk for nonvolatile memory and segment-MOSFET. First, we will present a novel nonvolatile flash memory process with only silicon oxide under the gate electrode instead of the oxide-nitride-oxide structure. The storage layer, which is fabricated by hafnium silicate (HfSiOx) as the trapping material, is deposited under the nitride spacer. No LDD dopant is implanted under the spacer stack, so there is no overlapped region between source/drain and gate electrode. These nonvolatile memories exhibit pro
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Cheng, Chi Cheng, and 鄭吉成. "Low Temperature Si-rich Silicon Nitride based Thin Film Memory." Thesis, 2005. http://ndltd.ncl.edu.tw/handle/88362869791403236734.

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碩士<br>國立清華大學<br>電子工程研究所<br>93<br>Development of the “System-on-glass (SOG)” display with low temperature poly-silicon thin film transistor has rapidly advanced recently due to the advancement of low temperature poly-silicon technology. Low temperature poly-silicon thin film transistor possibly realizes more value-added display. For a system, memory devices seem to be basic and important elements. However, there are various kinds of technology for memory devices. Taking temperature and process into consideration, SONOS-type structure seems the one of the appropriate choice of them. In the p
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