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Journal articles on the topic 'Memory on Silicon'

Author: Grafiati

Published: 4 June 2021

Last updated: 18 February 2022

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1

Jackson, W. B., R. Elder, W. Hamburgen, et al. "Amorphous silicon memory arrays." Journal of Non-Crystalline Solids 352, no. 9-20 (2006): 859–62. http://dx.doi.org/10.1016/j.jnoncrysol.2005.11.139.

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2

Walters, R. J., P. G. Kik, J. D. Casperson, et al. "Silicon optical nanocrystal memory." Applied Physics Letters 85, no. 13 (2004): 2622–24. http://dx.doi.org/10.1063/1.1795364.

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3

Wang, Gunuk, Yang Yang, Jae-Hwang Lee, et al. "Nanoporous Silicon Oxide Memory." Nano Letters 14, no. 8 (2014): 4694–99. http://dx.doi.org/10.1021/nl501803s.

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4

Shannon, J. M., and S. P. Lau. "Memory switching in amorphous silicon-rich silicon carbide." Electronics Letters 35, no. 22 (1999): 1976. http://dx.doi.org/10.1049/el:19991296.

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5

Stone, N. J., and H. Ahmed. "Silicon single-electron memory structure." Microelectronic Engineering 41-42 (March 1998): 511–14. http://dx.doi.org/10.1016/s0167-9317(98)00119-1.

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6

Tiwari, Sandip, Farhan Rana, Hussein Hanafi, Allan Hartstein, Emmanuel F. Crabbé, and Kevin Chan. "A silicon nanocrystals based memory." Applied Physics Letters 68, no. 10 (1996): 1377–79. http://dx.doi.org/10.1063/1.116085.

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7

Lim, Doohyeok, Jaemin Son, Kyoungah Cho, and Sangsig Kim. "Quasi‐Nonvolatile Silicon Memory Device." Advanced Materials Technologies 5, no. 12 (2020): 2000915. http://dx.doi.org/10.1002/admt.202000915.

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8

Stone, N. J., and H. Ahmed. "Silicon single electron memory cell." Applied Physics Letters 73, no. 15 (1998): 2134–36. http://dx.doi.org/10.1063/1.122401.

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9

Poitrasson, Franck. "A silicon memory of subduction." Nature Geoscience 12, no. 9 (2019): 682–83. http://dx.doi.org/10.1038/s41561-019-0418-3.

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10

Barrios, C. A., and M. Lipson. "Silicon photonic read-only memory." Journal of Lightwave Technology 24, no. 7 (2006): 2898–905. http://dx.doi.org/10.1109/jlt.2006.875964.

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11

Rose, M. J., J. Hajto, P. G. Lecomber, et al. "Amorphous silicon analogue memory devices." Journal of Non-Crystalline Solids 115, no. 1-3 (1989): 168–70. http://dx.doi.org/10.1016/0022-3093(89)90394-3.

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12

Steimle, R. F., M. Sadd, R. Muralidhar, et al. "Hybrid silicon nanocrystal silicon nitride dynamic random access memory." IEEE Transactions On Nanotechnology 2, no. 4 (2003): 335–40. http://dx.doi.org/10.1109/tnano.2003.820817.

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13

Steimle, R. F., R. Muralidhar, R. Rao, et al. "Silicon nanocrystal non-volatile memory for embedded memory scaling." Microelectronics Reliability 47, no. 4-5 (2007): 585–92. http://dx.doi.org/10.1016/j.microrel.2007.01.047.

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14

Tsoukalas, D. "From silicon to organic nanoparticle memory devices." Philosophical Transactions of the Royal Society A: Mathematical, Physical and Engineering Sciences 367, no. 1905 (2009): 4169–79. http://dx.doi.org/10.1098/rsta.2008.0280.

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After introducing the operational principle of nanoparticle memory devices, their current status in silicon technology is briefly presented in this work. The discussion then focuses on hybrid technologies, where silicon and organic materials have been combined together in a nanoparticle memory device, and finally concludes with the recent development of organic nanoparticle memories. The review is focused on the nanoparticle memory concept as an extension of the current flash memory device. Organic nanoparticle memories are at a very early stage of research and have not yet found applications.

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15

Ievtukh, Valerii, and A. Nazarov. "Silicon Nanocrystalline Nonvolatile Memory - Characterization and Analysis." Journal of Nano Research 39 (February 2016): 134–50. http://dx.doi.org/10.4028/www.scientific.net/jnanor.39.134.

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In this work, nanocrystal nonvolatile memory devices comprising of silicon nanocrystals located in gate oxide of MOS structure, were comprehensively studied on specialized modular data acquisition setup developed for capacitance-voltage measurements. The memory window formation, memory window retention and charge relaxation experimental methods were used to study the trapping/emission processes inside the dielectric layer of MOS capacitor memory. The trapping/emission processes were studied in standard bipolar memory mode and in new unipolar memory mode, which is specific for nanocrystalline n

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16

Silva, Helena, Moon Kyung Kim, Uygar Avci, Arvind Kumar, and Sandip Tiwari. "Nonvolatile Silicon Memory at the Nanoscale." MRS Bulletin 29, no. 11 (2004): 845–51. http://dx.doi.org/10.1557/mrs2004.239.

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AbstractThe key challenges for memories that operate at the nanoscale and that are compatible with mainstream semiconductor processing are in achieving the performance characteristics that make the integration of hundreds of millions or more of such devices feasible. The concept of harnessing a single electron or just a few electrons for memory storage is very appealing, but among the issues to address are the increased variance, smaller signal, and numerous other consequences of the reduced statistics resulting from reduced number of carriers employed. Coupling a few electrons to a transistor

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17

Darbanian, Nazanin, Sameer M. Venugopal, Shrinivas G. Gopalan, David R. Allee, and Lawrence T. Clark. "Flexible amorphous-silicon non-volatile memory." Journal of the Society for Information Display 18, no. 5 (2010): 346. http://dx.doi.org/10.1889/jsid18.5.346.

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18

Kolliopoulou, S., P. Dimitrakis, P. Normand, et al. "Hybrid silicon–organic nanoparticle memory device." Journal of Applied Physics 94, no. 8 (2003): 5234. http://dx.doi.org/10.1063/1.1604962.

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19

Yoo, K.-H., K. S. Park, Jinhee Kim, Myungsoo Lee, and Jung-Woo Kim. "A silicon-molecular hybrid memory device." Nanotechnology 15, no. 11 (2004): 1472–74. http://dx.doi.org/10.1088/0957-4484/15/11/016.

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20

El-Atab, Nazek, Ayse Ozcan, Sabri Alkis, Ali K. Okyay, and Ammar Nayfeh. "Silicon nanoparticle charge trapping memory cell." physica status solidi (RRL) - Rapid Research Letters 8, no. 7 (2014): 629–33. http://dx.doi.org/10.1002/pssr.201409157.

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21

Kim, Yoon, Won Bo Shim, and Byung-Gook Park. "Gated twin-bit silicon–oxide–nitride–oxide–silicon NAND flash memory for high-density nonvolatile memory." Japanese Journal of Applied Physics 54, no. 6 (2015): 064201. http://dx.doi.org/10.7567/jjap.54.064201.

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22

Jang, D. H., Gil Ho Gu, and Chan Gyung Park. "Low Temperature Synthesis of Silicon Nanocrystals Fabricated by PECVD and their Optical Property." Materials Science Forum 654-656 (June 2010): 1094–97. http://dx.doi.org/10.4028/www.scientific.net/msf.654-656.1094.

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Bulk silicon is the material for microelectronics fabrication such as memory device. However, its optical properties are poor due to its indirect band gap. Since the photoluminescence from porous silicon at room temperature was first reported by Canham, silicon nanostructures have attracted considerable interest due to their potential applications in optoelectronic devices such as Si-based LEDs, solar cell. In the present study, the nanocrystalline silicons were synthesized by non-thermal plasma from gas phase. And Nitrogen plasma was applied to reduce the nonraidative recombination center whi

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23

Talyzin, Igor V., and Vladimir M. Samsonov. "Outlooks for development of silicon nanoparticle memory cells." Modern Electronic Materials 5, no. 4 (2019): 159–64. http://dx.doi.org/10.3897/j.moem.5.4.51788.

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Phase change memory is based on changes in the optical, electrical or other properties of materials during phase transitions, e.g. an amorphous to crystalline transition. Currently existing and potential applications of this memory are primarily based on multicomponent alloys of metals and semiconductors. However single-component nanoparticles including Si ones are also of interest as promising nanosized memory cells. The potential for developing this type of memory cells is confirmed by the fact that the optical absorption index of bulk amorphous silicon is of the same order of magnitude as t

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24

Choi, Sangmoo, Hyundeok Yang, Man Chang, et al. "Memory characteristics of silicon nitride with silicon nanocrystals as a charge trapping layer of nonvolatile memory devices." Applied Physics Letters 86, no. 25 (2005): 251901. http://dx.doi.org/10.1063/1.1951060.

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25

Sakata, I., T. Sekigawa, K. Nagai, Y. Hayashi, and M. Yamanaka. "Amorphous silicon/amorphous silicon carbide heterojunctions applied to memory device structures." Electronics Letters 30, no. 9 (1994): 688–89. http://dx.doi.org/10.1049/el:19940478.

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26

Ng, C. Y., T. P. Chen, D. Sreeduth, Q. Chen, L. Ding, and A. Du. "Silicon nanocrystal-based non-volatile memory devices." Thin Solid Films 504, no. 1-2 (2006): 25–27. http://dx.doi.org/10.1016/j.tsf.2005.09.031.

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27

Bennewitz, R., J. N. Crain, A. Kirakosian, et al. "Atomic scale memory at a silicon surface." Nanotechnology 13, no. 4 (2002): 499–502. http://dx.doi.org/10.1088/0957-4484/13/4/312.

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28

Novikov, Yu N. "Non-volatile memory based on silicon nanoclusters." Semiconductors 43, no. 8 (2009): 1040–45. http://dx.doi.org/10.1134/s1063782609080144.

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29

Sonde, Sushant, Bhaswar Chakrabarti, Yuzi Liu, et al. "Silicon compatible Sn-based resistive switching memory." Nanoscale 10, no. 20 (2018): 9441–49. http://dx.doi.org/10.1039/c8nr01540f.

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30

Kim, Yoonjoong, Jinsun Cho, Doohyeok Lim, Sola Woo, Kyoungah Cho, and Sangsig Kim. "Switchable‐Memory Operation of Silicon Nanowire Transistor." Advanced Electronic Materials 4, no. 12 (2018): 1800429. http://dx.doi.org/10.1002/aelm.201800429.

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31

Freer, Solomon, Stephanie Simmons, Arne Laucht, et al. "A single-atom quantum memory in silicon." Quantum Science and Technology 2, no. 1 (2017): 015009. http://dx.doi.org/10.1088/2058-9565/aa63a4.

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32

Garces-Schroder, Mayra, Tom Zimmermann, Carsten Siemers, Monika Leester-Schadel, Markus Bol, and Andreas Dietzel. "Shape Memory Alloy Actuators for Silicon Microgrippers." Journal of Microelectromechanical Systems 28, no. 5 (2019): 869–81. http://dx.doi.org/10.1109/jmems.2019.2936288.

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33

Schoener, Cody Alan, Christopher Bell Weyand, Ranjini Murthy, and Melissa Ann Grunlan. "Shape memory polymers with silicon-containing segments." Journal of Materials Chemistry 20, no. 9 (2010): 1787. http://dx.doi.org/10.1039/b924032b.

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34

Mammo, Biruk W., Valeria Bertacco, Andrew DeOrio, and Ilya Wagner. "Post-Silicon Validation of Multiprocessor Memory Consistency." IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 34, no. 6 (2015): 1027–37. http://dx.doi.org/10.1109/tcad.2015.2402171.

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35

Hao, Ming-Yin, Hyunsang Hwang, and Jack C. Lee. "Silicon-implanted SiO2 for nonvolatile memory applications." Solid-State Electronics 36, no. 9 (1993): 1321–24. http://dx.doi.org/10.1016/0038-1101(93)90171-l.

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36

Pan, Tung-Ming, та Wen-Wei Yeh. "Silicon-oxide-high-κ-oxide-silicon memory using a high-κ Y2O3 nanocrystal film for flash memory application". Journal of Vacuum Science & Technology A: Vacuum, Surfaces, and Films 27, № 4 (2009): 700–705. http://dx.doi.org/10.1116/1.3151816.

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37

Horváth, Zs J., and P. Basa. "Nanocrystal Non-Volatile Memory Devices." Materials Science Forum 609 (January 2009): 1–9. http://dx.doi.org/10.4028/www.scientific.net/msf.609.1.

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The physical background and present status of the application of metal-insulator-silicon structures with semiconductor nanocrystals embedded in the insulator layer for memory purposes is breafly summarized.

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38

Saranti, Konstantina, and Shashi Paul. "Two-Terminal Non-Volatile Memory Devices Using Silicon Nanowires as the Storage Medium." Advances in Science and Technology 95 (October 2014): 78–83. http://dx.doi.org/10.4028/www.scientific.net/ast.95.78.

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In the recent years a notable progress in the miniaturisation of electronic devices has been achieved in which the main component that has shown great interest is electronic memory. However, miniaturisation is reaching its limit. Alternative materials, manufacturing equipment and architectures for the storage devices are considered. In this work, an investigation on the suitability of silicon nanowires as the charge storage medium in two-terminal non-volatile memory devices is presented. Silicon nanostructures have attracted attention due to their small size, interesting properties and their p

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39

Han, Jin-Ping, Xin Guo, and T. P. Ma. "Memory effects of SrBi2Ta2O9 capacitor on silicon with a silicon nitride buffer." Integrated Ferroelectrics 22, no. 1-4 (1998): 213–21. http://dx.doi.org/10.1080/10584589808208043.

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40

Yang, Seung-Dong, Jun-Kyo Jung, Jae-Gab Lim, Seong-gye Park, Hi-Deok Lee, and Ga-Won Lee. "Investigation of Intra-Nitride Charge Migration Suppression in SONOS Flash Memory." Micromachines 10, no. 6 (2019): 356. http://dx.doi.org/10.3390/mi10060356.

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In order to suppress the intra-nitride charge spreading in 3D Silicon-Oxide-Nitride-Oxide-Silicon (SONOS) flash memory where the charge trapping layer silicon nitride is shared along the cell string, N2 plasma treated on the silicon nitride is proposed. Experimental results show that the charge loss decreased in the plasma treated device after baking at 300 °C for 2 h. To extract trap density according to the location in the trapping layer, capacitance-voltage analysis was used and N2 plasma treatment was shown to be effective to restrain the interface trap formation between blocking oxide and

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41

Kim, Jaemin, Donghee Son, Mincheol Lee, et al. "A wearable multiplexed silicon nonvolatile memory array using nanocrystal charge confinement." Science Advances 2, no. 1 (2016): e1501101. http://dx.doi.org/10.1126/sciadv.1501101.

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Strategies for efficient charge confinement in nanocrystal floating gates to realize high-performance memory devices have been investigated intensively. However, few studies have reported nanoscale experimental validations of charge confinement in closely packed uniform nanocrystals and related device performance characterization. Furthermore, the system-level integration of the resulting devices with wearable silicon electronics has not yet been realized. We introduce a wearable, fully multiplexed silicon nonvolatile memory array with nanocrystal floating gates. The nanocrystal monolayer is a

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42

Marcoux, Phil. "Through Silicon Via (TSV) Technology Creates Electro-Optical Interfaces." International Symposium on Microelectronics 2012, no. 1 (2012): 000244–48. http://dx.doi.org/10.4071/isom-2012-tp13.

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Silicon is a most versatile material, it is readily etched into a multitude of shapes and it has very highly desirable electrical properties .Through Silicon Via (TSV) technology is emerging as an essential method for allowing circuits on one side of an IC to be accessible from the other. This ability is not only essential for devices requiring covers, such as image sensors and MEMs but for stacking ICs as well. Much has been reported about the interconnecting and stacking of devices, such as, memory-on-memory and memory-on-logic devices. TSV fabrication is a micro-machining process for silico

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43

Pei, Z., A. Chung, and H. L. Hwang. "Nonvolatile polycrystalline silicon thin film transistor memory using silicon-rich silicon nitride as charge storage layer." Applied Physics Letters 90, no. 22 (2007): 223513. http://dx.doi.org/10.1063/1.2745265.

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44

Alotaibi, Sattam, Nare Gabrielyan, and Shashi Paul. "Two Terminal Non-Volatile Memory Devices Using Diamond-Like Carbon and Silicon Nanostructures." Advances in Science and Technology 95 (October 2014): 100–106. http://dx.doi.org/10.4028/www.scientific.net/ast.95.100.

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This work illustrates a novel device for storing electronic charge and works as a non-volatile memory device. It is fabricated using an industrial technique and consists of silicon nanostructures and diamond like carbon (DLC) as a memory element and an ultra-thin barrier layer respectively. Both the silicon nanostructures and the DLC have been deposited by plasma enhanced chemical vapour deposition (PECVD) technique. The nanostructures are sandwiched between two DLC layers. To understand the ability of silicon nanostructures to store electronic charge current-voltage (I-V) and current-time (I-

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45

Gritsenko, V. A., S. S. Nekrashevich, V. V. Vasilev, and A. V. Shaposhnikov. "Electronic structure of memory traps in silicon nitride." Microelectronic Engineering 86, no. 7-9 (2009): 1866–69. http://dx.doi.org/10.1016/j.mee.2009.03.093.

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46

Fujita, Shizuo, and Akio Sasaki. "Dangling Bonds in Memory‐Quality Silicon Nitride Films." Journal of The Electrochemical Society 132, no. 2 (1985): 398–402. http://dx.doi.org/10.1149/1.2113850.

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47

Chen, Jian-Hao, Tan-Fu Lei, Dolf Landheer, et al. "Nonvolatile Memory Characteristics with Embedded Hemispherical Silicon Nanocrystals." Japanese Journal of Applied Physics 46, no. 10A (2007): 6586–88. http://dx.doi.org/10.1143/jjap.46.6586.

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48

Wolf, R. H., and A. H. Heuer. "TiNi (shape memory) films silicon for MEMS applications." Journal of Microelectromechanical Systems 4, no. 4 (1995): 206–12. http://dx.doi.org/10.1109/84.475547.

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49

Hajto, J., A. E. Owen, S. M. Gage, A. J. Snell, P. G. LeComber, and M. J. Rose. "Quantized electron transport in amorphous-silicon memory structures." Physical Review Letters 66, no. 14 (1991): 1918–21. http://dx.doi.org/10.1103/physrevlett.66.1918.

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50

Lim, Doohyeok, Minsuk Kim, Yoonjoong Kim, Jinsun Cho, and Sangsig Kim. "Nondestructive Readout Memory Characteristics of Silicon Nanowire Biristors." IEEE Transactions on Electron Devices 65, no. 4 (2018): 1578–82. http://dx.doi.org/10.1109/ted.2018.2802492.

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