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Journal articles on the topic 'MESFET device'

Author: Grafiati

Published: 3 June 2025

Last updated: 31 July 2025

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1

Kang, In Ho, Wook Bahng, Sang Cheol Kim, Sung Jae Joo, and Nam Kyun Kim. "Numerical Investigation of the DC and RF Performances for a 4H-SiC Double Delta-Doped Channel MESFET Having Various Delta-Doping Concentrations." Materials Science Forum 556-557 (September 2007): 823–26. http://dx.doi.org/10.4028/www.scientific.net/msf.556-557.823.

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A double delta-doped channel 4H-SiC MESFET is proposed to kick out degradation of the DC and RF performances caused by the surface traps, by forming a quantum-well-like potential well and separating an effective channel from the surface. To obtain an optimum device structure, the DC and RF performances of double delta-doped channel MESFETs having various delta-doping concentrations but the same pinch-off voltage with that of conventional MESFET were also investigated. The SilvacoTM simulation results show that the double delta-doped channel MESFET achieved more improvement of the drain current

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2

Banu, Viorel, Josep Montserrat, Mihaela Alexandru, Xavier Jordá, José Millan, and Philippe Godignon. "Monolithic Integration of Power MESFET for High Temperature SiC Integrated Circuits." Materials Science Forum 778-780 (February 2014): 891–94. http://dx.doi.org/10.4028/www.scientific.net/msf.778-780.891.

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This work provides experimental result on fabricated 4H-SiC lateral power MESFET intended to be used in further development of high temperature integrated circuits for power application. The power SiC MESFET device was developed using a planar technology on silicon carbide and P implant isolation technique. Its destination to monolithic integration demands a lateral layout connection topology. The use of quite high doped N type epitaxial layer (1017cm-3) typical for the integrated circuits raises difficulties to keep the leakage current of the Schottky gate in a decent range. Therefore, a hexa

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3

Tournier, Dominique, Miquel Vellvehi, Phillippe Godignon, Xavier Jordá, and José Millan. "Double Gate 180V-128mA/mm SiC-MESFET for Power Switch Applications." Materials Science Forum 527-529 (October 2006): 1243–46. http://dx.doi.org/10.4028/www.scientific.net/msf.527-529.1243.

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The potential of SiC MESFETs has been demonstrated for high frequency applications on several circuits in the 1-5 GHz frequency range. Although MESFET structures are conventionally used for RF applications, in this paper we report a low voltage (180V) power switch and its current limiting application based on a double gate MESFET structure, showing enhanced forward and blocking capabilities. The reported devices utilize a thin highly doped p-type layer implanted at high energy as buffer layer. Various layouts have been fabricated, varying the gate length; with either a single gate (p-buried la

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4

SHUR, M. S., T. A. FJELDLY, T. YTTERDAL, and K. LEE. "UNIFIED GaAs MESFET MODEL FOR CIRCUIT SIMULATIONS." International Journal of High Speed Electronics and Systems 03, no. 02 (1992): 201–33. http://dx.doi.org/10.1142/s0129156492000084.

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We describe a new, unified model for MEtal Semiconductor Field Effect Transistors (MESFETs) which covers all ranges of operation, including the subthreshold regime. The current-voltage (I-V) and capacitance-voltage (C-V) characteristics are described by continuous, analytical expressions with relatively few, physically based parameters. The model includes effects such as velocity saturation, parasitic series resistances, the dependence of the threshold voltage on drain bias, finite output conductance in saturation, and temperature dependence of the device parameters. We also describe a paramet

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5

Alexandru, Mihaela, Viorel Banu, Matthieu Florentin, Xavier Jordá, Miguel Vellvehi, and Dominique Tournier. "High Temperature Electrical Characterization of 4H-SiC MESFET Basic Logic Gates." Materials Science Forum 778-780 (February 2014): 1130–34. http://dx.doi.org/10.4028/www.scientific.net/msf.778-780.1130.

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Due to our demonstrated stable Tungsten-Schottky barrier at elevated temperatures, and also thanks to our technological process maturity regarding SiC-Schottky contact fabrication, we have implemented the digital logic gates library adopting a normally-on MESFET topology. In this paper we present new experimental results showing the thermal behavior up to 300oC of 4H-SiC logic gates library, monolithically integrating normally-on MESFETs and epitaxial resistors. The implemented SiC devices are based on important CMOS features and are specially designed for large ICs device integration density.

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6

Jaya, T., and V. Kannan. "ON/OFF Light Effect on the Buried Gate MESFET." Advanced Materials Research 268-270 (July 2011): 143–47. http://dx.doi.org/10.4028/www.scientific.net/amr.268-270.143.

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An analytical model for the time dependent characteristic of ion implanted buried gate MESFET have been obtained by solving continuity equation with variation of light , turning ON and OFF in the active layer of buried gate through the optical fiber. This paper provides new insight into the cause of channel conductance variation in an ion implanted buried gate MESFET with front side illumination. At time‘t’ is equal to zero, the light through the optical fiber is turning ‘ON’ and ‘OFF’ has been considered. The channel conductance of the buried gate MESFET evaluated with front side illumination

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7

Jia, Hujun, Yibo Tong, Tao Li, et al. "An Improved 4H-SiC MESFET with a Partially Low Doped Channel." Micromachines 10, no. 9 (2019): 555. http://dx.doi.org/10.3390/mi10090555.

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An improved 4H-SiC metal semiconductor field effect transistor (MESFET) based on the double-recessed MESFET (DR-MESFET) for high power added efficiency (PAE) is designed and simulated in this paper and its mechanism is explored by co-simulation of ADS and ISE-TCAD software. This structure has a partially low doped channel (PLDC) under the gate, which increases the PAE of the device by decreasing the absolute value of the threshold voltage (Vt), gate-source capacitance (Cgs) and saturation current (Id). The simulated results show that with the increase of H, the PAE of the device increases and

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8

Jia, Hujun, Yuan Liang, Tao Li, et al. "Improved DRUS 4H-SiC MESFET with High Power Added Efficiency." Micromachines 11, no. 1 (2019): 35. http://dx.doi.org/10.3390/mi11010035.

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A 4H-SiC metal semiconductor field effect transistor (MESFET) with layered doping and undoped space regions (LDUS-MESFET) is proposed and simulated by ADS and ISE-TCAD software in this paper. The structure (LDUS-MESFET) introduced layered doping under the lower gate of the channel, while optimizing the thickness of the undoped region. Compared with the double-recessed 4H-SiC MESFET with partly undoped space region (DRUS-MESFET), the power added efficiency of the LDUS-MESFET is increased by 85.8%, and the saturation current is increased by 27.4%. Although the breakdown voltage of the device has

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9

Zhu, Shunwei, Hujun Jia, Xingyu Wang, et al. "Improved MRD 4H-SiC MESFET with High Power Added Efficiency." Micromachines 10, no. 7 (2019): 479. http://dx.doi.org/10.3390/mi10070479.

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An improved multi-recessed double-recessed p-buffer layer 4H–SiC metal semiconductor field effect transistor (IMRD 4H-SiC MESFET) with high power added efficiency is proposed and studied by co-simulation of advanced design system (ADS) and technology computer aided design (TCAD) Sentaurus software in this paper. Based on multi-recessed double-recessed p-buffer layer 4H–SiC metal semiconductor field effect transistor (MRD 4H-SiC MESFET), the recessed area of MRD MESFET on both sides of the gate is optimized, the direct current (DC), radio frequency (RF) parameters and efficiency of the device i

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10

Nilsson, Per Åke, Niklas Rorsman, Mattias Südow, Kristoffer Andersson, Hans Hjelmgren, and Herbert Zirath. "SiC MESFET with a Double Gate Recess." Materials Science Forum 527-529 (October 2006): 1227–30. http://dx.doi.org/10.4028/www.scientific.net/msf.527-529.1227.

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In order to increase the output power and drain efficiency, MESFETs in SiC have been made with a double gate recess technique. Typical device characteristics of the MESFETs are drain currents of 380mA/mm, breakdown voltages of 80V and ft/fmax of 10/25 GHz respectively. These transistors exhibit power densities of 3W/mm@3GHz in class AB operation and drain efficiencies of 60%. Packaged devices with 3 mm gate periphery of this type, with via-hole grounding, gave power densities of 1.2 W/mm@6GHz at 50 V drain bias.

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11

Katakami, S., Shuichi Ono, and Manabu Arai. "RF Characteristics of a Fully Ion-Implanted MESFET with Highly Doped Thin Channel Layer on a Bulk Semi-Insulating 4H-SiC Substrate." Materials Science Forum 600-603 (September 2008): 1107–10. http://dx.doi.org/10.4028/www.scientific.net/msf.600-603.1107.

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We fabricated a 0.5-μm-gate MESFET on a bulk 4H-SiC semi-insulating substrate using ion implantation for the channel and contact regions. Our device design used a thin, highly doped channel layer, which was implanted at single energy to improve the device’s RF characteristics. The electrical characteristics of the ion-implanted MESFET annealed at 1700°C were better than those of the ion-implanted MESFET annealed at 1300°C. The fabricated ion-implanted MESFET has a maximum transconductance of 32.8 mS/mm and an fT/fmax of 9.1/26.2 GHz. The saturated output power was 26.2 dBm (2.1 W/mm) at 2 GHz.

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12

Bai, Yun, Cheng Zhan Li, Hua Jun Shen, Cheng Yue Yang, Yi Dan Tang, and Xin Yu Liu. "Design and Simulation of 4H-SiC MESFET Ultraviolet Photodetector with Gain." Materials Science Forum 897 (May 2017): 610–13. http://dx.doi.org/10.4028/www.scientific.net/msf.897.610.

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The 4H-SiC ultraviolet detector of the MESFET structure with gain is proposed and simulated in this paper. The Schottky gate of MESFET is transparent or semi-transparent to allow more of the incident UV light to be absorbed in the device. The effect of the doping and thickness of the channel layer on the photocurrent of the 4H-SiC MESFET UV detector is simulated and the effect mechanism is analyzed. The simulation results show that the 4H-SiC MESFET exhibits photocurrent below 380 nm. And only when the channel of the 4H-SiC MESFET is in the open state there will be a gain in the detector. Shor

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13

FJELDLY, TOR A., and MICHAEL S. SHUR. "SIMULATION AND MODELING OF COMPOUND SEMICONDUCTOR DEVICES." International Journal of High Speed Electronics and Systems 06, no. 01 (1995): 237–84. http://dx.doi.org/10.1142/s0129156495000079.

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We review the simulation and modeling techniques used for popular compound semiconductor devices such as the Heterostructure Field Effect Transistor (HFET), the Metal Semiconductor Field Effect Transistor (MESFET), and the Heterostructure Bipolar Transistor (HBT). Starting with the basic transport theory and the numerical simulation techniques based on this theory, we proceed to give examples of Monte Carlo simulations and of 2D balance equation simulations for investigating fundamental device properties and for exploring new design concepts. Next, we present analytical HFET and MESFET models

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14

Farahmand, Maziar, and Kevin F. Brennan. "Full Band Monte Carlo Comparison of Wurtzite and Zincblende Phase GaN MESFETs." MRS Internet Journal of Nitride Semiconductor Research 5, S1 (2000): 633–39. http://dx.doi.org/10.1557/s1092578300004865.

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The output characteristics, cutoff frequency, breakdown voltage and the transconductance of wurtzite and zincblende phase GaN MESFETs have been calculated using a self-consistent, full band Monte Carlo simulation. It is found that the calculated breakdown voltage for the wurtzite device is considerably higher than that calculated for a comparable GaN zincblende phase device. The zincblende device is calculated to have a higher transconductance and cutoff frequency than the wurtzite device. The higher breakdown voltage of the wurtzite phase device is attributed to the higher density of electron

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15

ROKN-ABADI, M. REZAEE, H. ARABSHAHI, and M. R. BENAM. "DISCRETIZATION METHOD OF HYDRODYNAMIC EQUATIONS FOR SIMULATION OF GaN MESFETs." Modern Physics Letters B 22, no. 16 (2008): 1599–608. http://dx.doi.org/10.1142/s0217984908016339.

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A finite discretization method in two dimensions has been developed and used to model electron transport in wurtzite phase GaN MESFETs. The model is based on the solutions of the highly-coupled nonlinear hydrodynamic partial differential equations. These solutions allow us to calculate the electron drift velocity and other device parameters as a function of the applied electric field. This model is able to describe inertia effects which play an increasing role in different fields of micro and optoelectronics where simplified charge transport models like drift-diffusion model and energy balance

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16

ARABSHAHI, H. "MONTE CARLO SIMULATIONS OF ELECTRON TRANSPORT IN WURTZITE PHASE GaN MESFET INCLUDING TRAPPING EFFECT." Modern Physics Letters B 20, no. 13 (2006): 787–94. http://dx.doi.org/10.1142/s0217984906011037.

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Trapping of hot electron behavior by trap centers located in the buffer layer of a wurtzite phase GaN MESFET has been simulated using an ensemble Monte Carlo simulation. The simulated results show that trap centers are responsible for current collapse in GaN MESFET at low temperatures. These electrical traps degrade the performance of the device at low temperatures. On the other hand, at high temperatures, the electrical performances are improved due to electron emission from the trap centers. The simulated device geometries and doping are matched to the nominal parameters described for the ex

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17

YANG, JINMAN, ASHA BALIJEPALLI, TREVOR J. THORNTON, et al. "SILICON-BASED INTEGRATED MOSFETS AND MESFETS: A NEW PARADIGM FOR LOW POWER, MIXED SIGNAL, MONOLITHIC SYSTEMS USING COMMERCIALLY AVAILABLE SOI." International Journal of High Speed Electronics and Systems 16, no. 02 (2006): 723–32. http://dx.doi.org/10.1142/s0129156406003977.

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Metal Semiconductor Field Effect Transistors fabricated using compound semiconductor materials have important applications in high-speed/low-noise communication systems. However, their integration densities are low compared to silicon technologies, and it is difficult to combine them with conventional CMOS for single-chip, mixed-signal circuit applications. In this paper we describe how silicon-on-insulator MESFETs can be fabricated alongside conventional MOSFETs using a commercially available silicon-on-insulator foundry. The process flow for the integrated MOSFETS and MESFETs is presented. M

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18

Lin, K. C., T. M. Hsin, C. Y. Chang, and E. Y. Chang. "A pseudomorphic GaInP/InP MESFET with improved device performance." IEEE Transactions on Electron Devices 40, no. 12 (1993): 2361–62. http://dx.doi.org/10.1109/16.249488.

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19

IÑIGUEZ, BENJAMIN, TOR A. FJELDLY, MICHAEL S. SHUR, and TROND YTTERDAL. "SPICE MODELING OF COMPOUND SEMICONDUCTOR DEVICES." International Journal of High Speed Electronics and Systems 09, no. 03 (1998): 725–81. http://dx.doi.org/10.1142/s0129156498000312.

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We review recent advances in the modeling of novel and advanced semiconductor devices, including state-of-the-art MESFET and HFETs, heterodimensional FETs, resonant tunneling devices, and wide-bandgap semiconductor transistors. We emphasize analytical, physics-based modeling incorporating the important effects present in modern day devices, including deep sub-micrometer devices. Such an approach is needed in order to accurately describe and predict both stationary and dynamic device behavior and to make the models suitable for implementation in advanced computer aided design tool including cir

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20

Zhang, Kui, Hong Dong Zhao, Tong Xi Shen, and Jie Huang. "Research of Probability Distribution of Semiconductor Test Parameter." Advanced Materials Research 1049-1050 (October 2014): 754–61. http://dx.doi.org/10.4028/www.scientific.net/amr.1049-1050.754.

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The probability distribution of electrical characteristic parameters of semiconductor device is an important reference which is used to analyze the reliability and quality consistency of devices. These distributions are considered as normal distribution at home and abroad. This paper utilized mature GaAs MESFET low noise amplifier as analytic sample which is volume production and wide application, and used high-precision Agilent B1505A device analyzer to test main electrical characteristics of 408 samples. After the distribution generation of test results, the Skewness-Kurtosis method was used

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21

Shen, Min, Ming-C. Cheng, and J. J. Liou. "A Generalized Finite Element Method for Hydrodynamic Modeling of Short-channel Devices." VLSI Design 13, no. 1-4 (2001): 79–84. http://dx.doi.org/10.1155/2001/36165.

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A finite element method based on the least-squares scheme is developed for hydrodynamic simulation of two-dimensional short-channel semiconductor devices. Although this general-purpose finite element method has been shown in fluid dynamics to be more universal to flow problems than other finite element approaches and has been applied in recent years to a wide range of problems in fluid dynamics, it is still unfamiliar to the semiconductor device community. Application of the developed hydrodynamic least squares finite element method (LSFEM) to simulation of a 2D MESFET with a deep-submicron ga

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22

Liu, Wenyuan, Lin Zhu, Feng Feng, et al. "A Time Delay Neural Network Based Technique for Nonlinear Microwave Device Modeling." Micromachines 11, no. 9 (2020): 831. http://dx.doi.org/10.3390/mi11090831.

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This paper presents a nonlinear microwave device modeling technique that is based on time delay neural network (TDNN). The proposed technique can accurately model the nonlinear microwave devices when compared to static neural network modeling method. A new formulation is developed to allow for the proposed TDNN model to be trained with DC, small-signal, and large signal data, which can enhance the generalization of the device model. An algorithm is formulated to train the proposed TDNN model efficiently. This proposed technique is verified by GaAs metal-semiconductor-field-effect transistor (M

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23

Djouder, Mohamed, Arezki Benfdila, and Ahcene Lakhlef. "Temperature dependent analytical model for submicron GaAs-MESFET." Bulletin of Electrical Engineering and Informatics 10, no. 3 (2021): 1271–82. http://dx.doi.org/10.11591/eei.v10i3.2944.

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MESFET are used in circuitsof gigahertz frequencies as they are based on gallium arsenide (GaAs) having electron mobility six times higher than that of silicon. An analytical model simulating different device current-voltage characteristics, i.e., output conductance and output transconductance of a 0.3μm gate MESFET with temperature dependence is proposed. The model is validated by comparing the results of the proposed model and those of the numerical simulation. The parameter values are computed using an intrinsic MESFET of two-dimensional geometry. In this work, the distribution of different

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24

Anholt, R., and T. W. Sigmon. "A process and device model for GaAs MESFET technology: GATES." IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 8, no. 4 (1989): 350–59. http://dx.doi.org/10.1109/43.29589.

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25

Jiang, Xunlei. "Simulation of MESFET device by streamline‐diffusion finite element methods." COMPEL - The international journal for computation and mathematics in electrical and electronic engineering 15, no. 4 (1996): 5–20. http://dx.doi.org/10.1108/03321649610154186.

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26

Ongareau, Eric, Fadhel M. Ghannouchi, and Renato G. Bosisio. "Harmonic device line simulation of negative resistance microwave mesfet oscillators." Microwave and Optical Technology Letters 3, no. 9 (1990): 317–24. http://dx.doi.org/10.1002/mop.4650030907.

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27

Mohamed, Djouder, Benfdila Arezki, and Lakhlef Ahcene. "Temperature dependent analytical model for submicron GaAs-MESFET." Bulletin of Electrical Engineering and Informatics 10, no. 3 (2021): pp. 1271~1282. https://doi.org/10.11591/eei.v10i3.2944.

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MESFET are used in circuits of gigahertz frequencies as they are based on gallium arsenide (GaAs) having electron mobility six times higher than that of silicon. An analytical model simulating different device current-voltage characteristics, i.e., output conductance and output transconductance of a 0.3μm gate MESFET with temperature dependence is proposed. The model is validated by comparing the results of the proposed model and those of the numerical simulation. The parameter values are computed using an intrinsic MESFET of two-dimensional geometry. In this work, the distribution of diffe

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28

Chen, Gui-Qiang, Joseph W. Jerome, and Chi-Wang Shu. "Analysis and Simulation of Extended Hydrodynamic Models: The Multi-Valley Gunn Oscillator and MESFET Symmetries." VLSI Design 6, no. 1-4 (1998): 277–82. http://dx.doi.org/10.1155/1998/21818.

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We introduce a novel two carrier hydrodynamic model, which incorporates higher dimensional geometric effects into a one dimensional model. We study (1) the GaAs device in the notched oscillator circuit, and, (2) a MESFET channel, and its symmetries. We present new mathematical results for a reduced model.

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Clauwaert, F., P. Van Daele, R. Baets, and P. Lagasse. "Characterization of Device Isolation in GaAs MESFET Circuits by Boron Implantation." Journal of The Electrochemical Society 134, no. 3 (1987): 711–14. http://dx.doi.org/10.1149/1.2100537.

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Rosemblatt, D. H., W. R. Hitchens, R. E. Anholt, and T. W. Sigmon. "GaAs MESFET device dependences on ion-implant tilt and rotation angles." IEEE Electron Device Letters 9, no. 3 (1988): 139–041. http://dx.doi.org/10.1109/55.2068.

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Creech, Gregory L., and Jacek M. Zurada. "Neural network modeling of GaAs IC material and MESFET device characteristics." International Journal of RF and Microwave Computer-Aided Engineering 9, no. 3 (1999): 241–53. http://dx.doi.org/10.1002/(sici)1099-047x(199905)9:3<241::aid-mmce8>3.0.co;2-p.

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ARABSHAHI, H., and M. R. BENAM. "A SHOCK-CAPTURING UPWIND DISCRETIZATION METHOD FOR CHARACTERIZATION OF SiC MESFETs." International Journal of Computational Methods 05, no. 02 (2008): 341–49. http://dx.doi.org/10.1142/s0219876208001509.

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A finite difference shock-capturing upwind discretization method in two dimensions is presented in detail for simulation of homogeneous and nonhomogeneous devices. The model is based on the solutions to the highly coupled nonlinear partial differential equations of the full hydrodynamic model. These solutions allow one to calculate the electron drift velocity and other device parameters as a function of the applied electric field. The hydrodynamic model is able to describe inertia effects which play an increasing role in different fields of micro- and optoelectronics where simplified charge tr

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33

Jia, Hu Jun, Yin Tang Yang, and Chang Chun Chai. "A New 4H-SiC MESFET Utilizing N^- Shielding and Field Plate Techniques Simultaneously." Advanced Materials Research 148-149 (October 2010): 1182–87. http://dx.doi.org/10.4028/www.scientific.net/amr.148-149.1182.

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Some new techniques include n- shielding, buried channel and field plate are firstly adopted together for design and fabrication of 4H-SiC microwave MESFETs. The testing results show that a relatively broad and uniform transconductance versus gate voltage was obtained using a 0.1m n- shielding. 0.3mm gate periphery device shows good DC and RF performance such as 5.27W/mm power density, 6.7dB power gain and 43% power added efficiency at 2.3GHz under pulse operation. Compared to conventional SiC MESFETs, a gate lag ratio as high as 0.84 can be achieved for the developed devices even under a nea

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Rao, M. Hema Lata, and Neti V. L. Narasimha Murty. "The Role of Substrate Compensation on DC Characteristics of 4H-SiC MESFET with Buffer Layer: A Combined Two-Dimensional Simulations and Analytical Study." Materials Science Forum 778-780 (February 2014): 887–90. http://dx.doi.org/10.4028/www.scientific.net/msf.778-780.887.

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An analytical model of 4H-SiC metal semiconductor field effect transistor (MESFET) is proposed with buffer layer on high purity semi-insulating (HPSI) 4H-SiC substrate compensated by multiple deep level traps. The contribution of deep level traps (DLT) is projected and verified using two-dimensional simulations (Silvaco®). The modeled DC characteristics are compared with two-dimensional simulations performed on the same device as considered in the analytical model.The 4H-SiC MESFET is simulated with and without the effect of buffer layer and the electron concentration profiles in different reg

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GUPTA, R. S., SANDEEP KUMAR AGGARWAL, RITESH GUPTA, MRIDULA GUPTA, and SUBHASIS HALDAR. "ANALYTICAL MODEL FOR NON-SELF ALIGNED BURIED P-LAYER SiC MESFET." International Journal of High Speed Electronics and Systems 14, no. 03 (2004): 897–905. http://dx.doi.org/10.1142/s0129156404003010.

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A new analytical model for saturation region is proposed for buried p-layer 4 H - SiC MESFET considering the effect of B.P. layer. This model provides the static characteristics, small signal parameters and is also extended to predict capacitance-voltage characteristics of the device. The results so obtained are in excellent agreement with experimental data confirming the validity of this model.

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Adjaye, John, and Michael S. Mazzola. "Physics of Hysteresis in MESFET Drain I-V Characteristics: Simulation Approach." Materials Science Forum 645-648 (April 2010): 945–48. http://dx.doi.org/10.4028/www.scientific.net/msf.645-648.945.

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The two-dimensional device simulator, MediciTM, was used to simulate 4H silicon carbide (4H-SiC) n-channel power metal semiconductor field effect transistors (MESFETs) with 0.5 µm gate length with and without p-type buffer layer between the n-channel and the semi-insulating (SI) substrate. The devices, which have previously been fabricated and characterized experimentally, have ion-implanted n+ source and drain ohmic contact regions. The simulations were performed with transient 30 V amplitude symmetrical triangular pulse with 30 s pulse width. Simulations show that hysteresis in drain I-V cur

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MUKHERJEE, SANKHA S., and SYED S. ISLAM. "EFFECTS OF BUFFER LAYER THICKNESS AND DOPING CONCENTRATION ON SiC MESFET CHARACTERISTICS." International Journal of High Speed Electronics and Systems 14, no. 03 (2004): 890–96. http://dx.doi.org/10.1142/s0129156404003009.

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Two-dimensional simulations have been carried out using the Atlas® device simulator to investigate the effects of the buffer layer thickness and doping concentration on the electrical characteristics of the SiC MESFET. The variations of transconductance, output resistance, gate-source capacitance, gate-drain capacitance and (cutoff frequency) f T with respect to the change in buffer layer thickness and doping concentration have been investigated. It is observed that the performances of MESFET can be improved by reducing the leakage of channel carrier into the substrate at high drain bias, whic

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38

Debie, P., and L. Martens. "Fast and accurate extraction of parasitic resistances for nonlinear GaAs MESFET device models." IEEE Transactions on Electron Devices 42, no. 12 (1995): 2239–42. http://dx.doi.org/10.1109/16.477787.

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Lee, Jae-Hoon, and Jung-Hee Lee. "Growth and Device Performance of AlGaN/GaN Heterostructure with AlSiC Precoverage on Silicon Substrate." Advances in Materials Science and Engineering 2014 (2014): 1–6. http://dx.doi.org/10.1155/2014/290646.

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A crack-free AlGaN/GaN heterostructure was grown on 4-inch Si (111) substrate with initial dot-like AlSiC precoverage layer. It is believed that introducing the AlSiC layer between AlN wetting layer and Si substrate is more effective in obtaining a compressively stressed film growth than conventional Al precoverage on Si surface. The metal semiconductor field effect transistor (MESFET), fabricated on the AlGaN/GaN heterostructure grown with the AlSiC layer, exhibited normally on characteristics, such as threshold voltage of −2.3 V, maximum drain current of 370 mA/mm, and transconductance of 12

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40

Rajesh, S., C. Thomas, and R. S. Gupta. "Influence of profile shape factors on intrinsic Si-MESFET device capacitances under diffusion mechanism." IEEE Transactions on Electron Devices 45, no. 1 (1998): 334–36. http://dx.doi.org/10.1109/16.658852.

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41

Johnson, R. H., B. W. Johnson, and J. R. Biard. "A unified physical DC and AC MESFET model for circuit simulation and device modeling." IEEE Transactions on Electron Devices 34, no. 9 (1987): 1995–2001. http://dx.doi.org/10.1109/t-ed.1987.23186.

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Chang, C. S., and D. Y. S. Day. "The current density distribution of the GaAs power MESFET: a theory for device burnout." IEEE Transactions on Electron Devices 37, no. 4 (1990): 1162–63. http://dx.doi.org/10.1109/16.52455.

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Shen, Min, Wai-Kay Yip, Ming-C. Cheng, and J. J. Liou. "An Upstream Flux Splitting Method for Hydrodynamic Modeling of Deep Submicron Devices." VLSI Design 13, no. 1-4 (2001): 329–34. http://dx.doi.org/10.1155/2001/26849.

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The advective upstream splitting method (AUSM) developed for fluid dynamics problems has been applied to solving hydrodynamic semiconductor equations coupled with the Poisson’s equation. In the AUSM, the flux vectors of a fluid system are split into a convective component and a diffusive pressure component. Discretization of these two physically distinct fluxes is thus performed separately in AUSM. Application of the developed hydrodynamic AUSM to a GaAs MESFET with a gate length of 0.1 μm has demonstrated its simplicity, efficiency and effectiveness in dealing with the highly nonlinear hydrod

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RAHMAN, TOUHIDUR, MOHAMMAD A. HUQUE, and SYED K. ISLAM. "AN EFFICIENT NUMERICAL METHOD OF DC MODELING FOR POWER MOSFET, MESFET AND AlGaN/GaN HEMT." International Journal of High Speed Electronics and Systems 18, no. 04 (2008): 825–40. http://dx.doi.org/10.1142/s0129156408005801.

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In this paper, an efficient numerical model applicable for wide varieties of long channel field-effect transistors (MOSFET, MESFET, HEMT, etc.) is developed. A set of available data is used to calculate the model parameters and another set of data is used to verify the accuracy of the model. This model provides a single expression that is applicable for the entire range of device biasing and can predict the output parameters with less than 1% error compared to the experimental results. Lagrange polynomial, the highest degree of polynomial for any given set of data, is used to derive the model

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Roschke, M., C. Chan, and O. Berolo. "An EHF resonant tunnel diode oscillator." Canadian Journal of Physics 74, S1 (1996): 243–47. http://dx.doi.org/10.1139/p96-867.

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Resonant tunnelling diodes (RTDs) are emerging as some of the more promising electron devices in the field of communications. The rapid progress of molecular beam epitaxy (MBE) growth techniques during the last decade has resulted in RTDs that exhibit remarkable peak-to-valley ratios, opening the door to a variety of useful device applications. To study the applicability of low-power EHF oscillators for personal communications and global-positioning system applications, we fabricated RTDs using AlAs/GaAs/AlAs double- barrier quantum wells and a MESFET fabrication process. The dc and rf charact

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Koshka, Yaroslav, and Igor Sankin. "High-Purity Versus High-Defect-Density Semiinsulating Substrates for SiC MESFET: Simulation of Device Characteristics." Materials Science Forum 483-485 (May 2005): 869–72. http://dx.doi.org/10.4028/www.scientific.net/msf.483-485.869.

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Quantitative assessment of the influence of deep traps in semiinsulating (SI) SiC substrates on transient behavior and substrate leakage current of SiC MESFET is reported. Twodimensional device simulation confirmed that favorable reduction of the current-collapse happens when a fully depleted buffer is used. Simultaneously, the high-purity buffer causes an undesirable increase of the current bypassing the physical channel. A similar and even more pronounced effect is observed when very high purity SI substrates are used. The deep level-induced transient behavior disappears for the concentratio

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Pronić-Rančić, Olivera, Zlatica Marinković, and Vera Marković. "Bias Dependant Noise Wave Modelling Procedure of Microwave Fets." Journal of Electrical Engineering 63, no. 2 (2012): 120–24. http://dx.doi.org/10.2478/v10187-012-0018-6.

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Bias Dependant Noise Wave Modelling Procedure of Microwave Fets A new noise modelling procedure of microwave field-effect transistors (FETs) valid for various bias conditions is suggested in this paper. The proposed procedure is based on transistor noise wave model. With the aim to improve the noise wave model accuracy, the modification of the model is done by inclusion of the error correction functions into the noise wave model equations. It leads to significant reduction of deviations between measured and simulated noise parameters and therefore better noise prediction is achieved. It is als

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EL-RABAIE, S., C. STEWART, and V. FUSCO. "Computer-aided study of the broadband small-signal equivalent circuit of a GaAs MESFET device." International Journal of Electronics 70, no. 5 (1991): 863–74. http://dx.doi.org/10.1080/00207219108921334.

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Razavi, S. M., Ali A. Orouji, and Seyed Ebrahim Hosseini. "Recessed p-buffer layer SiC MESFET: A novel device for improving DC and RF characteristics." Materials Science in Semiconductor Processing 15, no. 5 (2012): 516–21. http://dx.doi.org/10.1016/j.mssp.2012.03.015.

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Barton, T. M., and P. H. Ladbrooke. "The role of the device surface in the high voltage behaviour of the GaAs MESFET." Solid-State Electronics 29, no. 8 (1986): 807–13. http://dx.doi.org/10.1016/0038-1101(86)90183-8.

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