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Journal articles on the topic 'Metal-Oxide-Semiconductor Field Effect Transistor (MOSFET)'

Author: Grafiati

Published: 4 June 2021

Last updated: 7 September 2023

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1

Bakhoum, Ezzat G., and Cheng Zhang. "Field Effect Transistor with Nanoporous Gold Electrode." Micromachines 14, no. 6 (2023): 1135. http://dx.doi.org/10.3390/mi14061135.

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Nanoporous gold (NPG) has excellent catalytic activity and has been used in the recent literature on this issue as a sensor in various electrochemical and bioelectrochemical reactions. This paper reports on a new type of metal–oxide–semiconductor field-effect transistor (MOSFET) that utilizes NPG as a gate electrode. Both n-channel and p-channel MOSFETs with NPG gate electrodes have been fabricated. The MOSFETs can be used as sensors and the results of two experiments are reported: the detection of glucose and the detection of carbon monoxide. A detailed comparison of the performance of the ne

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2

Marcoux, J., J. Orchard-Webb, and J. F. Currie. "Complementary metal oxide semiconductor-compatible junction field-effect transistor characterization." Canadian Journal of Physics 65, no. 8 (1987): 982–86. http://dx.doi.org/10.1139/p87-156.

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We report on the fabrication and electrical characterization of a vertical junction-gate field-effect transistor (JFET) that is compatible with all complementary metal oxide semiconductor (CMOS) technologies. It can be used as a buried load for an enhancement n-channel metal oxide semiconductor field-effect transistor (n-MOSFET), replacing the p-MOSFET within the standard CMOS inverter configuration and resulting in a 40% net area economy in standard cells. To be entirely CMOS process compatible, this JFET device differs from others in the literature in that dopant concentrations in the n subs

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3

Cha, Kyuhyun, and Kwangsoo Kim. "Asymmetric Split-Gate 4H-SiC MOSFET with Embedded Schottky Barrier Diode for High-Frequency Applications." Energies 14, no. 21 (2021): 7305. http://dx.doi.org/10.3390/en14217305.

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4H-SiC Metal-Oxide-Semiconductor Field Effect Transistors (MOSFETs) with embedded Schottky barrier diodes are widely known to improve switching energy loss by reducing reverse recovery characteristics. However, it weakens the static characteristics such as specific on-resistance and breakdown voltage. To solve this problem, in this paper, an Asymmetric 4H-SiC Split Gate MOSFET with embedded Schottky barrier diode (ASG-MOSFET) is proposed and analyzed by conducting a numerical TCAD simulation. Due to the asymmetric structure of ASG-MOSFET, it has a relatively narrow junction field-effect transi

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4

John Chelliah, Cyril R. A., and Rajesh Swaminathan. "Current trends in changing the channel in MOSFETs by III–V semiconducting nanostructures." Nanotechnology Reviews 6, no. 6 (2017): 613–23. http://dx.doi.org/10.1515/ntrev-2017-0155.

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AbstractThe quest for high device density in advanced technology nodes makes strain engineering increasingly difficult in the last few decades. The mechanical strain and performance gain has also started to diminish due to aggressive transistor pitch scaling. In order to continue Moore’s law of scaling, it is necessary to find an effective way to enhance carrier transport in scaled dimensions. In this regard, the use of alternative nanomaterials that have superior transport properties for metal-oxide-semiconductor field-effect transistor (MOSFET) channel would be advantageous. Because of the e

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He, Xibin. "The Advantages and Applications of IGBT Compared with Conventional BJT and MOSFET." Journal of Physics: Conference Series 2386, no. 1 (2022): 012054. http://dx.doi.org/10.1088/1742-6596/2386/1/012054.

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Abstract Nowadays, the power semiconductor devices have been used in many fields like wind power generation systems, the rail transit. Bipolar junction transistors (BJTs) and metal-oxide-semiconductor field-effect transistors (MOSFETs) as well as some other devices are the dominating the market. The insulated gate bipolar transistor (IGBT) as a mixed device of the BJT and the MOSFET, has a preeminent performance. In this paper, the characteristics of the punch through IGBT (PT-IGBT), the MOSFET and the BJT will be investigated by TCAD. Then the PT-IGBT is compared with the BJT and the MOSFET,

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Kyaw, Wut Hmone, and May Nwe Myint Aye. "Simulation of Energy Bands for Metal and Semiconductor Junction." Journal La Multiapp 1, no. 2 (2020): 7–13. http://dx.doi.org/10.37899/journallamultiapp.v1i2.107.

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This paper presents the metal-semiconductor band structure analysis for metal-oxide semiconductor field effect transistor (MOSFET). The energy bands were observed at metal-semiconductor and semiconductor-metal junctions. The simulation results show energy variations by using gallium-nitride (GaN) material. Gallium nitride based MOSFETs have some special material properties and wide band-gap. From the energy band, the condition of contact potential, conduction and valence band-edges can be analyzed. The computerized simulation results for getting the band layers are investigated with MATLAB pro

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Islam, Md Rabiul, Md Kamrul Hasan, Md Abdul Mannan, M. Tanseer Ali, and Md Rokib Hasan. "Gate Length Effect on Gallium Nitride Based Double Gate Metal-Oxide-Semiconductor Field-Effect Transistor." AIUB Journal of Science and Engineering (AJSE) 18, no. 2 (2019): 73–80. http://dx.doi.org/10.53799/ajse.v18i2.43.

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We have investigated the performance of Gallium Nitride (GaN) based Double-Gate (DG) Metal-Oxide-Semiconductor Field-Effect Transistor (MOSFET). Atlas Device Simulation Framework -Silvaco has been used to access Non-Equilibrium Green Function to distinguish the transfer characteristics curve, ON state current (ION), OFF-state current (IOFF), Drain Induced Barrier Lowering (DIBL), Subthreshold Swing, Electron Current Density, Conduction Band Energy and Electric Field. The concept of Solid state device physics on the effect of gate length studied for the next generation logic applications. GaN-b

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8

Gu, Jie, Qingzhu Zhang, Zhenhua Wu, et al. "Cryogenic Transport Characteristics of P-Type Gate-All-Around Silicon Nanowire MOSFETs." Nanomaterials 11, no. 2 (2021): 309. http://dx.doi.org/10.3390/nano11020309.

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A 16-nm-Lg p-type Gate-all-around (GAA) silicon nanowire (Si NW) metal oxide semiconductor field effect transistor (MOSFET) was fabricated based on the mainstream bulk fin field-effect transistor (FinFET) technology. The temperature dependence of electrical characteristics for normal MOSFET as well as the quantum transport at cryogenic has been investigated systematically. We demonstrate a good gate-control ability and body effect immunity at cryogenic for the GAA Si NW MOSFETs and observe the transport of two-fold degenerate hole sub-bands in the nanowire (110) channel direction sub-band stru

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9

Xu, Haoran, Jianghua Ding, and Jian Dang. "Design and Characteristics of CMOS Inverter based on Multisim and Cadence." Journal of Physics: Conference Series 2108, no. 1 (2021): 012034. http://dx.doi.org/10.1088/1742-6596/2108/1/012034.

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Abstract Known as complementary symmetrical metal oxide semiconductor (cos-mos), complementary metal oxide semiconductor is a metal oxide semiconductor field effect transistor (MOSFET) manufacturing process, which uses complementary and symmetrical pairs of p-type and n-type MOSFETs to realize logic functions. CMOS technology is used to build integrated circuit (IC) chips, including microprocessors, microcontrollers, memory chips (including CMOS BIOS) and other digital logic circuits. CMOS technology is also used in analog circuits, such as image sensors (CMOS sensors), data converters, RF cir

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Lee, Hoontaek, Junsoo Kim, Kumjae Shin, and Wonkyu Moon. "Improving the Performance of the ToGoFET Probe: Advances in Design, Fabrication, and Signal Processing." Micromachines 12, no. 11 (2021): 1303. http://dx.doi.org/10.3390/mi12111303.

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We report recent improvements of the tip-on-gate of field-effect-transistor (ToGoFET) probe used for capacitive measurement. Probe structure, fabrication, and signal processing were modified. The inbuilt metal-oxide-semiconductor field-effect-transistor (MOSFET) was redesigned to ensure reliable probe operation. Fabrication was based on the standard complementary metal-oxide-semiconductor (CMOS) process, and trench formation and the channel definition were modified. Demodulation of the amplitude-modulated drain current was varied, enhancing the signal-to-noise ratio. The I-V characteristics of

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11

KUMAR, K. KEERTI, and N. BHEEMA RAO. "POWER GATING TECHNIQUE USING FinFET FOR MINIMIZATION OF SUB-THRESHOLD LEAKAGE CURRENT." Journal of Circuits, Systems and Computers 23, no. 08 (2014): 1450109. http://dx.doi.org/10.1142/s0218126614501096.

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In this paper, a novel power gating method has been proposed with the combination of complementary metal oxide semiconductor (CMOS) logic and FinFET for better sub-threshold leakage current minimization. Sub-threshold leakage currents take the paramount part in overall contribution to total power dissipation which comprises of scaling and power reduction. Power gating technique takes up priority among the different leakage current reduction mechanisms. The novel approach has been applied to a CMOS inverter and a two input CMOS NAND gate. The inverter simulated with high threshold voltage metal

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12

Tan, Michael Loong Peng. "Long Channel Carbon Nanotube as an Alternative to Nanoscale Silicon Channels in Scaled MOSFETs." Journal of Nanomaterials 2013 (2013): 1–5. http://dx.doi.org/10.1155/2013/831252.

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Long channel carbon nanotube transistor (CNT) can be used to overcome the high electric field effects in nanoscale length silicon channel. When maximum electric field is reduced, the gate of a field-effect transistor (FET) is able to gain control of the channel at varying drain bias. The device performance of a zigzag CNTFET with the same unit area as a nanoscale silicon metal-oxide semiconductor field-effect transistor (MOSFET) channel is assessed qualitatively. The drain characteristic of CNTFET and MOSFET device models as well as fabricated CNTFET device are explored over a wide range of dr

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Okada, Masakazu, Teruaki Kumazawa, Yusuke Kobayashi, Masakazu Baba, and Shinsuke Harada. "Highly Efficient Switching Operation of 1.2 kV-Class SiC SWITCH-MOS." Materials Science Forum 1004 (July 2020): 795–800. http://dx.doi.org/10.4028/www.scientific.net/msf.1004.795.

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A 1.2 kV silicon carbide (SiC) SBD-wall-integrated trench metal oxide semiconductor field effect transistor (MOSFET) (SWITCH-MOS) exhibits potential for solving body-PiN-diode-related problems such as bipolar forward degradation and switching losses among relatively low breakdown voltage 1.2 kV-class SiC MOSFETs. In this study, dynamic characteristics and switching losses of the SWITCH-MOS and conventional MOSFET are compared. The results demonstrate that the SWITCH-MOS exhibits smaller turn-on and reverse recovery losses than a conventional MOSFET at high temperatures. Ruggedness performances

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Lin, Jing-Jenn, Ji-Hua Tao, and You-Lin Wu. "Subthreshold Characteristics of a Metal-Oxide–Semiconductor Field-Effect Transistor with External PVDF Gate Capacitance." Crystals 9, no. 12 (2019): 673. http://dx.doi.org/10.3390/cryst9120673.

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An organic ferroelectric capacitor, using polyvinylidene difluoride (PVDF) as the dielectric, was fabricated. By connecting the PVDF capacitor in series to the gate of a commercially purchased metal-oxide–semiconductor field-effect transistor (MOSFET), drain current (ID)–drain voltage (VD) characteristics and drain current (ID)–gate voltage (VG) characteristics were measured. In addition, the subthreshold slopes of the MOSFET were determined from the ID–VG curves. It was found that the subthreshold slope could be effectively reduced by 23% of its original value when the PVDF capacitor was adde

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15

Toumazou, Christofer, Tan Sri Lim Kok Thay, and Pantelis Georgiou. "A new era of semiconductor genetics using ion-sensitive field-effect transistors: the gene-sensitive integrated cell." Philosophical Transactions of the Royal Society A: Mathematical, Physical and Engineering Sciences 372, no. 2012 (2014): 20130112. http://dx.doi.org/10.1098/rsta.2013.0112.

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Semiconductor genetics is now disrupting the field of healthcare owing to the rapid parallelization and scaling of DNA sensing using ion-sensitive field-effect transistors (ISFETs) fabricated using commercial complementary metal -oxide semiconductor technology. The enabling concept of DNA reaction monitoring introduced by Toumazou has made this a reality and we are now seeing relentless scaling with Moore's law ultimately achieving the $100 genome. In this paper, we present the next evolution of this technology through the creation of the gene-sensitive integrated cell (GSIC) for label-free re

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16

Zhang, Maolin, Lei Wang, Kemeng Yang, Jiafei Yao, Weihua Tang, and Yufeng Guo. "Breakdown Characteristics of Ga2O3-on-SiC Metal-Oxide-Semiconductor Field-Effect Transistors." Crystals 13, no. 6 (2023): 917. http://dx.doi.org/10.3390/cryst13060917.

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Ultra-wide bandgap semiconductor gallium oxide (Ga2O3) features a breakdown strength of 8 MV/cm and bulk mobility of up to 300 cm2V−1s−1, which is considered a promising candidate for next-generation power devices. However, its low thermal conductivity is reckoned to be a severe issue in the thermal management of high-power devices. The epitaxial integration of gallium oxide thin films on silicon carbide (SiC) substrates is a possible solution for tackling the cooling problems, yet premature breakdown at the Ga2O3/SiC interface would be introduced due to the relatively low breakdown strength o

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Stanković, Srboljub J., R. D. Ilić, M. Petrović, B. Lončar, and A. Vasić. "Radiological Characterization of Semiconductor Materials in Field Effect Transistor Dosimeter by Monte Carlo Method." Materials Science Forum 518 (July 2006): 361–66. http://dx.doi.org/10.4028/www.scientific.net/msf.518.361.

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The use of semiconductor materials in radiation processing, radiation therapy and diagnostics, and detection of cosmic radiation motivated development of numerical methods for its radiological characterization. This paper presents the application of the Monte Carlo method using the FOTELP-2K4 code for radiological characterization of Metal Oxide Semiconductor Field Effect Transistor (MOSFET) dosimeter. The advantages of MOSFET dosimeters include small size, immediate readout, and ease of use for a wide photon energy range. In order to determine the dosimeter response accurately, distribution o

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Vimala, P., and N. R. Nithin Kumar. "Quantum Modelling of Nanoscale Silicon Gate-All-Around Field Effect Transistor." Journal of Nano Research 64 (November 2020): 115–22. http://dx.doi.org/10.4028/www.scientific.net/jnanor.64.115.

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The paper introduces an analytical model for gate all around (GAA) or Surrounding Gate Metal Oxide Semiconductor Field Effect Transistor (SG-MOSFET) inclusive of quantum mechanical effects. The classical oxide capacitance is replaced by the capacitance incorporating quantum effects by including the centroid parameter. The quantum variant of inversion charge distribution function, inversion layer capacitance, drain current, and transconductance expressions are modeled by employing this model. The established analytical model results agree with the simulated results, verifying these models' vali

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19

Khvitia, Badri, Anna Gheonjian, Zviadi Kutchadze, and Roman Jobava. "A SPICE Model for IGBTs and Power MOSFETs Focusing on EMI/EMC in High-Voltage Systems." Electronics 10, no. 22 (2021): 2822. http://dx.doi.org/10.3390/electronics10222822.

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We describe two models of Power Transistors (IGBT, MOSFET); both were successfully used for the analysis of electromagnetic interference (EMI) and electromagnetic compatibility (EMC) while modeling high-voltage systems (PFC, DC/DC, inverter, etc.). The first semi-mathematical–behavioral insulated-gate bipolar transistor (IGBT) model introduces nonlinear negative feedback generated in the semiconductor’s p+ and n+ layers, which are located near the metal contact of the IGBT emitter, to better describe the dynamic characteristics of the transistor. A simplified model of the metal–oxide-semicondu

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Vimala, Palanichamy, and N. R. Nithin Kumar. "Explicit Quantum Drain Current Model for Symmetric Double Gate MOSFETs." Journal of Nano Research 61 (February 2020): 88–96. http://dx.doi.org/10.4028/www.scientific.net/jnanor.61.88.

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In this article, an analytical model for Double gate Metal Oxide Semiconductor Field Effect Transistor (DG MOSFET) is developed including Quantum effects. The Schrodinger–Poisson’s equation is used to develop the analytical Quantum model using Variational method. A mathematical expression for inversion charge density is obtained and the model was developed with quantum effects by means of oxide capacitance for different channel thickness and gate oxide thickness. Based on inversion charge density model the compact model is developed for transfer characteristics, transconductance and C-V curves

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Zhai, Mingjing, Yuan Yang, Yang Wen, Wenqing Yao, and Yuan Li. "Characterization analysis and gate driver design for 1200 V 10 A SiC MOSFET." Modern Physics Letters B 32, no. 34n36 (2018): 1840080. http://dx.doi.org/10.1142/s0217984918400808.

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Silicon carbide (SiC) metal-oxide-semiconductor field-effect transistor (MOSFET) can work at high switching frequency with low switching loss compared with Si insulated gate bipolar transistor (IGBT). Although Si IGBT and SiC MOSFET have the same MOS-gate structure, the transient characteristics and the gate driver requirements for Si IGBT and SiC MOSFET are different. In order to fully utilize the advantages of SiC MOSFET, the gate driver of SiC MOSFET needs to be optimized to meet some special driving requirements. The paper aims to analyze the characteristics for the new generation of wide

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Chaudhry, Amit, and Nath Roy. "A comparative study of hole and electron inversion layer quantization in MOS structures." Serbian Journal of Electrical Engineering 7, no. 2 (2010): 185–93. http://dx.doi.org/10.2298/sjee1002185c.

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In this paper, an analytical model has been developed to study inversion layer quantization in nanoscale Metal Oxide Semiconductor Field Effect Oxide p-(MOSFET). n-MOSFETs have been studied using the variation approach and the p-MOSFETs have been studied using the triangular well approach. The inversion charge density and gate capacitance analysis for both types of transistors has been done. There is a marked decrease in the inversion charge density and the capacitance of the p-MOSFET as compared to n-MOSFETs. The results are compared with the numerical results showing good agreement.

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Vlasov, Yuri. "Membrane-oxide semiconductor field-effect transistor (MOSFET) sensors." Mikrochimica Acta 104, no. 1-6 (1991): 363–77. http://dx.doi.org/10.1007/bf01245522.

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Rajesh, Durgam, Subramanian Tamil, Nikhil Raj, and Bharti Chourasia. "Low-voltage bulk-driven flipped voltage follower-based transconductance amplifier." Bulletin of Electrical Engineering and Informatics 11, no. 2 (2022): 765–71. http://dx.doi.org/10.11591/eei.v11i2.3306.

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A low voltage high performance design of operational transconductance amplifier is proposed in this paper. The proposed architecture is based on bulk driven quasi-floating gate metal oxide semiconductor field effect transistor (MOSFET) which supports low voltage operation and improves the gain of the amplifier. Besides to this the tail current source requirement of operational transconductance amplifier (OTA) is removed by using the flipped voltage follower structure at the input pair along with bulk driven quasi-floating gate MOSFET. The proposed operational transconductance amplifier shows a

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Dhar, Sarit, Shurui Wang, John R. Williams, Sokrates T. Pantelides, and Leonard C. Feldman. "Interface Passivation for Silicon Dioxide Layers on Silicon Carbide." MRS Bulletin 30, no. 4 (2005): 288–92. http://dx.doi.org/10.1557/mrs2005.75.

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AbstractSilicon carbide is a promising semiconductor for advanced power devices that can outperform Si devices in extreme environments (high power, high temperature, and high frequency). In this article, we discuss recent progress in the development of passivation techniques for the SiO2/4H-SiC interface critical to the development of SiC metal oxide semiconductor field-effect transistor (MOSFET) technology. Significant reductions in the interface trap density have been achieved, with corresponding increases in the effective carrier (electron) mobility for inversion-mode 4H-SiC MOSFETs. Advanc

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Debbarma, M., S. Das, J. Pal, et al. "Gate Capacitance in Quantum Metal-Oxide-Semiconductor Field-Effect Transistor Devices of Technologically Important Materials." Advanced Science, Engineering and Medicine 11, no. 12 (2019): 1161–78. http://dx.doi.org/10.1166/asem.2019.2477.

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The Heisenberg's scientific theory of quantum science since its beginning has been proved to be instrumental in unlocking varied vital quantum phenomena. In what follows the Heisenberg's scientific theory has been used to derive the expressions for the gate capacitance in Quantum MOSFET Devices manufactured from completely different technologically vital nonstandard materials by formulating the 2D electron statistics under very low temperature so that the Fermi function tends to unity. For numerical computations we take Cd3As2, the best quality very high mobility semiconductor and non-linear o

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Murakami, Eiichi, Tatsuya Takeshita, and Kazuhiro Oda. "Significant Differences in BTI and TDDB Characteristics of Commercial Planar SiC-MOSFETs." Materials Science Forum 1062 (May 31, 2022): 642–46. http://dx.doi.org/10.4028/p-xz45c3.

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Silicon carbide (SiC) metal-oxide-semiconductor field-effect transistors (MOSFETs) have been produced by several vendors for commercial applications. SiC-MOSFET reliability was assessed using bias-temperature instability (BTI) and time-dependent dielectric breakdown (TDDB) characteristics. Here, we compared two planar SiC-MOSFET samples (A and B) from different vendors. The samples exhibited significantly different positive and negative BTI, time-dependent gate-current, TDDB lifetime statistics, and temperature dependence. These differences suggest NO (nitric oxide)-annealing variations.

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Mendiratta, Namrata, Suman Lata Tripathi, Sanjeevikumar Padmanaban, and Eklas Hossain. "Design and Analysis of Heavily Doped n+ Pocket Asymmetrical Junction-Less Double Gate MOSFET for Biomedical Applications." Applied Sciences 10, no. 7 (2020): 2499. http://dx.doi.org/10.3390/app10072499.

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The Complementary Metal-Oxide Semiconductor (CMOS) technology has evolved to a great extent and is being used for different applications like environmental, biomedical, radiofrequency and switching, etc. Metal-Oxide-Semiconductor Field-Effect Transistor (MOSFET) based biosensors are used for detecting various enzymes, molecules, pathogens and antigens efficiently with a less time-consuming process involved in comparison to other options. Early-stage detection of disease is easily possible using Field-Effect Transistor (FET) based biosensors. In this paper, a steep subthreshold heavily doped n+

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Agha, Firas, Yasir Naif, and Mohammed Shakib. "Review of Nanosheet Transistors Technology." Tikrit Journal of Engineering Sciences 28, no. 1 (2021): 40–48. http://dx.doi.org/10.25130/tjes.28.1.05.

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Nano-sheet transistor can be defined as a stacked horizontally gate surrounding the channel on all direction. This new structure is earning extremely attention from research to cope the restriction of current Fin Field Effect Transistor (FinFET) structure. To further understand the characteristics of nano-sheet transistors, this paper presents a review of this new nano-structure of Metal Oxide Semiconductor Field Effect Transistor (MOSFET), this new device that consists of a metal gate material. Lateral nano-sheet FET is now targeting for 3nm Complementary MOS (CMOS) technology node. In this r

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Kang, Seok Jung, Jeong-Uk Park, Kyung Jin Rim, et al. "Analysis of Channel Area Fluctuation Effects of Gate-All-Around Tunnel Field-Effect Transistor." Journal of Nanoscience and Nanotechnology 20, no. 7 (2020): 4409–13. http://dx.doi.org/10.1166/jnn.2020.17792.

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In this manuscript, channel area fluctuation (CAF) effects on turn-on voltage (Von) and subthreshold swing (SS) in gate-all-around (GAA) nanowire (NW) tunnel field-effect transistor (TFET) with multi-bridge-channel (MBC) have been investigated for the first time. These variations occur because oblique etching slope makes various elliptical-shaped channels in MBC-TFET. Since TFET is promising candidates to succeed metal-oxide-semiconductor FETs (MOSFET), these variation effects have been compared to MOSFET. Furthermore, Ge homojunction TFET, one of the solutions to increase on-state current in

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Theodore, N. David, Vida Ilderem, and Ming Pan. "Oxide-induced deterioration of TiSi2 source/drain MOSFET contacts." Proceedings, annual meeting, Electron Microscopy Society of America 52 (1994): 862–63. http://dx.doi.org/10.1017/s0424820100172048.

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A simple process for formation of a metal-oxide-semiconductor field-effect transistor (MOSFET) involves fabrication of a polysilicon/oxide gate between source and drain regions. Contact is made to source/drain regions by use of TiSi2 layers followed by Al(Cu) metal lines. A silicide layeris used toreduce contact resistance. TiSi2 is chosen as a contact layer because in the C54phase, the silicide has a lower resistivity (~12 μΏ-cm) than most other silicides (except for CoSi2 ~10-15 μΏ-cm). During formation of TiSi2 contact layers to MOSFET source/drain regions, a deterioration of the TiSi2 is o

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Hasan, Md Sakib, Samira Shamsir, Mst Shamim Ara Shawkat, Frances Garcia, and Syed K. Islam. "Multivariate Regression Polynomial: A Versatile and Efficient Method for DC Modeling of Different Transistors (MOSFET, MESFET, HBT, HEMT and G4FET)." International Journal of High Speed Electronics and Systems 27, no. 03n04 (2018): 1840016. http://dx.doi.org/10.1142/s0129156418400165.

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This work presents multivariate regression polynomial as a versatile and efficient method for DC modeling of modern transistors with very different underlying physics including MOSFET (metal-oxide-semiconductor field-effect transistor), MESFET (metal–semiconductor field-effect transistor), HBT (heterojunction bipolar transistor), HEMT (High-electron-mobility transistor) and a novel silicon-on-insulator four-gate transistors (G4FET). A set of available data from analytic solution, TCAD simulation, and experimental measurements for different operating conditions is used to empirically determine

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Saggio, Mario, Alfio Guarnera, Edoardo Zanetti, et al. "Industrial Approach for Next Generation of Power Devices Based on 4H-SiC." Materials Science Forum 821-823 (June 2015): 660–66. http://dx.doi.org/10.4028/www.scientific.net/msf.821-823.660.

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Silicon Carbide metal-oxide-semiconductor field effect transistor (4H-SiC MOSFET) can be considered as the next revolution in power electronics applications. However, a wide market introduction of 4H-SiC MOSFET requires a special focus on device reliability and simplicity of use to replace Silicon switches in existing applications. This paper describes STMicroelectronics (STM) approach to define methodology and design solutions able to guarantee the end-users and to drive their choice toward 4H-SiC MOSFET as an ideal power component.

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Li, Hui, Renze Yu, Yi Zhong, Ran Yao, Xinglin Liao, and Xianping Chen. "Design of 400 V Miniature DC Solid State Circuit Breaker with SiC MOSFET." Micromachines 10, no. 5 (2019): 314. http://dx.doi.org/10.3390/mi10050314.

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Silicon carbide (SiC) metal-oxide-semiconductor field-effect transistors (MOSFETs) have the advantages of high-frequency switching capability and the capability to withstand high temperatures, which are suitable for switching devices in a direct current (DC) solid state circuit breaker (SSCB). To guarantee fast and reliable action of a 400 V DC SSCB with SiC MOSFET, circuit design and prototype development were carried out. Taking 400V DC microgrid as research background, firstly, the topology of DC SSCB with SiC MOSFET was introduced. Then, the drive circuit of SiC MOSFET, fault detection cir

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Yano, Hiroshi, Yuki Oshiro, Dai Okamoto, Tomoaki Hatayama, and Takashi Fuyuki. "Instability of 4H-SiC MOSFET Characteristics due to Interface Traps with Long Time Constants." Materials Science Forum 679-680 (March 2011): 603–6. http://dx.doi.org/10.4028/www.scientific.net/msf.679-680.603.

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Instability of metal-oxide-semiconductor field-effect transistor (MOSFET) characteristics was evaluated by DC and pulse current-voltage (I-V) measurements. MOSFETs with nirided gate oxides were fabricated on C-face 4H-SiC. Their interfaces have near interface traps (NITs) with long time constants, depending on the cooling down process after nitridation. Such devices exhibited a large hysteresis in DC I-V and a large transient current in pulse I-V measurements. These phenomena can be explained by the charge state of NITs due to capture/emission of electrons in the channel.

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Chang, Wen-Teng, Hsu-Jung Hsu, and Po-Heng Pao. "Vertical Field Emission Air-Channel Diodes and Transistors." Micromachines 10, no. 12 (2019): 858. http://dx.doi.org/10.3390/mi10120858.

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Vacuum channel transistors are potential candidates for low-loss and high-speed electronic devices beyond complementary metal-oxide-semiconductors (CMOS). When the nanoscale transport distance is smaller than the mean free path (MFP) in atmospheric pressure, a transistor can work in air owing to the immunity of carrier collision. The nature of a vacuum channel allows devices to function in a high-temperature radiation environment. This research intended to investigate gate location in a vertical vacuum channel transistor. The influence of scattering under different ambient pressure levels was

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Kumar Sharma, Yogendra, and Imran Ullah Khan. "Performance Evaluation of Fully Depleted Silicon on Insulator MOSFET." International Journal of Engineering and Applied Computer Science 04, no. 04 (2022): 29–35. http://dx.doi.org/10.24032/ijeacs/0404/004.

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VLSI technology development nowadays is mostly focused on the downsizing of semiconductor devices, which is significantly reliant on advancements in complementary metal-oxide-semiconductor technology. Due to capacitance, shorter channel length, body biassing, faster-switching transistor, limited variability, and faster running transistor, Silicon-on-Insulator technology has seen a lot of changes. In comparison to traditional bulk technology, Silicon on Insulator offers intriguing new possibilities. The recent stalling of advancement in CMOS technology has been noticed. A fully depleted silicon

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Fragopoulou, M., S. Stoulos, M. Zamani, et al. "A study of the response of depleted type p-MOSFETs to electron dose." HNPS Proceedings 21 (March 8, 2019): 84. http://dx.doi.org/10.12681/hnps.2009.

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The p-MOSFET dosimeter studied in this work has been manufactured at LAAS- CNRS Laboratory in Toulouse France, for applications in personal and space dosimetry. They are proposed for proton, heavy ions and electron and photon dose measurements. The current study investigates the sensitivity of this new type of Metal-Oxide-Semiconductor field effect transistor (MOSFET) to electrons. The sensitivity of the new MOSFET based dosemeters to electrons is linear for wide dose ranges. The influence of the electrons energy on the dosemeters response is also investigated.

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Tsai, Yu-Yang, Chun-Yu Kuo, Bo-Chang Li, Po-Wen Chiu, and Klaus Y. J. Hsu. "A Graphene/Polycrystalline Silicon Photodiode and Its Integration in a Photodiode–Oxide–Semiconductor Field Effect Transistor." Micromachines 11, no. 6 (2020): 596. http://dx.doi.org/10.3390/mi11060596.

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In recent years, the characteristics of the graphene/crystalline silicon junction have been frequently discussed in the literature, but study of the graphene/polycrystalline silicon junction and its potential applications is hardly found. The present work reports the observation of the electrical and optoelectronic characteristics of a graphene/polycrystalline silicon junction and explores one possible usage of the junction. The current–voltage curve of the junction was measured to show the typical exponential behavior that can be seen in a forward biased diode, and the photovoltage of the jun

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Rangel, Ricardo Cardoso, Katia R. A. Sasaki, Leonardo Shimizu Yojo, and João Antonio Martino. "Fabrication and Electrical Characterization of Ultra-Thin Body and BOX (UTBB) Back Enhanced SOI (BESOI) pMOSFET." Journal of Integrated Circuits and Systems 15, no. 1 (2020): 1–6. http://dx.doi.org/10.29292/jics.v15i1.107.

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This work analyzes the third generation BESOI MOSFET (Back-Enhanced Silicon-On-Insulator Metal-Oxide-Semiconductor Field-Effect-transistor) built on UTBB (Ultra-Thin Body and Buried Oxide), comparing it to the BESOI with thick buried oxide (first generation). The stronger coupling between front and back interfaces of the UTBB BESOI device improves in 67% the current drive, 122% the maximum transconductance and 223% the body factor. Operating with seven times lower back gate bias, the UTBB BESOI MOSFET presented more compatibility with standard SOI CMOS (Complementary MOS) technology than the B

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Zhou, Xuanze, Yongjian Ma, Guangwei Xu та ін. "Enhancement-mode β-Ga₂O₃ U-shaped gate trench vertical MOSFET realized by oxygen annealing". Applied Physics Letters 121, № 22 (2022): 223501. http://dx.doi.org/10.1063/5.0130292.

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Vertical metal–oxide–semiconductor field effect transistor (MOSFET) is essential to the future application of ultrawide bandgap β-Ga2O3. In this work, we demonstrated an enhancement-mode β-Ga2O3 U-shaped gate trench vertical metal–oxide–semiconductor field effect transistor (UMOSFET) featuring a current blocking layer (CBL). The CBL was realized by high-temperature annealing under oxygen ambient, which provided electrical isolation between the source and drain electrodes. The CBL thicknesses of different annealing temperatures were derived from C–V measurements and the Fermi level position of

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Na, Jaeyeop, and Kwangsoo Kim. "A Novel 4H-SiC Double Trench MOSFET with Built-In MOS Channel Diode for Improved Switching Performance." Electronics 12, no. 1 (2022): 92. http://dx.doi.org/10.3390/electronics12010092.

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This study proposed a novel 4H-SiC double trench metal-oxide-semiconductor field-effect-transistor (DTMCD-MOSFET) structure with a built-in MOS channel diode. Further, its characteristics were analyzed using TCAD simulation. The DTMCD-MOSFET comprised active and dummy gates that were divided horizontally; the channel diode operated through the dummy gate and the p-base and N+ source regions at the bottom of the dummy gate. Because the bult-in channel diode was positioned at the bottom, the DTMCD-MOSEFT minimized static deterioration. Despite having a 5.2% higher specific on-resistance (Ron-sp)

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Vimala, Palanichamy, and T. S. Arun Samuel. "Effect of Gate Engineering and Channel Length Variation in Surrounding Gate MOSFETs." Journal of Nano Research 63 (June 2020): 134–43. http://dx.doi.org/10.4028/www.scientific.net/jnanor.63.134.

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In this paper, the digital and analog performance for Double Material Gate Surrounding Gate Metal Oxide Semiconductor Field Effect Transistor (DM SG MOSFET) has been analyzed. A detailed study of DM SG MOSFET is performed for different channel length ratio's. The comparison analysis on surface potential, electric field, transfer characteristics, output characteristics, transconductance and output conductance is carried with respect to the silicon dioxide and hafnium dioxide based device. It has been found from the simulation results that HfO2 dielectric used DM SG TFET provides better performa

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Kakarla, Bhagyalakshmi, Thomas Ziemann, Selamnesh Nida, Elias Doenni, and Ulrike Grossner. "Planar to Trench: Short Circuit Capability Analysis of 1.2 kV SiC MOSFETs." Materials Science Forum 924 (June 2018): 782–85. http://dx.doi.org/10.4028/www.scientific.net/msf.924.782.

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This paper presents an insight into the short circuit (SC) capability of Rohm’s discrete 1.2 kV, 80 mΩ state-of-the-art silicon carbide (SiC) double trench metal-oxide-semiconductor field effect transistor (MOSFET). SC measurements are performed to compare the behavior of Wolfspeed’s similarly rated 1.2 kV, 80 mΩ planar MOSFET with the Rohm trench devices. Short circuit withstand time (SCWT) of both designs under nominal operating conditions at room temperature is measured by performing destructive SC tests.

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Weng, Wu-Te, Yao-Jen Lee, Horng-Chih Lin, and Tiao-Yuan Huang. "Plasma-Induced Damage on the Reliability of Hf-Based High-k/Dual Metal-Gates Complementary Metal Oxide Semiconductor Technology." International Journal of Plasma Science and Engineering 2009 (December 14, 2009): 1–10. http://dx.doi.org/10.1155/2009/308949.

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This study examines the effects of plasma-induced damage (PID) on Hf-based high-k/dual metal-gates transistors processed with advanced complementary metal-oxide-semiconductor (CMOS) technology. In addition to the gate dielectric degradations, this study demonstrates that thinning the gate dielectric reduces the impact of damage on transistor reliability including the positive bias temperature instability (PBTI) of n-channel metal-oxide-semiconductor field-effect transistors (NMOSFETs) and the negative bias temperature instability (NBTI) of p-channel MOSFETs. This study shows that high-k/metal-

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Rathore, Pradeep Kumar, Brishbhan Singh Panwar, and Jamil Akhtar. "A novel CMOS-MEMS integrated pressure sensing structure based on current mirror sensing technique." Microelectronics International 32, no. 2 (2015): 81–95. http://dx.doi.org/10.1108/mi-11-2014-0048.

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Purpose – The present paper aims to propose a basic current mirror-sensing circuit as an alternative to the traditional Wheatstone bridge circuit for the design and development of high-sensitivity complementary metal oxide semiconductor (CMOS)–microelectromechanical systems (MEMS)-integrated pressure sensors. Design/methodology/approach – This paper investigates a novel current mirror-sensing-based CMOS–MEMS-integrated pressure-sensing structure based on the piezoresistive effect in metal oxide field effect transistor (MOSFET). A resistive loaded n-channel MOSFET-based current mirror pressure-

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Umegami, Hirokatsu, Toshikazu Harada, and Ken Nakahara. "Performance Comparison of Si IGBT and SiC MOSFET Power Module Driving IPMSM or IM under WLTC." World Electric Vehicle Journal 14, no. 4 (2023): 112. http://dx.doi.org/10.3390/wevj14040112.

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The cumulative inverter losses and power consumption of a silicon insulated gate bipolar transistor (Si IGBT) and three types of silicon carbide metal-oxide-semiconductor field-effect transistors (SiC MOSFETs) were evaluated on an electric motor test bench under a worldwide harmonized light vehicles test cycle (WLTC). SiC MOSFETs showed higher performance than Si IGBT regardless of the motor type and test vehicles. In the case of driving an interior permanent magnet synchronous motor (IPMSM), the latest 4th generation SiC MOSFET (SiC-4G) in ROHM has the lowest inverter loss and energy consumpt

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Xie, Junan, Zhennan Zhu, Hong Tao, et al. "Research Progress of High Dielectric Constant Zirconia-Based Materials for Gate Dielectric Application." Coatings 10, no. 7 (2020): 698. http://dx.doi.org/10.3390/coatings10070698.

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The high dielectric constant ZrO2, as one of the most promising gate dielectric materials for next generation semiconductor device, is expected to be introduced as a new high k dielectric layer to replace the traditional SiO2 gate dielectric. The electrical properties of ZrO2 films prepared by various deposition methods and the main methods to improve their electrical properties are introduced, including doping of nonmetal elements, metal doping design of pseudo-binary alloy system, new stacking structure, coupling with organic materials and utilization of crystalline ZrO2 as well as optimizat

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Inokawa, Hiroshi, Wei Du, Mitsuru Kawai, Hiroaki Satoh, Atsushi Ono, and Vipul Singh. "Single-Photon Detector Based on MOSFET Electrometer with Single-Electron Sensitivity." Advanced Materials Research 222 (April 2011): 3–7. http://dx.doi.org/10.4028/www.scientific.net/amr.222.3.

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A unique single-photon detector is reported, which utilizes scaled-down silicon-on- insulator (SOI) metal-oxide-semiconductor field-effect transistor (MOSFET) with single-electron sensitivity, and features low-voltage operation without carrier multiplication and low dark counts. Primary single-photon detection characteristics are presented, and then several issues related to operation speed and quantum efficiency are to be addressed.

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Chauhan, Manorama, Ravindra Singh Kushwah, Pavan Shrivastava, and Shyam Akashe. "Analysis and Simulation of a Low-Leakage Analog Single Gate and FinFET Circuits." International Journal of Nanoscience 13, no. 02 (2014): 1450012. http://dx.doi.org/10.1142/s0219581x14500124.

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In the world of Integrated Circuits, complementary metal–oxide–semiconductor (CMOS) has lost its ability during scaling beyond 50 nm. Scaling causes severe short channel effects (SCEs) which are difficult to suppress. FinFET devices undertake to replace usual Metal Oxide Semiconductor Field Effect Transistor (MOSFETs) because of their better ability in controlling leakage and diminishing SCEs while delivering a strong drive current. In this paper, we present a relative examination of FinFET with the double gate MOSFET (DGMOSFET) and conventional bulk Si single gate MOSFET (SGMOSFET) by using C

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