Books on the topic 'Metal oxide semiconductors, complementary Algorithms'

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1

Zhao, Yi. Wafer level reliability of advanced CMOS devices and processes. Nova Science Publishers, 2008.

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2

Lancaster, Don. CMOS cookbook. 2nd ed. H.W. Sams, 1988.

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3

M, Berlin Howard, ed. CMOS cookbook. 2nd ed. Newnes, 1997.

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4

F, Hawkins Charles, ed. CMOS electronics: How it works, how it fails. IEEE Press, 2004.

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5

Helms, Harry L. High-speed (HC/HCT) CMOS guide. Prentice Hall, 1989.

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6

Kwon, Min-jun. CMOS technology. Nova Science Publishers, 2010.

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7

Shoji, Masakazu. CMOS digital circuit technology. Prentice Hall, 1988.

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8

Pfaffli, Paul. Characterisation of degradation and failure phenomena in MOS devices. Hartung-Gorre, 1999.

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9

Shriram, Ramanathan, Symposium J, "Materials and Devices for Beyond CMOS Scaling" (2010 : San Francisco, Calif.), and Materials Research Society, eds. Materials and devices for end-of-roadmap and beyond CMOS scaling: Symposium held April 5-9, 2010, San Francisco, California. Materials Research Society, 2010.

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10

J, Branning D., ed. Experiments in CMOS technology. Tab Books, 1988.

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11

(Firm), Signetics. High-speed CMOS data manual. Signetics Corp., 1988.

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12

Minoru, Fujishima, ed. Design and modeling of millimeter-wave CMOS circuits for wireless transceivers: Era of sub-100nm technology. Springer Science+Business Media, 2008.

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13

(Firm), Signetics. High-speed CMOS data manual. Signetics Corp., 1988.

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14

Yusuf, Leblebici, ed. CMOS digital integrated circuits: Analysis and design. 2nd ed. McGraw-Hill, 1998.

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15

Kang, Sung-Mo. CMOS digital integrated circuits: Analysis and design. 2nd ed. McGraw-Hill, 1999.

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16

Yusuf, Leblebici, ed. CMOS digital integrated circuits: Analysis and design. 3rd ed. McGraw-Hill, 2003.

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17

Kang, Sung-Mo. CMOS digital integrated circuits: Analysis and design. McGraw-Hill, 1996.

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18

Shoji, Masakazu. CMOS digital circuit technology. Prentice-Hall International, 1988.

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19

CMOS digital circuit technology. Prentice Hall, 1987.

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20

Latchup in CMOS technology: The problem and its cure. Kluwer Academic Publishers, 1986.

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21

Peluso, Vincenzo. Design of low-voltage low-power CMOS Delta-Sigma A/D converters. Kluwer Academic Publishers, 1999.

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22

Kursun, Volkan. Multiple supply and threshold voltage CMOS circuits. John Wiley, 2006.

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23

Marston, R. M. Modern CMOS circuits manual. 2nd ed. Newnes, 1996.

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24

Loeliger, Teddy. Large-area photosensing in CMOS. Hartung-Gorre, 2001.

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25

Kuo, James B. CMOS digital IC. McGraw-Hill, Inc., 1996.

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26

Maziasz, Robert L. Layout minimization of CMOS cells. Kluwer Academic Publishers, 1992.

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27

Hermann, Mader, and Friedrich H. Dr -Ing, eds. Technologie hochintegrierter Schaltungen. 2nd ed. Springer, 1996.

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28

International, Symposium on Advanced Gate Stack Source/Drain and Channel Engineering for Si-based CMOS (2nd 2006 Cancún Mexico). Advanced gate stack, source/drain, and channel engineering for Si-based CMOS 2: New materials, processes and equipment. Electrochemical Society, 2006.

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29

Meeting, Materials Research Society, and Symposium C, "CMOS Gate-Stack Scaling-- Materials, Interfaces and Reliability Implications" (2009 : San Francisco, Calif.), eds. CMOS gate-stack scaling-- materials, interfaces and reliability implications: Symposium held April 14-16, 2009, San Francisco, california, U.S.A. Materials Research Society, 2009.

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30

Klar, Heinrich. Integrierte digitale Schaltungen MOS/BICMOS. 2nd ed. Springer, 1996.

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31

Behzad, Razavi, ed. High-speed CMOS circuits for optical receivers. Kluwer Academic Publishers, 2001.

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32

Sheng-Fu, Hsu, ed. Transient-induced latchup in CMOS integrated circuits. Wiley, 2009.

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33

Ballan, Hussein. High voltage devices and circuits in standard CMOS technologies. Kluwer Academic, 1999.

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34

50 CMOS IC projects. TAB Books, 1988.

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35

Carol, Tong, Jayasumana Anura P, and IEEE Computer Society. Technical Committee on Test Technology., eds. Digest of papers: 1996 IEEE International Workshop on IDDQ Testing, October 24-25, 1996, Washington, D.C. IEEE Computer Society Press, 1996.

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36

Saijets, Jan. MOSFET RF characterization using bulk and SOI CMOS technologies. VTT Technical Research Centre of Finland, 2007.

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37

Shoji, Masakazu. Theory of CMOS digital circuits and circuit failures. Princeton University Press, 1992.

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38

Shoji, Masakazu. Theory of CMOS digital circuits and circuit failures. Princeton University Press, 1992.

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39

Zhang, Jing. Generation of substrate bias and current sources in CMOS technology. 1995.

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40

Lim, Wei Tjan (Richard). Suppression of substrate noise in a mixed-signal CMOS intergrated circuit. 1996.

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41

Lai, Ivan Chee-Hong, and Minoru Fujishima. Design and Modeling of Millimeter-wave CMOS Circuits for Wireless Transceivers. Springer, 2008.

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42

Kang, Sung-Mo. CMOS Digital Integrated Circuits. Tata McGraw-Hill, 2004.

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43

Kang, Sung-Mo (Steve), and Yusuf Leblebici. CMOS Digital Integrated Circuits Analysis & Design. McGraw-Hill Science/Engineering/Math, 2002.

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44

Cmos Digital Integrated Circuits: Analysis and Design. McGraw-Hill Companies, 1995.

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45

Kang, Sung-Mo, and Yusuf Leblebici. Cmos Digital Integrated Circuits: Analysis and Design. McGraw-Hill Companies, 1995.

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46

Henzler, Stephan. Power Management of Digital Circuits in Deep Sub-Micron CMOS Technologies. Springer, 2006.

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47

Testing For Smalldelay Defects In Nanoscale Cmos Integrated Circuits. CRC Press, 2012.

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48

Hwang, Nam. Physical mechanisms, device models, and lifetime projections of hot-carrier effects in CMOS transistors. 1993.

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49

Kuhn, Kelin, and Tsu-Jae King Liu. CMOS and Beyond: Logic Switches for Terascale Integrated Circuits. Cambridge University Press, 2015.

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50

Henzler, Stephan. Power Management of Digital Circuits in Deep Sub-Micron CMOS Technologies. Henzler Stephan, 2010.

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