Academic literature on the topic 'Microcode'

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Journal articles on the topic "Microcode"

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Haverlack, Richard J. "Microcode assistant." ACM SIGMICRO Newsletter 18, no. 3 (September 1987): 8–11. http://dx.doi.org/10.1145/378719.378725.

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Foster, J. M. "Validating microcode algebraically." Computer Journal 29, no. 5 (May 1, 1986): 416–22. http://dx.doi.org/10.1093/comjnl/29.5.416.

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Mueller, Robert A., and Joseph Varghese. "Retargetable microcode synthesis." ACM Transactions on Programming Languages and Systems 9, no. 2 (March 20, 1987): 257–76. http://dx.doi.org/10.1145/22719.23717.

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Bhasker, J., and T. Samad. "Compacting MIMOLA microcode." ACM SIGMICRO Newsletter 19, no. 1-2 (June 1988): 40–44. http://dx.doi.org/10.1145/62197.62206.

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Shepherd, David. "Verified microcode design." Microprocessors and Microsystems 14, no. 10 (December 1990): 623–30. http://dx.doi.org/10.1016/0141-9331(90)90037-v.

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Stanculescu, Alec G. "Toward machine independent microcode." ACM SIGMICRO Newsletter 17, no. 3 (December 1986): 25–32. http://dx.doi.org/10.1145/378741.378766.

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Jackson, D. "Evolution of Processor Microcode." IEEE Transactions on Evolutionary Computation 9, no. 1 (February 2005): 44–54. http://dx.doi.org/10.1109/tevc.2004.837922.

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Edwards, Ken. "HILEVEL microcode development system." ACM SIGMICRO Newsletter 18, no. 4 (December 1987): 30–33. http://dx.doi.org/10.1145/16360.1096735.

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Lioy, Antonio, and Marco Mezzalama. "Automatic compaction of microcode." Microprocessors and Microsystems 14, no. 1 (January 1990): 21–29. http://dx.doi.org/10.1016/0141-9331(90)90010-s.

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Bharitkar, S., K. Tsuchiya, and Y. Takefuji. "Microcode optimization with neural networks." IEEE Transactions on Neural Networks 10, no. 3 (May 1999): 698–703. http://dx.doi.org/10.1109/72.761728.

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Dissertations / Theses on the topic "Microcode"

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Van, Buren Brian G. "Graphical microcode simulator with a reconfigurable datapath /." Online version of thesis, 2006. https://ritdml.rit.edu/dspace/handle/1850/2892.

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Curzon, Paul. "A structured approach to the verification of low level microcode." Thesis, University of Cambridge, 1990. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.335713.

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Bodin, François. "Optimisation de microcode pour une architecture horizontale et synchrone : etude et mise en oeuvre d'un compilateur." Rennes 1, 1989. http://www.theses.fr/1989REN10057.

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Deux aspects de l'optimisation sont abordes: le probleme de modelisation d'architecture pour l'optimisation de microcode et l'optimisation des boucles. Presentation d'un modele original de machine, qui garantit une description precise des architectures. Presentation d'un algorithme d'optimisation des boucles base sur l'utilisation de la technique du depliage de boucles pour trouver un ordonnancement cyclique de celles-ci
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Dechelotte, Jonathan. "Etude et mise en oeuvre d'un environnement d'exécution pour architecture hétérogène reconfigurable." Thesis, Bordeaux, 2020. http://www.theses.fr/2020BORD0025.

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Aujourd'hui, les systèmes embarqués ont pris une part hégémonique dans notre monde. Leurs utilisation est prépondérante, que ce soit pour communiquer, se déplacer, travailler ou se divertir. Des efforts dans le domaine de la recherche et de l'industrie n'ont de cesse de faire évoluer les parties qui composent ces systèmes dont le processeur, le FPGA, la mémoire et le système d'exploitation.D'un point de vue architectural, l'apport d'une architecture généraliste couplée à une architecture reconfigurable positionne le SoC FPGA comme une cible préférentielle pour une utilisation dans les systèmes embarqués. Leurs adoption est cependant difficile du fait de leur complexité d'implémentation. L'abstraction des couches de bas niveau semble un axe d'investigation qui tend à inverser cette tendance. Au premier abord, l'utilisation d'un système d'exploitation paraît idoine. En effet, il possède l'écosystème de drivers et services disponibles pour l'accès aux ressources matérielles, la capacité d'ordonnancement natif ainsi que des bibliothèques pour la sécurité. Toutefois, cette solution engendre des contraintes qui poussent à évaluer d'autres approches. Ce manuscrit évalue la capacité d'un langage de haut niveau tel que Lua à fournir un environnement d'exécution dans le cas d'une implémentation sans système d'exploitation.À travers un écosystème nommé Lynq, cet environnement d'exécution procure les briques nécessaires à la gestion et l'allocation des ressources présentes sur le SoC FPGA, ainsi qu'une méthode proposant une isolation entre applicatifs.La capacité des architectures généralistes que sont les CPUs à devenir spécialisés lorsqu'ils sont implémentés sur un FPGA a été exploré par la suite. Ceci au travers d'une contribution permettant la génération d'un CPU RISC-V ainsi que son microcode associé
Today, embedded systems have taken a leading role in our world. Whether for communication, travel, work or entertainment, their use is preponderant. Together, research and industry efforts are constantly developing various parts that make up these systems: processor, FPGA, memory, operating system.From an architectural point of view, the contribution of a generalist architecture coupled with a reconfigurable architecture positions SoC FPGA as popular targets for use in embedded systems. However, their implementation's complexity makes their adoption difficult. The abstraction of low-level layers seems to be an investigation's axis that would tend to reverse this trend. The use of an operating system seems suitable at first glance because they deliver an ecosystem of drivers and services for access to hardware resources, native scheduling capacities and libraries for security. However, this solution brings constraints and lead to evaluate other approaches.This manuscript evaluates the ability of a high-level language, Lua, to provide an execution environment in such a case that the implementation does not provide operating system. It gives, through an ecosystem named Lynq, the necessary building blocks for the management and allocation of resources present on the SoC FPGA as well as a method for isolation between applications. Besides the adoption of this execution environment, our work explores the capacity of generalist architectures such as CPUs to become specialized when implemented on a FPGA. This is done through a contribution allowing the generation of a RISC-V CPU and its associated microcode
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Döbrich, Stefan [Verfasser], Christian [Akademischer Betreuer] Hochberger, Andreas [Gutachter] Koch, and Christof [Gutachter] Fetzer. "Performance Improvement of Adaptive Processors : Hardware Synthesis, Instruction Folding and Microcode Assembly / Stefan Döbrich ; Gutachter: Andreas Koch, Christof Fetzer ; Betreuer: Christian Hochberger." Dresden : Saechsische Landesbibliothek- Staats- und Universitaetsbibliothek Dresden, 2017. http://d-nb.info/1137830263/34.

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Hajjar, Mansour. "Construction d'un calculateur spécialisé pour le calcul de la conductivité électrique d'un réseau de résistances aléatoires." Paris 11, 1987. http://www.theses.fr/1987PA112409.

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Réalisation d'un calculateur spécialisé pour le calcul de la conductivité électrique d'un réseau de résistances aléatoires Le calculateur spécialisé PERCOLA est conçu pour effectuer de longues simulations numériques sur un problème de Mécanique Statistique des systèmes désordonnés de type percolation. L'objectif est d'améliorer d'un ordre de grandeur les valeurs actuelles des exposants critiques qui caractérisent le comportement au seuil de percolation de la conductivité électrique d'un réseau de résistances aléatoires. Le calculateur spécialisé met en œuvre un algorithme itératif très performant pour calculer la conductivité d'un tel réseau. Bien qu'optimisée pour un algorithme particulier, cette machine présente les caractéristiques générales d'un calculateur 64 bits flottant microprogrammable permettant des possibilités d'utilisations futures pour d'autres problèmes. Son architecture est du type pipeline avec un parallélisme interne résultant de l'indépendance entre ses diverses composantes : mémoires, ALUs et multiplicateurs (composants WEITEK), contrôle des chemins des données, séquenceur (composant ANALOG DEVICES), générateurs d'adresses et générateur de nombres aléatoires. La vitesse maximale de calcul en mode pipeline est de 25 Mégaflops. Pour le problème de percolation, la vitesse de calcul est 10% plus élevée que celle d'un supercalculateur Cray XMP
A special purpose computer for the calculation of the electric conductivity of a random resistor network. The special purpose computer PERCOLA is designed for long numerical simulations on a percolation problem in Statistical Mechanics of disordered media. Our aim is to improve the actual values of the critical exponents characterizing the behavior of random resistance networks at percolation threshold. The architecture of PERCOLA is based on an efficient iterative algorithm used to compute the electric conductivity of such networks. The calculator has the characteristics of a general purpose 64- bit floating point microprogrammable computer that can run programs for various types of problems with a peak performance of 25 Mflops. This high computing speed is a result of the pipeline architecture based on internal parallelism and separately microcode controlled units such as: data memories, a microcode memory, ALUs and multipliers (both WEITEK components), various data paths, a sequencer (ANALOG DEVICES component), address generators and a random number generator. Thus, the special purpose computer runs percolation problem program 10 percent faster than the supercomputer CRAY XMP
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Smith, S. D. "Microcoded modems." Thesis, University of Kent, 1985. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.356552.

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Bekkara, Nourouddine. "Optimisation et compromis surface-vitesse dans le compilateur de silicium SYCO." Phd thesis, Grenoble 2 : ANRT, 1987. http://catalogue.bnf.fr/ark:/12148/cb376027103.

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Kalinsky, Ray. "Urban microcosm." Thesis, Virginia Polytechnic Institute and State University, 1990. http://hdl.handle.net/10919/77736.

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Over the course of time, the built environment has been a manifestation of human ideals and aspirations. Although these ideals, diverse and varied in each case, are only present in a small few of the buildings that are actually constructed, it ls my belief that they are the givers of meaning and identity to human culture and history. ln this thesis, l have created, at least on an embryonic level, an expression of my vision and dream of the coming together of human, urban life and nature.
Master of Architecture
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Jeff, John Robert. "Interprocess communication instructions for microcoded processors." Thesis, University of Kent, 1990. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.303113.

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Books on the topic "Microcode"

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Kapuya, E. T. Mimico: A microarchitecture/microcode synthesis system. Manchester: UMIST, 1993.

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Cant, C. J. Applying algebraic techniques to microcode compilation. London: HMSO, 1992.

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Mycroft, Alan. A study on abstract interpretation and "validating microcode algebraically". Cambridge: University of Cambridge, Computer Laboratory, 1986.

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1964-, Clément Michèle, ed. Microcosme. Paris: Classiques Garnier, 2013.

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Zimmer, Carl. Microcosm. New York: Knopf Doubleday Publishing Group, 2008.

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Reynolds, C. F. MicroCODIL manual. (Tring) (33 Buckingham Road, Tring, Herts.): CODIL Language & Systems, 1986.

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The microcosm. Pittsburgh, PA: SterlingHouse Publisher, 2008.

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The microcosm. New York, N.Y., U.S.A: Penguin Books--Virago Press, 1990.

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The microcosm. London: Virago, 1989.

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Steiner, Rudolf. Macrocosm and microcosm. London: Rudolf Steiner Press, 1985.

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Book chapters on the topic "Microcode"

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Weik, Martin H. "microcode." In Computer Science and Communications Dictionary, 1012. Boston, MA: Springer US, 2000. http://dx.doi.org/10.1007/1-4020-0613-6_11473.

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Weik, Martin H. "microcode assembler." In Computer Science and Communications Dictionary, 1012. Boston, MA: Springer US, 2000. http://dx.doi.org/10.1007/1-4020-0613-6_11474.

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Langevin, Michel, Eduard Cerny, Jörg Wilberg, and Heinrich-Theodor Vierhaus. "Local Microcode Generation in System Design." In Code Generation for Embedded Processors, 171–87. Boston, MA: Springer US, 2002. http://dx.doi.org/10.1007/978-1-4615-2323-9_10.

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Arons, Tamarah, Elad Elster, Limor Fix, Sela Mador-Haim, Michael Mishaeli, Jonathan Shalev, Eli Singerman, Andreas Tiemeyer, Moshe Y. Vardi, and Lenore D. Zuck. "Formal Verification of Backward Compatibility of Microcode." In Computer Aided Verification, 185–98. Berlin, Heidelberg: Springer Berlin Heidelberg, 2005. http://dx.doi.org/10.1007/11513988_20.

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Goossens, Gert, Jan Rabaey, Joos Vandewalle, and Hugo De Man. "An Efficient Microcode-Compiler for Custom DSP-Processors." In The Best of ICCAD, 107–16. Boston, MA: Springer US, 2003. http://dx.doi.org/10.1007/978-1-4615-0292-0_9.

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Davis, Jared, Anna Slobodova, and Sol Swords. "Microcode Verification – Another Piece of the Microprocessor Verification Puzzle." In Interactive Theorem Proving, 1–16. Cham: Springer International Publishing, 2014. http://dx.doi.org/10.1007/978-3-319-08970-6_1.

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Leary, Paris. "Microcosm." In Contemporary Poetry: A Retrospective from the "Quarterly Review of Literature", edited by Theodore Russell Weiss, 210. Princeton: Princeton University Press, 2015. http://dx.doi.org/10.1515/9781400871728-067.

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Howlett, Sophia. "The Microcosm." In Marsilio Ficino and His World, 101–33. New York: Palgrave Macmillan US, 2016. http://dx.doi.org/10.1057/978-1-137-53946-5_4.

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Beyers, Robert J., and Howard T. Odum. "Microcosm Perspectives." In Springer Advanced Texts in Life Sciences, 433–44. New York, NY: Springer New York, 1993. http://dx.doi.org/10.1007/978-1-4613-9344-3_20.

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Braibant, Sylvie, Giorgio Giacomelli, and Maurizio Spurio. "Microcosm and Macrocosm." In Undergraduate Lecture Notes in Physics, 145–62. Dordrecht: Springer Netherlands, 2012. http://dx.doi.org/10.1007/978-94-007-4135-5_13.

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Conference papers on the topic "Microcode"

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Bhasker, J., and Tariq Samad. "Compacting MIMOLA microcode." In the 20th annual workshop. New York, New York, USA: ACM Press, 1987. http://dx.doi.org/10.1145/255305.255323.

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M'zah, Abir, Bruno Monsuez, and Hycham Aboutaleb. "Deterministic microcode machine generation." In 2017 IEEE Conference on Dependable and Secure Computing. IEEE, 2017. http://dx.doi.org/10.1109/desec.2017.8073858.

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Borin, Edson, Guido Araujo, Mauricio Breternitz Jr., and Youfeng Wu. "Structure-Constrained Microcode Compression." In 2011 23rd International Symposium on Computer Architecture and High Performance Computing (SBAC-PAD). IEEE, 2011. http://dx.doi.org/10.1109/sbac-pad.2011.32.

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Borin, Edson, Mauricio Breternitz, Youfeg Wu, and Guido Araujo. "Clustering-Based Microcode Compression." In 2006 International Conference on Computer Design. IEEE, 2006. http://dx.doi.org/10.1109/iccd.2006.4380816.

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Yang, Chengmo, Mingjing Chen, and Alex Orailoglu. "Squashing microcode stores to size in embedded systems while delivering rapid microcode accesses." In the 7th IEEE/ACM international conference. New York, New York, USA: ACM Press, 2009. http://dx.doi.org/10.1145/1629435.1629471.

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Allan, S. J. "Functional languages in microcode compilers." In the 22nd annual workshop. New York, New York, USA: ACM Press, 1989. http://dx.doi.org/10.1145/75362.75397.

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Tracz, W. J. "Advances in microcode support software." In the 18th annual workshop. New York, New York, USA: ACM Press, 1985. http://dx.doi.org/10.1145/18927.18912.

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Hwang, J. P.-C., C. A. Papachristou, and D. D. Cornett. "Microcode development for microprogrammed processors." In the 18th annual workshop. New York, New York, USA: ACM Press, 1985. http://dx.doi.org/10.1145/18927.18921.

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Balakrishnan, M., P. C. P. Bhatt, and B. B. Madan. "An efficient retargetable microcode generator." In the 19th annual workshop. New York, New York, USA: ACM Press, 1986. http://dx.doi.org/10.1145/19551.19536.

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Su, Bogong, Shiyuan Ding, Jian Wang, and Jinshi Xia. "Microcode compaction with timing constraints." In the 20th annual workshop. New York, New York, USA: ACM Press, 1987. http://dx.doi.org/10.1145/255305.255314.

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Reports on the topic "Microcode"

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Weight, Thomas H. A Microcode Compiler That Runs on the IBM AT and Supports Cascadable Microcomputers. Part 1. Fort Belvoir, VA: Defense Technical Information Center, November 1989. http://dx.doi.org/10.21236/ada215888.

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Weight, Thomas H. A Microcode Compiler That Runs on the IBM AT and Supports Cascadable Microcomputers. Part 2. Fort Belvoir, VA: Defense Technical Information Center, November 1989. http://dx.doi.org/10.21236/ada215889.

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Nordström, Håkan. The Microcosm of Climate Change Negotiations. Geneva, Switzerland: International Centre for Trade and Sustainable Development, 2009. http://dx.doi.org/10.7215/gp_ip_20100125a.

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Cox, B. L. Sweet, A., and E. Majer. Application of electrical methods to measure microbial activity in soils: Preliminary microcosm results. Office of Scientific and Technical Information (OSTI), December 1997. http://dx.doi.org/10.2172/656458.

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Cottrell, Scott B. From COBRA to the Seine, August 1944: A Microcosm of the Operational Art. Fort Belvoir, VA: Defense Technical Information Center, May 1986. http://dx.doi.org/10.21236/ada174270.

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Kieft, Thomas, Penny S. Amy, and Fred M. Phillips. Final Technical Report. Origins of subsurface microorganisms: Relating laboratory microcosm studies to a geologic time scale. Office of Scientific and Technical Information (OSTI), December 1998. http://dx.doi.org/10.2172/761931.

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Lu, Ping. In-situ Study of Dynamic Phenomena at Metal Nanosolder Interfaces Using Aberration Corrected Scanning Transmission Electron Microcopy. Office of Scientific and Technical Information (OSTI), October 2014. http://dx.doi.org/10.2172/1159665.

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Van Voris, P., D. A. Tolle, and M. F. Arthur. Experimental terrestrial soil-core microcosm test protocol. A method for measuring the potential ecological effects, fate, and transport of chemicals in terrestrial ecosystems. Office of Scientific and Technical Information (OSTI), June 1985. http://dx.doi.org/10.2172/6059663.

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Shank, Elizabeth. Final Report (DE-SC0013887): The transparent soil microcosm: a window into the spatial distribution and dynamics of carbon utilization and microbial interspecies interactions. Office of Scientific and Technical Information (OSTI), March 2021. http://dx.doi.org/10.2172/1770510.

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Chappelle, Wayne L., Malcolm J. Ree, Erica L. Barto, Mark S. Teachout, and William T. Thompson. Joint Use of the MAB-II and MicroCog for Improvements in the Clinical and Neuropsychological Screening and Aeromedical Waiver Process of Rated USAF Pilots. Fort Belvoir, VA: Defense Technical Information Center, January 2010. http://dx.doi.org/10.21236/ada518727.

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