Dissertations / Theses: 'Microelectromechanical systems. Microelectromechanical systems Microelectronic packaging'

1

Ma, Wei. "Low temperature metal-based micro fabrication and packaging technology /." View abstract or full-text, 2005. http://library.ust.hk/cgi/db/thesis.pl?MECH%202005%20MA.

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Ok, Seong Joon. "High density, high aspect ratio through-wafer electrical interconnect vias for MEMS packaging." Thesis, Georgia Institute of Technology, 2002. http://hdl.handle.net/1853/18227.

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Willis, Oral R. "Characterizing fluoropolymeric materials for microelectronics and MEMS packaging." Diss., Online access via UMI:, 2007.

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4

Kohl, Michael. "An experimental investigation of microchannel flow with internal pressure measurements." Diss., Available online, Georgia Institute of Technology, 2004:, 2004. http://etd.gatech.edu/theses/available/etd-06072004-131239/unrestricted/kohl%5Fmichael%5F200405%5Fphd.pdf.

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Deshpande, Anjali W. "Study and characterization of plastic encapsulated packages for MEMS." Link to electronic thesis, 2005. http://www.wpi.edu/Pubs/ETD/Available/etd-01145-144711/.

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Thesis (M.S.)--Worcester Polytechnic Institute.
Keywords: finite difference methods; OEH methodology; packaging; plastic encapsulation; Fick's second law of diffusion; MEMS. Includes bibliographical references (p. 144-161).

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6

Neysmith, Jordan M. "A modular, direct chip attach, wafer level MEMS package : architecture and processing." Thesis, Georgia Institute of Technology, 2000. http://hdl.handle.net/1853/17559.

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7

Lo, Chi Chuen. "Numerical prediction and experimental validation of flip chip solder joint geometry for MEMS applications /." View abstract or full-text, 2008. http://library.ust.hk/cgi/db/thesis.pl?MECH%202008%20LO.

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Alsaleem, Fadi M. "An investigation into the effect of the PCB motion on the dynamic response of MEMS devices under mechanical shock loads." Diss., Online access via UMI:, 2007.

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9

Fritz, Nathan Tyler. "Materials, design and processing of air encapsulated MEMS packaging." Diss., Georgia Institute of Technology, 2011. http://hdl.handle.net/1853/43751.

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Air-gap structures are of particular interest for packaging of microelectromechanical systems (MEMS). In this work, an overcoat material is used to cover a sacrificial polymer, which protects the MEMS device during packaging. Once the overcoat is in place, the sacrificial polymer is thermally decomposed freeing the MEMS structure while the overcoat dielectric provides mechanical protection from the environment. An epoxy POSS dielectric was used as a high-selectivity etch mask for the PPC and a rigid overcoat for the structure leading to the process improvements. The packaging structures can be designed for a range of MEMS device sizes and operating environments. However, the air-cavity structures need additional rigidity to withstand chip-level packaging conditions. Metalized air cavity packages were molded under traditional lead frame molding pressures and tested for mechanical integrity. The experimental molding tests and mechanical models were used to establish processing conditions and physical designs for the cavities as a function of cavity size. A semi-hermetic package was created using an in-situ sacrificial decomposition/epoxy cure molding step for creating large cavity chip packages. Through the optimization of the air cavity, new materials and processes were tested for general microfabrication. The epoxy POSS dielectric provides a resilient, strong inorganic/organic hybrid dielectric for use in microfabrication and packaging applications. Polycarbonates can be used for low cost temporary adhesives in wafer-wafer bonding. An improved electroless deposition process for silver and copper was developed. The Sn/Pd activation was replaced by a cost efficient Sn/Ag catalyst. The process was shown to be able to deposit adherent copper on smooth POSS and silicon dioxide surfaces. Electroless copper was demonstrated on untreated silicon oxide wafers for TSV sidewall deposition.

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Deshpande, Anjali W. "Study and characetrization of plastic encapsulated packages for MEMS." Digital WPI, 2005. https://digitalcommons.wpi.edu/etd-theses/100.

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Technological advancement has thrust MEMS design and fabrication into the forefront of modern technologies. It has become sufficiently self-sustained to allow mass production. The limiting factor which is stalling commercialization of MEMS is the packaging and device reliability. The challenging issues with MEMS packaging are application specific. The function of the package is to give the MEMS device mechanical support, protection from the environment, and electrical connection to other devices in the system. The current state of the art in MEMS packaging transcends the various packaging techniques available in the integrated circuit (IC) industry. At present the packaging of MEMS includes hermetic ceramic packaging and metal packaging with hermetic seals. For example the ADXL202 accelerometer from the Analog Devices. Study of the packaging methods and costs show that both of these methods of packaging are expensive and not needed for majority of MEMS applications. Due to this the cost of current MEMS packaging is relatively high, as much as 90% of the finished product. Reducing the cost is therefore of the prime concern. This Thesis explores the possibility of an inexpensive plastic package for MEMS sensors like accelerometers, optical MEMS, blood pressure sensors etc. Due to their cost effective techniques, plastic packaging already dominates the IC industry. They cost less, weigh less, and their size is small. However, porous nature of molding materials allows penetration of moisture into the package. The Thesis includes an extensive study of the plastic packaging and characterization of three different plastic package samples. Polymeric materials warp upon absorbing moisture, generating hygroscopic stresses. Hygroscopic stresses in the package add to the thermal stress due to high reflow temperature. Despite this, hygroscopic characteristics of the plastic package have been largely ignored. To facilitate understanding of the moisture absorption, an analytical model is presented in this Thesis. Also, an empirical model presents, in this Thesis, the parameters affecting moisture ingress. This information is important to determine the moisture content at a specific time, which would help in assessing reliability of the package. Moisture absorption is modeled using the single phase absorption theory, which assumes that moisture diffusion occurs freely without any bonding with the resin. This theory is based on the Fick's Law of diffusion, which considers that the driving force of diffusion is the water concentration gradient. A finite difference simulation of one-dimensional moisture diffusion using the Crank-Nicolson implicit formula is presented. Moisture retention causes swelling of compounds which, in turn, leads to warpage. The warpage induces hygroscopic stresses. These stresses can further limit the performance of the MEMS sensors. This Thesis also presents a non invasive methodology to characterize a plastic package. The warpage deformations of the package are measured using Optoelectronic holography (OEH) methodology. The OEH methodology is noninvasive, remote, and provides results in full-field-of-view. Using the quantitative results of OEH measurements of deformations of a plastic package, pressure build up can be calculated and employed to assess the reliability of the package.

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Frank, Niklaus. "Adhesive Wafer Bonding for Microelectronic and Microelectromechanical Systems." Doctoral thesis, KTH, Signals, Sensors and Systems, 2002. http://urn.kb.se/resolve?urn=urn:nbn:se:kth:diva-3410.

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Semiconductor wafer bonding has been a subject of interestfor many years and a wide variety of wafer bonding techniqueshave been reported in literature. In adhesive wafer bondingorganic and inorganic adhesives are used as intermediatebonding material. The main advantages of adhesive wafer bondingare the relatively low bonding temperatures, the lack of needfor an electric voltage or current, the compatibility withstandard CMOS wafers and the ability to join practically anykind of wafer materials. Adhesive wafer bonding requires nospecial wafer surface treatmentssuch as planarisation.Structures and particles at the wafer surfaces can be toleratedand compensated for some extent by the adhesive material.Adhesive wafer bonding is a comparably simple, robust andlowcost bonding process. In this thesis, adhesive wafer bondingtechniques with different polymer adhesives have beendeveloped. The relevant bonding parameters needed to achievehigh quality and high yield wafer bonds have been investigated.A selective adhesive wafer bonding process has also beendeveloped that allows localised bonding on lithographicallydefined wafer areas.

Adhesive wafer bonding has been utilised in variousapplication areas. A novel CMOS compatible film, device andmembrane transfer bonding technique has been developed. Thistechnique allows the integration of standard CMOS circuits withthin film transducers that can consist of practically any typeof crystalline or noncrystalline high performance material(e.g. monocrystalline silicon, gallium arsenide,indium-phosphide, etc.). The transferred transducers or filmscan be thinner than 0.3 µm. The feature sizes of thetransferred transducers can be below 1.5 µm and theelectrical via contacts between the transducers and the newsubstrate wafer can be as small as 3x3 µm2. Teststructures for temperature coefficient of resistancemeasurements of semiconductor materials have been fabricatedusing device transfer bonding. Arrays of polycrystallinesilicon bolometers for use in uncooled infrared focal planearrays have been fabricated using membrane transfer bonding.The bolometers consist of free-hanging membrane structures thatare thermally isolated from the substrate wafer. Thepolycrystalline silicon bolometers are fabricated on asacrificial substrate wafer. Subsequently, they are transferredand integrated on a new substrate wafer using membrane transferbonding. With the same membrane transfer bonding technique,arrays of torsional monocrystalline silicon micromirrors havebeen fabricated. The mirrors have a size of 16x16 µm2 anda thickness of 0.34 µm. The advantages of micromirrorsmade of monocrystalline silicon are their flatness, uniformityand mechanical stability. Selective adhesive wafer bonding hasbeen used to fabricate very shallow cavities that can beutilised in packaging and component protection applications. Anew concept is proposed that allows hermetic sealing ofcavities fabricated using adhesive wafer bonding. Furthermore,microfluidic devices, channels and passive valves for use inmicro total analysis systems are presented.

Adhesive wafer bonding is a generic CMOS compatible bondingtechnique that can be used for fabrication and integration ofvarious microsystems such as infrared focal plane arrays,spatial light modulators, microoptical systems, laser systems,MEMS, RF-MEMS and stacking of active electronic films forthree-dimensional high-density integration of electroniccircuits. Adhesive wafer bonding can also be used forfabrication of microcavities in packaging applications, forwafer-level stacking of integrated circuit chips (e.g. memorychips) and for fabrication of microfluidic systems.

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12

Joung, Yeun-Ho. "Electroplating bonding technology for chip interconnect, wafer level packaging and interconnect layer structures." Diss., Available online, Georgia Institute of Technology, 2004:, 2003. http://etd.gatech.edu/theses/available/etd-04052004-180025/unrestricted/joung%5Fyeun-ho%5F200312%5Fphd.pdf.

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13

Tse, Laam Angela. "MEMS packaging with stereolithography." Thesis, Georgia Institute of Technology, 2002. http://hdl.handle.net/1853/17025.

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Setia, Ronald. "Modeling and Diagnosis of Excimer Laser Ablation." Diss., Georgia Institute of Technology, 2005. http://hdl.handle.net/1853/7634.

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Recent advances in the miniaturization, functionality, and integration of integrated circuits and packages, such as the system-on-package (SOP) methodology, require increasing use of microvias that generates vertical signal paths in a high-density multilayer substrate. A scanning projection excimer laser system has been utilized to fabricate the microvias. In this thesis, a novel technique implementing statistical experimental design and neural networks (NNs) is used to characterize and model the excimer laser ablation process for microvia formation. Vias with diameters from 10 50 micrometer have been ablated in DuPont Kapton(r) E polyimide using an Anvik HexScan(tm) 2150 SXE pulsed excimer laser operating at 308 nm. Accurate NN models, developed from experimental data, are obtained for microvia responses, including ablated thickness, via diameter, wall angle, and resistance. Subsequent to modeling, NNs and genetic algorithms (GAs) are utilized to generate optimal process recipes for the laser tool. Such recipes can be used to produce desired microvia responses, including open vias, specific diameter, steep wall angle, and low resistance. With continuing advancement in the use of excimer laser systems in microsystems packaging has come an increasing need to offset capital equipment investment and lower equipment downtime. In this thesis, an automated in-line failure diagnosis system using NNs and Dempster-Shafer (D-S) theory is implemented. For the sake of comparison, an adaptive neuro-fuzzy approach is applied to achieve the same objective. Both the D-S theory and neuro-fuzzy logic are used to develop an automated inference system to specifically identify failures. Successful results in failure detection and diagnosis are obtained from the two approaches. The result of this investigation will benefit both engineering and management. Engineers will benefit from high yield, reliable production, and low equipment down-time. Business people, on the other hand, will benefit from cost-savings resulting from more production-worthy (i.e., lower maintenance) laser ablation equipment.

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15

McKenzie, Todd G. "Thin film resistance to hydrofluoric acid etch with applications in monolithic microelectronic/MEMS integration." Diss., Available online, Georgia Institute of Technology, 2004:, 2003. http://etd.gatech.edu/theses/available/etd-04072004-180056/unrestricted/mckenzie%5ftodd%5fg%5f200312%5fms.pdf.

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16

Garcia, Caesar Theodore. "Packaging and Characterization of MEMS Optical Microphones." Thesis, Georgia Institute of Technology, 2007. http://hdl.handle.net/1853/19713.

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Miniature microphones have numerous applications but often exhibit poor performance which can be attributed to the challenges associated with capacitive detection at small size scales. Optical detection methods are able to overcome some of these challenges although miniaturized integration of these optical systems has not yet been demonstrated. An optical interferometric detection scheme is presented and is implemented using micro-scale optoelectronic devices which are used primarily in fiber optic data transmission. Using basic diffraction theory, a model is developed and used to optimize the micro-optical system within a 1mm3 volume. Both omnidirectional and directional optical microphone designs are presented and a modular packaging architecture is assembled in order to test these devices. Results from the 2mm diameter omnidirectional optical microphone structure demonstrate a 26dBA noise floor. The biomimetic directional optical microphone, which has an equivalent port spacing of 1mm, demonstrates a noise floor of 34dBA. Additionally, these results demonstrate an array of two biomimetic directional optical microphones located on the same silicon chip and separated by less than 5mm. These results confirm the micro-optical detection method as an alternative to capacitive detection especially for miniaturized microphone applications and suggest that this method in its modular packaging architecture is competitive with industry leading measurement microphones.

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17

Liu, Ting-Hung. "Testing and Packaging for MEMS Acoustic Emission Sensors." Scholar Commons, 2018. https://scholarcommons.usf.edu/etd/7692.

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The goal of this research is to improve the structure and dimension of the MEMS acoustic emission sensor. Acoustic emission sensor (AE sensor) based on the piezoelectric transducer is a well-developed technology in non-destructive testing that is widely used to determine permanent damage such as cracks and corrosions in buildings and structures. The AE sensor can be used to monitor cracks in structures and to check leakage in pressurized systems. The location of cracks in a structure or system leakage causes a high-frequency surface vibration while releasing ultrasonic energy. The frequency of this energy is typically between 30 kHz to 1MHz. The AE sensor can detect this high frequency transient acoustic wave. By using this AE sensor, the structure and pressurized system can be monitored to generate an evaluation report in order to facilitate maintenance and structure repair. Currently, the commercial AE sensor is bulky because it is made of a piezoelectric transducer. It also needs a lot of wires to connect with the pre-amplifier and signal conditioning systems. Because of the cost, brittleness and the volume of the commercial AE sensor, new affordable AE sensor technology is desired to replace the commercial AE sensor. The new AE sensor should be economical, small, and lightweight. The performance of the output signal should be comparable with the commercial AE sensor in terms of signal strength and signal to noise ratio. The MEMS AE sensors provide the potential solution to this problem. The MEMS AE sensors can overcome the problems of the commercial AE sensor. The MEMS AE sensor combines the pre- amplifier on the chip in a single package. Through the MEMS technology, the AE sensor can be manufactured in mass quantity and high quality. This study focuses on simulating and measuring the performance of the MEMS acoustic emission sensors. Through simulation, the capacitance value is influenced by the gap between the suspended membrane (top perforated metal plate), metal ground, and also influenced by the effective area of the perforated top layer. The perforation is introduced to reduce the squeeze film damping effect. Through measurement verification, the MEMS AE sensors have exhibited comparable performance before and after inclusion of the 3D printed package that serves as the housing for the completed sensor assembly. The C-V measurement is the key method to extract the capacitance value, which is the key parameter to determine the signal strength and signal to noise ratio for capacitive MEMS acoustic emission sensors. The damping coefficient is also the key factor to receive the time domain measurement data in a fashion that resemble the bulky commercial piezoelectric AE transducers.

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18

Lan, Di. "Development of 3-D Printed Hybrid Packaging for GaAs-MEMS Oscillators based on Piezoelectrically-Transduced ZnO-on-SOI Micromechanical Resonators." Scholar Commons, 2018. https://scholarcommons.usf.edu/etd/7690.

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Prior research focused on CMOS-MEMS integrated oscillator has been done using various foundry compatible integration techniques. In order to compensate the integration compatibility, MEMS resonators built on standard CMOS foundry process could not take full advantage of highest achievable quality factor on chip. System-in-package (SiP) and system-on-chip (SoC) is becoming the next generation of electronic packaging due to the need of multi-functional devices and multi-sensor systems, thus wafer level hybrid integration becomes the key to enable the full assembly of dissimilar devices. In this way, every active circuit and passive component can be individually optimized, so do the MEMS resonators and sustaining amplifier circuits. In this dissertation, GaAs-MEMS integrated oscillator in a hybrid packaging has been fully explored as an important functional block in the RF transceiver systems. This dissertation first presents design, micro-fabrication, simulation, testing and modeling of ZnO piezoelectrically-transduced MEMS resonators. A newly designed rectangular plate with curved resonator body fabricated in-house exhibits a very high Q of more 6,000 in the air for its width-extensional mode resonance at 166 MHz. In addition, a rectangular plate resonator with multiple Phononic Crystal (PC) strip tethers shows low insertion loss of -11.5 dB at 473.9 MHz with a Q of 2722.5 in the air. An oscillator technology with high-Q MEMS resonator as its tank circuit is presented to validate its key functionality as a stable frequency reference across a wide spectrum of frequencies. Particularly, a piezoelectrically-transduced width-extensional mode MEMS resonator is strategically designed to operate at two distinct layout-defined mechanical modal frequencies (259.5MHz and 436.7MHz). These devices were characterized and modeled by an extracted equivalent LCR circuit to facilitate the design of the oscillator using a standard circuit simulator. MEMS resonators have been integrated with the sustaining amplifier circuit at PCB level using wire-bonding technique and coaxial connectors. As shown by the time-domain measurements and frequency-domain measurements, these oscillators are capable of selectively locking into the resonance frequency of the tank circuit and generating a stable sinusoidal waveform. Meanwhile, the phase noise performance is rigorously investigated within a few oscillator designs. At last, 3-D printed hybrid packaging using additive manufacturing and laser machining technique has been developed for integrating a MEMS resonator on a silicon-on-insulator (SOI) substrate and a GaAs sustaining amplifier. Fabrication process and fundamental characterization of this hybrid packaging has been demonstrated. On-wafer probe measurements of a 50 Ω microstrip line on ABS substrate exhibit its insertion loss of 0.028 dB/mm at 5 GHz, 0.187 dB/mm at 20 GHz and 0.512 dB/mm at 30 GHz, and show satisfactory input and output return loss with the 3-D printed package. Parylene N is also experimentally coated on the package for improving water resistance as a form of hermetic packaging.

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Bowman, Amy Catherine. "A selective encapsulation solution for packaging an optical micro electro mechanical system." Link to electronic thesis, 2002. http://www.wpi.edu/Pubs/ETD/Available/etd-0108102-140953.

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Thesis (M.S.)--Worcester Polytechnic Institute.
Keywords: packaging; micro electro mechanical systems; MEMS; electronics; die warpage; die bow; encapsulant; encapsulate; electrochemical migration; corrosion; wirebonds. Includes bibliographical references (p. 94-99).

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20

Antelius, Mikael. "Wafer-scale Vacuum and Liquid Packaging Concepts for an Optical Thin-film Gas Sensor." Doctoral thesis, KTH, Mikro- och nanosystemteknik, 2013. http://urn.kb.se/resolve?urn=urn:nbn:se:kth:diva-119839.

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This thesis treats the development of packaging and integration methods for the cost-efficient encapsulation and packaging of microelectromechanical (MEMS) devices. The packaging of MEMS devices is often more costly than the device itself, partly because the packaging can be crucial for the performance of the device. For devices which contain liquids or needs to be enclosed in a vacuum, the packaging can account for up to 80% of the total cost of the device. The first part of this thesis presents the integration scheme for an optical dye thin film NO2-gas sensor, designed using cost-efficient implementations of wafer-scale methods. This work includes design and fabrication of photonic subcomponents in addition to the main effort of integration and packaging of the dye-film. A specific proof of concept target was for NO2 monitoring in a car tunnel. The second part of this thesis deals with the wafer-scale packaging methods developed for the sensing device. The developed packaging method, based on low-temperature plastic deformation of gold sealing structures, is further demonstrated as a generic method for other hermetic liquid and vacuum packaging applications. In the developed packaging methods, the mechanically squeezed gold sealing material is both electroplated microstruc- tures and wire bonded stud bumps. The electroplated rings act like a more hermetic version of rubber sealing rings while compressed in conjunction with a cavity forming wafer bonding process. The stud bump sealing processes is on the other hand applied on completed cavities with narrow access ports, to seal either a vacuum or liquid inside the cavities at room temperature. Additionally, the resulting hermeticity of primarily the vacuum sealing methods is thoroughly investigated. Two of the sealing methods presented require permanent mechanical fixation in order to complete the packaging process. Two solutions to this problem are presented in this thesis. First, a more traditional wafer bonding method using tin-soldering is demonstrated. Second, a novel full-wafer epoxy underfill-process using a microfluidic distribution network is demonstrated using a room temperature process.

QC 20130325

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21

Morton, Matthew Allan. "Development of Monolithic SiGe and Packaged RF MEMS High-Linearity Five-bit High-Low Pass Phase Shifters for SoC X-band T/R Modules." Diss., Georgia Institute of Technology, 2007. http://hdl.handle.net/1853/16190.

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A comprehensive study of the High-pass/Low-pass topology has been performed, increasing the understanding of error sources arising from bit layout issues and fabrication tolerances. This included a detailed analysis of error sources in monolithic microwave phase shifters due to device size limitations, inductor parasitics, loading effects, and non-ideal switches. Each component utilized in the implementation of a monolithic high-low pass phase shifter was analyzed, with its influence on phase behavior shown in detail. An emphasis was placed on the net impact on absolute phase variation, which is critical to the system performance of a phased array radar system. The design of the individual phase shifter filter sections, and the influence of bit ordering on overall performance was also addressed. A variety of X-band four- and five-bit phase shifters were fabricated in a 200 GHz SiGe HBT BiCMOS technology platform, and further served to validate the analysis and design methodology. The SiGe phase shifter can be successfully incorporated into a single-chip T/R module forming a system-on-a-chip (SoC). Reduction in the physical size of transmission lines was shown to be a possibility with spinel magnetic nanoparticle films. The signal transmission properties of phase lines treated with nanoparticle thin films were examined, showing the potential for significant size reduction in both delay line and High-pass/Low-pass phase topologies. Wide-band, low-loss, and near-hermetic packaging techniques for RF MEMS devices were presented. A thermal compression bonding technique compatible with standard IC fabrication techniques was shown, that uses a low temperature thermal compression bonding method that avoids plastic deformations of the MEMS membrane. Ultimately, a system-on-a-package (SoP) approach was demonstrated that utilized packaged RF MEMS switches to maintain the performance of the SiGe phase shifter with much lower loss. The extremely competitive performance of the MEMS-based High-pass/Low-pass phase shifter, despite the lack of the extensive toolkits and commercial fabrication facilities employed with the active-based SiGe phase shifters, confirms both the effectiveness of the detailed phase error analysis presented in this work and the robust nature of the High-pass/Low-pass topology.

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Fischer, Andreas C. "Integration and Fabrication Techniques for 3D Micro- and Nanodevices." Doctoral thesis, KTH, Mikro- och nanosystemteknik, 2012. http://urn.kb.se/resolve?urn=urn:nbn:se:kth:diva-107125.

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The development of micro and nano-electromechanical systems (MEMS and NEMS) with entirely new or improved functionalities is typically based on novel or improved designs, materials and fabrication methods. However, today’s micro- and nano-fabrication is restrained by manufacturing paradigms that have been established by the integrated circuit (IC) industry over the past few decades. The exclusive use of IC manufacturing technologies leads to limited material choices, limited design flexibility and consequently to sub-optimal MEMS and NEMS devices. The work presented in this thesis breaks new ground with a multitude of novel approaches for the integration of non-standard materials that enable the fabrication of 3D micro and nanoelectromechanical systems. The objective of this thesis is to highlight methods that make use of non-standard materials with superior characteristics or methods that use standard materials and fabrication techniques in a novel context. The overall goal is to propose suitable and cost-efficient fabrication and integration methods, which can easily be made available to the industry. The first part of the thesis deals with the integration of bulk wire materials. A novel approach for the integration of at least partly ferromagnetic bulk wire materials has been implemented for the fabrication of high aspect ratio through silicon vias. Standard wire bonding technology, a very mature back-end technology, has been adapted for yet another through silicon via fabrication method and applications including liquid and vacuum packaging as well as microactuators based on shape memory alloy wires. As this thesis reveals, wire bonding, as a versatile and highly efficient technology, can be utilized for applications far beyond traditional interconnections in electronics packaging. The second part presents two approaches for the 3D heterogeneous integration based on layer transfer. Highly efficient monocrystalline silicon/ germanium is integrated on wafer-level for the fabrication of uncooled thermal image sensors and monolayer-graphene is integrated on chip-level for the use in diaphragm-based pressure sensors. The last part introduces a novel additive fabrication method for layer-bylayer printing of 3D silicon micro- and nano-structures. This method combines existing technologies, including focused ion beam implantation and chemical vapor deposition of silicon, in order to establish a high-resolution fabrication process that is related to popular 3D printing techniques.

QC 20121207

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Thacker, Hiren Dilipkumar. "Probe Modules for Wafer-Level Testing of Gigascale Chips with Electrical and Optical I/O Interconnects." Diss., Georgia Institute of Technology, 2006. http://hdl.handle.net/1853/11597.

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The use of optical input/output (I/O) interconnects, in addition to electrical I/Os, is a promising approach for achieving high-bandwidth, chip-to-board communications required for future high-performance gigascale chip-based systems. While numerous efforts are underway to investigate the integration of optoelectronics and silicon microelectronics, virtually no work has been reported relating to testing of such chips. The objective of this research is to explore methods that enable wafer-level testing of gigascale chips having electrical and optical I/O interconnects. A major challenge in achieving this is to develop probe modules which would allow high-precision, temporary interconnection of a multitude of electrical and optical I/Os, in a chip-size area, to automated test equipment. A probe module would need to do this in a rapid, step-and-repeat manner across all the chips on the wafer. In this work, two candidate probe modules were devised, batch-fabricated on Si using microfabrication techniques, and successfully demonstrated. The first probe module consists of compliant electrical probes (10^3 probes/cm^2) fabricated alongside grating-in-waveguide optical probes. The second module consists of micro-opto-electro-mechanical-systems (MOEMS)-based microsocket probes (10^4 probes/cm^2) to interface a chip with polymer pillar-based electrical and optical I/Os. High-density through-wafer interconnects are an essential attribute in both probe substrates for transferring electrical and optical signals to the substrate back-side. Fabrication and characterization of metal-clad, metal-filled, and polymer-filled through-wafer interconnects as well as process integration with probe substrate fabrication are described and numerous possible redistribution schemes are explicated. Chips with optical and electrical I/Os are an emerging technology, and one that test engineers are likely to encounter in the near future. The contributions of this thesis are to help understand and address the issues relating to joint electrical and optical testing during manufacturing.

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Braun, Stefan. "Wafer-level heterogeneous integration of MEMS actuators." Doctoral thesis, Stockholm : Skolan för elektro- och systemteknik, Kungliga Tekniska högskolan, 2010. http://urn.kb.se/resolve?urn=urn:nbn:se:kth:diva-11833.

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25

Fasoro, Abiodun Adekunle. "Design for reliability in microoptelectromechanical systems (MOEMS)." 2008. http://hdl.handle.net/10106/913.

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Rahman, Mohammad Shahriar. "Reliability of advanced dielectrics in gate oxide and device level packaging in MEMS." 2009. http://hdl.handle.net/10106/2014.

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Dissertations / Theses on the topic 'Microelectromechanical systems. Microelectromechanical systems Microelectronic packaging'

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