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Journal articles on the topic 'Microelectronic circuit'

Author: Grafiati

Published: 4 June 2021

Last updated: 1 February 2022

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1

Jóźwiak, Lech. "General Decomposition and Its Use in Digital Circuit Synthesis." VLSI Design 3, no. 3-4 (January 1, 1995): 225–48. http://dx.doi.org/10.1155/1995/16259.

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Modem microelectronic technology.gives opportunities to build digital circuits of huge complexity and provides a wide diversity of logic building blocks. Although logic designers have been building circuits for many years, they have realized that advances in microelectronic technology are outstripping their abilities to make use of the created opportunities. In this paper, we present the fundamentals of a logic design methodology which meets the requirements of today's complex circuits and modem building blocks. The methodology is based on the theory of general full-decompositions which constitutes the theory of digital circuit structures at the highest abstraction level. The paper explains the theory and shows how it can be used for digital circuit synthesis. The decomposition methodology that is presented ensures “correctness by construction” and enables very effective and efficient post-factum validation. It makes possible extensive examination of the structural features of the required information processing in relation to a given set of objectives and constraints.

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2

Din, M. Omar, Aida Martin, Ivan Razinkov, Nicholas Csicsery, and Jeff Hasty. "Interfacing gene circuits with microelectronics through engineered population dynamics." Science Advances 6, no. 21 (May 2020): eaaz8344. http://dx.doi.org/10.1126/sciadv.aaz8344.

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While there has been impressive progress connecting bacterial behavior with electrodes, an attractive observation to facilitate advances in synthetic biology is that the growth of a bacterial colony can be determined from impedance changes over time. Here, we interface synthetic biology with microelectronics through engineered population dynamics that regulate the accumulation of charged metabolites. We demonstrate electrical detection of the bacterial response to heavy metals via a population control circuit. We then implement this approach to a synchronized genetic oscillator where we obtain an oscillatory impedance profile from engineered bacteria. We lastly miniaturize an array of electrodes to form “bacterial integrated circuits” and demonstrate its applicability as an interface with genetic circuits. This approach paves the way for new advances in synthetic biology, analytical chemistry, and microelectronic technologies.

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3

Grout, Ian, and Joseph Walsh. "Microelectronic Circuit Test Engineering Laboratories with Programmable Logic." International Journal of Electrical Engineering & Education 41, no. 4 (October 2004): 313–27. http://dx.doi.org/10.7227/ijeee.41.4.5.

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4

Shen, Xiaoyan, and Zhigong Wang. "Fully integrated circuit chip of microelectronic neural bridge." Journal of Semiconductors 35, no. 9 (September 2014): 095011. http://dx.doi.org/10.1088/1674-4926/35/9/095011.

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5

Jones, Andrew, and Vinod Sikka. "Superhydrophobic Coatings on Electronic Components." International Symposium on Microelectronics 2011, no. 1 (January 1, 2011): 000113–16. http://dx.doi.org/10.4071/isom-2011-ta3-paper6.

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Superhydrophobic coatings provide exceptional protection to electrical circuits, switches, and other electrical devices which operate in wet environments, such as food processing plants or outdoor applications. Among various electrical device applications, electric motors and electrical switches have been successfully tested in the field at two food processors for nearly 20 months with exceptionally good results. Coated microelectronic circuit board has been in operation without any incidence for over 1 year.

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Rajakumar, C., and D. Johnson. "Finite Element Predictions of Free Convection Heat Transfer Coefficients of Simulated Electronic Circuit Boards." Journal of Electronic Packaging 111, no. 2 (June 1, 1989): 129–34. http://dx.doi.org/10.1115/1.3226517.

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A numerical simulation of the buoyancy-induced flow around microelectronic components mounted on a circuit board has been performed using the finite element method. The circuit board is modeled by a vertical plate on which rectangular strip heating surfaces are mounted. Computations have been performed in two-dimensional plane applying a simplifying assumption that the circuit board and the strip heating surfaces are infinitely long. The Navier-Stokes, the flow continuity and the energy equations for laminar flow have been considered in the finite element discretizations. Results of the computations are presented in the form of temperature contour plots and velocity vector plots in the flow field. The convection heat transfer coefficients at the surface of the microelectronic components are presented as a function of their height. The convection coefficients computed have been compared with experimental correlations of free convection heat transfer found in the literature.

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7

ALARCÓN, EDUARD, GERARD VILLAR, and ALBERTO POVEDA. "CMOS INTEGRATED CIRCUIT CONTROLLERS FOR SWITCHING POWER CONVERTERS." Journal of Circuits, Systems and Computers 13, no. 04 (August 2004): 789–811. http://dx.doi.org/10.1142/s0218126604001714.

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Two case examples of high-speed CMOS microelectronic implementations of high-performance controllers for switching power converters are presented. The design and implementation of a current-programmed controller and a general-purpose feedforward one-cycle controller are described. The integrated circuit controllers attain high-performance by means of using current-mode analog signal processing, hence allowing high switching frequencies that extend the operation margin compared to previous designs. Global layout-extracted transistor-level simulation results for 0.8 μm and 0.35 μm standard CMOS technologies confirm both the correct operation of the circuits in terms of bandwidth as well as their functionality for the control of switching power converters. The circuits may be used either as standalone IC controllers or as controller circuits that are technology-compatible with on-chip switching power converters and on-chip loads for future powered systems-on-chip.

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8

Xie, Yiwei, Leimeng Zhuang, and Arthur J. Lowery. "Picosecond optical pulse processing using a terahertz-bandwidth reconfigurable photonic integrated circuit." Nanophotonics 7, no. 5 (May 24, 2018): 837–52. http://dx.doi.org/10.1515/nanoph-2017-0113.

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AbstractChip-scale integrated optical signal processors promise to support a multitude of signal processing functions with bandwidths beyond the limit of microelectronics. Previous research has made great contributions in terms of demonstrating processing functions and device building blocks. Currently, there is a significant interest in providing functional reconfigurability, to match a key advantage of programmable microelectronic processors. To advance this concept, in this work, we experimentally demonstrate a photonic integrated circuit as an optical signal processor with an unprecedented combination of two key features: reconfigurability and terahertz bandwidth. These features enable a variety of processing functions on picosecond optical pulses using a single device. In the experiment, we successfully verified clock rate multiplication, arbitrary waveform generation, discretely and continuously tunable delays, multi-path combining and bit-pattern recognition for 1.2-ps-duration optical pulses at 1550 nm. These results and selected head-to-head comparisons with commercially available devices show our device to be a flexible integrated platform for ultrahigh-bandwidth optical signal processing and point toward a wide range of applications for telecommunications and beyond.

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9

Rodriguez, M. E., A. Mandelis, G. Pan, J. A. Garcia, and Y. Riopel. "Microelectronic circuit characterization via photothermal radiometry of scribeline recombination lifetime." Solid-State Electronics 44, no. 4 (April 2000): 703–11. http://dx.doi.org/10.1016/s0038-1101(99)00289-0.

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10

Ilumoka, A. A. "A modular neural network approach to microelectronic circuit yield optimization." Microelectronics Reliability 38, no. 4 (April 1998): 571–80. http://dx.doi.org/10.1016/s0026-2714(97)00203-5.

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11

In, Visarath, Patrick Longhini, Norman Liu, Andy Kho, Joseph D. Neff, Antonio Palacios, and Adi R. Bulsara. "A bistable microelectronic circuit for sensing extremely low electric field." Journal of Applied Physics 107, no. 1 (January 2010): 014506. http://dx.doi.org/10.1063/1.3272052.

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12

Li, Junhui, Lei Han, and Jue Zhong. "Short-circuit diffusion of ultrasonic bonding interfaces in microelectronic packaging." Surface and Interface Analysis 40, no. 5 (2008): 953–57. http://dx.doi.org/10.1002/sia.2840.

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13

Hristov, Marin, Rostislav Rusev, George Angelov, and Elitsa Gieva. "Demonstration of protein hydrogen bonding network application to microelectronics." Facta universitatis - series: Electronics and Energetics 27, no. 2 (2014): 205–19. http://dx.doi.org/10.2298/fuee1402205h.

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Model of hydrogen bonding networks in active site of ?-lactamase during the last intermediate EY of acylenzyme reaction semicycle is presented. The I-V characteristics of each hydrogen bond are calculated following Marcus theory and theory of protein electrostatics. Simulations showed that HBN characteristics are similar to the characteristics of microelectronic devices such as amplifier, signal modulator, triangular pulse source. The results demonstrated the analogy of HBNs in the active site of ?-lactamase protein to microelectronic integrated circuit with multiple outputs each with different characteristics.

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14

Card, H. C., and W. R. Moore. "VLSI DEVICES AND CIRCUITS FOR NEURAL NETWORKS." International Journal of Neural Systems 01, no. 02 (January 1989): 149–65. http://dx.doi.org/10.1142/s0129065789000062.

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This paper provides a tutorial of various VLSI approaches to synthesizing artificial neural networks as microelectronic systems. The means by which the network learns and the synaptic weights become modified is a central theme in this study. The majority of the presentation is concerned with analog circuit approaches to neurons and synapses, employing CMOS circuits. Also included is recent work towards VLSI in situ learning circuits which implement qualitative approximations to Hebbian learning with economy of transistors. An attempt is also made to anticipate relevant developments in VLSI devices which would be suited to neural networks, just as conventional MOS transistors are well suited to traditional digital computer systems.

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15

Park, K. A., and A. E. Bergles. "Natural Convection Heat Transfer Characteristics of Simulated Microelectronic Chips." Journal of Heat Transfer 109, no. 1 (February 1, 1987): 90–96. http://dx.doi.org/10.1115/1.3248074.

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Microelectronic circuits were simulated with thin foil heaters supplied with d-c power. The heaters were arranged in two configurations: flush mounted on a circuit board substrate or protruding from the substrate about 1 mm. Heat transfer coefficients (midpoint) were obtained with two heater heights (5 mm, 10 mm) and varying width (2 mm ∼ 70 mm), in water and R-113. The height effect for single flush heaters agrees qualitatively with conventional theory; however, even the widest heaters have coefficients higher than predicted due to leading edge effects. The heat transfer coefficient increases with decreasing width, with the coefficient for 2 mm being about 150 percent above that for 20 mm ∼ 70 mm. This is attributed to three-dimensional boundary layer effects. The protruding heaters have a coefficient about 15 percent higher. Data were obtained for in-line and staggered arrays of flush heaters with varying distance between heaters. Coefficients for the upper heaters are below those for lower heaters, with the differences diminishing as the vertical or horizontal spacing increases. For the protruding heaters, the upper heaters have higher coefficients than the lower heaters.

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16

Keatch, Robert P., and Brian Lawrenson. "Practical Microelectronics for Electronic Engineering Students." International Journal of Electrical Engineering & Education 35, no. 2 (April 1998): 117–38. http://dx.doi.org/10.1177/002072099803500203.

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This article describes practical microelectronic projects and the facilities at the University of Dundee, where students learn to optimise the various fabrication processes and manufacture custom silicon chips and discrete devices. This subject is potentially very wide, including theory of devices and manufacturing technology, and some fundamental aspects of circuit design.

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17

Burdallo, I., C. Jimenez-Jorquera, C. Fernández-Sánchez, and A. Baldi. "Integration of microelectronic chips in microfluidic systems on printed circuit board." Journal of Micromechanics and Microengineering 22, no. 10 (September 3, 2012): 105022. http://dx.doi.org/10.1088/0960-1317/22/10/105022.

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18

Akbari, Saeed, Amir Nourani, and Jan K. Spelt. "Predicting delamination in multilayer composite circuit boards with bonded microelectronic components." Engineering Fracture Mechanics 187 (January 2018): 225–40. http://dx.doi.org/10.1016/j.engfracmech.2017.11.026.

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19

Smarra, Devin A., Guru Subramanyam, Vamsy P. Chodavarapu, Sivaram P. Gogineni, Kenneth J. Semega, and Alireza R. Behbahani. "Embedded Passive Circuit Elements in Low Temperature Co-Fired Ceramic Substrates for Aerospace Electronics." International Symposium on Microelectronics 2017, no. 1 (October 1, 2017): 000417–25. http://dx.doi.org/10.4071/isom-2017-wp35_142.

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Abstract The packaging technology plays a critical role in the development of environmentally robust microelectronic systems. There is great demand for microelectronic systems that can withstand harsh environments and high temperatures in numerous applications including down-hole drilling, geothermal drilling, aerospace, heavy industrial, and automotive industries. In these applications, both sensors and interface electronics could be subjected to temperatures of 200°C and beyond. Standard plastic or epoxy based printed circuit boards are not reliable at these temperatures for long term operation. Packaging techniques such as Low Temperature Co-fired Ceramic (LTCC) offer a versatile and reliable alternative to form electronic substrates. LTCC is a multi-layer packaging system that also provides the ability to embedded passive components, such as resistors and capacitors, and thermal management structures within the substrate. This work evaluates the performance of LTCC embedded passive elements from 25°C to 225°C. A variety of passive component designs are evaluated using theoretical calculations, simulations, and measurements of fabricated test structures.

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20

Meng, Fanfan, Claire Donnelly, Luka Skoric, Aurelio Hierro-Rodriguez, Jung-wei Liao, and Amalio Fernández-Pacheco. "Fabrication of a 3D Nanomagnetic Circuit with Multi-Layered Materials for Applications in Spintronics." Micromachines 12, no. 8 (July 22, 2021): 859. http://dx.doi.org/10.3390/mi12080859.

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Three-dimensional (3D) spintronic devices are attracting significant research interest due to their potential for both fundamental studies and computing applications. However, their implementations face great challenges regarding not only the fabrication of 3D nanomagnets with high quality materials, but also their integration into 2D microelectronic circuits. In this study, we developed a new fabrication process to facilitate the efficient integration of both non-planar 3D geometries and high-quality multi-layered magnetic materials to prototype 3D spintronic devices, as a first step to investigate new physical effects in such systems. Specifically, we exploited 3D nanoprinting, physical vapour deposition and lithographic techniques to realise a 3D nanomagnetic circuit based on a nanobridge geometry, coated with high quality Ta/CoFeB/Ta layers. The successful establishment of this 3D circuit was verified through magnetotransport measurements in combination with micromagnetic simulations and finite element modelling. This fabrication process provides new capabilities for the realisation of a greater variety of 3D nanomagnetic circuits, which will facilitate the understanding and exploitation of 3D spintronic systems.

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21

Martínez-Nieto, Javier Alejandro, Nicolás Medrano-Marqués, María Teresa Sanz-Pascual, and Belén Calvo-López. "High-Level Modeling and Simulation Tool for Sensor Conditioning Circuit Based on Artificial Neural Networks." Sensors 19, no. 8 (April 16, 2019): 1814. http://dx.doi.org/10.3390/s19081814.

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For current microelectronic integrated systems, the design methodology involves different steps that end up in the full system simulation by means of electrical and physical models prior to its manufacture. However, the higher the circuit complexity, the more time is required to complete these simulations, jeopardizing the convergence of the numerical methods and, hence, meaning that the reliability of the results are not guaranteed. This paper shows the use of a high-level tool based on Matlab to simulate the operation of an artificial neural network implemented in a mixed analog-digital CMOS process, intended for sensor calibration purposes. The proposed standard tool enables modification of the neural model architecture to adapt its characteristics to those of the electronic system, resulting in accurate behavioral models that predict the complete microelectronic IC system behavior under different operation conditions before its physical implementation with a simple, time-efficient, and reliable solution.

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22

Li, Chang You, Wen Hua Wang, He Ping Wang, Ming Ming Jia, and Jing Yu Shang. "Research on Microelectronic Packaging Position Detection Based on Machine Vision." Applied Mechanics and Materials 389 (August 2013): 477–82. http://dx.doi.org/10.4028/www.scientific.net/amm.389.477.

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A microelectronic packaging position detection method based on machine vision is proposed. Analyze the color and shape characteristics of the FC-D30 handle circuit boards, extract the R component. Complex background is removed through using image segmentation technology, this research utilizes image smoothing technology to eliminate the noise after segmentation. And use Sobel operator to do edge detection. The package position is detected by using image feature extraction techniques, and finally the position is located accurately. The experimental results show that, the average detection time of this algorithm is 180 milliseconds, the correct positioning is 99%. Microelectronic packaging position can be located fast and accurately by using machine vision technology, this mothod has a good theoretical and practical value.

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23

Ni, Hao, Kun Zhao, Xiaojin Liu, Wenfeng Xiang, Songqing Zhao, Yu-Chau Kong, and Hong-Kuen Wong. "High-Temperature Photovoltaic Effect in Heterojunction." International Journal of Photoenergy 2012 (2012): 1–5. http://dx.doi.org/10.1155/2012/893962.

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We fabricated a heterojunction of /n-Si and investigated its electronic transport and ultraviolet photovoltaic properties at higher temperature up to 673 K. The rectifying behaviors vanished with the energy-band structure evolvement from 300 to 673 K. Under irradiation of a 248 nm pulse laser, the peak values of open-circuit photovoltage and short-circuit photocurrent decreased drastically. This understanding of the temperature-related current-voltage behavior and ultraviolet photodetection of oxide heterostructures should open a route for devising future microelectronic devices working at high temperature. PACS: 73.40.Lq, 71.27.+ a, 73.50.Pz.

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24

Li, Jian, Robert Blewer, and J. W. Mayer. "Copper-Based Metallization for ULSI Applications." MRS Bulletin 18, no. 6 (June 1993): 18–21. http://dx.doi.org/10.1557/s088376940004728x.

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Multilevel metallization of very large-scale integrated (VLSI) circuits has become an area of intense research interest as devices are scaled down in order to increase circuit density. As device dimensions approach the submicron regime, reliability becomes more of an issue. Metallization generally requires good conductivity, electromigration resistance, controllable contact performance, corrosion resistance, adherence, thermal stability, bondability, ability to be patterned into a desirable geometry, and economic feasibility.Aluminum and its alloys have been commonly used as the main metallization materials because they meet most of the metallization requirements for microelectronic devices. Aluminum, however, suffers from major limitations, such as elec-tromigration and stress-voiding induced open-circuit failure. For the development of ultralarge-scale integration (ULSI) for fast-switching-speed devices, the electrical resistivities of aluminum and its alloys are not low enough. As the minimum geometry is scaled down to one-quarter micron, aluminum and its alloys potentially will be replaced by other materials such as Cu, Au, or superconductors for on-chip interconnection.

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25

Khan, M. J. R. "Notch filters based on a circular geometry R-C-NR microelectronic circuit." Microelectronics Journal 22, no. 4 (June 1991): 27–39. http://dx.doi.org/10.1016/0026-2692(91)90004-7.

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26

Dzarnoski, John, and Kexia Sun. "Effect on Reliability of Bending Flexible Circuits." Additional Conferences (Device Packaging, HiTEC, HiTEN, and CICMT) 2010, DPC (January 1, 2010): 002104–30. http://dx.doi.org/10.4071/2010dpc-tha14.

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There has been enormous worldwide effort to increase the volumetric efficiency of electronic packaging. Much of this effort has been driven by the telecommunications industry that has succeeded in reducing cell phone size while simultaneously increasing functionality. The hearing aid business has always had the need to use extremely small electronic packaging because hearing aids pack electronics into the ear canal. In recent years hearing aid microelectronic packaging has moved from ceramic hybrid based packaging to a flexible circuit based technology. Due to the size and shape of all types of hearing aids, flexible circuits need to be folding and bent to fit inside hearing aid cases. In order to reduce space, bends and folds are pushing conventional wisdom on the limits of mechanical integrity. There is little published information regarding bendability of multilayer flexible circuits for class I medical device applications. This paper will examine bending and folding effects on a Polyimide/Adhesive/Copper/Polyimide/Copper/Adhesive/Polyimide structural stack-up on a test coupon and a HDI flexible circuit. A forming tool that controls every aspect of bend testing will be discussed. A variety of factors were investigated including bend angle, thickness of the circuit, bend radius, foil weight, copper materials, construction, and frequency of flexing. The circuit electrical resistance, microstructure and crack initiation were monitored during the process and will be examined. Failure mechanisms will be discussed as well as their impact on design.

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27

Lou, Jian An, Yang Li, and Jian Hua Yu. "Evolution of Fault Self-Repairing Circuit with High Reliability." Applied Mechanics and Materials 462-463 (November 2013): 654–57. http://dx.doi.org/10.4028/www.scientific.net/amm.462-463.654.

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With the continuous improvement of the complexity of the microelectronic system, its reliability risk is becoming more and more obvious. In order to improve the reliability of electronic systems in complex electromagnetic environment, this paper proposes a new fault self-repairing method; the idea is to realize controllable silicon evolution on the FPGA. A MicroBlaze CPU and VRC array are designed, and the CPU runs the evolutionary algorithm to configure the VRC array, dynamically changing the structure and function of the circuit, so as to obtain high reliability of the digital fault self-repairing circuit. Evolving fault self-repairing technology provides a new way for the high reliability of the digital system design.

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28

Massara, R. E., A. D. P. Green, R. J. Mack, and P. D. Noakes. "The Development of an Undergraduate Curriculum for VLSI Design." International Journal of Electrical Engineering & Education 26, no. 1-2 (January 1989): 11–17. http://dx.doi.org/10.1177/002072098902600103.

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This contribution describes the way in which the ECAD facilities have been exploited in the development of an undergraduate curriculum for the teaching of IC design in an Electronic Systems B. Eng. degree scheme. The programme of course and laboratory work culminates in a final year core course in Microelectronic Circuit Technology and Design together with a specialist option in VLSI Systems Design which includes chip fabrication activities.

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29

Khan, M. J. R. "Frequency characteristics and applications of an R-C-NR circular geometry microelectronic circuit." Microelectronics Journal 22, no. 4 (June 1991): 41–52. http://dx.doi.org/10.1016/0026-2692(91)90005-8.

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30

Fedeli, J. M., L. Di Cioccio, D. Marris-Morini, L. Vivien, R. Orobtchouk, P. Rojo-Romeo, C. Seassal, and F. Mandorlo. "Development of Silicon Photonics Devices Using Microelectronic Tools for the Integration on Top of a CMOS Wafer." Advances in Optical Technologies 2008 (June 9, 2008): 1–15. http://dx.doi.org/10.1155/2008/412518.

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Photonics on CMOS is the integration of microelectronics technology and optics components to enable either improved functionality of the electronic circuit or miniaturization of optical functions. The integration of a photonic layer on an electronic circuit has been studied with three routes. For combined fabrication at the front end level, several building blocks using a silicon on insulator rib technology have been developed: slightly etched rib waveguide with low (0.1 dB/cm) propagation loss, a high speed and high responsivity Ge integrated photodetector and a 10 GHz Si modulators. Next, a wafer bonding of silicon rib and stripe technologies was achieved above the metallization layers of a CMOS wafer. Last, direct fabrication of a photonic layer at the back-end level was achieved using low-temperature processes with amorphous silicon waveguide (loss 5 dB/cm), followed by the molecular bonding of InP dice and by the processing in microelectronics environment of InP μsources and detector.

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31

Shukla, Vandana, O. P. Singh, G. R. Mishra, and R. K. Tiwari. "A Novel Approach to Design a 4-Bit Binary Comparator Circuit with Reversible Logic using CDSM Gate." International Journal of Business Data Communications and Networking 11, no. 1 (January 2015): 36–49. http://dx.doi.org/10.4018/ijbdcn.2015010104.

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In the recent scenario of microelectronic industry, the reversible logic is considered as the burgeonic technology for digital circuit designing. It deals with the aim to generate digital circuits with zero power loss characteristics. Optical computing, Nanotechnology, Low power CMOS design and Digital Signal Processing (DSP) processors are leading areas of development with the concept of reversible logic. Researchers have already proposed various subsystems of the computer for the creation of low power loss devices with the help of numerous available reversible logic gates. Here in this paper, the authors have proposed a new reversible gate named as CDSM gate with 4×4 size. This CDSM gate is used to design optimized 4-bit binary comparator. The optimization is improved as compared to the existing designs based on some significant performance parameters such as total number of gates, garbage outputs generated, constant inputs and quantum cost. Comparators are widely used in various computing applications such as counters, convertor, Central Processing Unit (CPU) and control circuits etc. The comparator circuits using reversible logic can be visualized as a low power loss subsystem for the development of improved digital systems.

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Cote, D. R., S. V. Nguyen, W. J. Cote, S. L. Pennington, A. K. Stamper, and D. V. Podlesnik. "Low-temperature chemical vapor deposition processes and dielectrics for microelectronic circuit manufacturing at IBM." IBM Journal of Research and Development 39, no. 4 (July 1995): 437–64. http://dx.doi.org/10.1147/rd.394.0437.

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33

Liu, Haitao, Kai Wei, Zhengzhou Li, Wengang Huang, Yi Xu, and Wei Cui. "A Novel, Hybrid-Integrated, High-Precision, Vacuum Microelectronic Accelerometer with Nano-Field Emission Tips." Micromachines 9, no. 10 (September 20, 2018): 481. http://dx.doi.org/10.3390/mi9100481.

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In this paper, a novel, hybrid-integrated, high-precision, vacuum microelectronic accelerometer is put forward, based on the theory of field emission; the accelerometer consists of a sensitive structure and an ASIC interface (application-specific integrated circuit). The sensitive structure has a cathode cone tip array, a folded beam, an emitter electrode, and a feedback electrode. The sensor is fabricated on a double-sided polished (1 0 0) N-type silicon wafer; the tip array of the cathode is shaped by wet etching with HNA (HNO3, HF, and CH3COOH) and metalized by TiW/Au thin film. The structure of the sensor is finally released by the ICP (inductively coupled plasma) process. The ASIC interface was designed and fabricated based on the P-JFET (Positive-Junction Field Effect Transistor) high-voltage bipolar process. The accelerometer was tested through a static field rollover test, and the test results show that the hybrid-integrated vacuum microelectronic accelerometer has good performance, with a sensitivity of 3.081 V/g, the non-linearity is 0.84% in the measuring range of −1 g~1 g, the average noise spectrum density value is 36.7 μV/ Hz in the frequency range of 0–200 Hz, the resolution of the vacuum microelectronic accelerometer can reach 1.1 × 10−5 g, and the zero stability reaches 0.18 mg in 24 h.

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Wang, Hui, and Wei Tian. "Study and Application of ESD Generator Modele." Advanced Materials Research 383-390 (November 2011): 2334–38. http://dx.doi.org/10.4028/www.scientific.net/amr.383-390.2334.

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Phenomenon of electrostatic hazards is becoming increasingly prominent with wide application of microelectronic elements. Electrostatic Discharge (ESD) is an extremely complex process, which is not only related to the materials, the object shape and the value of discharging circuit resistance, but also always involved in very complicated process of gas breakdown, so ESD is also a stochastic process which is difficult to repeat. According to the request of standard IEC61000-4-2, simulation circuit of the equivalent Human-Metal Model is established, discharging process is simulated and analyzed, and the influence laws of circuit parameters and distribution parameters for ESD current waveform are obtained. Thus the structure of discharging circuit and element parameters can be determined, test results can be verified to some extent, and the characteristics and influencing factors of ESD process can be known better. Simulation results show that waveform parameters are all within the range of standard errors, which proves that the design of model parameters is correct, the analysis of ESD process is reasonable.

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35

Vozna, Natalia, Yaroslav Nykolaychuk, and Alina Davletova. "Multi-bit structure improvement methods for multiplier devices of matrix type." Physico-mathematical modelling and informational technologies, no. 32 (July 7, 2021): 80–85. http://dx.doi.org/10.15407/fmmit2021.32.080.

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The article proposes methods for improving the structures of matrix multipliers of multi-digit numbers. Advanced single-bit total adders with paraphrase switched inputs and paraphrase outputs are used, intended as components of high-speed matrix multipliers. Based on the use of such single-bit adders, the structures of matrix multipliers are proposed, characterized by 2 times increased speed, 5 times reduced structural complexity compared to known multipliers based on classical single-bit adders. Optimization of structures of multi-bit matrix multipliers is offered. Comparative estimates of structural and temporal complexities of their circuit implementations depending on the bit size of multiplied binary numbers are given. The use of optimized circuit solutions of matrix multipliers can significantly improve the system characteristics of complex computing devices with many such components in the crystals of microelectronic technologies.

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Singh, Rajendra Bahadur, and Anurag Singh Baghel. "IC Floorplanning Optimization using Simulated Annealing with Order-based Representation." International Journal of Intelligent Systems and Applications 13, no. 2 (April 8, 2021): 62–70. http://dx.doi.org/10.5815/ijisa.2021.02.05.

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Integrated Circuits (IC) floorplanning is an important step in the integrated circuit physical design; it influences the area, wire-length, delay etc of an IC. In this paper, Order Based (OB) representation has been proposed for fixed outline floorplan with Simulated Annealing (SA) algorithm. To optimize the IC floorplan, two physical quantities have been considered such as area, and wire-length for hard IP modules. Optimization of the IC floorplan works in two phases. In the first phase, floorplans are constructed by proposed representation without any overlapping among the modules. In the second phase, Simulated Annealing algorithm explores the packing of all modules in floorplan to find better optimal performances i.e. area and wire-length. The Experimental results on Microelectronic Center of North Carolina benchmark circuits show that our proposed representation with SA algorithm performs better for area and wire-length optimization than the other methods. The results are compared with the solutions derived from other algorithms. The significance of this research work is improvement in optimized area and wire-length for modern IC.

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Li, Dongling, Zhiyu Wen, Zhongquan Wen, Xuefeng He, Yinchuan Yang, and Zhengguo Shang. "Synthesis of the System Modeling and Signal Detecting Circuit of a Novel Vacuum Microelectronic Accelerometer." Sensors 9, no. 6 (May 27, 2009): 4104–18. http://dx.doi.org/10.3390/s90604104.

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Weinberg, K., and W. H. Müller. "A strategy for damage assessment of thermally stressed copper vias in microelectronic printed circuit boards." Microelectronics Reliability 48, no. 1 (January 2008): 68–82. http://dx.doi.org/10.1016/j.microrel.2007.03.003.

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UMEZU, Shinjiro, Ryosuke NAKAZAWA, Takashi HORIKAWA, and Hiroyuki KAWAMOTO. "1A1-C31 Development of Mask-Less Printing Technology for Microelectronic Circuit Utilizing Electrostatic Inkjet System." Proceedings of JSME annual Conference on Robotics and Mechatronics (Robomec) 2006 (2006): _1A1—C31_1—_1A1—C31_3. http://dx.doi.org/10.1299/jsmermd.2006._1a1-c31_1.

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Akbari, Saeed, Amir Nourani, and Jan K. Spelt. "Effect of adhesive fillet geometry on bond strength between microelectronic components and composite circuit boards." Composites Part A: Applied Science and Manufacturing 87 (August 2016): 228–36. http://dx.doi.org/10.1016/j.compositesa.2016.04.027.

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Croce, Robert A., Santhisagar Vaddiraju, Allen Legassey, Fotios Papadimitrakopoulos, and Faquir C. Jain. "A Low-Power Miniaturized Microelectronic System for Continuous Glucose Monitoring." International Journal of High Speed Electronics and Systems 23, no. 01n02 (March 2014): 1450010. http://dx.doi.org/10.1142/s0129156414500104.

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The design and fabrication of miniaturized, implantable, low-power wireless systems for continuous glucose monitoring hold great promise for diabetes mellitus inflicted patients. This involves addressing a variety of issues including extreme circuit miniaturization, robust electrochemical sensors as well as counteracting negative tissue response and biofouling following sensor implantation. In this contribution, we present a highly miniaturized microelectronic sensor platform that fits through a hypodermic needle and holistically addresses all aforementioned tribulations. For this, a custom designed complementary metal-oxide-semiconductor electronic device employing the 0.35 µm design rule has been integrated with a high performance amperometric electrochemical glucose sensor. The fabricated electrochemical sensor utilizes the stratification of five functional layers resulting in linear amperometric response within the physiological glucose range (2 – 22mM). The sensor is encased with a thick polyvinyl alcohol (PVA) hydrogel containing poly (lactic-co-glycolic acid) (PLGA) microspheres which provides continuous, localized delivery of dexamethasone utilized to combat inflammation and fibrosis subsequent to implantation. In vivo evaluation in a rat has shown that this system accurately tracks glycemic events. Such miniature size and low power operation (0.665 mm2 and 140 µW, respectively) of the electronic system render it an ideal platform for continuous glucose monitoring and other metabolic sensing applications.

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Wen, Hao, and Da Ke Hu. "ARM Based Low Cost Integrated Navigation System Technology Research." Applied Mechanics and Materials 291-294 (February 2013): 2537–42. http://dx.doi.org/10.4028/www.scientific.net/amm.291-294.2537.

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This paper mainly studies the integrated navigation system technology of GPS and microelectronic mechanical system (MEMS) concerning on embedded processor S3C2440A. The system has the advantages of low cost, fast speed and small size, etc., which give wide prospects in a personal navigation application. This paper introduces the system hardware circuit structure design, emphasize on GPS navigation, MEMS inertial device for auxiliary navigation system software algorithm, and use Matlab to do data simulation on system model. The results show that GPS/MEMS inertial component integrated navigation obviously improved relative to separate GPS navigation or Strapdown inertial navigation in the accuracy and application value.

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Tacken, Roland, Daniel Mitcan, and Jasper Nab. "Combining Fine Line Photoimageable with Multi-Step Thick Film for Improved Circuit Density." Journal of Microelectronics and Electronic Packaging 14, no. 3 (July 1, 2017): 94–99. http://dx.doi.org/10.4071/imaps.459344.

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Abstract There is a strong market need for further miniaturization of microelectronic ceramic-based products; electronic components require an increasingly finer pitch interconnect. Screen-printing resolution is a limiting factor in further miniaturization of classical thick film. Photo imageable thick film technology (PITF) was proposed decades ago as a successor technology to thick film, to achieve finer pitch patterns. However, where classical multilayer thick film provides good routing and interconnect capabilities, but insufficient fine line resolution, PITF does the reverse: no multilayer routing but advanced fine line performance. A combination of PITF for fine pitch mounting with advanced MLTF for efficient routing has been developed, targeting a linewidth of 50 μm line/spaces and below. Test and demo panels were made, using combinations of PITF pastes and conventional screen-print materials. Results, process performance, and limiting factors are discussed.

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Rusowicz, Artur, Maciej Leszczyński, Andrzej Grzebielec, and Rafał Laskowski. "Experimental investigation of single-phase microjet cooling of microelectronics." Archives of Thermodynamics 36, no. 3 (September 1, 2015): 139–47. http://dx.doi.org/10.1515/aoter-2015-0026.

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Abstract Development of electronics, which aims to improve the functionality of electronic devices, aims at increasing the packing of transistors in a chip and boosting clock speed (the number of elementary operations per second). While pursuing this objective, one encounters the growing problem of thermal nature. Each switching of the logic state at the elementary level of an integrated circuit is associated with the generation of heat. Due to a large number of transistors and high clock speeds, higher heat flux is emitted by the microprocessor to a level where the component needs to be intensively cooled, or otherwise it will become overheated. This paper presents the cooling of microelectronic components using microjets.

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Bar-Cohen, A., and H. Schweitzer. "Thermosyphon Boiling in Vertical Channels." Journal of Heat Transfer 107, no. 4 (November 1, 1985): 772–78. http://dx.doi.org/10.1115/1.3247503.

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The high heat flux capability and modest temperature differences associated with boiling heat transfer make immersion cooling one of the primary candidates for VHSIC and VLSI microelectronic component thermal control. While the literature contains many references to pool boiling heat transfer from single integrated circuit packages or transistor cans, there is as yet little information on ebullient thermal transport from vertical arrays of parallel, densely packaged Printed Circuit Boards or ceramic modules. The present study represents an attempt to explore the thermal performance of such ebullient cooling systems by analytically and empirically investigating boiling heat transfer in water from a pair of flat, isoflux plates. Experimental results for wall temperature as a function of axial location, heat flux, and plate spacing are presented. A theoretical model for liquid flow rate through the channel is developed and used as a basis for correlating the rate of heat transfer from the channel walls.

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Sayad, Abkar, Efstratios Skafidas, and Patrick Kwan. "Magneto-Impedance Biosensor Sensitivity: Effect and Enhancement." Sensors 20, no. 18 (September 12, 2020): 5213. http://dx.doi.org/10.3390/s20185213.

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Biosensors based on magneto-impedance (MI) effect are powerful tools for biomedical applications as they are highly sensitive, stable, exhibit fast response, small in size, and have low hysteresis and power consumption. However, the performance of these biosensors is influenced by a variety of factors, including the design, geometry, materials and fabrication procedures. Other less appreciated factors influencing the MI effect include measuring circuit implementation, the material used for construction, geometry of the thin film sensing element, and patterning shapes compatible with the interface microelectronic circuitry. The type magnetic (ferrofluid, Dynabeads, and nanoparticles) and size of the particles, the magnetic particle concentration, magnetic field strength and stray magnetic fields can also affect the sensor sensitivity. Based on these considerations it is proposed that ideal MI biosensor sensitivity could be achieved when the sensor is constructed in sandwich thick magnetic layers with large sensing area in a meander shape, measured with circuitry that provides the lowest possible external inductance at high frequencies, enclosed by a protective layer between magnetic particles and sensing element, and perpendicularly magnetized when detecting high-concentration of magnetic particles.

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Wada, T., M. Sugimoto, and T. Ajiki. "Relationship Between Width and Spacing of Aluminum Electrodes and Aluminum Corrosion on Simulated Microelectronic Circuit Patterns." Journal of The Electrochemical Society 134, no. 3 (March 1, 1987): 649–53. http://dx.doi.org/10.1149/1.2100525.

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Li, Shasha, Xi Liu, Jianjia Qin, Changqing Fang, and Nailiang Liu. "Synthesize and characterization of conductive nano silver/graphene oxide composites." Science and Engineering of Composite Materials 28, no. 1 (January 1, 2021): 510–15. http://dx.doi.org/10.1515/secm-2021-0048.

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Abstract To meet the high-precision needs of conductive ink in the field of microelectronic circuit printing, nano silver-coated graphene oxide (GO) composites were prepared as the conductive functional unit of the composites. The results show that compatibility of the GO grafted with ethylene glycol diglycidyl ether is better in the organic matrix than in the inorganic solvents. The nano silver particles attached to the surface of the grafted GO are evenly distributed and uniform in size. Moreover, the conductivity of grafted GO coated with silver particle composites is effectively improved. The composite conductivity is higher than 108 S/m, which is close to the electrical conductivity of silver.

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Biały, W., E. M. Stepanova, V. I. Zatsepina, E. P. Zatsepin, and P. I. Skomorokhov. "Improving the reliability of operation of electromechanical devices by means of ionistor-battery backup." E3S Web of Conferences 124 (2019): 05064. http://dx.doi.org/10.1051/e3sconf/201912405064.

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This article is devoted to the problem of improving the operation reliability of electromechanical devices and devices at electric power industry facilities. Particular attention is paid to the fact that in the Russian power system electromechanical devices and devices designed for a voltage class of 110 kV and higher are still the majority compared to microprocessor and microelectronic devices. Given their long service life and the inability to promptly replace all devices at once, improving the reliability of their operation is highly relevant. A schematic solution to the problem is developed. The scientific novelty of the proposed solution is of the fact that the redundant power supply circuit with operating current of electromechanical devices offers a consolidated use of innovative electric power storage devices, namely ionistors and classic rechargeable batteries combined according to a special circuit. This solution maximizes the operation reliability of both electromechanical devices and devices themselves, as well as their automatic control.

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Özdemir, Z. Güven, Ö. Aslan Çataltepe, and Ü. Onbaşlı. "Impedance and dielectric properties of mercury cuprate at nonsuperconducting state." International Journal of Modern Physics B 29, no. 29 (November 13, 2015): 1550205. http://dx.doi.org/10.1142/s0217979215502057.

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In this paper, impedance and dielectric properties of nonsuperconducting state of the mercury-based cuprate have been investigated by impedance measurements within the frequency interval of 10 Hz–10 MHz for the first time. The dielectric loss factor [Formula: see text] and ac conductivity [Formula: see text] parameters have also been calculated for non-superconducting state. According to impedance spectroscopy analysis, the equivalent circuit of the mercury cuprate system manifests itself as a semicircle in the Nyquist plot that corresponds to parallel connected resistance–capacitance circuit. The oscillation frequency of the circuit has been determined as approximately 45 kHz which coincides with the low frequency radio waves. Moreover, it has been revealed that the mercury-based cuprate investigated has high dielectric constants and hence it may be utilized in microelectronic industry such as capacitors, memory devices etc., at room temperature. In addition, negative capacitance (NC) effect has been observed for the mercury cuprate regardless of the operating temperatures at nonsuperconducting state. Referring to dispersions in dielectric properties, the main contribution to dielectric response of the system has been suggested as dipolar and interfacial polarization mechanisms.

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