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1

Chauhan, Anjali. "Hot spot mitigation in microprocessors by application of single phase microchannel heat sink and microprocessor floor planning." Diss., Online access via UMI:, 2009.

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Thesis (M.S.)--State University of New York at Binghamton, Thomas J. Watson School of Engineering and Applied Science, Department of Mechanical Engineeering, 2009.
Includes bibliographical references.
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Ballard, Lane P. "Application of critical chain principles to improve microprocessor technology ramps." Thesis, Massachusetts Institute of Technology, 2005. http://hdl.handle.net/1721.1/34837.

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Thesis (M.B.A.)--Massachusetts Institute of Technology, Sloan School of Management; and, (S.M.)--Massachusetts Institute of Technology, Dept. of Mechanical Engineering; in conjunction with the Leaders for Manufacturing Program at MIT, 2005.
Includes bibliographical references (p. 63).
Across Intel's microprocessor production there exists high variability on new technology process tools meeting standard, installation and qualification (I/Q) schedule durations. To reduce project schedule variability and increase time to money, Intel has begun examining critical chain management philosophies to aid in the reduction of high volume manufacturing (HVM) process tool I/Q durations. The goal of this assignment was to develop and implement a project management process using the principles of critical chain to enable continuous improvement on I/Q planning durations over technologies. Looking into the future, this thesis also examines a progression from product innovation towards process innovation in the microprocessor industry. This shift will further demand decreased I/Q durations and increased predictability for Intel on future microprocessor technology transitions.
by Lane P. Ballard.
S.M.
M.B.A.
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3

Figueredo, Kenny Robert Agnelo. "Application of microprocessor based model reference adaptive control to servosystems." Thesis, University of Bath, 1987. https://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.380941.

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Youngman, M. D. "The design and application of a microprocessor based modal analysis system." Thesis, University of Manchester, 1987. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.378802.

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Ng, Chun Tak. "The application of microprocessor technology to the control of refrigeration systems." Thesis, University of Ulster, 1991. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.359667.

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6

Morton, Shannon V. "Fast asynchronous VSLI circuit design techniques and their application to microprocessor design /." Title page, contents and abstract only, 1997. http://web4.library.adelaide.edu.au/theses/09PH/09phm891.pdf.

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7

Bromley, John. "The design and application of microprocessor based systems for clinical measurement of joint stiffness and grip strength." Thesis, Durham University, 1989. http://etheses.dur.ac.uk/6546/.

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The overall aim of the project was to further the research into the objective measurement of the symptoms of arthritic disease. There were three major parts to this study. The first part was to design a measurement system capable of making large scale, objective measurements of the stiffness of the human metacarpophalangeal joint. The second part was to design a new device to measure the grip strength of the human hand objectively. The last part was to use these two measurement systems to conduct research into the clinical manifestations of arthritic disease and study the effects of some therapeutic agents. A new, microcomputer controlled arthrograph system was developed to measure the stiffness of the metacarpophalangeal joint of the index finger. The system proved to be reliable, easy to use and sufficiently accurate to quantify changes in joint stiffness. A new design of grip machine was produced which enabled the forces developed during a power grip to be analysed. Measurement was made of the force contributions of individual digits and the maximum total gripping force. The machine was portable and extremely easy to use. A study of the circadian variation of joint stiffness and grip strength, over a full twenty four hour period, was carried out. Measurements were made every two hour in both healthy and arthritic subjects. A circadian variation of stiffness was observed in the joints of arthritic subjects. Joint stiffness was elevated in the early morning and for some subjects the degree of change was profound. No significant circadian variation was observed in the joint stiffness of healthy subjects. A circadian variation of grip strength was observed in arthritic subjects. Grip strength reached a minimum value between 2.00 and 4.00 a.m. in the majority of subjects. No consistent relationship was found between changes in joint stiffness and changes in grip strength. The effect of several forms of physiotherapy on the joint stiffness of arthritic subjects was studied in both the short and long term. The subjects were measured before, and then immediately after, treatment each time they visited a physiotherapy hand clinic. Only the results of those patients who attended the clinic for a minimum of five weeks were used in any subsequent analysis. Four different treatments were studied: hot wax and ultrasound, hot wax alone, ultrasound alone and exercise. The combination of hot wax baths and ultrasonic therapy effected temporary reductions in all joint stiffness parameters. The reductions in energy dissipation and torque range were highly significant ( p < 0.05 and p < 0.001 respectively ). No significant reductions were found for hot wax, ultrasound alone or exercise. In the long term, no significant change in joint stiffness was found for any of the treatments considered.
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8

Jay, Christian. ""hsurf" : un microprocesseur facilement testable pour des applications à haute sûreté de fonctionnement." Phd thesis, Grenoble 1, 1986. http://tel.archives-ouvertes.fr/tel-00320452.

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Partant d'un jeu d'instructions spécifique à l'application (domaine des automatismes logiques), on propose une architecture permettant d'exécuter ledit jeu d'instructions et disposant de facilités de test en fin de conception et au cours de la vie du circuit. L'observabilité et la contrôlabilité du composant représentent une partie importante de l'étude. Après examen critique de plusieurs méthodes permettant de faciliter le test (en ligne et hors ligne) du circuit, un choix est réalisé afin d'intégrer dans l'architecture de ce dernier les dispositifs nécessaires à la mise en œuvre de certaines d'entre elles
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Thorel, Pierre. "Contribution au test autonome des circuits VLSI : un microprocesseur à test aléatoire intégré." Grenoble INPG, 1987. http://www.theses.fr/1987INPG0088.

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Le test des circuits integres cmos a haute densite se heurte a deux difficultes. D'une part, la complexite croissante et la relative stabilite du nombre de broches limitent leur commandabilite et leur observabilite. D'autre part, leur test realiste se doit de prendre en compte certains defauts propres a la technologie cmos et susceptibles de donner a un dispositif combinatoire un comportement sequentiel. L'approche de test autonome integre proposee dans cette these offre une reponse sur ces deux points, tant pour le test de fin de fabrication que le test in situ. La methode choisie est basee sur le test aleatoire. Elle conduit a un resultat de type "bon/pas bon" (sans localisation de defauts). Le circuit dispose de deux modes de fonctionnement distincts : un mode normal et un mode test. En mode normal, le circuit remplit sa fonction nominale. En mode test, le circuit est excite par un generateur pseudo-aleatoire integre, ses reponses etant compactees en une signature. Apres une duree de test pre-etablie, la signature ainsi obtenue est comparee a celle d'un circuit correct. Cette approche est mise en oeuvre sur un circuit realise au cnet-cns : un microprocesseur 16 bits "mti". La generalisation des solutions utilisees dans "mti" est egalement abordee
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Puglisi, Joseph J. "The transformation of maritime operational, simulation and educational information systems (MOSEIS) at the United States Merchant Marine Academy through the application of advanced microprocessor digital electronic technology (AMDET)." Thesis, Cardiff University, 1992. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.407557.

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11

Robison, Daniel Earl 1978. "Microprocessor applications for laboratory learning." Thesis, Massachusetts Institute of Technology, 2001. http://hdl.handle.net/1721.1/86741.

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Thesis (M.Eng.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2001.
Includes bibliographical references (p. 131).
by David Earl Robison.
M.Eng.
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Mivehchi, M. H. "Microprocessors applications to telecommunications." Thesis, Bucks New University, 1986. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.375601.

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Govier, R. C. "Microprocessor applications in local area networks." Thesis, Bucks New University, 1988. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.380860.

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Khan, Muhammad Zafar Ullah. "Microprocessor controlled PWM inverters for UPS applications." Thesis, Loughborough University, 1989. https://dspace.lboro.ac.uk/2134/28190.

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This thesis describes the implementation of microprocessor controlled single-phase and three-phase inverters for UPS applications. A carrier frequency of 18 kHz is employed in both cases, and the PWM pulses are generated directly by the microprocessor using the regular-sampled symmetric PWM strategy. Single-edge modulation as well as double-edge modulation has been implemented for single-phase and three-phase systems. Since in general, software implementation of PWM strategies require precalculated pulse width values, a scheme is proposed which enables the large quantity of such data to be handled efficiently. The scheme involves the use of a small program for calculating and transferring the data to the memory of the controller.
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Vallius, T. (Tero). "An embedded object approach to embedded system development." Doctoral thesis, University of Oulu, 2009. http://urn.fi/urn:isbn:9789514292941.

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Abstract Building an embedded system from an idea to a product is a slow and expensive process requiring a lot of expertise. Depending on the developer’s expertise, the required quantity and price level of the final product, and the time and money available for development, the developer can build a device from different granularity of components, ranging from ready-made platforms, kits, and modules to individual components. Generally, solutions requiring less expertise, time and money produce products with higher production costs. The main contribution of this thesis is the EOC (Embedded Object Concept) and Atomi II Framework. EOC utilizes common object-oriented methods used in software by applying them to small electronic modules, which create complete functional entities. The conceptual idea of the embedded objects is implemented with the Atomi II framework, which contains several techniques for making the EOC a commercially feasible implementation. The EOC and the Atomi II Framework decreases the difficulty level of making embedded systems by enabling a use of ready-made modules to build systems. It enables automatic conversion of a device made from such modules into an integrated PCB, lowering production costs compared to other modular approaches. Furthermore, it also enables an automatic production tester generation due to its modularity. These properties lower the number of skills required for building an embedded system and quicken the path from an idea to a commercially applicable device. A developer can also build custom modules of his own if he possesses the required expertise. The test cases demonstrate the Atomi II Framework techniques in real world applications, and demonstrate the capabilities of Atomi objects. According to our test cases and estimations, an Atomi based device becomes approximately 10% more expensive than a device built from individual components, but saves up to 50% time, making it feasible to manufacture up to 10-50k quantities with this approach.
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Sahbatou, Mohammed Djameleddine Anceau François. "Une méthode de conception de microprocesseurs CMOS application au 8048 (Intel) /." S.l. : Université Grenoble 1, 2008. http://tel.archives-ouvertes.fr/tel-00311894.

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17

Munro, M. "Microprocessor applications to the phenomena associated with high-voltage transmission line transients." Thesis, University of Abertay Dundee, 1986. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.374252.

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Misra, Pradyumna Kumar. "Real time multitasking system application incorporating VRTX." Thesis, Virginia Tech, 1987. http://hdl.handle.net/10919/41577.

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The real time multitasking systems are becoming increasingly popular for control and monitoring functions typically encountered in industry as well as day to day life. They have to manage adequately many concurrent processes or tasks, each of which is sequential in nature. The concurrency is achieved by running asynchronous tasks at different speeds and providing for communication and synchronization. In order to fully exploit the power and capabilities of today's sophisticated microprocessors and to provide a programming methodology for structuring real time applications a real time multitasking operating system becomes critical.


Master of Science
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Groening, Susan E. Whitehouse Kimberly Davenport. "Application of fault tolerant computing for spacecraft using commercial-off-the-shelf microprocessors /." Monterey, Calif. : Springfield, Va. : Naval Postgraduate School ; Available from National Technical Information Service, 2000. http://handle.dtic.mil/100.2/ADA380325.

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Thesis (M.S. in Computer Science)--Naval Postgraduate School, June 2000.
Thesis advisors:Michael, James B. ;Ross, Alan A. "June 2000." Includes bibliographical references (p. 147). Also available online.
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Groening, Susan E., and Kimberly Davenport Whitehouse. "Application of fault tolerant computing for spacecraft using commercial-off-the-shelf microprocessors." Thesis, Monterey, California. Naval Postgraduate School, 2000. http://hdl.handle.net/10945/9267.

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Low availability, high cost, and poor performance of radiation hardened (rad-hard) equipment has driven the market to rely on commercial-off- the-shelf (COTS) equipment for the computing needs of today's spacecraft. This thesis describes the tailoring of a COTS embedded real-time operating system and design of a human-computer interface (HCI) for a triple modular redundant (TMR) fault-tolerant microprocessor for use in space-based applications. Once disadvantage of using COTS hardware components is their susceptibility to the radiation effects present in the space environment. and specifically, radiation- induced single-event upsets (SEUs). In the event of an SEU, a fault-tolerant system can mitigate the effects of the upset and continue to process from the last known correct system state. The TMR basic hardware design used for this research is an acceptable fault-tolerant design candidate for the main processor for space-based applications. We found that a COTS embedded real-time operating system could be tailored to support the TMR hardware. The HCI accepts serial data from the TMR, correctly identifies the source of the error, allows for processor mode selection and provides system- and board-level reset capabilities. The tailored operating system combined with the HCI is a viable software imp- lementation to support hardware-based fault-tolerant computing in a space environment.
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Bilen, Celal Can, and John Alcalde. "Performance Evaluation of Embedded Microcomputers for Avionics Applications." Thesis, Jönköping University, JTH, Computer and Electrical Engineering, 2010. http://urn.kb.se/resolve?urn=urn:nbn:se:hj:diva-11955.

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Embedded microcomputers are used in a wide range of applications nowadays. Avionics is one of these areas and requires extra attention regarding reliability and determinism. Thus, these issues should also be born in mind in addition to performance when evaluating embedded microcomputers.

This master thesis suggests a framework for performance evaluation of two members of the PowerPC microprocessor family, namely the MPC5554 from Freescale and PPC440EPx from AMCC, and analyzes the results within and between these processors. The framework can be generalized to be used in any microprocessor family, if required.

Apart from performance evaluation, this thesis also suggests also a new terminology by introducing the concept of determinism levels to be able to estimate determinism issues in avionics applications more clearly, which is crucial regarding the requirements and working conditions of this very application. Such estimation does not include any practical results as in performance evaluation, but rather remains theoretical. Similar to Automark™ used by AutoBench™ in the EEMBC Benchmark Suite, we introduce a new performance metric score that we call ”Aviomark” and we carry out a detailed comparison of Aviomark with the traditional Automark™ score to be able to see how Aviomark differs from Automark™ in behavior.

Finally, we have developed a graphical user interface (GUI) which works in parallel with the Green Hills MULTI Integrated Development Environment (IDE) in order to simplify and automate the evaluation process. By the help of the GUI, the users will be able to easily evaluate their specific PowerPC processors by starting the debugging from MULTI IDE.

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Savage, P. "The application of microprocessors to the position control of two-phase A.C. induction motors." Thesis, University of Reading, 1986. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.371455.

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Franz, Jonathan D. Duren Russell Walker. "An evaluation of CoWare Inc.'s Processor Designer tool suite for the design of embedded processors." Waco, Tex. : Baylor University, 2008. http://hdl.handle.net/2104/5254.

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Jay, Christian. "HSURF, un microprocesseur facilement testable pour des applications à haute sûreté de fonctionnement." Grenoble 2 : ANRT, 1986. http://catalogue.bnf.fr/ark:/12148/cb375985022.

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Jay, Christian Saucier Gabrièle. ""HSURF" un microprocesseur facilement testable pour des applications à haute sûreté de fonctionnement /." S.l. : Université Grenoble 1, 2008. http://tel.archives-ouvertes.fr/tel-00320452.

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Slimani, Kamel. "Une méthodologie de conception de circuits asynchrones à faible consommation d'énergie : application au microprocesseur MIPS." Grenoble INPG, 2004. https://tel.archives-ouvertes.fr/tel-00008328.

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Pour accroître l'autonomie des systèmes embarqués tels que les téléphones ou les ordinateurs portables, de nombreuses recherches sur la conception de circuits intégrés ont été réalisées en vue de réduire la consommation d'énergie. Ces travaux de thèse ont pour but de proposer au concepteur des moyens de concevoir des circuits intégrés numériques à faible consommation d'énergie. Trois étapes importantes vers la réduction de la consommation d'énergie ont été proposées. L'utilisation de la logique asynchrone représente le premier pas vers la réduction de la consommation d'énergie. En effet, de nombreux travaux réalisés ces dernières années ont montré que les circuits asynchrones présentent la propriété intrinsèque de consommer moins d'énergie que les circuits implémentés en logique synchrone. Le second pas important est d'offrir au concepteur des outils lui permettant d'obtenir des informations sur l'activité et la consommation d'énergie du circuit lors de la conception de celui-ci. Nous avons spécifié un estimateur d'activité et un estimateur de la consommation d'énergie qui permettent au concepteur de collecter des informations pertinentes sur la répartition de l'activité et de la consommation d'énergie d'un circuit lors d'une simulation donnée. Enfin, des techniques d'optimisation sont proposées pour réduire la consommation d'énergie des circuits. La méthodologie d'estimation et les techniques d'optimisation de la consommation d'énergie ont été appliquées à la réalisation d'un processeur, les résultats ont montré une réduction de la consommation d'énergie de 24%
To increase the autonomy of embedded systems such as portable phones or computers, several researches on integrated circuit design have been performed in order to reduce the energy consumption. This Phd work aims at proposing to the designer the means to design low energy digital integrated circuits. Three important steps have been proposed in this work to reduce the energy consumption of circuits. The first step is to use asynchronous logic to design circuit. Indeed, several works achieved these last years have shown that asynchronous logic can significantly reduce the energy consumption of circuits. The second step is to offer tools that allow the designer to get information on the activity and the energy consumption of a circuit during the design flow. An activity estimator and an energy estimator have been specified that allow the designer to get relevant information on the distribution of the activity and the energy within a circuit during a specific simulation. Finally, optimisation techniques have been defined to reduce the energy consumption of circuits. The estimation methodology and the energy consumption optimisation techniques have been applied to the implementation of a processor. The results have shown an energy consumption reduction of 24%
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Colvez, François. "La carte à microprocesseur et ses applications dans le domaine de la santé publique." Paris 5, 1990. http://www.theses.fr/1990PA05P231.

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Al-Ashraf, Samir Daniel, and Arban Sefedini. "Prototyper för NFC implementeringar." Thesis, Malmö högskola, Teknik och samhälle, 2010. http://urn.kb.se/resolve?urn=urn:nbn:se:mau:diva-20545.

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Near Field Communication (NFC) är en trådlös kommunikationsteknik för korta avstånd, vanligast med cirka 10 cm vilket medför en säkrare förbindelse. NFC är en relativt ung teknologi som är billig att implementera samt användarvänlig. NFC är lämpad främst för mobiltelefoner där en bred implementering av applikationer är möjlig. Tekniken medför snabbare och enklare utbyte av information genom att ställa enheter sida vid sida. I dagsläget används tekniken mest i Asien. I Europa har ingen stor satsning påbörjats än, men den är på väg. I framtiden förväntas det att NFC kommer att finnas i de flesta mobiltelefoner.Denna uppsats behandlar praktisk implementering av en ”verktygslåda” med NFC teknologi. Målet är att skapa en ”verktygslåda” med olika komponenter. ”verktygslådan” är tänkt att användas som grundskelett för implementering av NFC applikationer och för experiment med de olika komponenterna. Hårdvarukomponenterna består av mobiltelefon, tagg, RFID läsarmodul och mikroprocessor. Programvarukomponenterna består av ett antal kodexempel.Vårt arbete har resulterat i tre prototyper som tillsammans utgör ”verktygslådan”. I prototyperna sker kommunikation mellan en kombination av komponenter i ”verktygslådan”: mobiltelefon och tagg, läsare och tagg samt läsare och mobiltelefon.
Near Field Communication (NFC) is a contactless short distance (approximately 10 centimeters) communication technology, which conveys a more secure connection. NFC is a relatively young technology which is cheap to implement, and user-friendly. NFC is directed to mainly cellphones, where opportunities for implementation of applications are wide. The technology conveys a faster and easier exchange of information, by putting units side by side. At present, the technology is used mostly in Asia. In Europe, no major effort has begun yet, but is expected to. NFC is expected to exist in a majority of cellphones, in the future.This essay treats practical implementation of a “toolbox” with the NFC technology. The goal was to make a “toolbox” with different components. The “toolbox” is intended as a base for implementing NFC applications and for experimenting with the different components. The hardware components are: cellphone, a tag, a RFID module and a microprocessor. The program components consist of a number of code examples.Our work has resulted in three prototypes which together constitute a “toolbox”. The prototypes communicate between any combinations of the components in the “toolbox”: cellphone with tag, reader with tag and reader with cellphone.
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Matteï, Michèle. "Étude d'un moniteur temps réel pour microprocesseur INTEL 8085 et utilisation dans une application de télétransmission." S.l. : Université Grenoble 1, 2008. http://dumas.ccsd.cnrs.fr/dumas-00312789.

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Dahlberg, Johan. "Embedded Computer for Space Applications suitable for Linux." Thesis, Linköping University, Department of Electrical Engineering, 2003. http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-2085.

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This report briefly describes the special requirements for a computer board for use in space. In particular, component selection and ways of mitigating the soft and hard errors are discussed. Furthermore, one implementation for a low-cost, relatively high performance computer that will work in the harsh space environment is presented. The report is primarily intended for those familiar with digital design, who need an introduction to construction of space or other high-reliability hardware.

As the quality (resolution) of imagers, spectrometers and other data sources in scientific satellite payloads is increasing, there is also an increasing demand for more processing power in order to compress or in other way process the data before transmitting it on the limited bandwidth microwave downlink to Earth. Scientific instruments are usually mission specific and have rather low budget, so there is a need for a powerful computer board that can be used for a number of missions in order to keep the engineering costs down.

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Durant, Pierre. "Un système de génération de mémoire virtuelle pour les cartes à microprocesseur : application à la carte santé." Lyon, INSA, 2000. http://www.theses.fr/2000ISAL0074.

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Les cartes à microprocesseur ont une faible capacité de stockage et sont généralement conçues pour le support de dossiers portables simples contenant peu d'information. Cette contrainte restreint leurs domaines applicatifs et rend hors de portée la mise en oeuvre de dossiers portables complexes comportant généralement une masse informationnelle importante. Dans cette étude, nous nous proposons d'élaborer des moyens logiciels qui permettront à la carte à microprocesseur de mettre en oeuvre des dossiers portables complexes. L'étude est divisée en cinq chapitres. Nous introduisons d'abord la technologie des cartes à microprocesseur. Nous définissons ensuite les problématiques associées à leur application dans le monde médical qui reflète bien le nature des dossiers portables complexes. Nous posons ensuite notre hypothèse de travail en préconisant que le concept de carte index intégrant la notion de génération de mémoire virtuelle pour la carte à microprocesseur est une solution pour résoudre la saturation de leur mémoire. L'ensemble de nos travaux permet ensuite d'expliquer la notion de dossiers portables complexes, d'élaborer le concept de carte index et de définir les composantes systématiques d'une telle approche. Nous proposons ensuite différentes mises en oeuvre de la technologie du point de vue du système d'exploitation. Nous verrons alors que l'utilisation du mode virtuel peut s'étendre au-delà des fonctionnalités mémoire de la carte. Nous présentons finalement une organisation conceptuelle de la carte index et nous terminons notre étude en présentant deux prototypes qui viennent appuyer la faisabilité technique de nos travaux
Smart Cards have little storage capacity and are generally made to support simple portable records that contain few information. This constraint restricts domain applications and do not provide a way to implement complex portable records that have generally huge amount of data. In this study, we propose to provide new software functionalities for smart card to enable implementation of complex portable records. The study is divided in five chapters. We first introduce smart card technology. After, we define problematic associated with smart card application in medical domain that is a real case of complex portable record. Then, we advance the hypothesis that index card technology integrating virtual memory system is a way to resolve smart card memory saturation. We after explain the notion of complex portable records, present the detail of index card technology and define systemic components of a such approach. We after propose different implementations of the index card technology in regard to operating system architecture. We will see that virtual mode operation can be apply more than memory functionality. Finally, we present a conceptual organization of index card and we terminate the study with the presentation of two software prototypes that prove technical feasibility of the concept
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Van, der Horst Johannes Gerhardus. "Radiation tolerant implementation of a soft-core processor for space applications." Thesis, Stellenbosch : University of Stellenbosch, 2007. http://hdl.handle.net/10019.1/1857.

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Thesis (MScEng (Electrical and Electronic Engineering))--University of Stellenbosch, 2007.
The availability of high density FPGAs has made the use of soft-core processors an attractive proposition for the low volume space market. Soft-core processors combine the power of programmable logic with the ease of use of a conventional processor to provide a highly customisable solution. However, the SRAM FPGAs used as implementation platform are especially susceptable to radiation induced single event upsets, due to the sensitivity of their configuration memory. To safely use these processors in a space environment requires the modification of the processor to safely mitigate these effects. This thesis presents the process followed to develop and test a fault tolerant implementation of an 8-bit PicoBlaze soft-core processor on a Xilinx Spartan-3 SRAM FPGA. A thorough investigation was made into the available methods that can be used to mitigate single event upsets, in order to identify the most suitable ones. Guidelines for the application of SEU mitigation techniques to SRAM FPGAs were proposed. A single event upset simulator was designed and constructed to compare the different techniques. It mimics SEUs by injecting errors into the configuration memory of an FPGA. The results of error injection were used to develop a PicoBlaze implementation with limited overhead, while it still offers a high degree of error mitigation. Three different designs were tested by proton irradiation to verify the protection afforded by the mitigation techniques. It was found that protected designs were more robust. The cross-section of the FPGA was also determined, which can be used with the SEU simulator to predict the dynamic cross-section of designs. The work contained in this thesis demonstrates the use of open-source intellectual property with commercial-off-the-shelf components to develop a robust component for use in the miniature spacecraft market.
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33

Gasser, Jean-Luc. "Analyse de signature des circuits intégrés complexes par test aléatoire utilisant les méthodes de traitement du signal : application à un microprocesseur." Toulouse, INPT, 1986. http://www.theses.fr/1986INPT079H.

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On presente une methode de test des composants a tres haute densite d'integration (vlsi), et son application au microprocesseur 6809 (thomson-efcis). Une strategie de test aleatoire est proposee: on soumet le composant a analyser a une sequence de vecteurs aleatoires, qui n'est pas forcement reproductible, et on analyse sa reponse par des methodes de traitement du signal. Aucun modele du composant et tres peu d'hypotheses de panne sont elabores. On rappelle les principes de deux methodes permettant de simuler des pannes ou de tester la resistance des composants aux rayonnements cosmiques: l'utilisation des lasers et celle de sources radioactives. Les resultats experimentaux de l'irradiation electronique d'un lot de six 6809 mettent en evidence des points faibles de ce composant. On etablit une statistique des pannes en tenant compte de sa structure interne. La signature partielle du microprocesseur est obtenue par une methode d'analyse d'histogramme. L'application des fonctions de walsh-rademacher permet l'elaboration d'un estimateur du comportement individuel de chaque bit du bus du composant, dont les proprietes theoriques et numeriques sont decrites. On en deduit la distribution de la sequence a analyser qui autorise la probabilite de detection de panne maximale. On effectue l'analyse spectrale de l'estimateur par les methodes classiques (fft) et par la modelisation autoregressive (ar). La moyenne de l'estimateur est un parametre significatif, et son analyse spectrale met en evidence certaines proprietes du signal, mais egalement des problemes de non-stationarite qui n'ont pas ete resolus a cause des limitations dues a l'implantation materielle. Des solutions a ces problemes sont proposees, et on examine les applications de la methode de test a d'autres composants ou a des systemes logiques plus complexes
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34

Bourhis, Guy. "Conception et automatisation d'un désigneur polyvalent géré par microprocesseur application aux grands handicapés moteurs présentant des troubles de la communication verbale." Grenoble : ANRT, 1985. http://catalogue.bnf.fr/ark:/12148/cb375945232.

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35

Gasser, Jean-Luc. "Analyse de signature des circuits intégrés complexes par test aléatoire utilisant les méthodes de traitement du signal application à un microprocesseur." Grenoble 2 : ANRT, 1986. http://catalogue.bnf.fr/ark:/12148/cb37597799k.

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36

Mutigwe, Charles. "Automatic synthesis of application-specific processors." Thesis, Bloemfontein : Central University of Technology, Free State, 2012. http://hdl.handle.net/11462/163.

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Thesis (D. Tech. (Engineering: Electrical)) -- Central University of technology, Free State, 2012
This thesis describes a method for the automatic generation of appli- cation speci_c processors. The thesis was organized into three sepa- rate but interrelated studies, which together provide: a justi_cation for the method used, a theory that supports the method, and a soft- ware application that realizes the method. The _rst study looked at how modern day microprocessors utilize their hardware resources and it proposed a metric, called core density, for measuring the utilization rate. The core density is a function of the microprocessor's instruction set and the application scheduled to run on that microprocessor. This study concluded that modern day microprocessors use their resources very ine_ciently and proposed the use of subset processors to exe- cute the same applications more e_ciently. The second study sought to provide a theoretical framework for the use of subset processors by developing a generic formal model of computer architecture. To demonstrate the model's versatility, it was used to describe a number of computer architecture components and entire computing systems. The third study describes the development of a set of software tools that enable the automatic generation of application speci_c proces- sors. The FiT toolkit automatically generates a unique Hardware Description Language (HDL) description of a processor based on an application binary _le and a parameterizable template of a generic mi- croprocessor. Area-optimized and performance-optimized custom soft processors were generated using the FiT toolkit and the utilization of the hardware resources by the custom soft processors was character- ized. The FiT toolkit was combined with an ANSI C compiler and a third-party tool for programming _eld-programmable gate arrays (FPGAs) to create an unconstrained C-to-silicon compiler.
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37

Yu, Wei. "Development of an elongational-flow microprocess for the production of size-controlled nanoemulsions : application to the preparation of composite and hybrid polymeric microparticles." Thesis, Strasbourg, 2015. http://www.theses.fr/2015STRAE027/document.

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L’objectif de ce travail fut de développer et d’étudier les performances d’un microprocédé basse pression à écoulement élongationnel pour la production de nanoémulsions polymérisables de tailles contrôlées et de distributions de taille étroites. Le diamètre des nanogouttelettes a pu être précisément ajusté dans la gamme 50-300 nm en modifiant simplement les paramètres de procédé : le débit réciproque au travers du micromélangeur, le nombre de cycles et la dimension caractéristique du microcanal. Les nanoémulsions produites furent, dans une seconde étape, polymérisées par voie thermique ou par irradiation UV afin de générer des suspensions colloïdales de nanoparticules de polymère de tailles également contrôlées (87-360 nm). Un monomère, un agent de réticulation ainsi qu’un amorceur thermique ou photochimique appropriés furent par la suite ajoutés au milieu continu de ces nanosuspensions. Les solutions résultantes servirent comme phases dispersées dans des générateurs microfluidiques de gouttelettes à capillaires. Les microgouttelettes de taille contrôlée ainsi produites furent polymérisées en ligne par irradiation UV pour donner lieu à des microsphères ou à des microparticules coeur-écorce composites de polymère toutes deux dopées avec des nanoparticules de polymère. Des microparticles composites et hydrides comportant des nanoparticules d’or dans le coeur et d’argent dans l’écorce furent également obtenues grâce à la réduction photochimique in situ des sels précurseurs lors de la photopolymérisation des microgouttelettes. Ce travail a démontré l’efficacité d’un nouveau dispositif microfluidique basse énergie pour la production de nanoémulsions et leur emploi pour la synthèse de matériaux polymères morphologiquement complexes
The aim of this work was to develop and to study the performances of a low pressure elongational-flow microprocess for the production of size-controlled polymerizable nanoemulsions with narrow size distributions. Nanodroplets diameter was easily tuned in the size range 50-300 nm by varying the process parameters, namely the reciprocating flow rate through the micromixer, the number of cycles and the characteristic dimension of the microchannel. Obtained nanoemulsions were in a second step thermally or UV-assisted polymerized to give colloidal suspensions of size-tunable polymer nanoparticles (87-360 nm). Then, a proper monomer, crosslinker and thermal- or photo-initiator were added to the continuous phase of these nanosupensions. The resulting mixtures were used as the dispersed phases of two different capillaries-based microfluidic droplet generators. The produced sizecontrolled microdroplets were finally UV polymerized online and plain as well as core-shell composite polymeric microparticles doped with lower scale polymer nanoparticles were obtained. Composite/hybrid polymeric core-shell microparticles were also synthesized for which gold nanoparticles in the core and silver nanoparticles in the shell were synthesized in situ from their salt precursors during microdroplets polymerization. This work has demonstrated the high efficiency of a novel low energy microfluidic emulsification device for the production of nanoemulsions which were used for the synthesis of morphologically complex polymeric materials
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38

Wu, Qin. "Élaboration d'algorithmesde la reconnaissance vocale à bord de véhicule." Paris 11, 1987. http://www.theses.fr/1987PA112293.

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Ce mémoire traite principalement du problème de la reconnaissance de mots isolés à bord de véhicule. Dans cette application particulière, le bruit injecté dans le système a un niveau très variable et parfois très élevé par rapport la parole. Nous présentons dans les différents chapitres les aspects portant sur; - la localisation de la parole dans le bruit, - la discrimination du bruit et de la parole, - l'adaptation du système à l'ambiance, la soustraction du bruit lors de la reconnaissance. Des algorithmes portent sur l'ensemble de la reconnaissance vocale sont aussi discutés et développés. Un système de reconnaissance de mots isolés réalisé autour d'un microcontrôleur 8096 est également présenté dans le dernier chapitre
This dissertation treats principally the problem of recognition of isolated words pronounced inside a vehicule. In this particular application, the noise injected into the recognition system has a high and variable level with respect to the speech signal. The different chapters will deal with: the localisation of the speech phrase within the noise, the discrimination of noise with respect to speech, - the adaptation of the system with respect to the ambient environment, the noise soustraction. Algorithms for speech recognition are also discussed and developed. The last chapter describes a speech recognition system designed around o single-chip microprocesseur (INTEL 8096)
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39

Broult, Christophe. "LPV, une nouvelle technologie de validation du logiciel basée sur la programmation linéaire : application informelle "en éclaireur" à la génération de scénarios de test non triviaux pour les cartes à microprocesseur." Caen, 1999. http://www.theses.fr/1999CAEN2074.

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Avec la generalisation de leur emploi et des exigences de qualite croissantes, la validation des systemes logiciels devient problematique. Les methodes formelles sont considerees comme la solution a utiliser pour verifier les systemes dits critiques. Toutefois, sauf dans des cas tres precis, elles n'ont jusqu'a present pas ete capables de faire face a la taille et a la complexite des applications industrielles. Parallelement au debut de cette these, lpv, une nouvelle technologie de validation du logiciel basee sur la programmation lineaire, naissait a l'universite de caen et nous avons participe a sa mise au point en travaillant pour le cnet caen a la modelisation d'une carte a microprocesseur dans le but de generer des scenarios de test non triviaux. Le premier chapitre presente le contexte et les techniques visant a ameliorer la qualite du logiciel. Il se termine en situant ce travail dans le monde des cartes a microprocesseur et en donnant les objectifs de la these. Apres avoir expose les principes de lpv, le deuxieme chapitre presente l'utilisation informelle en eclaireur de cette technologie dans le cadre de la generation de scenarios de test non triviaux pour les cartes a microprocesseur. L'objectif etait de voir les problemes rencontres lors d'une telle application. Les solutions ad hoc et pragmatiques proposees ont servi, d'une part, a definir les elements essentiels pour obtenir une technologie de validation applicable a des problemes industriels et, d'autre part, a alimenter le travail theorique qui a conduit l'ensemble de l'equipe lpv a produire des solutions praticables aux problemes souleves lors de ces experiences. Nous concluons la these en presentant des extensions necessaires pour faire de lpv un veritable outil de genie logiciel.
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40

Yu, Yong-Sheng, and 游詠勝. "Application of Microprocessor on Capacitor Array Measurement." Thesis, 2015. http://ndltd.ncl.edu.tw/handle/95301428222187400181.

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碩士
國立臺灣海洋大學
機械與機電工程學系
103
An automated capacitor array measurement system is proposed in this thesis. In this system, a transimpedance amplifier is used to process the input AC voltage fed to the capacitor array. Next, the peak voltage is obtained through peak detector circuit to acquire capacitance in the array. Microprocessor module is then used to control switching via multiplexer and to measure the voltages. Control signal to the multiplexer is sent through digital interface of microprocessor module, and voltages are acquired through analog to digital interface. Linear regression equation between voltage and capacitance obtained by experiments is used to calculate capacitances from measured voltages. Finally, data is transfer to PC by USB interface for recording and display to achieve real time measurement. Keywords: Microprocessor, Capacitance Measurement, Multiplexer, Capacitor Array Sensor
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41

Wang, Yi-Wei, and 王議緯. "The Application of Temperature Control System with Microprocessor." Thesis, 2009. http://ndltd.ncl.edu.tw/handle/83124036187091243058.

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碩士
中原大學
電機工程研究所
97
Most of heaters use fuel, gas or electricity to produce heat. However, these methods are expensive and generate amount of CO2. In order to protect the environment and save the energy, the solar energy heaters are applied. But solar energy heater can not provide the same performance in both winter and summer. Especially in a rainy day, the solar heater is equal to out of order. At the same time, its transform efficiency is still bad. But we can get heat energy from nature by heat pump through compression, expansion and heat exchange to generate hot water. Comparing with conventional solar energy type of equipments and the other heaters, the heat pump conserves energy and protects environment efficiently. Traditionally, the heat pump is controlled by Programmable logic controller (PLC). But, PLC has disadvantages of expensive price and huge size. Here, we use MCS-51 to control heat pump instead of PLC. This controller can detect each sensor which is normal or not in order to protect the compressor and prevent fault action. When any sensor is break down, system will detect each fault number and provide the information to user or repairer. This method improves the maintenance of traditional heat pump. Experimental results through several temperature control measurements show that this work provides a cheap and effective way to control heat pumps. At the same time, we combine single chip and fuzzy control, and we use PT100 circuit and SCR phase adjust module for designing a self-tuning fuzzy controller. This controller can adjust output power of heater slightly and automatically according to environmental changes. In this way, we have better control effects.
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42

Lin, Kai Sheng, and 林愷聲. "Microprocessor control system for application rate of sprayer." Thesis, 1995. http://ndltd.ncl.edu.tw/handle/63168773171945182237.

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43

XU, JUN-MU, and 許俊木. "Application of single-chip microprocessor on digital protective system." Thesis, 1992. http://ndltd.ncl.edu.tw/handle/45930697357566026868.

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44

Yang, Chao Kai, and 楊詔剴. "The Application of Microprocessor on The Control of Packaging Machine." Thesis, 1995. http://ndltd.ncl.edu.tw/handle/81710016108309670328.

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碩士
中原大學
機械工程研究所
83
Along with the increasing demand of commodity quality, product packaging has become a highly professional technology. Packaging machines industry has becoming more and more active and important, and the functions of packaging machines have been improved continuously. The general trend indicates that using microprocessors to control a packaging machine can automatize the packing procedure, speed up the process, reduce labor force, and prevent human errors. Therefore, the technique of using microprocessors to build the controller of an automatic packaging machine is explored in this report. The pillow-type packaging machine studied in this report is a prototype built by earlier graduate students. In order to be intelligent and flexible, so as to meet variant packing con- ditions, the machine contains several adjustable mechanisms each driven by an independent power source. All of these power sources previously were controlled through a personal computer . Due to the complexity of the packing motion, each driving power source needs a precise coordination with others but under different sampling rate. These make personal computer ineffective in conducting the control job. Besides that the packaging machine must be a stand alone automatic machine, and PC is not a very ecconomic control tool from this point of view. To solve these problems, microprocessors are used in this research to replace PC as the main controller. This report will show the design of the micro- controller system and the usage of distributed control structure as well as programmable logic device to simplify the control circuit. Since packaging machine is a system composed by mechanisms , motors, and electrical control circuit. It is a piece of art of mechatronics. As a mechanical engineering student, the author deems this research as an opportunity to learn the technique of integrating different
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45

Yeager, Hans L. "Microprocessor power management and a stand-alone benchmarking application for Android based platforms." Thesis, 2011. http://hdl.handle.net/2152/ETD-UT-2011-12-4542.

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Components used in mobile hand-held devices (smart phones and tablets) vary greatly in performance and power consumption. The microprocessors used in these devices also have vastly different capabilities and manufacturing limitations leading to significant variation effects. Battery life is a significant concern to the end users of these products. A stand-alone Android application capable of benchmarking a device's performance and power consumption is introduced. The application does not require the end user to have any analytic equipment or to have a technical background. This enables individual end users to better understand their particular device's performance and battery life interaction. They may also use the application to determine if their device's performance or battery life has degraded over time. Data is also uploaded to a central location so that devices can be compared against each other. The benchmarking application is capable of resolving variation effects caused by device, environmental changes and power management actions. This application demonstrates the feasibility of creating a low cost ecosystem where thousands of devices can be quantitatively compared.
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46

Kuo, Wu-An, and 郭武安. "A High-end 32-bits Microprocessor and its Application on Bluetooth Baseband Design." Thesis, 2001. http://ndltd.ncl.edu.tw/handle/83477978014830581887.

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碩士
國立中正大學
電機工程研究所
89
In this thesis, an architecture for bluetooth hardware and firmware is proposed. The Bluetooth bassband controller is a basic bluetooth hardware that is based on an architecture with the combination of a embedded processor, memories, firmware and ASICs. The ASICs is designed with basic communication components.
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47

ZHANG, FU-CAI, and 張福財. "A research on the application of microprocessor for flow control using variable-speed AC motor." Thesis, 1987. http://ndltd.ncl.edu.tw/handle/70756987457828856036.

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48

Smeh, John. "Smart card application design." Thesis, 2002. https://vuir.vu.edu.au/17896/.

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This study investigated sociotechnical criteria in the design and specification processes of smart card based projects through a case study. The adoption of the innovations in the case study was investigated. The study consisted of three phases: analysis, design and implementation. These were in relation to sociotechnical design criteria and its incorporation into a design methodology. Results from this study indicated that the adoption of the innovations was largely based on the design and specification processes. A formal model for these processes was constructed based on the case study. A recommendation for ongoing research into the refinement of the model presented is suggested. A n extended research project may focus on the model, or on one specific component.
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49

Gu, Ruei-Ting, and 古瑞庭. "A Preliminary Study on Microprocessor Control System for Application Rate and Horizontal Position of Beam Type Sprayer." Thesis, 2001. http://ndltd.ncl.edu.tw/handle/39383386894495813939.

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碩士
國立臺灣大學
生物產業機電工程學研究所
89
This study is to develop an automatic control system for constant spraying rate and constant horizontal position of various boom-type sprayer speed to keep good spraying accuracy and to prevent hitting plants. An electro-hydraulic servo-drived system controlled by a personal computer and a spray-pipe-line system were developed for this purpose. A mathematic model was established, and then parameters of this model were identified by MATLAB off-line method accordingly. Basing on the identified parameters and using Zieger-Nichols process, a PID controller composed of a discrete model was designed. As the result, the system has accurate dynamic responses to both the transient and the steady states, tested by unit-step, square-wave and sine-wave and also has good position tracking and uniform spraying dosage.
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50

(9781541), Steven Bleakley. "Time frequency analysis of railway wagon body accelerations for a low-power autonomous device." Thesis, 2006. https://figshare.com/articles/thesis/Time_frequency_analysis_of_railway_wagon_body_accelerations_for_a_low-power_autonomous_device/13436474.

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This thesis examines the application of the techniques of Fourier spectrogram and wavelet analysis to a low power embedded microprocessor application in a novel railway and rollingstock monitoring system. The safe and cost effective operation of freight railways is limited by the dynamic performance of wagons running on track. A monitoring system has been proposed comprising of low cost wireless sensing devices, dubbed "Health Cards", to be installed on every wagon in the fleet. When marshalled into a train, the devices would sense accelerations and communicate via radio network to a master system in the locomotive. The integrated system would provide online information for decision support systems. Data throughput was heavily restricted by the network architecture, so significant signal analysis was required at the device level. An electronics engineering team at Central Queensland University developed a prototype Health Card, incorporating a 27MHz microcontroller and four dual axis accelerometers. A sensing arrangement and online analysis algorithms were required to detect and categorise dynamic events while operating within the constraints of the system. Time-frequency analysis reveals the time varying frequency content of signals, making it suitable to detect and characterise transient events. With efficient algorithms such as the Fast Fourier Transform, and Fast Wavelet Transform, time-frequency analysis methods can be implemented on a low power, embedded microcontroller. This thesis examines the application of time-frequency analysis techniques to wagon body acceleration signals, for the purpose of detecting poor dynamic performance of the wagon-track system. The Fourier spectrogram is implemented on the Health Card prototype and demonstrated in the laboratory. The research and algorithms provide a foundation for ongoing development as resources become available for system testing and validation.
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