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Dissertations / Theses on the topic 'Microprocessors Metal oxide semiconductors, Complementary'

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1

Correll, Jeffrey. "The design and implementation of an 8 bit CMOS microprocessor /." Online version of thesis, 1992. http://hdl.handle.net/1850/11649.

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2

Al-Ahmadi, Ahmad Aziz. "Complementary orthogonal stacked metal oxide semiconductor a novel nanoscale complementary metal oxide semiconductor architecture /." Ohio : Ohio University, 2006. http://www.ohiolink.edu/etd/view.cgi?ohiou1147134449.

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3

Gurcan, Zeki B. "0.18 [mu]m high performance CMOS process optimization for manufacturability /." Online version of thesis, 2005. http://hdl.handle.net/1850/5197.

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4

Wu, Ting. "Design of terabits/s CMOS crossbar switch chip /." View Abstract or Full-Text, 2003. http://library.ust.hk/cgi/db/thesis.pl?ELEC%202003%20WU.

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Thesis (M. Phil.)--Hong Kong University of Science and Technology, 2003.
Includes bibliographical references (leaves 100-105). Also available in electronic version. Access restricted to campus users.
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5

Huang, Amy. "On the plasma induced degradation of organosilicate glass (OSG) as an interlevel dielectric for sub 90 nm CMOS /." Online version of thesis, 2008. http://hdl.handle.net/1850/5899.

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6

Csutak, Sebastian Marius. "Optical receivers and photodetectors in 130nm CMOS technology." Access restricted to users with UT Austin EID Full text (PDF) from UMI/Dissertation Abstracts International, 2001. http://wwwlib.umi.com/cr/utexas/fullcit?p3036588.

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7

Hildreth, Scott A. "Statistical SPICE parameter extraction for an N-Well CMOS process /." Online version of thesis, 1995. http://hdl.handle.net/1850/12177.

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8

Upadhyaya, Parag. "High IIP2 CMOS doubly balanced quadrature sub-harmonic mixer for 5 GHz direct conversion receiver." Online access for everyone, 2005. http://www.dissertations.wsu.edu/Thesis/Spring2005/p%5Fupadhyaya%5F050505.pdf.

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9

Price, David T. "N-Well CMOS process integration /." Online version of thesis, 1992. http://hdl.handle.net/1850/11261.

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10

Shum, Roger Chi Fai Carleton University Dissertation Engineering Electrical. "A timing macro model for performance optimization of CMOS logic circuits." Ottawa, 1992.

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11

Bachelu, Carol R. Carleton University Dissertation Engineering Electrical. "A Topological single-layer routing algorithm and its application to leaf cell synthesis." Ottawa, 1992.

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12

Gajera, Dipesh. "Process costing of microchip." Morgantown, W. Va. : [West Virginia University Libraries], 2006. https://eidr.wvu.edu/etd/documentdata.eTD?documentid=4726.

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Thesis (M.S.)--West Virginia University, 2006.
Title from document title page. Document formatted into pages; contains vii, 92 p. : ill. (some col.). Includes abstract. Includes bibliographical references (p. 85-91).
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13

Wu, Kehuey. "Strain effects on the valence band of silicon piezoresistance in p-type silicon and mobility enhancement in strained silicon pMOSFET /." [Gainesville, Fla.] : University of Florida, 2005. http://purl.fcla.edu/fcla/etd/UFE0008390.

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14

Eken, Yalcin Alper. "High frequency voltage controlled ring oscillators in standard CMOS." Diss., Georgia Institute of Technology, 2004. http://hdl.handle.net/1853/8064.

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15

Kim, Dong-Wook. "CMOS digital circuit test generation for transistor level and gate-level implementation." Diss., Georgia Institute of Technology, 1991. http://hdl.handle.net/1853/13890.

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16

Holman, William Timothy. "A low noise CMOS voltage reference." Diss., Georgia Institute of Technology, 1994. http://hdl.handle.net/1853/14968.

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17

Aquilino, Michael V. "Development of a deep-submicron CMOS process for fabrication of high performance 0.25 um [micron] transistors /." Online version of thesis, 2006. http://hdl.handle.net/1850/5193.

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18

Ng, Wing Lun. "Low-voltage high-frequency CMOS transformer-feedback voltage-controlled oscillators /." View abstract or full-text, 2006. http://library.ust.hk/cgi/db/thesis.pl?ECED%202006%20NG.

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19

Chen, Shoushun. "Time domain CMOS image sensor : from photodetection to on-chip image processing /." View abstract or full-text, 2007. http://library.ust.hk/cgi/db/thesis.pl?ECED%202007%20CHEN.

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20

Wang, Yan. "Predictive boundary point adaptation and vector quantization compression algorithms for CMOS image sensors /." View abstract or full-text, 2007. http://library.ust.hk/cgi/db/thesis.pl?ECED%202007%20WANGY.

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21

Lu, Yuanlin. "Power and performance optimization of static CMOS circuits with process variation." Auburn, Ala., 2007. http://repo.lib.auburn.edu/07M%20Dissertations/LU_YUANLIN_28.pdf.

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22

Zhou, Shun. "Multi-precision reconfigurable multiplier for low power application /." View abstract or full-text, 2008. http://library.ust.hk/cgi/db/thesis.pl?ECED%202008%20ZHOU.

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23

Li, Chunxia, and 李春霞. "A study on gate dielectrics for Ge MOS devices." Thesis, The University of Hong Kong (Pokfulam, Hong Kong), 2010. http://hub.hku.hk/bib/B43703872.

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24

Kwon, Ohsang. "On high performance multiplier design using dynamic CMOS circuits /." Full text (PDF) from UMI/Dissertation Abstracts International, 2000. http://wwwlib.umi.com/cr/utexas/fullcit?p3004310.

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25

Guo, Xiaochuan. "A time-base asynchronous readout cmos image sensor." [Gainesville, Fla.] : University of Florida, 2002. http://purl.fcla.edu/fcla/etd/UFE0000540.

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26

Eken, Yalçin Alper. "High frequency voltage controlled ring oscillators in standard CMOS." Available online, Georgia Institute of Technology, 2004:, 2003. http://etd.gatech.edu/theses/available/etd-06072004-131133/unrestricted/eken%5Fyalcin%5Fa%5F200405%5Fphd.pdf.

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27

Li, Chunxia. "A study on gate dielectrics for Ge MOS devices." Click to view the E-thesis via HKUTO, 2010. http://sunzi.lib.hku.hk/hkuto/record/B43703872.

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28

Li, Xiaoyong. "Low noise design techniques for radio frequency integrated circuits /." Thesis, Connect to this title online; UW restricted, 2004. http://hdl.handle.net/1773/6013.

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29

Henzler, Stephan. "Power management of digital circuits in deep sub-micron CMOS technologies /." [New York, NY] : Springer, 2007. http://www.gbv.de/dms/ilmenau/toc/511998031.PDF.

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30

Sayre, Edward P. "The design, fabrication, and test of a CMOS operational amplifier /." Online version of thesis, 1990. http://hdl.handle.net/1850/11226.

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31

Alexander, Jins Davis Agrawal Vishwani D. "Simulation based power estimation for digital CMOS technologies." Auburn, Ala, 2008. http://hdl.handle.net/10415/1451.

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32

Hamon, Bill. "A 5 GHz digitally controlled synthesizer in 90nm CMOS." Pullman, Wash. : Washington State University, 2009. http://www.dissertations.wsu.edu/Thesis/Spring2009/b_hamon_011109.pdf.

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Thesis (M.S. in electrical engineering)--Washington State University, May 2009.
Title from PDF title page (viewed on July 15, 2009). "School of Electrical Engineering and Computer Science." Includes bibliographical references (p. 83-88).
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33

Fang, Sher Jiun. "Complementary metal-oxide-semiconductor frequency conversion techniques for wideband code division multiple access /." Thesis, Connect to this title online; UW restricted, 2003. http://hdl.handle.net/1773/6114.

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34

Liu, Kou-chen. "Si1-xGex/Si vertical MOSFETs and sidewall strained Si devices : design and fabrication /." Digital version accessible at:, 1999. http://wwwlib.umi.com/cr/utexas/main.

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35

Wu, Xu Sheng. "Three dimensional multi-gates devices and circuits fabrication, characterization, and modeling /." View abstract or full-text, 2005. http://library.ust.hk/cgi/db/thesis.pl?ELEC%202005%20WUX.

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36

Modzelewski, Kenneth Paul. "DC parameter extraction technique for independent double gate MOSFETs a thesis presented to the faculty of the Graduate School, Tennessee Technological University /." Click to access online, 2009. http://proquest.umi.com/pqdweb?index=11&did=1759989211&SrchMode=1&sid=1&Fmt=6&VInst=PROD&VType=PQD&RQT=309&VName=PQD&TS=1250600320&clientId=28564.

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37

Khan, Shamsul Arefin. "Deep sub-micron MOS transistor design and manufacturing sensitivity analysis /." Digital version accessible at:, 1999. http://wwwlib.umi.com/cr/utexas/main.

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38

Tabler, John A. "An integrated adaptive bias solution for zero passive component count high-performance mixed-signal ICs." Diss., Georgia Institute of Technology, 1997. http://hdl.handle.net/1853/13339.

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39

Lee, Myunghee. "A quasi-monolithic optical receiver using a standard digital CMOS technology." Diss., Georgia Institute of Technology, 1996. http://hdl.handle.net/1853/14720.

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40

Balachandran, Ganesh Kumar. "A switched-current filter in digital-CMOS technology with low charge-injection errors." Diss., Georgia Institute of Technology, 2001. http://hdl.handle.net/1853/15405.

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41

Mandhanya, Saurabh. "Single-ended 16x8 Gbps data bus in 90nm CMOS." Pullman, Wash. : Washington State University, 2009. http://www.dissertations.wsu.edu/Thesis/Fall2009/s_mandhanya_081909.pdf.

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Thesis (M.S. in electrical engineering)--Washington State University, December 2009.
Title from PDF title page (viewed on Jan. 21, 2010). "School of Electrical Engineering and Computer Science ." Includes bibliographical references (p. 73-75).
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42

Wong, Wing Kei. "A CMOS image rejection mixer for cable-TV tuner using switched-capacitor Hilbert transformer /." View abstract or full-text, 2004. http://library.ust.hk/cgi/db/thesis.pl?ELEC%202004%20WONG.

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Thesis (M. Phil.)--Hong Kong University of Science and Technology, 2004.
Includes bibliographical references (leaves 78-79). Also available in electronic version. Access restricted to campus users.
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43

Chan, Wan Tim. "CMOS-compatible zero-mask one time programmable (OTP) memory design /." View abstract or full-text, 2008. http://library.ust.hk/cgi/db/thesis.pl?ECED%202008%20CHANW.

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44

Hirschman, Karl D. "Process development of an analog/digital mixed-mode BiCMOS system at RIT /." Online version of thesis, 1992. http://hdl.handle.net/1850/11238.

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45

Guidash, R. Michael. "Development of a modular 2-micron BiCMOS process from an existing 2-micron n-well CMOS process /." Online version of thesis, 1991. http://hdl.handle.net/1850/11234.

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46

Ting, Goodwin. "An integrated BiCMOS driver chip for medium power applications /." Online version of thesis, 1991. http://hdl.handle.net/1850/11291.

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47

Ramirez, Ortiz Rolando Carleton University Dissertation Engineering Electrical. "Technology mapping algorithms for CMOS dynamic logic circuits." Ottawa, 1992.

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48

Guan, Bingzhong. "Automatic layout generation of static CMOS combinational cells and blocks /." Thesis, Connect to this title online; UW restricted, 1996. http://hdl.handle.net/1773/6059.

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49

Vemuri, Venkata Rama Sesha Ravi Kumar. "Fabrication and characterization of zirconium oxide thin films." To access this resource online via ProQuest Dissertations and Theses @ UTEP, 2009. http://0-proquest.umi.com.lib.utep.edu/login?COPT=REJTPTU0YmImSU5UPTAmVkVSPTI=&clientId=2515.

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50

Deshpande, Sandeep. "A cost quality model for CMOS IC design." Thesis, This resource online, 1994. http://scholar.lib.vt.edu/theses/available/etd-12042009-020251/.

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