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1

inc, Motorola. M68HC11 reference manual. Phoenix, Ariz: Motorola, 1990.

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2

Bernstein, Kerry. SOI circuit design concepts. Boston: Kluwer Academic Publishers, 2000.

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3

Zhao, Yi. Wafer level reliability of advanced CMOS devices and processes. New York: Nova Science Publishers, 2008.

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4

Lancaster, Don. CMOS cookbook. 2nd ed. Indianapolis, Ind: H.W. Sams, 1988.

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5

M, Berlin Howard, ed. CMOS cookbook. 2nd ed. Boston: Newnes, 1997.

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6

Nicollian, E. H. MOS (metal oxide semiconductor) physics and technology. Hoboken, N.J: Wiley-Interscience, 2003.

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7

Pfaffli, Paul. Characterisation of degradation and failure phenomena in MOS devices. Konstanz [Germany]: Hartung-Gorre, 1999.

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8

Sato, Norio. Electrochemistry at metal and semiconductor electrodes. Amsterdam: Elsevier, 1998.

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9

F, Hawkins Charles, ed. CMOS electronics: How it works, how it fails. New York: IEEE Press, 2004.

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10

Helms, Harry L. High-speed (HC/HCT) CMOS guide. Englewood Cliffs, N.J: Prentice Hall, 1989.

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11

Kwon, Min-jun. CMOS technology. Hauppauge, N.Y: Nova Science Publishers, 2010.

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12

Shoji, Masakazu. CMOS digital circuit technology. Englewood Cliffs, N.J: Prentice Hall, 1988.

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13

Grabinski, Władysław, and Thomas Gneiting. Power/HVMOS devices compact modeling. Dordrecht: Springer, 2010.

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14

Majkusiak, Bogdan. Bardzo cienki tlenek bramkowy w tranzystorze MOS--konsekwencje dla działania i modelowania. Warszawa: Wydawnictwa Politechniki Warszawskiej, 1991.

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15

Shriram, Ramanathan, Symposium J, "Materials and Devices for Beyond CMOS Scaling" (2010 : San Francisco, Calif.), and Materials Research Society, eds. Materials and devices for end-of-roadmap and beyond CMOS scaling: Symposium held April 5-9, 2010, San Francisco, California. Warrendale, Pa: Materials Research Society, 2010.

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16

J, Branning D., ed. Experiments in CMOS technology. Blue Ridge Summit, PA: Tab Books, 1988.

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17

(Firm), Signetics. High-speed CMOS data manual. Sunnyvale, Calif: Signetics Corp., 1988.

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18

Minoru, Fujishima, ed. Design and modeling of millimeter-wave CMOS circuits for wireless transceivers: Era of sub-100nm technology. Dordrecht: Springer Science+Business Media, 2008.

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19

(Firm), Signetics. High-speed CMOS data manual. Sunnyvale, Calif: Signetics Corp., 1988.

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20

Yusuf, Leblebici, ed. CMOS digital integrated circuits: Analysis and design. 2nd ed. Boston, MA: McGraw-Hill, 1998.

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21

Kang, Sung-Mo. CMOS digital integrated circuits: Analysis and design. 2nd ed. Boston, Mass: McGraw-Hill, 1999.

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22

Yusuf, Leblebici, ed. CMOS digital integrated circuits: Analysis and design. 3rd ed. Boston: McGraw-Hill, 2003.

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23

Kang, Sung-Mo. CMOS digital integrated circuits: Analysis and design. New York: McGraw-Hill, 1996.

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24

Rumak, N. V. Sistema kremniĭ--dvuokisʹ kremnii͡a︡ v MOP-strukturakh. Minsk: "Nauka i tekhnika", 1986.

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25

Peluso, Vincenzo. Design of low-voltage low-power CMOS Delta-Sigma A/D converters. Boston: Kluwer Academic Publishers, 1999.

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26

International, Symposium on Advanced Gate Stack Source/Drain and Channel Engineering for Si-based CMOS (2nd 2006 Cancún Mexico). Advanced gate stack, source/drain, and channel engineering for Si-based CMOS 2: New materials, processes and equipment. Pennington, NJ: Electrochemical Society, 2006.

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27

Shoji, Masakazu. CMOS digital circuit technology. New Jersey: Prentice-Hall International, 1988.

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28

CMOS digital circuit technology. Englewood Cliffs, N.J: Prentice Hall, 1987.

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29

Latchup in CMOS technology: The problem and its cure. Boston: Kluwer Academic Publishers, 1986.

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30

Bentarzi, Hamid. Transport in Metal-Oxide-Semiconductor Structures: Mobile Ions Effects on the Oxide Properties. Berlin, Heidelberg: Springer-Verlag Berlin Heidelberg, 2011.

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31

Meeting, Materials Research Society, and Symposium C, "CMOS Gate-Stack Scaling-- Materials, Interfaces and Reliability Implications" (2009 : San Francisco, Calif.), eds. CMOS gate-stack scaling-- materials, interfaces and reliability implications: Symposium held April 14-16, 2009, San Francisco, california, U.S.A. Warrendale, Pa: Materials Research Society, 2009.

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32

Klar, Heinrich. Integrierte digitale Schaltungen MOS/BICMOS. 2nd ed. Berlin: Springer, 1996.

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33

Kursun, Volkan. Multiple supply and threshold voltage CMOS circuits. Chichester, England: John Wiley, 2006.

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34

Marston, R. M. Modern CMOS circuits manual. 2nd ed. Oxford: Newnes, 1996.

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35

Loeliger, Teddy. Large-area photosensing in CMOS. Konstanz: Hartung-Gorre, 2001.

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36

Kuo, James B. CMOS digital IC. Taipei: McGraw-Hill, Inc., 1996.

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37

Bhushan, Manjul, and Mark B. Ketchen. CMOS Test and Evaluation: A Physical Perspective. Springer, 2016.

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38

CMOS Test and Evaluation: A Physical Perspective. Springer, 2014.

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39

Bernstein, Kerry, and Norman J. Rohrer. SOI Circuit Design Concepts. Springer, 2000.

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40

Pearton, Stephen J., Chennupati Jagadish, and Bengt G. Svensson. Oxide Semiconductors. Elsevier Science & Technology Books, 2013.

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41

Wolfgang, Nebel, Mermet Jean P, North Atlantic Treaty Organization. Scientific Affairs Division., and NATO Advanced Study Institute on Low Power Design in Deep Submicron Electronics (1996 : Il Ciocco, Italy), eds. Low power design in deep submicron electronics. Dordrecht: Kluwer Academic Publishers, 1997.

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42

Oxide Semiconductors: Volume 1633. Materials Research Society, 2014.

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43

Nanostructured Semiconductors. Elsevier Science & Technology, 2018.

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44

Demkov, Alexander A., and Agham B. Posadas. Integration of Functional Oxides with Semiconductors. Springer, 2014.

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45

Zhang, Jing. Generation of substrate bias and current sources in CMOS technology. 1995.

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46

Lim, Wei Tjan (Richard). Suppression of substrate noise in a mixed-signal CMOS intergrated circuit. 1996.

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47

Gneiting, Thomas, and Wladyslaw Grabinski. Power/Hvmos Devices Compact Modeling. Springer, 2010.

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48

Gneiting, Thomas, and Wladyslaw Grabinski. POWER/HVMOS Devices Compact Modeling. Springer, 2014.

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49

Milne, David. Mos: Design and Manufacture. Edinburgh University Press, 1988.

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50

G, Einspruch Norman, and Gildenblat Gennady Sh, eds. Advanced MOS device physics. San Diego: Academic Press, 1989.

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