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Journal articles on the topic 'Mixed signal circuits'

Author: Grafiati

Published: 4 June 2021

Last updated: 30 July 2024

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1

Alt, Samantha, Malgorzata Marek-Sadowska, and Li C. Wang. "Circuit Partitioning for Behavioral Full Chip Simulation Modeling of Analog and Mixed Signal Circuits." International Journal of Modeling and Optimization 4, no. 1 (2014): 74–80. http://dx.doi.org/10.7763/ijmo.2014.v4.350.

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2

DJAHANSHAHI, HORMOZ, MAJID AHMADI, GRAHAM A. JULLIEN, and WILLIAM C. MILLER. "NEURAL NETWORK INTEGRATED CIRCUITS WITH SINGLE-BLOCK MIXED SIGNAL ARRAYS." Journal of Circuits, Systems and Computers 08, no. 05n06 (1998): 589–604. http://dx.doi.org/10.1142/s0218126698000377.

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This paper discusses the design and implementation of a family of mixed-signal neural network integrated circuits for general and application-specific purposes. Regular Arrays of a nonlinearly-loaded multiplier block form the core of multi-layer neural networks. Input-output circuitry and network size, however, vary depending on design applications. Salient features of the present architecture, such as modularity and reduced interconnection problems and areas are highlighted and circuit design and improvements are presented for its universal building block. Other design issues such as supply v

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3

Strle, Drago, та Janez Trontelj. "On Self-Aware Mixed-Signal Systems Based on S-Δ ADC". International Journal of Embedded and Real-Time Communication Systems 3, № 2 (2012): 92–110. http://dx.doi.org/10.4018/jertcs.2012040105.

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In this paper the authors discuss the issues related to the self-awareness of high-resolution, mixed-signal circuits and systems, based on S-? ADC, which is the most important and sensitive module and the key element for analogue to digital conversion. The basic methodology and framework for improving the self-awareness of such systems are presented. The methodology is based on efficient real-time measurements of a high-resolution, mixed-signal system using pseudo random signal source, real-time calculation of a distance between responses, the possibility to adapt measured circuit to minimize

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4

Chen-Yang Pan and Kwang-Ting Cheng. "Pseudorandom testing for mixed-signal circuits." IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 16, no. 10 (1997): 1173–85. http://dx.doi.org/10.1109/43.662678.

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5

Li, Bo, and Guoyong Shi. "A Native SPICE Implementation of Memristor Models for Simulation of Neuromorphic Analog Signal Processing Circuits." ACM Transactions on Design Automation of Electronic Systems 27, no. 1 (2022): 1–24. http://dx.doi.org/10.1145/3474364.

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Since the memristor emerged as a programmable analog storage device, it has stimulated research on the design of analog/mixed-signal circuits with the memristor as the enabler of in-memory computation. Due to the difficulty in evaluating the circuit-level nonidealities of both memristors and CMOS devices, SPICE-accuracy simulation tools are necessary for perfecting the art of neuromorphic analog/mixed-signal circuit design. This article is dedicated to a native SPICE implementation of the memristor device models published in the open literature and develops case studies of applying such a circ

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6

HOLMAN, W. T. "RADIATION-TOLERANT DESIGN FOR HIGH PERFORMANCE MIXED-SIGNAL CIRCUITS." International Journal of High Speed Electronics and Systems 14, no. 02 (2004): 353–66. http://dx.doi.org/10.1142/s0129156404002405.

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Modern semiconductor processes can provide significant intrinsic hardness against radiation effects in digital and analog circuits. Current design techniques using commercial processes for radiation-tolerant integrated circuits are summarized, with an emphasis on their application in high performance mixed-signal circuits and systems. Examples of "radiation hardened by design" (RHBD) methodologies are illustrated for reducing the vulnerability of circuits and components to total dose, single-event, and dose-rate effects.

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7

ESMAILI, ARASH, ABDOLLAH KHOEI, and KHAYROLLAH HADIDI. "A HIGH SPEED AND COMPACT MIXED-SIGNAL CMOS FUZZIFIER." Journal of Circuits, Systems and Computers 15, no. 05 (2006): 659–69. http://dx.doi.org/10.1142/s0218126606003283.

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A novel high speed linear tunable transconductor suitable for analog and mixed-signal fuzzy circuits operating in current mode is proposed. Using this OTA, we construct a high speed fuzzifier and implement trapezoidal/triangular functions with all parameters (slope, width, and position) independently and continuously tunable, and excellent for low voltage applications. Computer simulations verify the performance of this circuit, showing high speed (up to 100 MHz) and a high support range (up to 2.5 V).

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8

Dove, Lewis. "Multi-Layer Ceramic Packaging for High Frequency Mixed-Signal VLSI ASICS." Journal of Microelectronics and Electronic Packaging 6, no. 1 (2009): 38–41. http://dx.doi.org/10.4071/1551-4897-6.1.38.

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Mixed-signal Application Specific Integrated Circuits (ASICs) have traditionally been used in test and measurement applications for a variety of functions such as data converters, pin electronics circuitry, drivers, and receivers. Over the past several years, the complexity, power density, and bandwidth of these chips has increased dramatically. This has necessitated dramatic changes in the way these chips have been packaged. As the chips have become true VLSI (Very Large Scale Integration) ICs, the number of I/Os have become too large to interconnect with wire bonds. Thus, it has become neces

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9

Quan, Jiale, Zhen Liu, Bo Li, Chuanbin Zeng, and Jiajun Luo. "55 nm CMOS Mixed-Signal Neuromorphic Circuits for Constructing Energy-Efficient Reconfigurable SNNs." Electronics 12, no. 19 (2023): 4147. http://dx.doi.org/10.3390/electronics12194147.

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The development of brain-inspired spiking neural networks (SNNs) has great potential for neuromorphic edge computing applications, while challenges remain in optimizing power-efficiency and silicon utilization. Neurons, synapses and spike-based learning algorithms form the fundamental information processing mechanism of SNNs. In an effort to achieve compact and biologically plausible SNNs while restricting power consumption, we propose a set of new neuromorphic building circuits, including an analog Leaky Integrate-and-Fire (LIF) neuron circuit, configurable synapse circuits and Spike Driven S

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10

Kledrowetz, Vilem, Roman Prokop, Lukas Fujcik, Michal Pavlik, and Jiří Háze. "Low-power ASIC suitable for miniaturized wireless EMG systems." Journal of Electrical Engineering 70, no. 5 (2019): 393–99. http://dx.doi.org/10.2478/jee-2019-0071.

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Abstract Nowadays, the technology advancements of signal processing, low-voltage low-power circuits and miniaturized circuits have enabled the design of compact, battery-powered, high performance solutions for a wide range of, particularly, biomedical applications. Novel sensors for human biomedical signals are creating new opportunities for low weight wearable devices which allow continuous monitoring together with freedom of movement of the users. This paper presents the design and implementation of a novel miniaturized low-power sensor in integrated circuit (IC) form suitable for wireless e

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11

Deeb, Ali, Abdalrahman Ibrahim, Mohamed Salem, et al. "A Robust Automated Analog Circuits Classification Involving a Graph Neural Network and a Novel Data Augmentation Strategy." Sensors 23, no. 6 (2023): 2989. http://dx.doi.org/10.3390/s23062989.

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Analog mixed-signal (AMS) verification is one of the essential tasks in the development process of modern systems-on-chip (SoC). Most parts of the AMS verification flow are already automated, except for stimuli generation, which has been performed manually. It is thus challenging and time-consuming. Hence, automation is a necessity. To generate stimuli, subcircuits or subblocks of a given analog circuit module should be identified/classified. However, there currently needs to be a reliable industrial tool that can automatically identify/classify analog sub-circuits (eventually in the frame of

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12

LITOVSKI, VANČO B., MIONA V. ANDREJEVIĆ, PREDRAG M. PETKOVIĆ, and ROBERT I. DAMPER. "ANN APPLICATION TO MODELING OF THE D/A AND A/D INTERFACE FOR MIXED-MODE BEHAVIORAL SIMULATION." Journal of Circuits, Systems and Computers 13, no. 01 (2004): 181–92. http://dx.doi.org/10.1142/s0218126604001325.

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Artificial neural networks are applied for modeling the input and output circuits of the digital part of the digital–analog and analog–digital interface, respectively, in CMOS mixed-mode circuits. The generalization property of the neural networks is exploited to apply the models in a set of previously unknown situations, the most important being loading the model generated from the unloaded circuit. The models developed are applicable in mixed-signal behavioral simulations.

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13

LITTLE, SCOTT, DAVID WALTER, KEVIN JONES, CHRIS MYERS, and ALPER SEN. "ANALOG/MIXED-SIGNAL CIRCUIT VERIFICATION USING MODELS GENERATED FROM SIMULATION TRACES." International Journal of Foundations of Computer Science 21, no. 02 (2010): 191–210. http://dx.doi.org/10.1142/s0129054110007209.

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Verification of analog/mixed-signal (AMS) circuits is complicated by the difficulty of obtaining circuit models at suitable levels of abstraction. We propose a method to automatically generate abstract models suitable for formal verification and system-level simulation from transistor-level simulation traces. This paper discusses the application of the proposed methodology to a switched capacitor integrator and PLL phase detector.

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14

Pouros, S. P., V. D. Vassios, and D. K. Papakostas. "FPGA - Based Mixed - Signal Circuits Testing System Implementation." Journal of Engineering Science and Technology Review 9, no. 6 (2016): 131–34. http://dx.doi.org/10.25103/jestr.096.19.

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15

Chen, Kevin Jing, and Alex Man Ho Kwan. "Device Technology for GaN Mixed-Signal Integrated Circuits." Japanese Journal of Applied Physics 52, no. 11S (2013): 11NH05. http://dx.doi.org/10.7567/jjap.52.11nh05.

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16

Li, Peng. "The Art of Certifying Analog/Mixed-Signal Circuits." IEEE Design & Test 32, no. 1 (2015): 79–80. http://dx.doi.org/10.1109/mdat.2014.2370852.

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17

Maler, Oded, and Dejan Ničković. "Monitoring properties of analog and mixed-signal circuits." International Journal on Software Tools for Technology Transfer 15, no. 3 (2012): 247–68. http://dx.doi.org/10.1007/s10009-012-0247-9.

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18

Roberts, G. W., and B. Dufort. "Making complex mixed-signal telecommunication integrated circuits testable." IEEE Communications Magazine 37, no. 6 (1999): 90–96. http://dx.doi.org/10.1109/35.769280.

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19

Thiede, A., Zhi-Gong, M. Schlechtweg, et al. "Mixed signal integrated circuits based on GaAs HEMTs." IEEE Transactions on Very Large Scale Integration (VLSI) Systems 6, no. 1 (1998): 6–17. http://dx.doi.org/10.1109/92.661240.

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20

Guang, Yang, Bin Yu, and Huang Hai. "Design of a High Performance CMOS Bandgap Voltage Reference." Advanced Materials Research 981 (July 2014): 90–93. http://dx.doi.org/10.4028/www.scientific.net/amr.981.90.

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Bandgap voltage reference, to provide a temperature and power supply insensitive output voltage, is a very important module in the analog integrated circuits and mixed-signal integrated circuits. In this paper, a high performance CMOS bandgap with low-power consumption has been designed. It can get the PTAT (Proportional to absolute temperature) current, and then get the reference voltage. Based on 0.35μm CMOS process, using HSPICE 2008 software for circuit simulation, the results showed that , when the temperature changes from -40 to 80 °C, the proposed circuit’s reference voltage achieve to

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21

NICODIMUS, R. A. "Active Shield Circuit for Digital Noise Suppression in Mixed-Signal Integrated Circuits." IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences E88-A, no. 2 (2005): 438–43. http://dx.doi.org/10.1093/ietfec/e88-a.2.438.

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22

Al-Qutayri, Mahmoud A., and Peter R. Shepherd. "Application of Dynamic Supply Current Monitoring to Testing Mixed-Signal Circuits." VLSI Design 5, no. 3 (1997): 223–40. http://dx.doi.org/10.1155/1997/47423.

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This paper applies the time-domain testing technique and compares the effectiveness of transient voltage and dynamic power supply current measurements in detecting faults in CMOS mixed-signal circuits. The voltage and supply current (iDDT) measurements are analyzed by three methods to detect the presence of a fault, and to establish which measurement achieves higher confidence in the detection. Catastrophic, soft and stuck-at single fault conditions were introduced to the circuit-under-test (CUT). The time-domain technique tests a mixed-signal CUT in a unified fashion, thereby eliminating the

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23

Siddesh, K. B., S. Roopa, Parveen B. A. Farzana, and T. Tanuja. "Design of duty cycle correction circuit using ASIC implementation for high speed communication." i-manager’s Journal on Electronics Engineering 13, no. 3 (2023): 33. http://dx.doi.org/10.26634/jele.13.3.19969.

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This research proposed an accurate Duty Cycle Correction (DCC) circuit for high-frequency systems with high measurement accuracy. It is a crucial component of Very Large Scale Integration (VLSI) circuits and is applied as a percentage of the measured average power of a modulated signal to obtain the signal power. This circuit uses two stages of correction, with the first stage performing course correction and the second stage performing fine corrections. This allows the power to be determined during the pulse given the measurement of the average power of a modulated signal with a known duty cy

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24

LIU, YUYU, JINGUO QUAN, HUAZHONG YANG, and HUI WANG. "MOS CURRENT MODE LOGIC CIRCUITS: DESIGN CONSIDERATION IN HIGH-SPEED LOW-POWER APPLICATIONS AND ITS FUTURE TREND, A TUTORIAL." International Journal of High Speed Electronics and Systems 15, no. 03 (2005): 599–614. http://dx.doi.org/10.1142/s0129156405003351.

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In this paper, a logic style that is becoming increasingly popular is presented, which is called MOS Current Mode Logic (MCML). MCML is a novel and useful logic style for high-speed, low-power and mixed-signal applications. Its high-speed switching, low supply voltage and reduced output voltage swing contribute to its high performance, low power dissipation, and low noise features. MCML circuits are compared to several other logic styles, such as conventional static CMOS, dynamic logic, and traditional emitter coupled logic (ECL) in terms of power, delay and common mode noise immunity. MCML ci

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25

Hejn, K., and A. Pacut. "Statistical analysis of autoscaling feedback in mixed-signal circuits." IEEE Transactions on Instrumentation and Measurement 46, no. 4 (1997): 913–17. http://dx.doi.org/10.1109/19.650799.

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26

Walter, David, Scott Little, Chris Myers, Nicholas Seegmiller, and Tomohiro Yoneda. "Verification of Analog/Mixed-Signal Circuits Using Symbolic Methods." IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 27, no. 12 (2008): 2223–35. http://dx.doi.org/10.1109/tcad.2008.2006159.

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27

Bell, I. M., S. J. Spinks, and J. Machado da Silva. "Supply current test of analogue and mixed signal circuits." IEE Proceedings - Circuits, Devices and Systems 143, no. 6 (1996): 399. http://dx.doi.org/10.1049/ip-cds:19960903.

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28

Hatzopoulos, A. A., S. Siskos, and Th Laopoulos. "Current conveyor based test structures for mixed-signal circuits." IEE Proceedings - Circuits, Devices and Systems 144, no. 4 (1997): 213. http://dx.doi.org/10.1049/ip-cds:19971212.

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29

Bello, D. S. S., R. Tangelder, and H. Kerkhoff. "Modeling a verification test system for mixed-signal circuits." IEEE Design & Test of Computers 18, no. 1 (2001): 63–71. http://dx.doi.org/10.1109/54.902823.

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30

Zhou, Xun, and Xiao Li Wang. "Research on Fault Diagnosis Methods for Mixed-Signal Circuits." Applied Mechanics and Materials 313-314 (March 2013): 1239–42. http://dx.doi.org/10.4028/www.scientific.net/amm.313-314.1239.

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In terms of the developing actuality of mixed-signal circuits, several familiar diagnosis methods are introduced in the paper including the basis principle, the merits and demerits for each method. At the same time, the design for testability based on Boundary scan is discussed. At last, the developing trends of this field is predicted.

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31

Makie-Fukuda, K., T. Kikuchi, T. Matsuura, and M. Hotta. "Measurement of digital noise in mixed-signal integrated circuits." IEEE Journal of Solid-State Circuits 30, no. 2 (1995): 87–92. http://dx.doi.org/10.1109/4.341734.

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32

Fan, Chuchu, Yu Meng, Jürgen Maier, Ezio Bartocci, Sayan Mitra, and Ulrich Schmid. "Verifying nonlinear analog and mixed-signal circuits with inputs." IFAC-PapersOnLine 51, no. 16 (2018): 241–46. http://dx.doi.org/10.1016/j.ifacol.2018.08.041.

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33

Orcioni, Simone, Giorgio Biagetti, and Massimo Conti. "A Mixed Signal Fuzzy Controller Using Current Mode Circuits." Analog Integrated Circuits and Signal Processing 38, no. 2/3 (2004): 215–31. http://dx.doi.org/10.1023/b:alog.0000011169.98696.87.

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34

Chen, Shen Li, and C. K. Lee. "A Single-Chip Design for the Three-Phase BDCM System." Applied Mechanics and Materials 271-272 (December 2012): 742–46. http://dx.doi.org/10.4028/www.scientific.net/amm.271-272.742.

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In this work, we present a sensorless single-chip design for the three-phase brushless DC motors (BDCM) system, and which is implemented by a 0.35um CMOS process. A mixed-signal IC will be accomplished by the implementation of analog circuit and digital circuit in the same chip. Eventually, this chip system includes an analog circuit (Hall signal amplifier), a digital circuit (logic process block), and a frequency voltage converter (FVC) to complete the control & driving circuits. Experimental results are included to verify the proposed scheme.

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35

Vera Casañas, César William, Thainann Henrique Pereira de Castro, Gabriel Antonio Fanelli de Souza, Robson Luiz Moreno, and Dalton Martini Colombo. "Review of CMOS Currente References." Journal of Integrated Circuits and Systems 17, no. 1 (2022): 1–9. http://dx.doi.org/10.29292/jics.v17i1.592.

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A current reference is able to provide a precise and accurate current for other circuits inside a chip. This type of electronic circuit is employed as a building block in numerous analog and mixed-signal circuits. Moreover, it is a fundamental component of current-mode circuits. This work discusses the basic and essential concepts of designing CMOS integrated current references. A review of conventional topologies is presented, including current mirrors and current references. Temperature dependence is discussed, along with PTAT and CTAT topologies, and some low-power/low-voltage implementatio

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36

Temich, Sebastian, Tomasz Golonek, and Damian Grzechca. "Design an Identification Function to Reduce the Computational Resources on the Testing Process of an Analog Electronic Circuit." Elektronika ir Elektrotechnika 25, no. 3 (2019): 25–33. http://dx.doi.org/10.5755/j01.eie.25.3.23672.

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In modern electronic circuits, imperfectness in the technological process can cause errors in reaching the correct values of the functional parameters. In order to solve this problem, a novel approach of analog and mixed-signal circuit testing methodology is used. The presented approach allows the testing complexity to be reduced and the testing time to be decreased. For this paper, selected signal features were designated from the transient output signal response. Using regression models with the extracted signal features, the functional parameters of a circuit were determined. An evolutionar

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37

Mirković, Dejan D., Predrag M. Petković, Ilija Dimitrijević, and Igor Mirčić. "Operational Transconductance Amplifier in 350nm CMOS technology." Electronics ETF 19, no. 1 (2015): 32. http://dx.doi.org/10.7251/els1519032m.

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This paper presents transistor level design ofoperational transconductance amplifier in CMOS technology.Custom designed, circuit is to be built-in into the mixed-signal,switched capacitor circuit. Amplifier targets relatively high slewrateand moderate open loop gain with megahertz order gainbandwidth.Adopted architecture is discussed appreciatingapplication in switched capacitor circuits. Circuit behavior isexamined through set of simulations. Obtained results confirmeddesired behavior. Target technology process is TSMC 350nm.

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38

Kobayashi, Haruo, and Anna Kuwana. "Study of analog-to-digital mixed integrated circuit configuration using number theory." Impact 2022, no. 3 (2022): 9–11. http://dx.doi.org/10.21820/23987073.2022.3.9.

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Electronic circuits form the basis of much of the technology we use today. Professor Haruo Kobayashi and Assistant Professor Anna Kuwana, Division of Electronics and Informatics, Gunma University, Japan, are utilising classical mathematics, including theorems such as number theory and control theory in their design of circuits that contain elements of analogue signalling. Analogue circuit planning is regarded as an art as these circuits are typically designed based on mature designers' intuition and experiences in a process that is less systematic for coming up with new architectures and more

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39

Hurst, S. L. "Analog signal generation for built-in self-test of mixed-signal integrated circuits." Microelectronics Journal 27, no. 1 (1996): 103–4. http://dx.doi.org/10.1016/s0026-2692(96)90016-6.

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40

da Silva, J. Machado, J. Silva Matos, Ian M. Bell, and Gaynor E. Taylor. "Mixed current/voltage observation towards effective testing of analog and mixed-signal circuits." Journal of Electronic Testing 9, no. 1-2 (1996): 75–88. http://dx.doi.org/10.1007/bf00137566.

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41

Lee, Min Chin, Ming Chia Hsieh, and Chi Jing Hu. "Implementation and Design of High PSRR Low Dropout Regulator." Advanced Materials Research 614-615 (December 2012): 1553–57. http://dx.doi.org/10.4028/www.scientific.net/amr.614-615.1553.

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As the progress with all kinds of mixed-mode signal circuits, the requirements of power management become increasingly stringent. Therefore it takes all kinds of high-performance linear regulator to produce a very clean and stable voltage. Here cascading technique is used to increase the output impedance in this architecture. The output voltage is less susceptible to variation of input voltage, resulting in a clean and stable voltage which is used the operating voltage of internal circuits in a mixed-mode signal integrated circuit chip. This paper using the TSMC 0.35μm CMOS 2P4M process to imp

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42

Kim, Byoungho. "Efficient Signature-Driven Self-Test for Differential Mixed-Signal Circuits." JSTS:Journal of Semiconductor Technology and Science 16, no. 5 (2016): 713–18. http://dx.doi.org/10.5573/jsts.2016.16.5.713.

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43

Zhou, Hongxia, Chiu-Wing Sham, and Hailong Yao. "Revisiting Routability-Driven Placement for Analog and Mixed-Signal Circuits." ACM Transactions on Design Automation of Electronic Systems 23, no. 2 (2018): 1–17. http://dx.doi.org/10.1145/3131849.

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44

Gong, Fang, Sina Basir-Kazeruni, Lei He, and Hao Yu. "Stochastic Behavioral Modeling and Analysis for Analog/Mixed-Signal Circuits." IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 32, no. 1 (2013): 24–33. http://dx.doi.org/10.1109/tcad.2012.2217961.

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45

Gielen, G. G. E., and R. A. Rutenbar. "Computer-aided design of analog and mixed-signal integrated circuits." Proceedings of the IEEE 88, no. 12 (2000): 1825–54. http://dx.doi.org/10.1109/5.899053.

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46

Kobayashi, Haruo, Anna Kuwana, Jianglin Wei, Nobukazu Tsukiji, and Yujie Zhao. "Testing Technologies for Analog/Mixed-Signal Circuits in IoT Era." IEEJ Transactions on Electronics, Information and Systems 141, no. 1 (2021): 1–12. http://dx.doi.org/10.1541/ieejeiss.141.1.

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47

KAKKAR, VIPAN. "PERFORMANCE ANALYSIS OF CMOS FOR HIGH SPEED MIXED SIGNAL CIRCUITS." Journal of Circuits, Systems and Computers 20, no. 06 (2011): 1067–74. http://dx.doi.org/10.1142/s0218126611007761.

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The objective of this paper is to discuss the opportunities of an advanced RFCMOS for millimeter-wave applications based on an assessment of figures of merits including relevant device information. This paper introduces the RF specifications for 45 nm CMOS node and present the evolution of RF-FOMs with gate downscaling over the previous generations. Especially, since 45 nm CMOS is the technology to be available in production, a particular focus on its RF performance for power and bandwidth is given.

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48

Turflinger, T. L. "Single-event effects in analog and mixed-signal integrated circuits." IEEE Transactions on Nuclear Science 43, no. 2 (1996): 594–602. http://dx.doi.org/10.1109/23.490903.

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49

Dermentzoglou, L., Y. Tsiatouhas, and A. Arapoyanni. "A design for testability technique for mixed-signal differential circuits*." Journal of Physics: Conference Series 10 (January 1, 2005): 348–51. http://dx.doi.org/10.1088/1742-6596/10/1/085.

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50

Larsen, T. A. "Mixed signal VLSI wireless design-circuits and systems [Book Review]." IEEE Circuits and Devices Magazine 17, no. 2 (2001): 47–48. http://dx.doi.org/10.1109/mcd.2001.920881.

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