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1
Caglar, Baris. "Millimeter Wave Mmic Amplifier Linearization By Predistortion." Master's thesis, METU, 2007. http://etd.lib.metu.edu.tr/upload/12607951/index.pdf.
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For millimeter wave applications, MMIC is the best contemporary technology. Considering the requirements of the commercial and military applications on amplitude and phase linearity, it is necessary to reduce the nonlinearity of the amplifiers. There are several linearization techniques that are used to reduce the nonlinearity effects. In the context of the thesis, a special analog predistortion technique that is called &ldquo<br>self cancellation scheme&rdquo<br>is used to linearize a 35GHz MMIC amplifier. The amplifier to be linearized is used in the design of the predistorter, that is why it is called self cancellation.
This thesis contain the design of the amplifier, lumped element power divider and combiner circuits, and the complete analog predistortion linearizer. Layouts of linearizer system and its components are prepared and layout effects are taken into account.
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Parks, Gillian. "An expert system for MMIC amplifier design." Thesis, Queen's University Belfast, 1993. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.359119.
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Altuntas, Mehmet. "Mmic Vector Modulator Design." Master's thesis, METU, 2004. http://etd.lib.metu.edu.tr/upload/12605684/index.pdf.
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In this thesis the design of a MMIC vector modulator operating in 9GHz-10GHz band is investigated and performed. Sub-sections of the vector modulator are 4-port (4.8dB) 1200 phase shift relative to the dedicated port power splitter, digitally controlled variable gain amplifier and the in phase power combiner.
Alternative methods are searched in order to implement the structure properly in the given frequency band. The final design is appropriate for MMIC structure.
4-port (4.8dB) 1200 phase shift relative to the dedicated port power splitter is studied. The performance is simulated and optimized first on Microwave Office, then on Advanced Design System (ADS) tools.
Various methods to design a digitally controlled variable gain amplifier are studied. The final topology is simulated and optimized on ADS tool.
An in phase power combiner is designed. The performance of the combiner is simulated and optimized on ADS tool.
Lumped element models are replaced with CASWELL H-40 models to achieve a MMIC structure and a layout is drawn. The finalized vector modulator is simulated and optimized on ADS tool.
Key words: MMIC, Vector Modulator, Digitally Controlled Variable Gain Amplifier, Layout
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Seneviratne, Sashieka. "Efficiency Enhancement of Pico-cell Base Station Power Amplifier MMIC in GaN HFET Technology Using the Doherty Technique." Thèse, Université d'Ottawa / University of Ottawa, 2012. http://hdl.handle.net/10393/23078.
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With the growth of smart phones, the demand for more broadband, data centric technologies are being driven higher. As mobile operators worldwide plan and deploy 4th generation (4G) networks such as LTE to support the relentless growth in mobile data demand, the need for strategically positioned pico-sized cellular base stations known as ‘pico-cells’ are gaining traction. In addition to having to design a transceiver in a much compact footprint, pico-cells must still face the technical challenges presented by the new 4G systems, such as reduced power consumptions and linear amplification of the signals. The RF power amplifier (PA) that amplifies the output signals of 4G pico-cell systems face challenges to minimize size, achieve high average efficiencies and broader bandwidths while maintaining linearity and operating at higher frequencies. 4G standards as LTE use non-constant envelope modulation techniques with high peak to average ratios. Power amplifiers implemented in such applications are forced to operate at a backed off region from saturation. Therefore, in order to reduce power consumption, a design of a high efficiency PA that can maintain the efficiency for a wider range of radio frequency signals is required. The primary focus of this thesis is to enhance the efficiency of a compact RF amplifier suitable for a 4G pico-cell base station. For this aim, an integrated two way Doherty amplifier design in a compact 10mm x 11.5mm monolithic microwave integrated circuit using GaN device technology is presented. Using non-linear GaN HFETs models, the design achieves high effi-ciencies of over 50% at both back-off and peak power regions without compromising on the stringent linearity requirements of 4G LTE standards. This demonstrates a 17% increase in power added efficiency at 6 dB back off from peak power compared to conventional Class AB amplifier performance. Performance optimization techniques to select between high efficiency and high linearity operation are also presented. Overall, this thesis demonstrates the feasibility of an integrated HFET Doherty amplifier for LTE band 7 which entails the frequencies from 2.62-2.69GHz. The realization of the layout and various issues related to the PA design is discussed and attempted to be solved.
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Gholami, Mehrdad. "A C-Band Compact High Power Active Integrated Phased Array Transmitter Module Using GaN Technology." Thesis, Université d'Ottawa / University of Ottawa, 2017. http://hdl.handle.net/10393/36045.
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In this research, an innovative phased array antenna module is proposed to implement a high-power, high-efficient and compact C-band radio transmitter. The module configuration, which can be integrated into front-end circuits, was designed as planar layers stacked up together to form a metallic cube. The layers were fabricated by using a Computer Numerical Control (CNC) milling machine and screwed together. The antenna parts and the amplifier units were designed at two opposite sides of the cube to spread the dissipated heat produced by the amplifiers and act as a heat sink. Merging the antenna parts with the amplifier circuits offers additional advantages such as decreasing the total power loss, mass, and volume of the transmitter modules by removing the extra power divider and combiner networks and connectors between them as well as reducing the total signal path.
To achieve both a maximum possible radiation efficiency and high directivity, the aperture waveguide antenna was selected as the array element. Four antenna elements have been located in a cavity to be excited equally and the cavity is excited through a slot on its underside so a compact subarray is formed. Antenna measurements demonstrated a 15.5 dBi gain and 20 dB return loss at 10 % fractional bandwidth centered around 5.8 GHz and with more than 98% radiation efficiency. The total dimensions of the subarray are approximately 8*12*4 cm3.
The outcoming signal from the amplifiers is transferred into the slot exciting the subarray through a microstrip-to-waveguide transition (MWT). A novel and robust MWT structure was designed for the presented application. The MWT was also integrated with a microstrip coupler to monitor the power from the amplifier output. The measured insertion loss of the MWT along with the microstrip coupler was less than 0.25 dB along with more than 20 dB return loss within the same bandwidth of the subarray. The microstrip coupler shows 38 dB of coupling and more than 48 dB of isolation with negligible effects on the amplifier output signal and the insertion/return loss of the MWT.
The amplifier subcomponents consist of power combiners/dividers (PCDs), high power amplifiers (HPAs) and bias circuitry. A Monolithic Microwave Integrated Circuit (MMIC) three-stage HPA was designed in a commercially available 0.15 um AlGaN/GaN HEMT technology provided by National Research Council Canada (NRC) and occupies an area of 4.7*3.7 mm2. To stabilize the HPA, a novel inductive degeneration technique was successfully used. To the best of the author’s knowledge, this is the first time this technique has been used to stabilize HPAs. Careful considerations on input/output impedances of all HEMTs were taken into account to prevent parametric oscillations. Other instability sources, i.e. odd-mode, even-mode, and low frequency (bias circuit) oscillations were also prevented by designing the required stabilization circuits. The electromagnetic simulation of the HPA shows 35 W (45.5 dBm) of saturated output power, 26 dB large signal gain and 29% power added efficiency within the same operating bandwidth as the subarray. The output distortion is less than 27 dB, indicating that the HPA is highly linear. The PCD was designed by utilizing a novel, enhanced configuration of a Gysel structure implemented on Rogers RT-Duroid5880. The insertion loss of the Gysel is less than 0.2 dB while return loss and isolation are greater than 20 dB over the entire bandwidth. The same subarray area (8*12 cm2) has been used for the amplifier circuits and up to eight HPAs can be included in each module. All the above parts of the transmitter module were fabricated and measured, except the MMIC-HPA.
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Shinghal, Priya. "Ultra-broadband GaAs pHEMT MMIC cascode Travelling Wave Amplifier (TWA) design for next generation instrumentation." Thesis, University of Manchester, 2016. https://www.research.manchester.ac.uk/portal/en/theses/ultrabroadband-gaas-phemt-mmic-cascode-travelling-wave-amplifier-twa-design-for-next-generation-instrumentation(37fc42a1-d865-4ee9-bd19-35b5699249b2).html.
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Ultra-broadband Monolithic Microwave Integrated Circuit (MMIC) amplifiers find applications in multi-gigabit communication systems for 5G and millimeter wave measurement instrumentation systems. The aim of the research was to achieve maximum bandwidth of operation of the amplifier from the foundry process used and high reverse isolation ( < -25.0 dB) across the whole bandwidth. To achieve this, several design variations of DC - 110 GHzMMIC Cascode TravellingWave Amplifier (TWA) on 100 nm AlGaAs/GaAs pHEMT process were done for application in next generation instrumentation and high data transfer rate (100 Gb/s) optical modulator systems. The foundry service and device models used for the design are of the WINPP10-10 process from WIN Semiconductor Corp., Taiwan, a commercial and highly stable process. The cut-off frequency ft and maximum frequency of oscillation fmax for this process are 135 GHz and 185 GHz respectively. Thus, the design was aimed at pushing the ultimate limits of operation for this process. The design specifications were targeted to have S21 = 9.0 to 10.0 ± 1.0 dB, S11 & S22 ≤ -10.0 dB and S12 ≤ -25.0 dB in the whole frequency range. In order to achieve the targeted RF performance, it is imperative to have accurate transistor models over the frequency range of operation, transistor configuration mode and operating bias points. Using smaller periphery transistors results in lower extrinsic & intrinsic input and output capacitances that lead to achieving very wide band performance. Thus, device sizes as small as 2x10 μm were used for the design. A cascode topology, which is a series connection of a common-source and common-gate field effect transistor (FET), was used to achieve large bandwidth of operation, high reverse isolation and high input and output impedance. Using very small periphery devices at cascode bias points posed limitation in the design in terms of accuracy of transistor models under these conditions, specifically at high frequencies i.e., above 50 GHz. One of the major systemrequirements for the application of MMIC ultra-broadband amplifiers in instrumentation is to achieve and maintain high reverse isolation (≤ -25.0 dB) over the whole frequency range of operation which cannot be achieved alone by the cascode topology and new design techniques have to be devised. These twomajor challenges, namely high frequency small periphery FET model modification & development and design technique to achieve high reverse isolation in ultra-broadband frequency range have been addressed in this research.
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Sajedin, M., Issa T. Elfergani, Jonathan Rodriguez, Raed A. Abd-Alhameed, M. Fernandez-Barciela, and M. Violas. "Ultra-Compact mm-Wave Monolithic IC Doherty Power Amplifier for Mobile Handsets." MDPI, 2021. http://hdl.handle.net/10454/18600.
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Yes<br>This work develops a novel dynamic load modulation Power Amplifier (PA) circuity that can provide an optimum compromise between linearity and efficiency while covering multiple cellular
frequency bands. Exploiting monolithic microwave integrated circuits (MMIC) technology, a fully integrated 1W Doherty PA architecture is proposed based on 0.1 µm AlGaAs/InGaAs Depletion- Mode (D-Mode) technology provided by the WIN Semiconductors foundry. The proposed wideband DPA
incorporates the harmonic tuning Class-J mode of operation, which aims to engineer the voltage waveform via second harmonic capacitive load termination. Moreover, the applied post-matching technique not only reduces the impedance transformation ratio of the conventional DPA, but also restores its proper load modulation. The simulation results indicate that the monolithic drive load modulation PA at 4 V operation voltage delivers 44% PAE at the maximum output power of 30 dBm at
the 1 dB compression point, and 34% power-added efficiency (PAE) at 6 dB power back-off (PBO). A power gain flatness of around 14 ± 0.5 dB was achieved over the frequency band of 23 GHz to 27 GHz. The compact MMIC load modulation technique developed for the 5G mobile handset occupies the die
area of 3.2.<br>This research was funded by the European Regional Development Fund (FEDER), through COMPETE 2020, POR ALGARVE 2020, Fundação para a Ciência e a Tecnologia (FCT) under i-Five Project (POCI-01-0145-FEDER-030500). This work is also part of the POSITION-II project funded by the ECSEL joint Undertaking under grant number Ecsel-345 7831132-Postitio-II-2017-IA. This work is supported by FCT/MCTES through national funds and when applicable co-funded EU funds under the project UIDB/50008/2020-UIDP/50008/2020. The authors would like to thank the WIN Semiconductors foundry for providing the MMIC GaAs pHEMT PDKs and technical support. This work is supported by the Project TEC2017-88242-C3-2-R- Spanish Ministerio de Ciencia, Innovación e Universidades and EU-FEDER funding.
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Cano, de Diego Juan Luis. "Cryogenic Technology in the Microwave Engineering: Application to MIC and MMIC Very Low Noise Amplifier Design." Doctoral thesis, Universidad de Cantabria, 2010. http://hdl.handle.net/10803/10674.
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Algunas aplicaciones tales como la radio astronomía y las comunicaciones con el espacio profundo requieren receptores muy sensibles. Esta tesis trata sobre la tecnología criogénica aplicada a la ingeniería de microondas y se centra en el diseño de amplificadores de muy bajo ruido tanto en tecnología híbrida (MIC) como monolítica (MMIC). El trabajo cubre un ancho campo de conocimiento desde la fabricación mecánica y la configuración de los sistemas hasta el diseño y medida de las aplicaciones finales. Comenzando con pautas y consejos para diseñar sistemas criogénicos (criostatos) este documento profundiza en la medida de parámetros-S y ruido. El diseño de circuitos criogénicos se inicia con el estudio de los efectos de las bajas temperaturas sobre los transistores y componentes de microondas centrándose en los dispositivos de fosfuro de indio (InP). El conocimiento adquirido en este estudio se aplica al diseño de amplificadores de muy bajo ruido en banda Ka.<br>Some applications such as radio astronomy and deep space communications require very sensitive receivers. This dissertation deals with the cryogenic technology applied to the microwave engineering and focuses on the design of very low noise amplifiers both in hybrid (MIC) and monolithic (MMIC) technologies. The work covers a wide field of knowledge from hardware manufacture and system set up to final applications design and measurement. Starting from guidelines and advices to design cryogenic systems (cryostats) this document goes into S-parameters and noise measurements in deep. The design of cryogenic circuits is initialized with the study of the effect of low temperatures on microwave transistors and components focusing in indium-phosphide (InP) devices. The knowledge gained with this study is applied to the design of very low noise amplifiers in Ka-band.
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Loescher, David. "Use of waveform engineering to stress test, characterise and design a highly efficient MMIC power amplifier." Thesis, Cardiff University, 2018. http://orca.cf.ac.uk/116177/.
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This thesis brings together different areas of waveform engineering in power amplifier research, from load pull and reliability testing through to measuring finished designs. It shows how using all this knowledge together can enable an engineer to start with just a transistor, and progress to a functional design much faster with the use of waveform engineering at every stage. Initially this project looked at expanding the conventional voltage standing wave ratio sweep to address more than the fundamental impedance with static harmonic impedances by including full harmonic impedance sweeps. This showed there were voltage peaking interactions that could potentially cause device failure, these were caused by interactions between the fundamental and harmonic impedances. The next step was to identify the cause of failures that had occurred during voltage standing wave ratio sweeps. This demonstrated the need for waveforms to identify failures caused by peak voltage and/or current. Waveform data can also be used to analyse and compare the different device technologies and analyse their performance, allowing deep insight into the `knee' region of the RF-IV plot, and how it affects performance of a technology using a novel data processing approach. The final use of waveforms in this thesis is at the design stage, where a Continuous Class B design was done on a quasi-MMIC. This design was then fabricated and tested, showing that Continuous Class B and other continuous modes can be used for quasi-MMIC designs at S-band as well as the previously used laminate designs. Another topology that was used in this thesis was Doherty, which has traditionally struggled with bandwidth, but using a novel 50 V GaN FET supplied by Qorvo allowed a more broadband Doherty design to be fabricated.
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Barros, Alexandre Della Santa. "Projeto de osciladores de microondas distribuídos com realimentação reversa." Universidade de São Paulo, 2005. http://www.teses.usp.br/teses/disponiveis/3/3140/tde-28102005-181034/.
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Esta dissertação propõe uma metodologia de projeto de osciladores distribuídos controlados por tensão - DVCO - com realimentação reversa em freqüência de microondas. Estes constituem uma nova classe de osciladores recentemente proposta, a qual é obtida através da realimentação reversa de amplificadores distribuídos e tem como principal vantagem a possibilidade de sintonia em faixa ultra-larga de freqüência. São apresentados os fundamentos teóricos de operação do circuito e é proposta uma extensão da análise linear apresentada na literatura, considerando linhas de transmissão artificiais m-derivadas, a qual permite prever as transcondutâncias mínimas necessárias dos transistores e a freqüência inicial de oscilação. O método de projeto proposto é direcionado a DVCOs com realimentação reversa empregando transistores de efeito de campo dos tipos MESFET (Metal Semiconductor Field Effect Transistor) e PHEMT (Pseudomorfic High Electron Mobility Transistor), bem como ao uso de tecnologia de circuitos híbridos de microondas - MICs, e circuitos integrados monolíticos de microondas - MMICs. A metodologia proposta definiu critérios para implementar a topologia deste circuito através de componentes reais, considerando-se os parasitas associados aos mesmos. Para validação do procedimento de projeto, concebeu-se e simulou-se através do programa ADS da Agilent um oscilador intitulado DVCO 3 GHz, cuja faixa de freqüência especificada estende-se de 1 a 3 GHz e a potência mínima de saída especificada é de 10 dBm. Um protótipo foi construído em circuito híbrido e seus resultados experimentais foram comparados aos simulados. A freqüência de oscilação medida foi de 1,04 GHz a 3,05 GHz e a potência obtida esteve entre 9,8 e 14,3 dBm, apresentando boa concordância com as simulações. O ruído de fase foi medido entre 100 kHz e 1 MHz de distância da portadora, observando-se uma inclinação proporcional a 1/f3. Verificou-se que a diminuição da corrente de polarização Ids dos transistores, através da redução de sua tensão de polarização de porta-fonte Vgs, melhorou o ruído de fase. Na condição de polarização de menor ruído de fase, observaram-se valores entre -84 e -93 dBc/Hz a 100 kHz da portadora.<br>In this dissertation, a design methodology applied to microwave reverse feedback distributed voltage controlled oscillators - DVCO - is proposed. This circuit constitutes a new class of oscillators, obtained from reverse feeding back of the distributed amplifier. The main advantage of this topology is its capacity to achieve ultra-wideband frequency tuning. Circuit theoretical background is presented and an extension of the linear analysis presented in the literature is proposed. It allows predicting transistor minimum transconductances and the oscillation initial frequency, considering m-derived artificial transmission lines. The proposed design method is applicable to reverse feedback DVCOs employing field effect transistors MESFET (Metal Semiconductor Field Effect Transistor) and PHEMT (Pseudomorfic High Electron Mobility Transistor), as well as using MIC (Microwave Integrated Circuits) and MMIC (Monolithic Microwave Integrated Circuits) technology. The proposed methodology defined criterion to employ real components, considering the component parasitics. In order to validate the design method, an oscillator named DVCO 3 GHz was designed and simulated through software Agilent ADS, with specified band from 1 up to 3 GHz and minimum output power of 10 dBm. A prototype was implemented in hybrid circuit technology and the measurements were compared to the simulation results. The measured oscillation frequency varied from 1,04 GHz up to 3,05 GHz and the output power was 9,8 to 14,3 dBm, presenting good agreement with simulations. Phase noise was measured in the range between 100 kHz and 1 MHz shift from carrier; in which it was observed a 1/f3 slope. It was verified that decreasing the transistor bias current Ids through decreasing its gate bias voltage Vgs reduced phase noise. In the biasing condition for lowest phase noise, values between -84 and -93 dBc/Hz at 100 kHz off-set from carrier were measured.
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XU, PENG. "HYBRID X-BAND POWER AMPLIFIER DEVELOPMENT FOR 3D-IC PHASED ARRAY MODULE." University of Cincinnati / OhioLINK, 2003. http://rave.ohiolink.edu/etdc/view?acc_num=ucin1049977754.
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Ayad, Mohammed. "Etude et Conception d’amplificateurs DOHERTY GaN en technologie Quasi - MMIC en bande C." Thesis, Limoges, 2017. http://www.theses.fr/2017LIMO0027.
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Ce travail répond à un besoin industriel accru en termes d’amplification des signaux sur porteuses à enveloppes variables utilisés par les systèmes de télécommunications actuels. Ces signaux disposent d’un fort PAPR et d’une distribution statistique d’enveloppe centrée en-deçà de la valeur crête d’enveloppe. La raison pour laquelle les industriels télécoms requièrent alors des amplificateurs de très fortes puissances de sortie, robustes, fiables et ayant une dépense énergétique optimale le long de la dynamique d’enveloppe associée à un niveau de linéarité acceptable. Ce document expose les résultats d’étude et de réalisation de deux Amplificateurs de Puissance Doherty (APD) à haut rendement encapsulés en boîtiers plastiques QFN. Le premier est un amplificateur Doherty symétrique classique (APD-SE) et le second est un amplificateur à deux entrées RF (APD-DE). Ces démonstrateurs fonctionnant en bande C sont fondés sur l’utilisation de la technologie Quasi-MMIC associant des barrettes de puissance à base des transistors HEMTs AlGaN/GaN sur SiC à des circuits d’adaptation en technologie ULRC. L’approche Quasi-MMIC associée à la solution d’encapsulation plastique QFN permettant une meilleure gestion des comportements thermiques offre des performances électriques similaires à celles de la technologie MMIC avec des coûts et des cycles de fabrication très attractifs. Durant ces travaux, une nouvelle méthode d’évaluation des transistors dédiés à la conception d’amplificateurs Doherty a été développée et mise en oeuvre. L’utilisation intensive des simulations électromagnétiques 2.5D et 3D a permis de bien prendre en compte les effets de couplages entre les différents circuits dans l’environnement du boîtier QFN. Les résultats des tests des amplificateurs réalisés fonctionnant sur une bande de 1GHz ont permis de valider la méthode de conception et ont montré que les concepts avancés associés à l’approche Quasi-MMIC ainsi qu’à des technologies d’encapsulation plastique, peuvent générer des fonctions micro-ondes innovantes. Les caractérisations de l’APD-DE ont relevé l’intérêt inhérent à la préformation des signaux d’excitation et des points de polarisation de chaque étage de l’amplificateur<br>This work responds to an increased industrial need for on carrier signals with variable envelope amplification used by current telecommunications systems. These signals have a strong PAPR and an envelope statistical distribution centred below the envelope peak value, the reason why the telecom industrialists then require a robust and reliable high power amplifiers having an energy expenditure along of the envelope dynamics associated with an acceptable level of linearity. This document presents the results of the study and realization of two, high efficiency, Doherty Power Amplifiers (DPA) encapsulated in QFN plastic packages. The first is a conventional Doherty power Amplifier (DPA-SE) and the second is a dual-input Doherty power amplifier (DPA-DE). These C-band demonstrators are based on the use of Quasi-MMIC technology combining power bars based on the AlGaN/GaN transistors on SiC to matching circuits in ULRC technology. The Quasi-MMIC approach combined with Quasi-MMIC approach combined with QFN plastic package solution for better thermal behaviour management offers electrical performances similar to those of MMIC technology with very attractive coasts and manufacturing cycles. During this work, a new evaluation method for the transistors dedicated to the design of DPA was developed and implemented. The intensive use of 2.5D and 3D electromagnetic simulations made it possible to take into account the coupling effects existing between the different circuits in the QFN package environment. The results of the tests of the amplifiers realised and operating on 1GHz bandwidth validated the design method and showed that the advanced concepts associated with the Quasi-MMIC approach as well as plastic encapsulation technologies can generate innovative microwave functions. The characterizations of the DPA-DE have noted the interest inherent in the preformation of the excitation signals and the bias points of each stage of the amplifier
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Dupuy, Victor. "Conception et réalisation d'amplificateur de puissance MMIC large-bande haut rendement en technologie GaN." Thesis, Bordeaux, 2014. http://www.theses.fr/2014BORD0211/document.
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Ces travaux de thèse se concentrent sur la conception d'amplificateur de puissance MMIC large-bande haut rendement en technologie GaN pour des applications militaires de type radar et guerre électronique. Les objectifs principaux sont de proposer des structures innovantes de combinaison de puissance notamment pour réduire la taille des amplificateurs actuels tout en essayant d'améliorer leur rendement dans le même temps. Pour cela, une partie importante de ces travaux consiste au développement de combineurs de puissance ultra compactes et faibles pertes. Une fois ces combineurs réalisés et mesurés, ils sont intégrés dans des amplificateurs de puissance afin de prouver leur fonctionnalité et les avantages qu'ils apportent. Différents types d'amplificateur tant au niveau de l'architecture que desperformances sont réalisés au cours de ces travaux<br>This work focus on the design of wideband and high efficiency GaN MMIC high power amplifiers for military applications such as radar and electronic warfare. The main objectives consist in finding innovative power combining structures in order to decrease the overall size of amplifiers and increasing their efficiency at the same time. For these matters, an important part of this work consisted in the design and realization of ultra compact and low loss power combiners. Once the combiners realized and measured, they are integrated into power amplifiers to prove their functionality and the advantages they bring. Several kind of amplifiers have been realized whether regrind their architecture or their performances
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Lee, John Joseph. "A distributed amplifier-based active transversal filter MMIC with positive and negative adjustable tap weights for very high-speed lightwave systems." Thesis, National Library of Canada = Bibliothèque nationale du Canada, 2000. http://www.collectionscanada.ca/obj/s4/f2/dsk1/tape4/PQDD_0006/MQ45283.pdf.
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Plet, Sullivan. "Conception d'amplificateurs intégrés de puissance en technologies Silicium pour station de base de la quatrième génération des systèmes de radiocommunications cellulaires." Thesis, Limoges, 2016. http://www.theses.fr/2016LIMO0095/document.
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Ces travaux de recherche concernent les amplificateurs RF de puissance pour stations de base. La technologie actuelle de transistor RF la plus compétitive, le LDMOS, est confrontée à l’augmentation constante du débit et à la concurrence d’autres technologies comme le HEMT GaN. Un autre challenge est l’intégration de l’adaptation de sortie réalisée en dehors du boîtier qui n’est plus compatible avec les futurs standards combinant jusqu’à soixante-quatre amplificateurs de puissance proches les uns des autres.Une première piste envisagée dans cette thèse est le substrat Si à haute résistivité. A partir de simulations puis de mesures sur plaques, l’amélioration du facteur de qualité des éléments passifs a été démontrée mais ces premières investigations ne permettent pas l’intégration de l’adaptation de sortie avec la technologie actuelle bien que les résultats soient très encourageants. Les challenges technologiques de ce nouveau substrat ont mené à considérer la structure différentielle pour les amplificateurs. En plus des avantages connus de cette configuration, nous avons montré que la conception d’un amplificateur de puissance différentiel montre une amélioration importante de la bande instantanée répondant au besoin d’un débit toujours plus élevé. Cette amélioration ne dégrade pas les autres performances en gain, rendement et puissance de sortie. Dans la continuité de cette thèse, les perspectives concernent la conception d’un amplificateur de puissance sur substrat SI à haute résistivité combinée à une structure différentielle qui pourrait permettre une avancée majeure sur toutes les performances tout en gardant l’avantage du faible coût du LDMOS Silicium en comparaison des autres substrats<br>This research concerns the RF power amplifiers for base stations. The current most competitive technology of RF transistor, the LDMOS, faces the constantly increasing data rate and competition from other technologies such as GaN HEMT. Another challenge is the integration of the output matching made outside of the package which is not compatible with future standards combining up to sixty-four power amplifiers close to each other. A first track proposed in this thesis is the high resistivity Si substrate. From simulations and measurements on wafers, improved passive elements quality factor has been demonstrated but these initial investigations do not allow the integration of the output matching with the current technology, although the results are very encouraging. The technological challenges of this new substrate led to consider the differential structure for amplifiers. Besides to the known advantages of this configuration, we have shown that the design of a differential power amplifier shows a significant improvement in the instantaneous band width meeting the need for higher data rate. This improvement does not degrade other performance as gain, efficiency and output power. In continuation of this thesis, the perspective concerns the design of a power amplifier on a high resistivity Si substrate combined with a differential structure that could enable a major advance over all performance while keeping the advantage of low cost of LDMOS silicon compared to other substrates
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Connor, Mark Anthony. "Design of Power-Scalable Gallium Nitride Class E Power Amplifiers." University of Dayton / OhioLINK, 2014. http://rave.ohiolink.edu/etdc/view?acc_num=dayton1405437893.
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Rifi, Mohamed Aziz. "Etude et conception d’un amplificateur de puissance en technologie GaN MMIC fonctionnant en bande K adapté aux systèmes de suivi d’enveloppe." Thesis, Limoges, 2021. http://www.theses.fr/2021LIMO0019.
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Ces travaux de thèse s’intègrent dans le cadre du processus d’amélioration continue de l’efficacité et de la linéarité des amplificateurs de puissance en présence des signaux sur porteuses modulées utilisés par les systèmes de télécommunications modernes.Ces signaux présentent un PAPR élevé et une distribution statistique d’enveloppe centrée en-deçà de la valeur crête d’enveloppe. De ce fait, les amplificateurs de puissance conventionnel (classe AB à polarisation fixe) sont souvent surdimensionnés pour répondre aux besoins des industriels télécoms. La technique de suivi d’enveloppe a été utilisée pour augmenter la PAE le long de l’OBO (10 dB pour LTE) tout en gardant un gain en puissance constant associé à une bonne linéarité en termes de conversion d’AM/AM. Une méthode de conception d’amplificateur de puissance en technologie MMIC fondé sur l’utilisation des HEMTs GaN a été développée et utilisée pour concevoir un AP délivrant une puissance de sortie de 4W et fonctionnant en bande K [17-20GHz]. L’AP réalisé a été ensuite couplé à un modulateur numérique de polarisation de drain. L’ensemble AP et modulateur de polarisation constituant un système de suivi d’enveloppe appelé APSE a été caractérisé en termes d’efficacité et de linéarité en présence de signaux modulés. L’APSE montre des performances très intéressantes comparées à celles obtenue avec un AP à polarisation fixe. En effet à un OBO de l’ordre de 7dB, dans la bande [17-20GHz], la PAE est améliorée de [10-7.5 points]. La PAE moyenne le long de l’OBO varie entre 32 et 36% sur la bande considérée et elle est associée à une EVM variant entre 5 à 1.6% avec une DPD quasi-statique appliquée au signal en bande de base. Les caractérisations de l’APSE ont démontré l’intérêt de l’utilisation des amplificateurs de puissance à suivi d’enveloppe dans les systèmes de télécommunications modernes<br>This thesis work is part of the process of continuous improvement of the efficiency and linearity of power amplifiers in presence of signals on modulated carriers used in modern telecommunications systems. These signals have a high PAPR and a statistical envelope distribution centered below the envelope peak value. As a result, conventional power amplifiers (Class AB fixed bias) are often oversized to meet the needs of the telecom industry. The envelope tracking technique has been used to increase the PAE along the OBO (10 dB for LTE) while maintaining a constant power gain associated to a good linearity in terms of AM/AM conversion. A power amplifier design method in MMIC technology based on the use of GaN HEMTs has been developed and is used to design an APdelivering an output power of 4W and operating in K-band [17-20GHz]. The realized APwas then coupled to a digital drain bias modulator. The APand bias modulator assembly constituting an envelope tracking system called APSE was characterized in terms of efficiency and linearity in presence of modulated signals. The APSE shows very interesting performances compared to those obtained with a fixed bias AP. Indeed, at an OBO of about 7dB, in the [17-20GHz] band, the PAE is improved by [10-7.5]. The average PAE along the OBO varies between 32 and 36% over the considered band and it is associated to an EVM varying between 5 and 1.6% with a quasi-static DPD applied to the baseband signal.The characterizations of APSE have demonstrated the interest of the use of envelope tracking power amplifiers in modern telecommunications systems
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Ahmad, Norhawati Binti. "Modelling and design of Low Noise Amplifiers using strained InGaAs/InAlAs/InP pHEMT for the Square Kilometre Array (SKA) application." Thesis, University of Manchester, 2012. https://www.research.manchester.ac.uk/portal/en/theses/modelling-and-design-of-low-noise-amplifiers-using-strained-ingaasinalasinp-phemt-for-the-square-kilometre-array-ska-application(b2b50fd8-0a13-4f71-b3f0-616ee4b2a82b).html.
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The largest 21st century radio telescope, the Square Kilometre Array (SKA) is now being planned, and the first phase of construction is estimated to commence in the year 2016. Phased array technology, the key feature of the SKA, requires the use of a tremendous number of receivers, estimated at approximately 37 million. Therefore, in the context of this project, the Low Noise Amplifier (LNA) located at the front end of the receiver chain remains the critical block. The demanding specifications in terms of bandwidth, low power consumption, low cost and low noise characteristics make the LNA topologies and their design methodologies one of the most challenging tasks for the realisation of the SKA. The LNA design is a compromise between the topology selection, wideband matching for a low noise figure, low power consumption and linearity. Considering these critical issues, this thesis describes the procedure for designing a monolithic microwave integrated circuit (MMIC) LNA for operation in the mid frequency band (400 MHz to 1.4 GHz) of the SKA. The main focus of this work is to investigate the potential of MMIC LNA designs based on a novel InGaAs/InAlAs/InP pHEMT developed for 1 µm gate length transistors, fabricated at The University of Manchester. An accurate technique for the extraction of empirical linear and nonlinear models for the fabricated active devices has been developed. In addition to the linear and nonlinear model of the transistors, precise models for passive devices have also been obtained and incorporated in the design of the amplifiers. The models show excellent agreement between measured and modelled DC and RF data. These models have been used in designing single, double and differential stage MMIC LNAs. The LNAs were designed for a 50 Ω input and output impedance. The excellent fits between the measured and modelled S-parameters for single and double stage single-ended LNAs reflects the accurate models that have been developed. The single stage LNA achieved a gain ranging from 9 to 13 dB over the band of operation. The gain was increased between 27 dB and 36 dB for the double stage and differential LNA designs. The measured noise figures obtained were higher by ~0.3 to ~0.8 dB when compared to the simulated figures. This is due to several factors which are discussed in this thesis. The single stage design consumes only a third of the power (47 mW) of that required for the double stage design, when driven from a 3 V supply. All designs were unconditionally stable. The chip sizes of the fabricated MMIC LNAs were 1.5 x 1.5 mm2 and 1.6 x 2.5 mm2 for the single and double stage designs respectively. Significantly, a series of differential input to single-ended output LNAs became of interest for use in the Square Kilometre Array (SKA), as it utilises differential output antennas in some of its configurations. The single-ended output is preferable for interfacing to the subsequent stages in the analogue chain. A noise figure of less than 0.9 dB with a power consumption of 180 mW is expected for these designs.
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Bhaumik, Saswata. "MMIC design of ultra low noise amplifiers." Thesis, University of Manchester, 2010. http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.517837.
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Roy, Mousumi. "Front-end considerations for next generation communication receivers." Thesis, University of Manchester, 2011. https://www.research.manchester.ac.uk/portal/en/theses/frontend-considerations-for-next-generation-communication-receivers(636dc047-7772-46c3-b049-183d3af2a7bb).html.
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The ever increasing diversity in communication systems has created a demand for constant improvements in receiver components. This thesis describes the design and characterisation of front-end receiver components for various challenging applications, including characterisation of low noise foundry processes, LNA design and multi-band antenna design. It also includes a new theoretical analysis of noise coupling in low noise phased array receivers.In LNA design much depends on the choice of the optimum active devices. A comprehensive survey of the performance of low noise transistors is therefore extremely beneficial. To this end a comparison of the DC, small-signal and noise behaviours of 10 state-of-the-art GaAs and InP based pHEMT and mHEMT low noise processes has been carried out. Their suitability in LNA designs has been determined, with emphasis on the SKA project. This work is part of the first known detailed investigation of this kind. Results indicate the superiority of mature GaAs-based pHEMT processes, and highlight problems associated with the studied mHEMT processes. Two of the more promising processes have then been used to design C-band and UHF-band MMIC LNAs. A new theoretical analysis of coupled noise between antenna elements of a low noise phased array receiver has been carried out. Results of the noise wave analysis, based on fundamental principles of noisy networks, suggest that the coupled noise contribution to system noise temperatures should be smaller than had previously been suggested for systems like the SKA. The principles are applicable to any phased array receiver. Finally, a multi-band antenna has been designed and fabricated for a severe operating environment, covering the three extremely crowded frequency bands, the 2.1 GHz UMTS, the 2.4 GHz ISM and the 5.8 GHz ISM bands. Measurements have demonstrated excellent performance, exceeding that of equivalent commercial antennas aimed at similar applications.
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Lohou, Anaël. "Conception de circuits intégrés pour antenne à pointage électronique destinée aux télécommunications par satellite en bande Ka." Thesis, Limoges, 2018. http://www.theses.fr/2018LIMO0096/document.
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Dans un monde où l’information va de plus en plus vite, il est important de pouvoir rester connecté en permanence. De nouvelles solutions émergent pour connecter les passagers à bord d’un avion grâce aux communications par satellite. Parmi elles, on retrouve les antennes à pointage électronique dans lesquelles cette thèse de doctorat s’intègre. Une étude sur les différentes antennes existantes ou en projet est présentée. Les puces électroniques MMIC AsGa permettent d’appliquer des lois d’amplitude et de phase pour chaque élément rayonnant d’une antenne réseau. Cette thèse de doctorat porte sur la conception d’un déphaseur, après avoir étudié les technologies et les topologies de celui-ci. Ensuite, la conception d’un amplificateur faible bruit à gain variable est proposée à partir d’un état de l’art. Les résultats de simulation et de mesures de ces deux fonctions sont exposés<br>In a world where the information is moving faster and faster, it is important to be able to stay connected continuously. Some new solutions for air transport connectivity are in development thanks to the rise of satellite communications. This thesis work is part of an electronically steerable antenna array project, developed as a solution to achieve In-Flight Connectivity in Ka-band. A state- of-the art review on electronically steerable antenna arrays is also presented. In these arrays, each radiating element needs a specific amplitude and phase to obtain a scanning beam by adding their contribution. This thesis focus on the design of a GaAs MMIC chip inclusion two functions: a phase shifter and a variable-gain low-noise amplifier. The simulation and measurement results are presented for these two functions
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Ross, Michael Carleton University Dissertation Engineering Electrical. "Investigation of taper and forward-feed in GaAs MMIC distributed amplifiers." Ottawa, 1987.
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Zhang, Hao. "Circuit d'amplification Doherty intégré large bande pour applications radio cellulaires de puissance." Thesis, Poitiers, 2019. http://www.theses.fr/2019POIT2265.
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Ces travaux de recherche concernent la conception, la réalisation et la mesure des circuits d’amplification Doherty LDMOS intégrés large-bande pour stations de base, nécessaires au développement de la 5G. Suite à la recherche des techniques pour l’amélioration du rendement électrique pour des signaux à forte dynamique d’amplitude et les possibilités d’intégration, la technique Doherty a été choisie. Des études sur les structures Doherty à deux puis trois voies montrent que l’amélioration de rendement pourra être renforcée et étendue par l’ajout d’un troisième étage avec des tailles de transistors calculées en prenant en compte un fonctionnement en classe C des étages auxiliaires. Des limitations d’utilisation de la technique Doherty sont montrées par la prise en compte des différentes non-linéarités des transistors LDMOS. La recherche des architectures large-bandes montre que la technique d’absorption du CdS et l’utilisation de circuits de répartition de type mixte en entrée présentent des avantages pour l’intégration. A partir des différentes études, des amplificateurs de puissance Doherty MMIC à trois voies ont été réalisés avec un ratio d’asymétrie de 1 :3 :3 dans la bande de 1805 MHz à 2170 MHz. Les performances expérimentales montrent les potentialités du Doherty et notamment une nette amélioration du rendement sur toute la bande de fréquence. Des considérations spécifiques d’adaptation sont présentées dans le but de réduire les produits de distorsions d’ordre 3, 10 et 12 (IMD 10 /12). Les mesures de linéarité à différentes largeurs de bande instantanées sont très encourageantes et valident la nouvelle architecture du Doherty à trois voies asymétriques<br>This work presents the design, realization and measurement result of integrated broadband Doherty amplification circuits for base stations, required for 5G. Initially, based on the research for techniques to improve electrical efficiency for signals with high dynamic range, the Doherty technique is chosen to continue the work. Studies on different Doherty architectures showed that performance can be improved and extended by adding a third stage (3-way Doherty) with calculated auxiliary transistors’ sizes for which are operated in class C mode. Limitations on the practical use of the Doherty technique is demonstrated by the considerations of various non linearities of the LDMOS transistors. The research of wideband architectures shows simultaneous advantages of integration and broadband capability by the CdS absorption technique and the use of mixed type of input splitters. Based on the results of various studies, three-way Doherty MMIC power amplifiers were designed and realized using the CdS absorption technique with an asymmetry ratio of 1 : 3 : 3 in the band of 1805 MHz to 2170 MHz. Experimental performances have shown the potentialities of the 3-way Doherty and a clear efficiency improvement over the entire frequency band. Specific wideband operating conditions are presented to reduce distortion products of third (IMD 3), 10th and 12th (IMD 10/12). The linearity measurements at different instantaneous bandwidths are very encouraging and validate the new asymmetric three-way Doherty architecture
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Manfrin, Stilante Koch. "Proposta e implementação de um receptor optoeletrônico integrado para redes ópticas passivas (PONs) empregando multiplexação por divisão de comprimento de onda (WDM)." Universidade de São Paulo, 2003. http://www.teses.usp.br/teses/disponiveis/18/18133/tde-01122015-101424/.
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O presente trabalho descreve o desenvolvimento e implementação de duas configurações distintas de um receptor optoeletrônico integrado. A primeira configuração é similar a um projeto encontrado na literatura mas apresenta diversas modificações que lhe conferiram melhor desempenho em comparação ao projeto original. A segunda configuração é uma nova proposta deste trabalho. O receptor foi desenvolvido e implementado visando sua aplicação em redes de comunicações ópticas passivas (PONs) de alta velocidade comutadas a pacote, para possibilitar a utilização da técnica de multiplexação em comprimento de onda (WDM), aumentando assim a capacidade de transmissão da rede, em particular no ramo de ligação da rede de serviços com o usuário final, denominado rede de acesso. O principal objetivo do receptor aqui desenvolvido foi proporcionar uma sintonia rápida entre os canais disponíveis na rede, possibilitando sua seleção num tempo inferior àquele necessário para a transmissão de um único pacote de informação, diminuindo assim o atraso de sintonia e, por conseguinte, a perda de informação. Para tanto, os circuitos integrados implementados e caracterizados referem-se aos circuitos de chaveamento eletrônico e do amplificador de transimpedância das duas configurações investigadas. Os dados experimentais obtidos para as duas configurações confirmaram a previsão de chaveamento dos canais de entrada num intervalo de tempo da ordem de alguns nanosegundos, o que é totalmente compatível com a velocidade de transmissão das aplicações a que se destina este receptor (aproximadamente 5 Gbits/s). Adicionalmente, são apresentados os dados experimentais relativos à freqüência de corte, ganho direto, isolação, relação on/off e características de ruído dos circuitos implementados.<br>The present work describes the design and implementation of two configurations of an integrated optoelectronic receiver. The first one is similar to a previously reported design but with some modifications to improve its performance. The second one is a new proposal of this work. The goal of the receiver design and implementation was its application in high bit rate packet-switched passive optical networks (PONs) employing the wavelength division multiplexing (WDM) technique to increase the network capacity, in particular on the connection branch of the network core with the final user, the access network. The main goal of the receiver design was to achieve a fast channel tuning, allowing a tuning time smaller than the required for the transmission of a single information packet, decreasing the tuning latency and, therefore, the rate of information packet loss. In order to accomplish this goal, the implemented and tested integrated circuits include the electronic switching circuit and the transimpedance amplifier for both configurations investigated. The measured data for both configurations confirm the expected input channel switching time results, of about a few nanoseconds, which is certainly useful for the expected bit rate of operation (approximate 5 Gbps). Additionally, experimental results concerning cutoff frequency and bandwidth, direct gain, isolation, on/off ratio, and noise characteristics of both implemented circuits are presented.
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Hansson, Martin. "Design of microwave low-noise amplifiers in a SiGe BiCMOS process." Thesis, Linköping University, Department of Electrical Engineering, 2003. http://urn.kb.se/resolve?urn=urn:nbn:se:liu:diva-1530.
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<p>In this thesis, three different types of low-noise amplifiers (LNA’s) have been designed using a 0.25 mm SiGe BiCMOS process. Firstly, a single-stage amplifier has been designed with 11 dB gain and 3.7 dB noise figure at 8 GHz. Secondly, a cascode two-stage LNA with 16 dB gain and 3.8 dB noise figure at 8 GHz is also described. Finally, a cascade two-stage LNA with a wide-band RF performance (a gain larger than unity between 2-17 GHz and a noise figure below 5 dB between 1.7 GHz and 12 GHz) is presented. </p><p>These SiGe BiCMOS LNA’s could for example be used in the microwave receivers modules of advanced phased array antennas, potentially making those more cost- effective and also more compact in size in the future. </p><p>All LNA designs presented in this report have been implemented with circuit layouts and validated through simulations using Cadence RF Spectre.</p>
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Saugnon, Damien. "Contribution aux analyses de fiabilité des transistors HEMTs GaN : exploitation conjointe du modèle physique TCAD et des stress dynamiques HF pour l'analyse des mécanismes de dégradation." Thesis, Toulouse 3, 2018. http://www.theses.fr/2018TOU30164/document.
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Dans la course aux développements des technologies, une révolution a été induite par l'apparition des technologies Nitrures depuis deux décennies. Ces technologies à grande bande interdite proposent en effet une combinaison unique tendant à améliorer les performances en puissance, en intégration et en bilan énergétique pour des applications hautes fréquences (bande L à bande Ka en production industrielle). Ces technologies mobilisent fortement les milieux académiques et industriels afin de proposer des améliorations notamment sur les aspects de fiabilité. Les larges efforts consentis par des consortiums industriels et académiques ont permis de mieux identifier, comprendre et maîtriser certains aspects majeurs limitant la fiabilité des composants, et ainsi favoriser la qualification de certaines filières. Cependant, la corrélation et l'analyse physique fine des mécanismes de dégradation suscite encore de nombreux questionnements, et il est indispensable de renforcer ces études par une approche d'analyse multi-outils. Nous proposons dans ce travail de thèse une stratégie d'analyse selon deux aspects majeurs. Le premier concerne la mise en œuvre d'un banc de stress qui autorise le suivi de nombreux marqueurs électriques statiques et dynamiques, sans modifier les conditions de connectiques des dispositifs sous test. Le second consiste à mettre en œuvre un modèle physique TCAD le plus représentatif de la technologie étudiée afin de calibrer le composant à différentes périodes du stress.Le premier chapitre est consacré à la présentation des principaux tests de fiabilité des HEMTs GaN, et des défauts électriques et/ou structuraux recensés dans la littérature ; il y est ainsi fait état de techniques dites non-invasives (c.-à-d. respectant l'intégrité fonctionnelle du composant sous test), et de techniques destructives (c.-à-d. n'autorisant pas de reprise de mesure). Le second chapitre présente le banc de stress à haute fréquence et thermique développé pour les besoins de cette étude ; l'adjonction d'un analyseur de réseau vectoriel commutant sur les quatre voies de tests permet de disposer de données dynamiques fréquentielles, afin d'interpréter les variations du modèle électrique petit-signal des modules sous test à différentes périodes du stress. [...]<br>In the race to technologies development, disruptive wide bandgap GaN devices propose challenging performances for high power and high frequency applications. These technologies strongly mobilize academic and industrial partners in order to improve both the performances and the reliability aspects. Extensive efforts have made it possible to better identify, understand and control first order degradation mechanisms limiting the lifetime of the devices; however, the correlation (and fine physical analysis) of different degradation mechanisms still raises many questions, and it is essential to strengthen these studies by mean of multi-tool analysis approach. In this thesis, we propose a twofold analysis strategy. The first aspect concerns the implementation of a stress bench that allows the monitoring of numerous static and dynamic electrical markers, without removing the devices under test from their environment (in order to have a consistent data set during the period of the strain application). The second aspect consists in implementing a physical TCAD model of the technology under study, in order to calibrate the component before stress, and to tune the model at different periods of stress (still considering stress-dependent parameters potentially affecting the device). The first chapter is devoted to the presentation of the main reliability tests of GaN HEMTs, and of the electrical and/or structural defects identified in the literature; it thus refers to so-called non-invasive techniques (i.e. respecting the functional integrity of the component under test), and destructive techniques (i.e. not allowing additive electrical measurement). The second chapter presents the high frequency and thermal stress bench dedicated to this study; the addition of a vector network analyzer switching between the four test channels provides dynamic frequency data, in order to interpret the variations of the small signal electrical model of the devices under test at different stress periods.[...]
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Aja, Abelán Beatriz. "Amplificadores de banda ancha y bajo ruido basados en tecnología de GaAs para aplicaciones de radiometría." Doctoral thesis, Universidad de Cantabria, 2007. http://hdl.handle.net/10803/10664.
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En esta Tesis se ha realizado análisis, diseño y caracterización de los amplificadores de bajoruido y banda ancha en tecnología de GaAs PHEMT con aplicación a los módulos posteriores delradiómetro del instrumento de baja frecuencia del satélite Planck. La Tesis se compone de las siguientes partes:- Introducción y estudio del funcionamiento del radiómetro del instrumento de baja frecuencia de Planck.- Diseño y caracterización de amplificadores de bajo ruido utilizando tecnología de GaAs. Se presentan diseños MMIC en la banda Ka y en la banda Q, y un diseño MIC en la banda Q.- Diseño y construcción de los módulos posteriores en las bandas de 30 y 44 GHz. Se presentan varios prototipos fabricados en ambas bandas, así como medidas de cada uno de los subsistemas que los forman.- Desarrollo de técnicas de medida para receptores de banda ancha con detección directa y su aplicación a la caracterización de los módulos posteriores, mostrando el funcionamiento de los prototipos representativos para las dos bandas de frecuencia.- Integración de los módulos posteriores con los módulos frontales y presentación de algunos de los resultados de medida de los radiómetros completos.<br>This Thesis deals with the analysis, design and characterization of broadband low noise amplifiersin GaAs PHEMT technology with application to the radiometer Back-End Modules for the Planck Low Frequency Instrument (LFI). The Thesis is composed of the next parts:- Introduction and study about the radiometer of the Planck low frequency instrument.- Design and characterization of low noise amplifiers using GaAs technology. Ka-band MMIC designs and Q-band MMIC and a MIC design are presented.- Design and assembly of the 30 and 44 GHz back-end modules. Several prototypes have been manufactured in both frequency bands and the most representative test results of each subsystem are presented.- Development of measurement techniques for broadband direct detection receivers and their application to the characterization of the back-end modules. Performance of representative prototypes in both frequency bands is included.- Integration of the back end modules and front end modules and significant results of the tests for a radiometer in each frequency band.
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Klezla, Petr. "Měřicí karta pro PC s I51." Master's thesis, Vysoké učení technické v Brně. Fakulta elektrotechniky a komunikačních technologií, 2009. http://www.nusl.cz/ntk/nusl-217845.
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The main topic of the thesis is to suggest and realize the measuring card with analog inputs and outputs. In the first part of this thesis we are concerned with key-elements of measuring cards, respectively ADC and DAC, and here are explained all their activities. Then we attend of choosing parts for suggested measuring card as is voltage reference, power supply and operational amplifier. Among others we are concerned with a question of protecting inputs against overvoltage and reversing of polarity and beside against disturbance. Then follows analysis of used microcontroller ADUC831 with description of its used outskirts. Here is described the stored for measured samples of MMC memory, how to work with it and the programme service. The last chapter describes suggested firmware and servicing programme for PC. In fine we value the quality of measuring card and its mistakes.
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WEI-SONG, YEH, and 葉維崧. "Low noise amplifier MMIC design." Thesis, 1999. http://ndltd.ncl.edu.tw/handle/04113032121413601782.
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碩士<br>中正理工學院<br>電機工程研究所<br>87<br>The laptop computers and the portable communications excite the development of the products in wireless local area network in recent years. Additionally, MMICs for reducing the cost, size, and weight used in the related products have been prompted by the great advance of semi-conductor technologies. We propose a new approach for the design of MMICs low noise amplifier since it is necessary in the products.
GaAs transistors have better noise performances in microwave band than Si transistors. We thus design a GaAs MMIC low noise amplifier to verify the effectiveness of the approach. The traditional design approach is applied in the beginning to obtain suitable matching networks as well as their element values in the light of Smith chart manipulation and the characteristics of devices. The matching networks in MMICs generally include the integrated low Q inductors. The added loss can not be ignored and may be more than that added by FETs. Therefore, after the design of traditional approach, these inductors must be reexamined and adjusted through the noise matching.
Two-stage amplifiers operated at 2.4 and 5.7GHz are simulated by SuperCompact. The applied models are obtained, via the help of CIC, from the cell library provided by Haxewave Inc. The noise figures are 2.7dB(2.4GHz) and 3.6dB(5.7GHz) under a single power supply of 4V.
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Liu, Sang-En, and 柳頌恩. "MMIC Low Noise Amplifier Design." Thesis, 1996. http://ndltd.ncl.edu.tw/handle/10482949130156822165.
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碩士<br>國立交通大學<br>電信工程研究所<br>84<br>A system design approach for designing a multi-stage low noise
amplifier is presented. It is based on the conventional Smith
chart manipulation and the unique termination technique for
matching networks. And it takesadvantages of the facilities
available from microwave computer-aided design(CAD) programs,
the design tasks hence can be accomplished easily and
efficiently. By using this design approach, the peototype of a
1.9 GHz two-stage amplifier(LNA) was designed. We simulate the
circuit with models of the cell library provided by Hexawave
Inc. . The results for the 1.9 GHz amplifier show a small-signal
gain of 15.4dB and Noise Figure of 2.3dB with a 5V power supply
while drawing 60mA current. The LNA is now being fabricated by
Hexawave Inc. .
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Liu, Chi-Chuan, and 劉啟全. "5 GHz MMIC Power Amplifier." Thesis, 2002. http://ndltd.ncl.edu.tw/handle/df5hf5.
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碩士<br>國立成功大學<br>微電子工程研究所碩博士班<br>90<br>In this thesis, it is proposed that a 5 GHz PHEMT MMIC power amplifier with only single dc supply for the wireless LAN applications is presented.
In this thesis, we discuss about basic theories in microwave circuit design and circuit design techniques. To meet the requirements of the system, we specify the power amplifier as follows: frequency range of 5~6 GHz, small-signal gain of 22 dB, output power at 1-dB gain compress point of 29 dBm, power efficiency of 25 %, and output IP3 of 39 dBm. In addition, we select the quiescent point of 8 V - 400 mA in class A operation. Furthermore, the chip is fabricated in Transcom, Inc’s GaAs-PHEMT process.
In the aspect of output power matching, we perform the output match network using the load-line theory (Cripps Method) and the small-signal model of PHEMT; In the aspect of bias network, we select a self-bias circuit to improve the disadvantages of dual-bias of PHEMTs; In the aspect of measurement, we use a FR-4 evaluation board to measure the performance of the MMIC PA, when it has been packaged.
Finally, we compare the discrepancies between the measured and simulated results and the specifications.
The MMIC power amplifier really presents well matched with the requirements for 5 GHz wireless LAN applications.
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Tseng, Chun-Hua, and 曾俊樺. "Design of Two-Stage Power Amplifier MMIC for." Thesis, 2018. http://ndltd.ncl.edu.tw/handle/cwzhuy.
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碩士<br>國立交通大學<br>電機學院電信學程<br>106<br>This thesis is divided into three major parts. The first part introduces the current development of wireless communication and describes the motivation of the research. It also aims at the IEEE 802.11b/g WLAN receiver system, and details the specifications of the current IEEE 802.11b/g WLAN system.
The second part of the thesis discusses the basic theory required for designing RF power amplifiers and related circuit design techniques, and verifies the correlation with theory by designing a 2.4 GHz ISM (Industrial, Scientific and Medical band) Class A RF power amplifier MMIC. The third part details the design of a 2.4~2.5 GHz power amplifier operating at 1.8V DC, and realized by the InGaP/GaAs Power HBT process of AWSC. The design includes the matching design of the S-parameters and matching design for maximum power output, In the design of the circuit, the Advanced Design System (ADS) 2009 is used to perform circuit simulations and IC layout .
At last, this thesis uses the basic theory to successfully complete the two-stage power amplifier, the operating frequency is 2.4~2.5GHz, the P1dB is 12dBm, the output power of 11g is 8.19dBm, the current consumption is 45mA, and the layout way of the transistor is also effectively modified to reduce the wafer the overall area, the final sheet area of 340um * 280um, to achieve a small area of low-power research.
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Tsai, Chien-Hui, and 蔡千慧. "Design of MMIC Wideband Amplifier in HBT Technology." Thesis, 2019. http://ndltd.ncl.edu.tw/handle/f7uc8w.
Full textAbstract:
碩士<br>國立交通大學<br>電子研究所<br>107<br>In this work, a wideband amplifier with matched impedance and high linearity is designed and fabricated in GaAs heterojunction bipolar transistor (HBT) process. The technique of dual feedback loops based on the Cherry-Hooper topology is used to achieve terminal impedance matching and wide bandwidth simultaneously. Two versions of the revised Kukielka configuration are realized, high gain and low gain designs. The measurement results show that with 3.3 V supply voltage, power gain of the low gain version achieves 12 dB at 900 MHz and 12.4 dB at 2350 MHz respectively, operating with the supply current of 19.4 mA. The linearity of OP1dB is 5.5 dBm to 5.9 dBm from 0.9 GHz to 2.2 GHz, which is extremely competitive. With 5 V supply voltage, power gain of the high gain version reaches 20.8 dB at 900 MHz and 23.64 dB at 2350 MHz, and OP1dB is larger than 7 dBm under 19.2 mA operating current with noise figure less than 4.2 dB. They all have in-band input/output return loss larger than 10 dB. The tradeoff between the internal impedance matching and bandwidth, and the tradeoff between linearity and noise, are also found.
Finally, the two versions are realized by Multi-Project Wafer (MPW) program to reach a cost-effective back-end process. The designed chips will be applied for satellite TV communication. And the experiment results show a good agreement with the simulation results in general.
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Yang, Hung-Kuang, and 楊弘光. "Design and Characterization of GaAs Low Noise Amplifier MMIC." Thesis, 1996. http://ndltd.ncl.edu.tw/handle/50932287144674211589.
Full textAbstract:
碩士<br>國立交通大學<br>電信工程研究所<br>84<br>A Low noise amplifier MMIC has been fabricated by means of the
passive EM field model provided by our lab[1]. Now, the chip
is tested and analyzed.By application of CAD software and the
measured data, we study the interaction between the finite
ground planes and the real circuits. We try to achieve the
minimum area of the ground planes. The GaAs LNA MMICs thatare
improved have the properties of single-end DC power supply,
smaller areas (that are 1.8×1.5 mm2 for a one-stage amplifier,
3.1 ×1.7 mm2 for a two-stage amplifier), and lower power
dissipation 96 mW (operating current of 24 mA @ 4 V) than the
original prototype circuits. As well, the "Design
Synchronization" functionof HP EEsof software is utilizedto
check the consistency between the schematic circuitsand the
final layout circuits. The circuit can achieve 12.9 dB gain and
lessthan 3.5 dB noise figure for the one-stage amplifier, 23.2
dB gain and lessthan 3.75dB noise figure for the two-stage
amplifier. This paper details the complete consideration of
designing a LNA MMIC from deciding thickness of a substrateto
measuring the original chips.
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Chu, Chen-Kuo, and 朱鎮國. "3.3 V Self-Biased 2.4~2.5GHz Power Amplifier MMIC." Thesis, 2003. http://ndltd.ncl.edu.tw/handle/29399697952686863264.
Full textAbstract:
碩士<br>國立成功大學<br>微電子工程研究所碩博士班<br>91<br>A 2.4GHz—2.5GHz 3.3V 23.5dBm self-bias AlGaAs/InGaAs/GaAs PHEMT MMIC power amplifier for wireless local-area network (WLAN’s) applications (Dual Channel for 802.11a/b Combination) systems is demonstrated. This two-stage amplifier is designed to fully match for a 50 ohm input and output impedance. In this process, a backside via-ground method is not used, so it can offer very low cost for the production of wireless LAN IC. With only a 3.3V drain voltage, the amplifier has achieved 30dB small-signal gain, 23.5dBm 1-dB gain compression power with 24.2% power-added efficiency (PAE). In addition, high linearity with 37.2dBm third-order intercept point at frequency of 2.45GHz is achieved.
For this power amplifier MMIC, the WLAN requirements of power amplifiers include aspects of high efficiency, high gain, high linearity and operation at 2.4GHz ISM band are procured.
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Chen, Ping-Yu, and 陳炳佑. "GaAs PHEMT Device Modeling and Ka-band MMIC Amplifier design." Thesis, 2002. http://ndltd.ncl.edu.tw/handle/89535433330866994361.
Full textAbstract:
碩士<br>國立臺灣大學<br>電機工程學研究所<br>90<br>GaAs PHEMT device is one of the most important device of Ⅲ-Ⅴsemiconductors in military and commercial communication applications at microwave and millimeter-wave frequencies. It is extremely important to model the characteristics of the transistors before you use the transistors to design a MMIC circuit. To know the dc, RF or noise characteristics of the transistors accurately are the essential issues of designing the MMIC circuits, such as power amplifiers and low noise amplifiers.
This thesis contains both the small-signal and large-signal modeling methods of the GaAs PHEMTs. The determined small-signal equivalent circuit by using the small-signal modeling method described in this thesis fits the S-parameters very well up to 48 GHz. The nonlinearity of dc characteristics and intrinsic elements of the GaAs PHEMTs are investigated. Several empirical nonlinear equations, which are used in the Angelov model, are adapted to model these nonlinear effects and give a good agreement both in dc and RF characteristics of the devices.
Also the noise characteristics of the GaAs PHEMTs are studied. A simple method for the determination of noise coefficients P, R, and C by standard two-port noise parameters, Fmin, RN and Γopt is presented. The tendency of the extracted values with respect to device size and bias is also discussed.
At the end of Chapter 2, we investigate InGaP/GaAs heterojunction bipolar transistor (HBT) device to give the quantitative analysis of the kink effect in transistor S22. This is the first time that the kink phenomenon in S22 of InGaP/GaAs HBTs was explained quantitatively.
A Ka-band MMIC amplifier is designed, fabricated and measured. The small-signal models of the transistors used in this amplifier design are also refined using the methods discussed in this thesis and predict the circuit small-signal performance accurately.
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Yang, Ming-Sian, and 楊明憲. "A 5.2 GHz SiGe/Si HBT-Based MMIC Power Amplifier." Thesis, 2004. http://ndltd.ncl.edu.tw/handle/86504921059583705219.
Full textAbstract:
碩士<br>南台科技大學<br>電子工程系<br>92<br>In this thesis we design key devices of 5.2GHz ISM band. We use the SiGe transistor to fabricate high frequency devices and support suitable characters in our operation frequency. The devices that we research are the most important devices in RF
frond end, power amplifier.
Power amplifier(PA) plays an important role in conventional RF front-end transmitter. We utility PA to amplify transmitted signals to avoid interference and distortion of propagation process. Thus, the performance of PA affects the quality of wireless device. In this thesis, a two-stage power amplifier using TSMC 0.35μm SiGe process is designed for 5.2GHz application. We have simulated the circuit with ADS, and performed layout of PA with Cadence. The RF models of TSMC 0.35μm SiGe process is used for the transistors and the on-chip inductors and capacitors. The supply voltage of proposed. power amplifier is 3V. While RF is set to 5.2GHz, the simulation result is an output power of 23 dBm, the maximum power-added-efficiency of 32%.
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Chang, Ta-Ren, and 張達仁. "Study of GaAs MMIC Power Amplifier for Wireless Communication Application." Thesis, 1996. http://ndltd.ncl.edu.tw/handle/63476748096508942824.
Full textAbstract:
碩士<br>國立成功大學<br>電機工程研究所<br>84<br>Recently, wireless communication has been attracted
considerable attention. Among the modules of the wireless
communication system,the power amplifier is the one that
interests us. Furthermore,most power microwave components and
subsystems are constructed now with solid state devices and
microstrip transmission lines,the developing technologies of
monolithic microwave integrated circuits (MMIC) power amplifier
will play an important role on the improvement of the wireless
communication. The introduction of the active components and
passive component of MMIC will be given in this work and the
equivalent circuit of the components will be developed. Because
there are many layout "parasitic" elements complicate the
circuits basic topology, modeling of microwave circuits is a
very complicated process. Moreover, the MMIC calculated
performance must be extremely accurate since the circuit cannot
be experimentally modified. Thus, MMIC design requires very
special strategies and will be a key work of the developing
technologies of MMIC power amplifier. Making use of computer-
aided design (CAD) techniques (MDS) and considering the layout
rules as well as the design rules of the MMIC, the design
circuit of a broadband power amplifier has been achieved and
shown.
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Lin, Chun-Fu, and 林俊甫. "Design and Analysis of Ka-Band MMIC Power Amplifier And Novel Bi-Directional Amplifier with Gain Control." Thesis, 2004. http://ndltd.ncl.edu.tw/handle/2rq2ue.
Full textAbstract:
碩士<br>國立交通大學<br>電信工程系所<br>92<br>This thesis is divided into two parts. The first part describes the analysis and design of a Ka-Band power amplifier applied to the automotive collision avoidance radar system. In order to acquire the adequate linearity and efficiency of the system requirements, the architecture with two stages is adopted to design the power amplifier. The first stage utilizes class-A type to supply sufficient power gain. The second stage improves RF-to-DC signal ratio by class-AB type. By this way, the linearity of this circuit can also be improved. The semiconductor material of PHEMT is adequate to design the RF circuits with the characteristics of high power level and high operating frequency because it possesses the higher breakdown voltage and the lower doping channel. So as to operate the circuits at Ka-band, we select the semiconductor process of WIN 0.15-um GaAs PHEMT to design the circuits. At the central frequency of 32.4GHz, the measured results reveal that the fabricated power amplifier has the P-1dB of 2dBm、Pout of 12.4dBm, and PAE of 19.7% at P-1dB point.
The second section of this thesis proposes and demonstrates a novel architecture of 2.4GHz bi-directional amplifier. The approach improves effectively the isolation and noise figure of the circuit to ameliorate the quality of output signal. The framework includes two reflection-type amplifiers and a 90 degree branch-line circuit. The designed process must pay attention to the oscillation condition because its principles are similar to that of an oscillator. Meanwhile, the ability of bi-direction could be realized in accordance with the characteristic of branch-line circuit. The bi-directional amplifier with this architecture can obtain the gain which is same as that of a reflection-type amplifier. Also, a variable capacitance is arranged to steady the condition of oscillation and adjust the gain according to the circuit’s requires. And the conventional branch-line circuit must be realized by means of transmission lines with the quarter wavelength. This length is 16.7mm at the operating frequency of 2.4GHz. This approach is inappropriate for CMOS IC. Therefore, this 90 degree branch-line circuit is realized on a FR4 board and utilizes a new method to reduce the area. So, this IC only embraces these two critical reflection-type amplifiers. And the expected specifications of this reflection-type amplifier are as follows: power gain 13.6dBm, P1dB -5dBm，the noise figure 14.3dB. Furthermore, the return loss S11 of this bi-directional amplifier is below -10dB across overall utilized bandwidth. The gain can alter from 7.5dB to 16dB and the noise figure varies from 4.1 to 5.4.
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Chen, Yi-Long, and 陳宜隆. "5.7 GHz UNII-Band Wireless Communication MMIC Power Amplifier and Transceiver RF Module." Thesis, 2001. http://ndltd.ncl.edu.tw/handle/16897177299374242214.
Full textAbstract:
碩士<br>國立成功大學<br>電機工程學系<br>89<br>This thesis presents design, implementation, and extensive measurement of a 5.7 GHz two-stage HBT MMIC power amplifier (PA) and 5.7GHz UNII (Unlicensed National Information Infrastructure) band transmitter and receiver RF front-end modules for IEEE 802.11a WLAN application. The design goal of the PA is to have 20dB gain and 20dBm 1-dB compression point at 3.6V DC bias. The measurement is performed on a FR-4 test fixture. The post simulation, including the effects of test fixture and bond-wire, agrees well with measurement. For the 5.7 GHz RF modules, RF is from 5.725~5.825GHz, LO is from 5.445~ 5.545GHz, and IF is at 280MHz. The Tx and Rx RF modules are all implemented on FR-4 substrate. The receiver has 31dB conversion gain, 4.7dB noise figure and the transmitter has 50dB conversion gain, 1 dB compression point at 25.3dBm and 34dBm OIP3. By using the Digital Audio Broadcasting (DAB) system to simulate the IEEE 802.11a OFDM signal transmission test, the sensitivity of the receiving RF module is about -93dBm(@BER=10-4) and -100dBm(@BER=10-2). The ACPR of the transmitter RF module is about -31.4dBc (@16dBm) and -22.1dBc(@19.3dBm)。
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Wang, Shi-Ming, and 王士鳴. "Development of IS-95 CDMA RF Transceiver Including a Power Amplifier MMIC Design." Thesis, 2001. http://ndltd.ncl.edu.tw/handle/45338393010956738838.
Full textAbstract:
碩士<br>國立中山大學<br>電機工程學系研究所<br>89<br>Abstract：
This thesis was consisted of two parts. Part 1 introduced the procedure for designing the RF transceiver module in an IS-95 CDMA system using link budget analysis. Part 2 was focused on a CDMA power amplifier integrated circuit design for Personal Communication Service (PCS) applications. The design procedure was introduced in detail and implemented in MMIC for using GaAs HBT foundry provided by the GCS Ltd.. The designed linear gain, output 1dB compression point and power added efficiency (PAE) are above 30 dB, 27 dBm and 36.7% respectively under a single supply voltage of 3.4 V with the help of a diode linearizer. Harmonic components were suppressed more than 26 dB without use of any filters in the output. The adjacent channel power ratio (ACPR) and the VSWR of input port are below -45 dBc and 2 respectively.
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Seyfollahi, Alireza. "Monolithic microwave integrated circuit (MMIC) low noise amplifier (LNA) design for radio astronomy applications." Thesis, 2018. https://dspace.library.uvic.ca//handle/1828/9278.
Full textAbstract:
The presentation highlights research on theory, design, EM
modeling, fabrication, packaging, and measurement of GaAs Monolithic
Microwave Integrated Circuits (MMICs). The goal of this work is to design MMIC LNAs with low noise figure, high gain, and wide bandwidth.
The work aims to develop GaAs MMIC LNAs for the application of RF front-end receivers in radio telescopes. GaAs MMIC technology offers modern radio astronomy attractive solutions based on its advantage in terms of high operational frequency, low noise, excellent repeatability and high integration density. Theoretical investigations are performed,
presenting the formulation and graphical methods, and focusing on a
systematic method to design a low noise amplifier for the best noise,
gain and input/output return loss. Additionally, an EM simulation method is utilized and successfully applied to MMIC designs. The effect of packaging including the wire bond and chassis is critical as the frequency increases. Therefore, it is modeled by full-wave analysis where the measured results verify the reliability of these models. The designed MMICs are validated by measurements of several prototypes,
including three C/X band and one Q band MMIC LNAs. Moreover, comparison
to similar industrial chips demonstrates the superiority of the proposed
structures regarding bandwidth, noise and gain flatness, and making them
suitable for use in radio astronomy receivers.<br>Graduate<br>2020-05-01
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Shatzman, Jeffrey A. "An Electronically Reconfigurable Three Band Low-Noise Amplifier in 0.5 μm GaAs pHEMT Technology". 2011. https://scholarworks.umass.edu/theses/642.
Full textAbstract:
State-of-the-art RF front-end circuits are typically designed to operate at a single frequency. With an increasing number of available wireless standards, personal mobile communication devices require an increasing number of individually designed RF circuits. To save space and cost, one alternative possibility is to reuse much of the circuitry by utilizing electronically reconfigurable topologies. The ubiquitous low-noise amplifier is one of the many circuits that can be redesigned with the reconfigurable aspect in mind. In this thesis, previous work in reconfigurable LNAs is reviewed as well as a brief comparison of CMOS and GaAs processes used for RF amplifiers. Three new reconfigurable LNA topologies are also presented. The first two topologies, based on the common-gate stage and synchronous filters, are investigated but not manufactured. The third design, based on the cascode topology, was manufactured in a 0.5 µm GaAs process with enhancement-mode and depletion-mode pHEMTs. The LNA features 12.7 dB, 13.6 dB, and 13.9 dB of gain and noise figures of 2.7 dB, 3.5 dB, and 4.2 dB at 2.5, 3.6 and 5.8 GHz, respectively. The LNA draws 41 mA from a 3.3 V supply.
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Chen, Jia-Liang, and 陳佳良. "Design and Implementation of a Broadband MMIC Low-Noise Amplifier and Microwave Mixers for Wireless Communications." Thesis, 1998. http://ndltd.ncl.edu.tw/handle/81863844757164093308.
Full textAbstract:
碩士<br>國立中正大學<br>電機工程學系<br>86<br>In this thesis, a broadband low-noise amplifier and microwave
mixer for high-speed wireless communication are designed
and implemented in both monolithic and hybrid forms. The
wideband low-noise amplifier is designed by using the
direct-coupled configuration with multipath feedback and
inductor-FET loads. The measurement shows the noise figure is
lower than 5 dB from 500 MHz to 2 GHz. For the 5 GHz mixers,
three types of circuits are designed subject to high P1dB
requirement, which are the single-ended resistive FET mixer,
image-rejection resistive FET mixer, and dual-gate active
FET mixer. The MESFET NE32584 are used in the hybrid form and
Hexwave P3000 foundry of 1.0μm MESFET is used for MMIC form.
The results show that single-ended resistive FET mixer has
P1dB of 2.5 dBm and conversion loss of 10 dB, while
the dual-gate FET mixer has P1dB of -4 dBm and conversion
gain of 3 dB. The mixer with image rejection configuration
has P1dB of -0.5 dBm and conversion loss of 13 dB, and has 17 dB
more of image rejection capability than the mixer without
image rejection.
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Ping, Yu Wen, and 尤文平. "The Study and Implementation of 5.25GHz and 5.8GHz power amplifier by monolithic microwave integrated circuit (MMIC) technology." Thesis, 2001. http://ndltd.ncl.edu.tw/handle/13301682085268674923.
Full textAbstract:
碩士<br>元智大學<br>電機工程研究所<br>89<br>Power amplifier is the key component of wireless communication system, which is usually used in the RF transmitter. In this work we will study and implement the 5.25GHz and 5.8GHz power amplifier by monolithic microwave integrated circuit (MMIC) technology.The effect of second harmonic spurs for different kinds of output and interstage matching network are evaluated . The specification of the designed power amplifier are fulfilled the requirements of IEEE 802.11a standard，which uses OFDM modulation on the 5.7GHz ISM band.High linearity, low voltage (3.3V) MMIC power amplifiers have been implemented in this research .The nonlinear large signal model of InGaP/GaAs HBT is used to simulate and analyze the performance of designed circuits. The chip size of this power MMIC is about 1042μm×610μm. The output power is 23dBm while the input power is 2dBm; the circuit layout and processes are completed by local foundry service in Taiwan.
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Chan, Yi-Chen, and 詹益鎮. "The Study and Implementation of Dual-Band (2.4 GHz, 5.2GHz) HBT Power Amplifier with Linearizer and Power-Detector Circuit by monolithic microwave integrated circuit (MMIC) technology." Thesis, 2004. http://ndltd.ncl.edu.tw/handle/68120345413864348273.
Full textAbstract:
碩士<br>元智大學<br>通訊工程學系<br>92<br>In this paper, we designed a power amplifier with Linearizer and power detector by monolithic microwave integrated circuit (MMIC) technology. The specifications of designed power amplifier are fulfilled the requirements of IEEE 802.11a, 11b, and 11g standard. The large signal model of GaAs HBT supplied by GCT is used to simulate and analyze the performance of designed PA circuit. We measured the power amplifier and power detector that manufactured by GCT foundry, and discussed the performance. The P-1dB of the power amplifier is 24.3dBm at 2.4GHz and 22.2dBm at 5.2GHz, gain is 21.3dB at 2.4GHz and 2.8dB at 5.2GHz. The voltage range of the power detector is 0.87~1.3V. The chip size of the circuit is 2×2 mm2.
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Чечеткин, В. А., та V. A. Chechetkin. "Разработка приемника-декодера сигналов стандарта ADS-B : магистерская диссертация". Master's thesis, 2014. http://hdl.handle.net/10995/36047.
Full textAbstract:
Разработан прототип приемника-декодера сигналов стандарта ADS-B. В ходе разработки предложена структурная схема выполнения устройства, а так же проведено комплексное исследование элементов устройства. Предложены принципиальные схемы и прототипы печатных плат для таких устройств как усилитель, инжектор питания, малошумящий усилитель, логарифмический детектор, а так же рассмотрена топология фильтра с двойной комплементарной спиралью. Приводятся результаты моделирования в различных пакетах программного обеспечения перечисленных выше устройств, а так же результаты их экспериментального исследования. Для обеспечения симуляции сигналов стандарта, а так же для обработки создано программное обеспечение.<br>A prototype of the receiver-decoder for the ADS-B system. During the development the block diagram of the device was proposed and a comprehensive study of elements of the device was done. Circuit schematics and layouts of printed circuit boards for devices such as amplifier, power injector, low noise amplifier, logarithmic detector and filter with a double complementary spiral were proposed. The results of the simulation of the listed above devices in a variety of software packages, as well as the results of an experimental study are presented. In order to simulate the signals, as well as for processing them special software was created.
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Wen-Ren, Lee. "Design of MMIC Broadband Amplifiers and Frequency Doubler." 2006. http://www.cetd.com.tw/ec/thesisdetail.aspx?etdun=U0001-1310200610445300.
Full text
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Lee, Wen-Ren, and 李文仁. "Design of MMIC Broadband Amplifiers and Frequency Doubler." Thesis, 2006. http://ndltd.ncl.edu.tw/handle/73345492865606704676.
Full textAbstract:
碩士<br>國立臺灣大學<br>電信工程學研究所<br>95<br>This thesis includes the design methodology and implementation of a UWB distributed amplifier in TSMC 0.18-μm SiGe BiCMOS HBT process, a 60 GHz Broadband LNA and a high-efficiency K-band balanced frequency doubler both in commercial WIN 0.15-μm PHEMT power process.
The V-band three-stage broadband LNA in chapter 2 demonstrated the measured results of small signal gain about 18 dB from 40 to 70 GHz and noise figure about 6.8 dB at 60 GHz with total dc power consumption of 70 mW. This LNA has the flat gain from 40 to 70 GHz and is designed for the RF front-end amplifier of 60-GHz system.
To enhance the gain and bandwidth performance, the silicon-based HBT low dc power consumption UWB distributed amplifier using the two two-stage cascade configuration and low dc power consumption technique is proposed. The design and analysis of the silicon-based HBT low dc power consumption UWB distributed amplifier are included. The SiGe HBT low-power consumption distributed amplifier presents good gain and bandwidth and demonstrates the highest gain bandwidth product GBW per dc power for broadband amplifiers using silicon-based HBT processes compared with recently published results. Furthermore, the low-power consumption technique can be used to design the wideband low-noise CMOS transimpedance amplifiers. Besides, the measured results of silicon-based HBT low-power consumption UWB distributed amplifier also show wide bandwidth and flat gain from 1.2 to 11 GHz. The dc power consumption is 5.6 mW and suitable for UWB system compared with those of PHEMT devices. The low dc power consumption technique is also proposed to solve the problem of the undesired voltage drop in the distributed structure.
In addition to the UWB amplifier design, a millimeter-wave frequency multiplier, which is widely used for the modulation of high-speed data transmitted at microwave or millimeter-wave carrier frequencies, is also designed in chapter 4. By using the high speed offered by PHEMT technology, the employment of a direct LO chain can reduce mixing circuit phase noise by eliminating a high frequency local oscillator source. Besides, an additional reflector and buffer amplifier would also improve the conversion efficiency and provide enough output power for the mixing circuits. The conversion gain of the PHEMT balanced frequency doubler is greater than 8 dB with output LO power higher than 15 dBm. In addition, we also calculated the PAE in the frequency multiplier, which is better than 10% from 6 to 10 GHz in this design. The measured performance of the PHEMT frequency doubler rivals those of the other reported frequency multipliers.
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Peng, Yu-Jen, and 彭育仁. "Design of GaN MMIC Power Amplifiers using Different Power Combining Approaches." Thesis, 2019. http://ndltd.ncl.edu.tw/handle/ay3c9g.
Full text