Relevant bibliographies by topics / MOS - Metal Oxide SemiConductor - Microprocessor

Contents

  1. Journal articles
  2. Dissertations / Theses
  3. Books
  4. Book chapters
  5. Conference papers

Academic literature on the topic 'MOS - Metal Oxide SemiConductor - Microprocessor'

Author: Grafiati
Published: 4 June 2021
Last updated: 1 February 2022

Create a spot-on reference in APA, MLA, Chicago, Harvard, and other styles

Select a source type:

Consult the lists of relevant articles, books, theses, conference reports, and other scholarly sources on the topic 'MOS - Metal Oxide SemiConductor - Microprocessor.'

Next to every source in the list of references, there is an 'Add to bibliography' button. Press on it, and we will generate automatically the bibliographic reference to the chosen work in the citation style you need: APA, MLA, Harvard, Chicago, Vancouver, etc.

You can also download the full text of the academic publication as pdf and read online its abstract whenever available in the metadata.

Journal articles on the topic "MOS - Metal Oxide SemiConductor - Microprocessor"

1

Packan, Paul A. "Scaling Transistors into the Deep-Submicron Regime." MRS Bulletin 25, no. 6 (June 2000): 18–21. http://dx.doi.org/10.1557/mrs2000.93.

Full text
Abstract:
The dominant device used in the semiconductor industry today is the silicon-based metal oxide semiconductor (MOS) transistor. The MOS transistor consists of a source, drain, channel, and gate region fabricated in single-crystal silicon (Figure 1). The source region provides a supply of mobile charge when the device is turned “on.” The source is electrically isolated from the drain by the channel region, which is oppositely charged. An insulating oxide layer between the gate and the channel region forms a capacitor. During operation, a voltage is applied to the gate. By applying the appropriate voltage, a conductive layer of charge can be attracted in the channel region at the oxide/silicon interface. This layer of charge acts as a wire that effectively connects the source and drain regions. By changing the voltage on the gate, the conducting layer of charge can be removed. Thus the transistor acts like a switch, with the gate electrode controlling the connection from the source to the drain. These individual switches can be connected to form the basic building blocks for circuit design. These building blocks are used to create the high-performance microprocessors and memory chips in today's computers.
APA, Harvard, Vancouver, ISO, and other styles
2

Wazzan, A. R. "MOS (Metal Oxide Semiconductor) Physics and Technology." Nuclear Technology 74, no. 2 (August 1986): 235–37. http://dx.doi.org/10.13182/nt86-a33811.

Full text
APA, Harvard, Vancouver, ISO, and other styles
3

Senthil Srinivasan, V. S., and Arun Pandya. "Dosimetry aspects of hafnium oxide metal-oxide-semiconductor (MOS) capacitor." Thin Solid Films 520, no. 1 (October 2011): 574–77. http://dx.doi.org/10.1016/j.tsf.2011.07.010.

Full text
APA, Harvard, Vancouver, ISO, and other styles
4

Abdul Amir, Haider F., and Abdulah Chik. "Neutron radiation effects on metal oxide semiconductor (MOS) devices." Nuclear Instruments and Methods in Physics Research Section B: Beam Interactions with Materials and Atoms 267, no. 18 (September 2009): 3032–36. http://dx.doi.org/10.1016/j.nimb.2009.06.051.

Full text
APA, Harvard, Vancouver, ISO, and other styles
5

Hsieh, Chin-Hua, Mu-Tung Chang, Yu-Jen Chien, Li-Jen Chou, Lih-Juann Chen, and Chii-Dong Chen. "Coaxial Metal-Oxide-Semiconductor (MOS) Au/Ga2O3/GaN Nanowires." Nano Letters 8, no. 10 (October 8, 2008): 3288–92. http://dx.doi.org/10.1021/nl8016658.

Full text
APA, Harvard, Vancouver, ISO, and other styles
6

Pakma, Osman. "Current Mechanism in -Gated Metal-Oxide-Semiconductor Devices." International Journal of Photoenergy 2012 (2012): 1–7. http://dx.doi.org/10.1155/2012/858350.

Full text
Abstract:
The present study aimed to examine the current density-voltage (J-V) characteristics of Al/HfO2/p-Si (MOS) structure at temperatures ranging between 100 and 320 K and to determine the structure’s current transport mechanism. The HfO2film was coated on a single side of the p-Si (111) crystal using the spin coating method. TheJ-Vmeasurements of the obtained structure at the temperatures between 100 and 320 K revealed that the current transport mechanism in the structure was compatible with the Schottky emission theory. The Schottky emission theory was also used to calculate the structure’s Schottky barrier heights (), dielectric constants () and refractive index values of the thin films at each temperature value. The dielectric constant and refractive index values were observed to decrease at decreasing temperatures. The capacitance-voltage (C-V) and conductance-voltage (G/ω-V) characteristics of Al/HfO2/p-Si (MOS) structure was measured in the temperature range of 100–320 K. The values of measuredCandG/ωdecrease in accumulation and depletion regions with decreasing temperature due to localized at Si/HfO2interface.
APA, Harvard, Vancouver, ISO, and other styles
7

Majkusiak, Bodgan, and Andrzej Mazurak. "Some Issues of Modeling the Double Barrier Metal-Oxide-Semiconductor Tunnel Structures." Advanced Materials Research 276 (July 2011): 77–85. http://dx.doi.org/10.4028/www.scientific.net/amr.276.77.

Full text
Abstract:
The paper discusses some issues of modeling the MOS tunnel structure with a gate stack containing a semiconductor quantum well (double barrier MOS system). The considerations are illustrated by simulations with the use of a theoretical model. Results of simulations are compared with experimental characteristics of fabricated DB MOS diodes.
APA, Harvard, Vancouver, ISO, and other styles
8

GILDENBLAT, G., and D. FOTY. "LOW TEMPERATURE MODELS OF METAL OXIDE SEMICONDUCTOR FIELD-EFFECT TRANSISTORS." International Journal of High Speed Electronics and Systems 06, no. 02 (June 1995): 317–73. http://dx.doi.org/10.1142/s0129156495000092.

Full text
Abstract:
We review the modeling of silicon MOS devices in the 10–300 K temperature range with an emphasis on the specifics of low-temperature operation. Recently developed one-dimensional models of long-channel transistors are discussed in connection with experimental determination and verification of the effective channel mobility in a wide temperature range. We also present analytical pseudo-two-dimensional models of short-channel devices which have been proposed for potential use in circuit simulators. Several one-, two-, and three-dimensional numerical models are discussed in order to gain insight into the more subtle details of the low-temperature device physics of MOS transistors and capacitors. Particular attention is paid to freezeout effects which, depending on the device design and the ambient temperature range, may or may not be important for actual device operation. The numerical models are applied to study the characteristic time scale of freezeout transients in the space-charge regions of silicon devices, to the analysis and suppression of delayed turn-off in MOS transistors with compensated channel, and to the temperature dependence of three-dimensional effects in short-channel, narrow-channel MOSFETs.
APA, Harvard, Vancouver, ISO, and other styles
9

Liu, Chong, and Xiao Li Fan. "Methods to Improve Properties of Gate Dielectrics in Metal-Oxide-Semiconductor." Advanced Materials Research 463-464 (February 2012): 1341–45. http://dx.doi.org/10.4028/www.scientific.net/amr.463-464.1341.

Full text
Abstract:
This essay aims to introduce development of gate dielectrics. In present-day society, Si-based MOS has met its physical limitation. Scientists are trying to find a better material to reduce the thickness and dimension of MOS devices. While substrate materials are required to have a higher mobility, gate dielectrics are expected to have high k, low Dit and low leakage current. I conclude dielectrics in both Si-based and Ge-based MOS devices and several measures to improve the properties of these gate dielectric materials. I also introduce studies on process in our group and some achievements we have got. Significantly, this essay points out the special interest in rare-earth oxides functioning as gate dielectrics in recent years and summarizes the advantages and problems should be resolved in future.
APA, Harvard, Vancouver, ISO, and other styles
10

Abdullah, K. A., M. J. Abdullah, F. K. Yam, and Z. Hassan. "Electrical characteristics of GaN-based metal-oxide-semiconductor (MOS) structures." Microelectronic Engineering 81, no. 2-4 (August 2005): 201–5. http://dx.doi.org/10.1016/j.mee.2005.03.007.

Full text
APA, Harvard, Vancouver, ISO, and other styles
More sources

Dissertations / Theses on the topic "MOS - Metal Oxide SemiConductor - Microprocessor"

1

Toni, Kotchikpa Arnaud. "Conception et intégration d'un convertisseur buck en technologie 28 nm CMOS orientée plateformes mobiles." Thesis, Lyon, 2019. http://www.theses.fr/2019LYSEI049.

Full text
Abstract:
Ce travail de thèse présente la conception d’un convertisseur Buck 3 états pour améliorer le comportement dynamique des tensions d’alimentations des microprocesseurs. La topologie du convertisseur est dans un premier temps, implémentée en technologie IBM CMOS 180 nm pour la validation de la structure 3 états. Le prototype réalisé utilise une tension d’entrée de 3.6V et génère une tension de sortie de 0.8V à 2V. Sa réponse aux transitoires de charge ne montre que 1 à 2% de surtension prouvant ainsi l’avantage du régulateur en dynamique. Le convertisseur 3 états est dans un deuxième temps intégré en technologie 28 nm CMOS HPM (cette technologie est essentiellement utilisée pour les microprocesseurs). Les résultats des tests effectués sur le prototype réalisé confirment les performances en économie d’énergie, de surface et de réponse dynamique. Ce prototype délivre en effet 0.5 à 1.2V en sortie pour 1.8V en entrée et présente un rendement maximal de 90%. Les mesures de régulation dynamique montrent qu’il permet d’obtenir moins de 5% de bruit sur le processeur et 10 mV/ns de commutation de tensio
This thesis work consists into the design of a 3 states buck converter targeting the improvement of dynamic regulation of microprocessors supplies. The topology of the converter is, at first, implemented in IBMCMOS 180 nm technology to validate the transient performances of the3 states regulator. The prototype in 180 nm, uses an input voltage of 3.6V and outputs a voltage in the range of 0.8V to 2V. Its response to load transients shows about 1% of undershoot and 2 % of overshoot, proving a good dynamic behavior for a simple structure compared to state of the art.The 3 states converter is then integrated in 28 nm CMOS HPM (technologymostly used for microprocessors desgn). The experimental results on the prototype confirm the performances in terms of energy and area savings, aswell as dynamic response. The chip delivers 0.5V to 1.2V from a 1.8V supply,and shows a 90% peak efficiency. The measurements of dynamic regulation show less than 5% of noise on the processor supply and 10 mV/ns outputvoltage switching for DVFS purpose
APA, Harvard, Vancouver, ISO, and other styles
2

Vranch, Richard Leslie. "Defects in irradiated MOS structures." Thesis, University of Cambridge, 1985. https://www.repository.cam.ac.uk/handle/1810/252810.

Full text
Abstract:
The MOS device is the basic switching element in modern integrated circuits, and its reliability is vital to the successful operation of electronic equipment. Exposure to ionising radiation seriously affects MOS devices because of charge trapping and the formation of defects at the silicon-silicon dioxide interface. After an introductory chapter on MOS devices and radiation effects, experiments are described which give information about the nature of the interface defects and how they interact with each other. A particular device current Irec is measured whose magnitude depends on the recombination of charge carriers at the defects. The device is so minute, and the interface so thin, that the paramagnetic defects are too few in number to be detected and identified by conventional electron spin resonance methods. However, the static and microwave magnetic fields corresponding to spin resonance affect the recombination of carriers on the defects, and this causes a detectable change in Irec. This phenomenon is called Spin-Dependent Recombination (SOR), and a survey of SOR studies in semiconductors is given in Chapter 2 . The experimental results confirm a model which suggests that SOR occurs between adjacent trapped pairs. The results of the experiments are compared with ESR data on similar (but much larger) MOS structures. Spin-Dependent Generation of carriers is also investigated. The recombination is also found to be strongly dependent on a static magnetic field of zero to 5 milliTesla, even with no microwaves. Results of experiments on these "non-resonant" spin-dependent effects are presented with a model, relating them to the resonance experiments, which involves the recombination of singlet and triplet electron-hole pairs in a magnetic field. Electrical charge injection can affect MOS devices in similar ways to ionising radiation, and this is discussed in Chapter 6. Experimental results are presented which show that there are spin-dependent effects associated with defects produced by electrical charge injection. There are two Appendices, on slow radiation-induced instabilities in MOS structures, and on the size of the recombination current Irec�
APA, Harvard, Vancouver, ISO, and other styles
3

Fleischer, Stephen. "A study of gate-oxide leakage in MOS devices." Thesis, [Hong Kong : University of Hong Kong], 1993. http://sunzi.lib.hku.hk/hkuto/record.jsp?B1364600X.

Full text
APA, Harvard, Vancouver, ISO, and other styles
4

Höhr, Timm. "Quantum-mechanical modeling of transport parameters for MOS devices /." Konstanz : Hartnung-Gorre, 2006. http://www.loc.gov/catdir/toc/fy0707/2007358987.html.

Full text
Abstract:
Originally presented as the author's thesis (Swiss Federal Institute of Technology), Diss. ETH No. 16228.
Summary in German and English, text in English. Includes bibliographical references (p. 123-132).
APA, Harvard, Vancouver, ISO, and other styles
5

Khan, Shamsul Arefin. "Deep sub-micron MOS transistor design and manufacturing sensitivity analysis /." Digital version accessible at:, 1999. http://wwwlib.umi.com/cr/utexas/main.

Full text
APA, Harvard, Vancouver, ISO, and other styles
6

Kottantharayil, Anil. "Low voltage hot carrier issues in deep sub-micron metal oxide semiconductor field effect transistors." [S.l. : s.n.], 2002. http://deposit.ddb.de/cgi-bin/dokserv?idn=963719645.

Full text
APA, Harvard, Vancouver, ISO, and other styles
7

Hossain, Md Tashfin Zayed. "Electrical characteristics of gallium nitride and silicon based metal-oxide-semiconductor (MOS) capacitors." Diss., Kansas State University, 2013. http://hdl.handle.net/2097/16942.

Full text
Abstract:
Doctor of Philosophy
Department of Chemical Engineering
James H. Edgar
The integration of high-κ dielectrics with silicon and III-V semiconductors is important due to the need for high speed and high power electronic devices. The purpose of this research was to find the best conditions for fabricating high-κ dielectrics (oxides) on GaN or Si. In particular high-κ oxides can sustain the high breakdown electric field of GaN and utilize the excellent properties of GaN. This research developed an understanding of how process conditions impact the properties of high-κ dielectric on Si and GaN. Thermal and plasma-assisted atomic layer deposition (ALD) was employed to deposit TiO₂ on Si and Al₂O₃ on polar (c-plane) GaN at optimized temperatures of 200°C and 280°C respectively. The semiconductor surface treatment before ALD and the deposition temperature have a strong impact on the dielectric’s electrical properties, surface morphology, stoichiometry, and impurity concentration. Of several etches considered, cleaning the GaN with a piranha etch produced Al₂O₃/GaN MOS capacitors with the best electrical characteristics. The benefits of growing a native oxide of GaN by dry thermal oxidation before depositing the high-κ dielectric was also investigated; oxidizing at 850°C for 30 minutes resulted in the best dielectric-semiconductor interface quality. Interest in nonpolar (m-plane) GaN (due to its lack of strong polarization field) motivated an investigation into the temperature behavior of Al₂O₃/m-plane GaN MOS capacitors. Nonpolar GaN MOS capacitors exhibited a stable flatband voltage across the measured temperature range and demonstrated temperature-stable operation.
APA, Harvard, Vancouver, ISO, and other styles
8

Shen, Pin-Chun. "Large-area CVD growth of two-dimensional transition metal dichalcogenides and monolayer MoS₂ and WS₂ metal-oxide-semiconductor field-effect transistors." Thesis, Massachusetts Institute of Technology, 2017. http://hdl.handle.net/1721.1/112003.

Full text
Abstract:
Thesis: S.M., Massachusetts Institute of Technology, Department of Electrical Engineering and Computer Science, 2017.
This electronic version was submitted by the student author. The certified thesis is available in the Institute Archives and Special Collections.
Cataloged from student-submitted PDF version of thesis.
Includes bibliographical references (pages 54-55).
Two-dimensional semiconducting materials such as MoS₂ and WS₂ have been attractive for use in ultra-scaled electronic and optoelectronic devices because of their atomically-thin thickness, direct band gap, and lack of dangling bonds. Methods for large-area growth of 2D semiconducting materials are needed to bring them to practical applications. This thesis aims to develop reliable methods for growing high-quality monolayer MoS₂ and WS₂ by CVD and explore their intrinsic electrical transport properties for electronic and optoelectronic device applications. The as-grown monolayer MoS₂ and WS₂ exhibit n-type semiconducting behavior with excellent optical properties. Various techniques are employed to characterize the CVD-grown materials, including photoluminescence, UV-visible absorption, Raman spectroscopy, X-ray photoelectron spectroscopy, and atomic force microscopy. Moreover, the electronic transport characteristics of single-layer CVD-grown MoS₂ and WS₂ field-effect transistors with a back-gated configuration are demonstrated.
by Pin-Chun Shen.
S.M.
APA, Harvard, Vancouver, ISO, and other styles
9

Ullah, Syed Shihab. "Solution Processing Electronics Using Si6 H12 Inks: Poly-Si TFTs and Co-Si MOS Capacitors." Thesis, North Dakota State University, 2011. https://hdl.handle.net/10365/28902.

Full text
Abstract:
The development of new materials and processes for electronic devices has been driven by the integrated circuit (IC) industry since the dawn of the computer era. After several decades of '"Moore's Law"-type innovation, future miniaturization may be slowed down by materials and processing limitations. By way of comparison, the nascent field of flexible electronics is not driven by the smallest possible circuit dimension, but instead by cost and form-factor where features typical of 1970s CMOS (i.e., channel length - IO ?m) will enable flexible electronic technologies such as RFID, e-paper, photovoltaics and health monitoring devices. In this thesis. cyclohexasilane is proposed and used as a key reagent in solution processing of poly-Si and Co-Si thin films with the former used as the active layer in thin film transistors (TFTs) and the latter as the gate metal in metal-oxide-semiconductor (MOS) capacitors. A work function of 4.356 eV was determined for the Co-Si thin films via capacitance-voltage (C-Y) characterization which differs slightly from that extracted from ultraviolet photoemission spectroscopy (UPS) data (i.e., 4.8 eV). Simulation showed the difference between the C-V and UPS-derived data may be attributed to the existence of 8.3 x 10 (exponent 10) cm-2 interface charge density in the oxide-semiconductor junction. Poly-Si TFTs prepared using Si6 H12-based inks maintained the following electrical attributes: field effect mobility of 0.1 cm2V-1s-1; threshold voltage of 66 V; and, an on/off ratio of 1630. A BSIM3 version 3 NFET model was modified through global parametric extraction procedure to match the transfer characteristics of the fabricated poly-Si TFT. It is anticipated that this model can be utilized for future design simulation for solution-processed poly-Si circuits.
APA, Harvard, Vancouver, ISO, and other styles
10

Kobayashi, Takuma. "Study on Defects in SiC MOS Structures and Mobility-Limiting Factors of MOSFETs." Kyoto University, 2018. http://hdl.handle.net/2433/232043.

Full text
APA, Harvard, Vancouver, ISO, and other styles
More sources

Books on the topic "MOS - Metal Oxide SemiConductor - Microprocessor"

1

Nicollian, E. H. MOS (metal oxide semiconductor) physics and technology. Hoboken, N.J: Wiley-Interscience, 2003.

Find full text
APA, Harvard, Vancouver, ISO, and other styles
2

Paul, Reinhold. MOS-Feldeffekttransistoren. Berlin: Springer-Verlag, 1994.

Find full text
APA, Harvard, Vancouver, ISO, and other styles
3

Schroder, Dieter K. Advanced MOS devices. Reading, Mass: Addison-Wesley Pub. Co., 1990.

Find full text
APA, Harvard, Vancouver, ISO, and other styles
4

Schroder, Dieter K. Advanced MOS devices. Reading, Mass: Addison-Wesley Pub. Co., 1987.

Find full text
APA, Harvard, Vancouver, ISO, and other styles
5

Tsividis, Yannis. Operation and modeling of the MOS transistor. 3rd ed. New York: Oxford University Press, 2010.

Find full text
APA, Harvard, Vancouver, ISO, and other styles
6

Tsividis, Yannis. Operation and modeling of the MOS transistor. 3rd ed. New York: Oxford University Press, 2010.

Find full text
APA, Harvard, Vancouver, ISO, and other styles
7

Tsividis, Yannis. Operation and modeling of the MOS transistor. 3rd ed. New York: Oxford University Press, 2011.

Find full text
APA, Harvard, Vancouver, ISO, and other styles
8

C, Sansen Willy M., and Maes H. E, eds. Matching properties of deep sub-micron MOS transistors. New York: Springer, 2005.

Find full text
APA, Harvard, Vancouver, ISO, and other styles
9

Quantum-mechanical modeling of transport parameters for MOS devices. Konstanz: Hartnung-Gorre, 2006.

Find full text
APA, Harvard, Vancouver, ISO, and other styles
10

Charge-based MOS transistor modelling: The EKV model for low-power and RF IC design. Chichester, UK: John Wiley & Sons, 2006.

Find full text
APA, Harvard, Vancouver, ISO, and other styles
More sources

Book chapters on the topic "MOS - Metal Oxide SemiConductor - Microprocessor"

1

Bentarzi, Hamid. "The MOS Structure." In Transport in Metal-Oxide-Semiconductor Structures, 5–16. Berlin, Heidelberg: Springer Berlin Heidelberg, 2011. http://dx.doi.org/10.1007/978-3-642-16304-3_2.

Full text
APA, Harvard, Vancouver, ISO, and other styles
2

Bentarzi, Hamid. "The MOS Oxide and Its Defects." In Transport in Metal-Oxide-Semiconductor Structures, 17–28. Berlin, Heidelberg: Springer Berlin Heidelberg, 2011. http://dx.doi.org/10.1007/978-3-642-16304-3_3.

Full text
APA, Harvard, Vancouver, ISO, and other styles
3

Bentarzi, Hamid. "Review of Transport Mechanism in Thin Oxides of MOS Devices." In Transport in Metal-Oxide-Semiconductor Structures, 29–37. Berlin, Heidelberg: Springer Berlin Heidelberg, 2011. http://dx.doi.org/10.1007/978-3-642-16304-3_4.

Full text
APA, Harvard, Vancouver, ISO, and other styles
4

Bentarzi, Hamid. "Theoretical Model of Mobile Ions Distribution and Ionic Current in the MOS Oxide." In Transport in Metal-Oxide-Semiconductor Structures, 83–102. Berlin, Heidelberg: Springer Berlin Heidelberg, 2011. http://dx.doi.org/10.1007/978-3-642-16304-3_7.

Full text
APA, Harvard, Vancouver, ISO, and other styles
5

Murray, Alan F., and H. Martin Reekie. "Introduction to MOS (Metal-Oxide-Semiconductor) Devices and Logic." In Integrated Circuit Design, 14–42. London: Macmillan Education UK, 1987. http://dx.doi.org/10.1007/978-1-349-18758-4_2.

Full text
APA, Harvard, Vancouver, ISO, and other styles
6

Murray, Alan F., and H. Martin Reekie. "Introduction to MOS (Metal-Oxide-Semiconductor) Devices and Logic." In Integrated Circuit Design, 14–42. New York, NY: Springer New York, 1987. http://dx.doi.org/10.1007/978-1-4899-6675-9_2.

Full text
APA, Harvard, Vancouver, ISO, and other styles
7

Frank, Thomas, Svetlana Beljakowa, Gerhard Pensl, Tsunenobu Kimoto, and Valery V. Afanas'ev. "Control of the Flatband Voltage of 4H-SiC Metal-Oxide Semiconductor (MOS) Capacitors by Co-Implantation of Nitrogen and Aluminum." In Materials Science Forum, 555–60. Stafa: Trans Tech Publications Ltd., 2007. http://dx.doi.org/10.4028/0-87849-442-1.555.

Full text
APA, Harvard, Vancouver, ISO, and other styles
8

Moon, Jeong Hyun, Dong Hwan Kim, Ho Keun Song, Jeong Hyuk Yim, Wook Bahng, Nam Kyun Kim, Kwang Seok Seo, and Hyeong Joon Kim. "Electrical Properties of Metal-Oxide-Semiconductor (MOS) Structures on 4H-SiC(0001) Formed by Oxidizing Pre-Deposited SixNy." In Materials Science Forum, 647–50. Stafa: Trans Tech Publications Ltd., 2007. http://dx.doi.org/10.4028/0-87849-442-1.647.

Full text
APA, Harvard, Vancouver, ISO, and other styles
9

Beljakowa, Svetlana, Thomas Frank, Gerhard Pensl, Kun Yuan Gao, F. Speck, and Thomas Seyller. "4H-SiC Metal-Oxide-Semiconductor (MOS) Capacitors Fabricated by Oxidation in a Tungsten Lamp Furnace in Combination with a Microwave Plasma and Subsequent Deposition of Al2O3." In Materials Science Forum, 627–30. Stafa: Trans Tech Publications Ltd., 2007. http://dx.doi.org/10.4028/0-87849-442-1.627.

Full text
APA, Harvard, Vancouver, ISO, and other styles
10

García-Ramírez, Mario Alberto, Miguel Angel Bello-Jiménez, María Esther Macías-Rodríguez, Barbara Cortese, José Trinidad Guillen-Bonilla, Rosa Elvia López-Estopier, Juan Carlos Gutiérrez-García, and Everardo Vargas-Rodríguez. "MOS Meets NEMS: The Born of Hybrid Devices." In Complementary Metal Oxide Semiconductor. InTech, 2018. http://dx.doi.org/10.5772/intechopen.78758.

Full text
APA, Harvard, Vancouver, ISO, and other styles

Conference papers on the topic "MOS - Metal Oxide SemiConductor - Microprocessor"

1

Yeoh Lai Seng and M. J. Abdullah. "A study of changes in oxide properties on metal-oxide-semiconductor (MOS) structure after electrical overstress." In 2004 IEEE International Conference on Semiconductor Electronics. IEEE, 2004. http://dx.doi.org/10.1109/smelec.2004.1620833.

Full text
APA, Harvard, Vancouver, ISO, and other styles
2

Misra, Abhishek, Manali Khare, Anil Kottantharayil, Hemen Kalita, and M. Aslam. "Extraction of graphene/TiN work function using metal oxide semiconductor (MOS) test structure." In 2012 International Conference on Emerging Electronics (ICEE 2012). IEEE, 2012. http://dx.doi.org/10.1109/icemelec.2012.6636272.

Full text
APA, Harvard, Vancouver, ISO, and other styles
3

Nematian, Hamed, and Morteza Fathipour. "Reducing breakdown voltages in impact ionization Metal-Oxide-Semiconductor (I-MOS) devices using hetero structure." In 2008 Conference on Optoelectronic and Microelectronic Materials and Devices (COMMAD). IEEE, 2008. http://dx.doi.org/10.1109/commad.2008.4802104.

Full text
APA, Harvard, Vancouver, ISO, and other styles
4

Umar, Muhamad Darwis, L. T. Handoko, and Masbah R. T. Siregar. "How Do Gas, Temperature and Oxygen Pressure Change the Conductivity of Metal Oxide Semiconductor (MOS) Thin Film? : A Theoretical Study with Point Defect Theory." In INTERNATIONAL WORKSHOP ON ADVANCED MATERIAL FOR NEW AND RENEWABLE ENERGY. AIP, 2009. http://dx.doi.org/10.1063/1.3243256.

Full text
APA, Harvard, Vancouver, ISO, and other styles
5

Teo, J. K. J., C. M. Chua, L. S. Koh, and J. C. H. Phang. "Characterization of MOS Transistors Using Dynamic Backside Reflectance Modulation Technique." In ISTFA 2011. ASM International, 2011. http://dx.doi.org/10.31399/asm.cp.istfa2011p0170.

Full text
Abstract:
Abstract The channel of metal-oxide-semiconductor (MOS) transistors at different modes of operation has been characterized using dynamic backside laser reflectance modulation technique for different NMOS and PMOS transistors with different channel lengths. The reflectance modulations contain a primary peak near the drain-end when the MOS transistor is in saturation mode. Comparison studies with a Pseudo-Two-Dimensional analytical model support the hypothesis that the observed peak corresponds to the pinch-off point.
APA, Harvard, Vancouver, ISO, and other styles
6

Ivanov, Denis, Ilya Marinov, Yuriy Gorbachev, Alexander Smirnov, and Valeria Krzhizhanovskaya. "Computer Simulation of Laser Annealing of a Nanostructured Surface." In ASME 2009 International Design Engineering Technical Conferences and Computers and Information in Engineering Conference. ASMEDC, 2009. http://dx.doi.org/10.1115/detc2009-87087.

Full text
Abstract:
Laser annealing technology is used in mass production of new-generation semiconductor materials and nano-electronic devices like the MOS-based (metal–oxide–semiconductor) integrated circuits. Manufacturing sub-100 nm MOS devices demands application of ultra-shallow doping (junctions), which requires rapid high-temperature annealing to increase dopant electrical activation and remove implantation defects in the silicon [1].
APA, Harvard, Vancouver, ISO, and other styles
7

Perkins, John F., Richard H. Hopkins, Charles D. Brandt, Anant K. Agarwal, Suresh Seshadri, and Richard R. Siergiej. "SiC High Temperature Electronics for Next Generation Aircraft Controls Systems." In ASME 1996 International Gas Turbine and Aeroengine Congress and Exhibition. American Society of Mechanical Engineers, 1996. http://dx.doi.org/10.1115/96-gt-106.

Full text
Abstract:
Several organizations, including Westinghouse, CREE, and ATM, as well as researchers in Japan and Europe, are working to develop SiC power devices for reliable, high power and high temperature environments in military, industrial, utility, and automotive applications. Other organizations, such as NASA Lewis and several universities, are also doing important basic work on basic SiC technology development. It has been recognized for two decades that the superior properties of SiC lead to range of devices with higher power, greater temperature tolerance, and significantly more radiation hardness than silicon or GaAs. This combination of superior thermal and electrical properties results in SiC devices that can operate at up to ten times the power density of Si devices for a given volume. Recent research has focused on the development of vertical metal oxide semiconductor field effect transistor (VMOSFET) power device technology, and complementary high speed, temperature-tolerant rectifier-diodes for power applications. We are also evaluating applications for field control thyristors (FCT) and MOS turn-off thyristors (MTO). The technical issues to be resolved for these devices are also common to other power device structures. The present paper reviews the relative benefits of various power devices structures, with emphasis on how the special properties of SiC enhance the desirability of specific device configurations as compared to the Si-based versions of these devices. Progress in SiC material quality and recent power device research will be reviewed, and the potential for SiC-based devices to operate at much higher temperatures than Si-based devices, or with enhanced reliability at higher temperatures will be stressed. We have already demonstrated 1000V breakdown, current densities of 1 kA/cm2, and measurements up to 400°C in small diodes. The extension of this work will enable the implementation of highly distributed aircraft power control systems, as well as actuator and signal conditioning electronics for next generation engine sensors, by permitting electronic circuits, sensors and smart actuators to be mounted on or at the engine.
APA, Harvard, Vancouver, ISO, and other styles
You might also be interested in the extended bibliographies on the topic 'MOS - Metal Oxide SemiConductor - Microprocessor' for particular source types:
Journal articles Dissertations / Theses Books
We offer discounts on all premium plans for authors whose works are included in thematic literature selections. Contact us to get a unique promo code!

To the bibliography