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Journal articles on the topic 'Multiplier - accelerator'

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Published: 3 June 2025

Last updated: 20 July 2025

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1

Ma, Yanhua, Qican Xu, and Zerui Song. "Resource-Efficient Optimization for FPGA-Based Convolution Accelerator." Electronics 12, no. 20 (2023): 4333. http://dx.doi.org/10.3390/electronics12204333.

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Convolution forms one of the most essential operations for the FPGA-based hardware accelerator. However, the existing designs often neglect the inherent architecture of FPGA, which puts forward an austere challenge on hardware resource. Even though some previous works have proposed approximate multipliers or convolution acceleration algorithms to deal with this issue, the inevitable accuracy loss and resource occupation easily lead to performance degradation. Toward this, we first propose two kinds of resource-efficient optimized accurate multipliers based on LUTs or carry chains. Then, target

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2

Choubey, Abhishek, and Shruti Bhargava Choubey. "An area-delay efficient Radix-8 12x12 Booth multiplier in CMOS for ML accelerator." ITM Web of Conferences 74 (2025): 02007. https://doi.org/10.1051/itmconf/20257402007.

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The multiplier is a significant module of graphics processing units (GPUs) and digital signal processing (DSP). These applications need low power consumption. This paper proposes a low-power radix-8 12-by-12 Booth multiplier. The proposed radix-8 Booth multiplier is implemented using an optimized Binary to 2-’s complement (B2C), convertor, and optimized multiplexer at each stage of the Booth multiplier architecture. The proposed architecture uses 23% less power and 12% less delay compared to existing architecture. To validate the results, all designs are synthesized using Cadence CMOS technolo

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3

Puu, Tönu. "Multiplier-accelerator models revisited." Regional Science and Urban Economics 16, no. 1 (1986): 81–95. http://dx.doi.org/10.1016/0166-0462(86)90014-1.

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4

Sonbul, Omar S. "A Flexible Hardware Accelerator for Booth Polynomial Multiplier." Applied Sciences 14, no. 8 (2024): 3323. http://dx.doi.org/10.3390/app14083323.

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This article presents a parameterized/flexible hardware accelerator design tailored for the Booth polynomial multiplication method. The flexibility is achieved by allowing users to compute multiplication operations across various operand lengths, reaching up to 212 or 4096 bits. Our optimization strategy involves resource reuse, effectively minimizing the overall area cost of the Booth accelerator design. A comprehensive evaluation compares the proposed multiplier design with several non-digitized bit-serial polynomial multiplication accelerators. Implementation is realized in Verilog HDL usin

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5

Su, Guantong, and Guoqiang Bai. "Towards High-Performance Supersingular Isogeny Cryptographic Hardware Accelerator Design." Electronics 12, no. 5 (2023): 1235. http://dx.doi.org/10.3390/electronics12051235.

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Cryptosystems based on supersingular isogeny are a novel tool in post-quantum cryptography. One compelling characteristic is their concise keys and ciphertexts. However, the performance of supersingular isogeny computation is currently worse than that of other schemes. This is primarily due to the following factors. Firstly, the underlying field is a quadratic extension of the finite field, resulting in higher computational complexity. Secondly, the strategy for large-degree isogeny evaluation is complex and dependent on the elementary arithmetic units employed. Thirdly, adapting the same hard

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6

Westerhoff, Frank H. "Samuelson's multiplier–accelerator model revisited." Applied Economics Letters 13, no. 2 (2006): 89–92. http://dx.doi.org/10.1080/13504850500390663.

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7

Tarasova, Valentina V., and Vasily E. Tarasov. "Accelerator and Multiplier for Macroeconomic Processes with Memory." IRA-International Journal of Management & Social Sciences (ISSN 2455-2267) 9, no. 3 (2017): 86. http://dx.doi.org/10.21013/jmss.v9.v3.p1.

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The paper proposes an approach to the description of macroeconomic phenomena, which takes into account the effects of fading memory. The standard notions of the accelerator and the multiplier are very limited, since the memory of economic agents is neglected. We consider the methods to describe the economic processes with memory, which is characterized by the fading of a power-law type. Using the mathematical tools of derivatives and integrals of non-integer orders, we suggest a generalization of the concept of the accelerator and multiplier. We derive the equations of the accelerator with mem

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8

Umer, Usama, Muhammad Rashid, Adel R. Alharbi, Ahmed Alhomoud, Harish Kumar, and Atif Raza Jafri. "An Efficient Crypto Processor Architecture for Side-Channel Resistant Binary Huff Curves on FPGA." Electronics 11, no. 7 (2022): 1131. http://dx.doi.org/10.3390/electronics11071131.

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This article presents an efficient crypto processor architecture for point multiplication acceleration of side-channel secured Binary Huff Curves (BHC) on FPGA (field-programmable gate array) over GF(2233). We have implemented six finite field polynomial multiplication architectures, i.e., (1) schoolbook, (2) hybrid Karatsuba, (3) 2-way-karatsuba, (4) 3-way-toom-cook, (5) 4-way-toom-cook and (6) digit-parallel-least-significant. For performance evaluation, each implemented polynomial multiplier is integrated with the proposed BHC architecture. Verilog HDL is used for the implementation of all

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9

Bertels, Jonas, Hilder V. L. Pereira, and Ingrid Verbauwhede. "FINAL bootstrap acceleration on FPGA using DSP-free constant-multiplier NTTs." IACR Transactions on Cryptographic Hardware and Embedded Systems 2025, no. 3 (2025): 293–316. https://doi.org/10.46586/tches.v2025.i3.293-316.

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This work showcases Quatorze-bis, a state-of-the-art Number Theoretic Transform circuit for TFHE-like cryptosystems on FPGAs. It contains a novel modular multiplication design for modular multiplication with a constant for a constant modulus. This modular multiplication design does not require any DSP units or any dedicated multiplier unit, nor does it require extra logic when compared to the state-of-the-art modular multipliers. Furthermore, we present an implementation of a constant multiplier Number Theoretic Transform design for TFHE-like schemes. Lastly, we use this Number Theoretic Trans

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10

N, Nikitha Reddy, Gogula Subash, Hemaditya P, and Maran Ponnambalam. "Low Power and Efficient Re-Configurable Multiplier for Accelerator." International Journal of Computer Communication and Informatics 4, no. 2 (2022): 1–11. http://dx.doi.org/10.34256/ijcci2221.

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Deep learning is a rising topic at the edge of technology, with applications in many areas of our lives, including object detection, speech recognition, natural language processing, and more. Deep learning's advantages of high accuracy, speed, and flexibility are now being used in practically all major sciences and technologies. As a result, any efforts to improve the performance of related techniques are worthwhile. We always have a tendency to generate data faster than we can analyse, comprehend, transfer, and reconstruct it. Demanding data-intensive applications such as Big Data. Deep Learn

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11

Mourao, Paulo Reis, and Irina Alina Popescu. "Revisiting a Macroeconomic Controversy: The Case of the Multiplier–Accelerator Effect." Economies 10, no. 10 (2022): 249. http://dx.doi.org/10.3390/economies10100249.

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This paper presents the bibliometrics of a Keynesian and neoclassical discussion about the multiplier–accelerator effect. Having its oldest roots in the 1930s, there was a special emphasis in the 1960s and 1970s on discussions regarding the dependence of current investment on economic growth (the accelerator effect). Through a bibliometric analysis, we also consider the Hicks–Samuelson contribution, also known as the multiplier–accelerator model. We identified, among other things, the most relevant authors on the topics, the economic areas that have been contributed to the most through keyword

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12

Huang, Pengfei, Bin Gong, Ke Chen, and Chenghua Wang. "Energy-Efficient Neural Network Acceleration Using Most Significant Bit-Guided Approximate Multiplier." Electronics 13, no. 15 (2024): 3034. http://dx.doi.org/10.3390/electronics13153034.

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The escalating computational demands of deep learning and large-scale models have led to a significant increase in energy consumption, highlighting the urgent need for more energy-efficient hardware designs. This study presents a novel weight approximation strategy specifically designed for quantized neural networks (NNs), resulting in the development of an efficient approximate multiplier leveraging most significant one (MSO) shifting. Compared to both energy-efficient logarithmic approximate multipliers and accuracy-prioritized non-logarithmic approximate multipliers, our proposed logarithmi

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13

Tang, Xiqin, Yang Li, Chenxiao Lin, and Delong Shang. "A Low-Power Area-Efficient Precision ScalableMultiplier with an Input Vector Systolic Structure." Electronics 11, no. 17 (2022): 2685. http://dx.doi.org/10.3390/electronics11172685.

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In this paper, a small-area low-power 64-bit integer multiplier is presented, which is suitable for portable devices or wireless applications. To save the area cost and power consumption, an input vector systolic (IVS) structure is proposed based on four 16-bit radix-8 Booth multipliers and a data input scheme is proposed to reduce the number of signal transitions. This structure is similar to a systolic array in matrix multiply units of a Convolutional Neural Network (CNN), but it reduces the number of processing elements by 3/4 concerning the same vector systolic accelerator in reference. Th

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Pérez-Montiel, José, Oscar Asenjo, and Carles Erbina. "A Harrodian Model that fits the Tourism-led Growth Hypothesis for Tourism-based Economies." European Journal of Tourism Research 27 (March 1, 2021): 2706. http://dx.doi.org/10.54055/ejtr.v27i.2126.

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The tourism-led growth hypothesis (TLGH) has been the subject of hundreds of investigations. However, most of these investigations have limited themselves to empirically verify a dynamic relationship between tourism receipts and economic activity, leaving aside the theoretical background or the baseline economic growth model on which the TLGH could be built. With this in mind, the authors present a multiplier-accelerator growth model and state that it is a good option to analyze the TLGH. This model fits the TLGH, since its long-run equilibrium positions are analogous to the TLGH. However, mul

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15

Alhomoud, Ahmed, Sajjad Shaukat Jamal, Saleh M. Altowaijri, Mohamed Ayari, Adel R. Alharbi, and Amer Aljaedi. "Large Field-Size Throughput/Area Accelerator for Elliptic-Curve Point Multiplication on FPGA." Applied Sciences 13, no. 2 (2023): 869. http://dx.doi.org/10.3390/app13020869.

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This article presents a throughput/area accelerator for elliptic-curve point multiplication over GF(2571). To optimize the throughput, we proposed an efficient hardware accelerator architecture for a fully recursive Karatsuba multiplier to perform polynomial multiplications in one clock cycle. To minimize the hardware resources, we have utilized the proposed Karatsuba multiplier for modular square implementations. Moreover, the Itoh-Tsujii algorithm for modular inverse computation is operated using multiplier resources. These strategies permit us to reduce the hardware resources of our impleme

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16

LUO, Yinghao, and Mingmin LUO. "DISCRETE TIME OR CONTINUOUS TIME, THAT IS THE QUESTION: THE CASE OF SAMUELSON’S MULTIPLIER-ACCELERATOR MODEL." Theoretical and Practical Research in the Economic Fields 7, no. 2 (2016): 155. http://dx.doi.org/10.14505/tpref.v7.2(14).04.

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A basic problem in economic dynamics is the choice of continuous-time or discrete-time in mathematical modeling. In this paper, we study the continuous-time Samuelson’s multiplier-accelerator model and compare this continuous-time model with its classical discrete-time model. We find that although time scales do not affect the probability of return to equilibrium solution in Samuelson’s multiplier-accelerator model, but time scales have an influence on the perfect symmetry of periodic motion.

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17

Rashid, Muhammad, Omar S. Sonbul, Muhammad Yousuf Irfan Zia, Muhammad Arif, Asher Sajid, and Saud S. Alotaibi. "Throughput/Area-Efficient Accelerator of Elliptic Curve Point Multiplication over GF(2233) on FPGA." Electronics 12, no. 17 (2023): 3611. http://dx.doi.org/10.3390/electronics12173611.

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This paper presents a throughput/area-efficient hardware accelerator architecture for elliptic curve point multiplication (ECPM) computation over GF(2233). The throughput of the proposed accelerator design is optimized by reducing the total clock cycles using a bit-parallel Karatsuba modular multiplier. We employ two techniques to minimize the hardware resources: (i) a consolidated arithmetic unit where we combine a single modular adder, multiplier, and square block instead of having multiple modular operators, and (ii) an Itoh–Tsujii inversion algorithm by leveraging the existing hardware res

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18

Fiorito, Luca. "An Institutionalist's Journey into the Years of High Theory: John Maurice Clark on the Accelerator-Multiplier Interaction." Journal of the History of Economic Thought 29, no. 4 (2007): 437–52. http://dx.doi.org/10.1080/10427710701666511.

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A few years ago, an article by Arnold Heertje and Peter Heemeijer (2002) triggered an articulate and stimulating debate among scholars on the intellectual origins of Paul Samuelson's multiplier-accelerator model (1939a, 1939b). The discussion, which involved the participation of Samuelson himself, centered on whether, and to what extent, Samuelson's 1939 seminal contributions were inspired by Roy Harrod's The Trade Cycle (1936). Heertje and Heemeijer argue that “there is little factual support for Samuelson's suggestion ascribing the model mainly to Alvin Hansen, his mentor in the days of the

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19

Bergström, Karl. "Keynesian Without the Policy: Why the Business Cycle is all about Business Confidence and Finance." Journal of Economic Analysis 2, no. 2 (2023): 114–29. http://dx.doi.org/10.58567/jea02020008.

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Many of Keynes´s ideas and concepts are proven correct in this paper. The demand side, mainly business investments, drives the economy. Business firms steer the business cycle via profit expectations and animal spirits. Injections to and withdrawals from the circular flow of income are multiplied throughout the economy in accordance with Keynes´s multiplier. A sudden and sharp rise in households´ saving rates has a detrimental effect on aggregate demand, in line with Keynes´s paradox of thrift. Finance, not saving in the S=I sense, is the necessary condition for business investments and econom

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20

Piiroinen, Petri T., and Srinivasan Raghavendra. "A Nonsmooth Extension of Samuelson’s Multiplier-Accelerator Model." International Journal of Bifurcation and Chaos 29, no. 10 (2019): 1930027. http://dx.doi.org/10.1142/s0218127419300271.

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Dynamical-systems approaches have historically been used in business-cycle theory to generate sustained oscillations in macroeconomic variables. We aim to contribute to this literature by extending the original Samuelson multiplier-accelerator model with a discontinuous stabilization policy in terms of government expenditure. We show that the nonsmoothness yields dynamics in terms of periodic orbits and irregular fluctuations, not found in the original Samuelson model. We also note with particular interest that our model is able to generate localized nonstationary dynamics, which is in contras

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21

Heertje, A. "On the Origin of Samuelson's Multiplier-Accelerator Model." History of Political Economy 34, no. 1 (2002): 207–18. http://dx.doi.org/10.1215/00182702-34-1-207.

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22

Demilkhanova, Bela A., and Amina Kh Murtazalieva. "MULTIPLIER AND ACCELERATOR EFFECTS IN THE REGIONAL ECONOMY." EKONOMIKA I UPRAVLENIE: PROBLEMY, RESHENIYA 5/4, no. 137 (2023): 62–68. http://dx.doi.org/10.36871/ek.up.p.r.2023.05.04.008.

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In order to evaluate the pair and multiple regression models that describe the causal relationships between the change in the gross regional product, the volume of investments in fixed capital and the refinancing rate, the article conducted an empirical study of the multiplicative effect and the accelerator effect in the economy of the Chechen Republic based on time series, the choice of dependent and independent variables based on the results of establishing correlations between them. An assessment of the correlation dependence between the change (increase) in investment volumes and the chang

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23

Eremin, V. V. "Modelling the Multiplier-Accelerator Effects of Large Investment Projects." Zhurnal Economicheskoj Teorii 17, no. 3 (2020): 574–88. http://dx.doi.org/10.31063/2073-6517/2020.17-3.5.

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24

Kendrick, David A., and George Shoukry. "Quarterly Fiscal Policy Experiments with a Multiplier-Accelerator Model." Computational Economics 44, no. 3 (2013): 269–93. http://dx.doi.org/10.1007/s10614-013-9389-4.

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Matsumoto, Akio, and Ferenc Szidarovszky. "Nonlinear multiplier–accelerator model with investment and consumption delays." Structural Change and Economic Dynamics 33 (June 2015): 1–9. http://dx.doi.org/10.1016/j.strueco.2015.01.003.

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Kolesov, A. Yu, A. N. Kulikov, and N. Kh Rozov. "Development of Landau turbulence in the multiplier-accelerator model." Doklady Mathematics 77, no. 3 (2008): 463–66. http://dx.doi.org/10.1134/s1064562408030381.

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Hochstein, Alan. "Accelerator vs Multiplier in a Production Possibility Curve Framework." International Advances in Economic Research 20, no. 3 (2014): 343–44. http://dx.doi.org/10.1007/s11294-014-9469-9.

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Ibrahim, Atef, and Fayez Gebali. "Compact Word-Serial Modular Multiplier Accelerator Structure for Cryptographic Processors in IoT Edge Nodes with Limited Resources." Mathematics 10, no. 5 (2022): 848. http://dx.doi.org/10.3390/math10050848.

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IoT is extensively used in many infrastructure applications, including telehealth, smart homes, smart grids, and smart cities. However, IoT has the weakest link in system security since it often has low processing and power resources. It is important to implement the necessary cryptographic primitives in these devices using extremely efficient finite field hardware structures. Modular multiplication is the core of cryptographic operators. Therefore, we present, in this work, a word-serial modular multiplier accelerator structure that provides the system designer with the ability to manage area

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29

Hernández Ortega, Andres Gonzálo, Braian Stiven Avella Rivera, Oscar Fernando Vera, and Jorge Orlando Bareño Quintero. "An in-depth-examination: comparative analysis of multiplication hardware accelerator algorithms in VHDL for 8-Bit Systems (WTM), (PBM) and (BWM) synthesized on an ALTERA-CYCLONE-II-DE1-Board." Ingenieria Solidaria 20, no. 2 (2024): 1–29. https://doi.org/10.16925/2357-6014.2024.02.10.

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This article presents an implementation and comparative analysis of 8-bit Wallace Tree Multiplier (WTM), Parallel Booth Multiplier (PBM), and Baugh-Wooley Multiplier (BWM) algorithms.Introduction: this article results from research conducted for a Master’s degree in Engineering at the Pedagogical and Technological University of Colombia (UPTC) between 2022 and 2024. It analyzes and compares the performan-ce of three multiplication algorithms (WTM, PBM, and BWM), focusing on variables such as operation time and the number of logical elements used.Problem:computing has advanced rapidly, enabling

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Inayat, Kashif, Fahad Bin Muslim, Javed Iqbal, Syed Agha Hassnain Mohsan, Hend Khalid Alkahtani, and Samih M. Mostafa. "Power-Intent Systolic Array Using Modified Parallel Multiplier for Machine Learning Acceleration." Sensors 23, no. 9 (2023): 4297. http://dx.doi.org/10.3390/s23094297.

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Systolic arrays are an integral part of many modern machine learning (ML) accelerators due to their efficiency in performing matrix multiplication that is a key primitive in modern ML models. Current state-of-the-art in systolic array-based accelerators mainly target area and delay optimizations with power optimization being considered as a secondary target. Very few accelerator designs directly target power optimizations and that too using very complex algorithmic modifications that in turn result in a compromise in the area or delay performance. We present a novel Power-Intent Systolic Array

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Lanchakov, Aleksandr B., Sergei A. Filin, and Aleksei Zh Yakushev. "ROLE OF “EARTH” PRODUCTION FACTOR AMONG OTHER PRODUCTION FACTORS." EKONOMIKA I UPRAVLENIE: PROBLEMY, RESHENIYA 11/3, no. 131 (2022): 152–60. http://dx.doi.org/10.36871/ek.up.p.r.2022.11.03.019.

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The purpose of the article is to propose recommendations to increase the role of the “earth” production factor among other factors of production. Models of the innovative multiplier-accelerator are presented, forming a synergistic effect in the interaction of production factors “earth” and “knowledge capital”. It is concluded that with the transition of the economy to the 6th technological structure, the increasing contribution to the economic growth of the capital of knowledge embodied in the relevant factors of production and the forms of their joint or autonomous functioning may, along with

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Ward, C. "An Accelerator for Real-Time Digital Signal Processing with Microprocessors." International Journal of Electrical Engineering & Education 24, no. 1 (1987): 65–72. http://dx.doi.org/10.1177/002072098702400114.

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An accelerator consisting of a fast digital multiplier and A/D and D/A converters is designed for the BBC microcomputer. The circuit enables ‘hands-on’ experience of digital signal processing to be provided at minimal cost. Examples of implementations of FIR filters and an autocorrelation algorithm are provided.

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Tarasova, Valentina, and Vasily Tarasov. "Exact Discretization of an Economic Accelerator and Multiplier with Memory." Fractal and Fractional 1, no. 1 (2017): 6. http://dx.doi.org/10.3390/fractalfract1010006.

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Heertje, A. "Further Evidence on the Origin of Samuelson's Multiplier-Accelerator Model." History of Political Economy 35, no. 2 (2003): 329–31. http://dx.doi.org/10.1215/00182702-35-2-329.

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Samuelson, Paul A. "The Keynes-Hansen-Samuelson multiplier-accelerator model of secular stagnation." Japan and the World Economy 1, no. 1 (1988): 3–19. http://dx.doi.org/10.1016/0922-1425(88)90003-5.

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Naimzada, A. K., and N. Pecora. "Dynamics of a multiplier–accelerator model with nonlinear investment function." Nonlinear Dynamics 88, no. 2 (2016): 1147–61. http://dx.doi.org/10.1007/s11071-016-3301-4.

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Soldatos, Gerasimos T. "Multiplier–Accelerator Interaction in the Presence of an Underground Economy and Taxation." Margin: The Journal of Applied Economic Research 12, no. 2 (2018): 244–56. http://dx.doi.org/10.1177/0973801018757235.

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This article introduces the underground economy into a standard multiplier-accelerator model with linear progressive income taxation. The main results are that this introduction increases the instability of the overall economy towards chaos, that tax policy plays a critical role in preserving stability even if in the sense of a uniform cycle and that the operation of the accelerator may be countering the negative effect of tax evasion on tax revenue. JEL Classification: O17, E32, H24

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Demeuov, N., and A. Yesdauletova. "ANALYSIS OF FOREIGN DIRECT INVESTMENT FLOW IN THE REPUBLIC OF KAZAKHSTAN BASED ON THE ACCELERATOR MODEL." ECONOMIC SERIES OF THE BULLETIN OF THE L.N. GUMILYOV ENU 143, no. 2 (2023): 176–84. http://dx.doi.org/10.32523/2789-4320-2023-2-176-184.

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Foreign direct investments play a vital role in the economy of the Republic of Kazakhstan. Nowadays, foreign direct investments are considered to be one of the key aspects in economic integration of countries through creation and facilitation of beneficial links between various countries and economies. The purpose of the paper is to analyze the flow of foreign direct investment in the economy of the Republic of Kazakhstan and its impact on the gross domestic product using the theory of the multiplier-accelerator. While conducting the research the following scientific methods were employed: com

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Xu, Changbao, Hongzhou Yu, Wei Xi, Jianyang Zhu, Chen Chen, and Xiaowen Jiang. "A Polynomial Multiplication Accelerator for Faster Lattice Cipher Algorithm in Security Chip." Electronics 12, no. 4 (2023): 951. http://dx.doi.org/10.3390/electronics12040951.

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Polynomial multiplication is the most computationally expensive part of the lattice-based cryptography algorithm. However, the existing acceleration schemes have problems, such as low performance and high hardware resource overhead. Based on the polynomial multiplication of number theoretic transformation (NTT), this paper proposed a simple element of Montgomery module reduction with pipeline structure to realize fast module multiplication. In order to improve the throughput of the NTT module, the block storage technology is used in the NTT hardware module to enable the computing unit to read

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Long, Luo. "Trifold frequency multiplier based on mixer for the feedback system of BEPC II." Journal of Electronic Research and Application 3, no. 6 (2019): 11–13. http://dx.doi.org/10.26689/jera.v3i6.1059.

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This paper will introduce the structure, development process, test and experiment of trifold frequency multiplier by using mixer and its application in accelerator fields. This invent includes a power splitter, a frequency doubler, a mixer, a bandpass filter, an amplifier and several RG233 cables. One 500MHz signal which always is provide by the timing system of the accelerator is input to a power splitter, a power splitter could divide one signal into two signals with equal magnitude, one is directly input to the LO port of mixer, the other is input to frequency doubler then 1.0 GHz signal wi

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Kazakova, O. B., and N. A. Kuzminykh. "The multiplier accelerator theory in the study of municipal-level investment." R-economy 3, no. 2 (2017): 82–89. http://dx.doi.org/10.15826/recon.2017.3.2.010.

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Farkas, Z. D. "Binary Peak Power Multiplier and its Application to Linear Accelerator Design." IEEE Transactions on Microwave Theory and Techniques 34, no. 10 (1986): 1036–43. http://dx.doi.org/10.1109/tmtt.1986.1133493.

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Puu, Tönu, Laura Gardini, and Irina Sushko. "A Hicksian multiplier-accelerator model with floor determined by capital stock." Journal of Economic Behavior & Organization 56, no. 3 (2005): 331–48. http://dx.doi.org/10.1016/j.jebo.2003.10.008.

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Shakirah Hashim and Mohammed Benaissa. "Integer Based Fully Homomorphic DSP Accelerator using Weighted-Number Theoretic Transform." Journal of Advanced Research in Applied Sciences and Engineering Technology 30, no. 3 (2023): 362–71. http://dx.doi.org/10.37934/araset.30.3.362371.

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Fully Homomorphic Encryption (FHE) has gained wide attention in cloud security as it allows computation on encrypted data. However, it requires a huge key size, resulting in impractical execution time. In this paper, we proposed an FHE hardware accelerator employing Weighted-Number Theoretic Transform (NTT) multiplier. NTT parameters are selected, in a way that the proposed design is executable on Digital Signal Processing (DSP) multiplier, to exploit its high clock rate. As the NTT kernel, is in general form, it can be pre-computed and stored in Look-up Tables (LUTs). The same LUTs are also u

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Salazar, G., and S. Szidat. "REASSESSMENT OF UNCERTAINTY EXPANSION BY LINEAR ADDITION OF LONG-TERM COMPONENTS FROM TOP-DOWN INFORMATION." Radiocarbon 63, no. 6 (2021): 1657–71. http://dx.doi.org/10.1017/rdc.2021.96.

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ABSTRACTSince radiocarbon accelerator mass spectrometry (14C AMS) is considered a high-precision technique, reassessment of the measurement uncertainty has been a topic of interest. Scientists from analytical and metrological fields have developed the top-down and bottom-up measurement of uncertainty approaches. The 14C quoted error should approximate the uncertainty of long-term repetitions of the top-down approach in order to be realistic. The novelty of this paper is that the uncertainty of both approaches were approximated to each other. Furthermore, we apportioned the graphitization, inst

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Sajid, Asher, Omar S. Sonbul, Muhammad Rashid, Atif Raza Jafri, Muhammad Arif, and Muhammad Yousuf Irfan Zia. "A Crypto Accelerator of Binary Edward Curves for Securing Low-Resource Embedded Devices." Applied Sciences 13, no. 15 (2023): 8633. http://dx.doi.org/10.3390/app13158633.

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This research presents a novel binary Edwards curve (BEC) accelerator designed specifically for resource-constrained embedded systems. The proposed accelerator incorporates the fixed window algorithm, a two-stage pipelined architecture, and the Montgomery radix-4 multiplier. As a result, it achieves remarkable performance improvements in throughput and resource utilization. Experimental results, conducted on various Xilinx Field Programmable Gate Arrays (FPGAs), demonstrate impressive throughput/area ratios observed for GF(2233). The achieved ratios for Virtex-4, Virtex-5, Virtex-6, and Virtex

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Aregbeyen, Omo, and Taofik Ibrahim Mohammed. "Public Investment and Output Performance: Evidence from Nigeria." Zagreb International Review of Economics and Business 19, no. 1 (2016): 1–24. http://dx.doi.org/10.1515/zireb-2016-0001.

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Abstract This study examined the direct/indirect long-run relationships and dynamic interactions between public investment (PI) and output performance in Nigeria using annual data spanning 1970-2010. A macro-econometric model derived from Keynes’ income-expenditure framework was employed. The model was disaggregated into demand and supply sides to trace the direct and indirect effects of PI on aggregate output. The direct supply side effect was assessed using the magnitude of PI multiplier coefficient, while the indirect effect of PI on the demand side was evaluated with marginal propensity to

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Hsieh, Ming-Hang, Yu-Tung Liu, and Tzi-Dar Chiueh. "A Multiplier-Less Convolutional Neural Network Inference Accelerator for Intelligent Edge Devices." IEEE Journal on Emerging and Selected Topics in Circuits and Systems 11, no. 4 (2021): 739–50. http://dx.doi.org/10.1109/jetcas.2021.3116044.

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Siven, C. H. "Heertje, Heemeijer, and Samuelson on the Origin of Samuelson's Multiplier-Accelerator Model." History of Political Economy 35, no. 2 (2003): 323–27. http://dx.doi.org/10.1215/00182702-35-2-323.

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Biederman, Daniel K. "Permanent income and long-run stability in a generalized multiplier/accelerator model." Journal of Macroeconomics 15, no. 2 (1993): 249–72. http://dx.doi.org/10.1016/0164-0704(93)90027-j.

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